TLC59025IPWR [TI]
LOW-POWER 16-CHANNEL CONSTANT-CURRENT LED SINK DRIVER; 低功耗的16通道恒流LED驱动器
| 型号： | TLC59025IPWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER 16-CHANNEL CONSTANT-CURRENT LED SINK DRIVER |
| 文件： | 总21页 (文件大小：686K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC59025
www.ti.com ...................................................................................................................................................................................................... SLVS934–JUNE 2009
LOW-POWER 16-CHANNEL CONSTANT-CURRENT LED SINK DRIVER
1
FEATURES
•
16 Constant-Current Output Channels
•
•
•
Schmitt-Trigger Inputs
•
Matches Industry Standard IOUT to External
Resistor Ratio
3.3-V to 5-V Supply Voltage
Thermal Shutdown for Overtemperature
Protection
•
•
Constant Output Current Invariant to Load
Voltage Change
•
ESD Performance: 1-kV HBM
Excellent Output Current Accuracy:
APPLICATIONS
–
–
Between Channels: < ±5% (Max)
Between ICs: < ±6% (Max)
•
•
•
•
•
Gaming Machine / Entertainment
General LED Applications
LED Display Systems
Signs LED Lighting
•
Constant Output Current Range:
3 mA to 45 mA
•
•
Output Current Adjusted By External Resistor
White Goods
Fast Response of Output Current, OE (Min):
100 ns
•
30-MHz Clock Frequency
DESCRIPTION/ORDERING INFORMATION
The TLC59025 is designed for LED displays and LED lighting applications. The TLC59025 contains a 16-bit shift
register and data latches, which convert serial input data into parallel output format. At the TLC59025 output
stage, 16 regulated-current ports provide uniform and constant current for driving LEDs within a wide range of VF
variations. Used in system design for LED display applications (e.g., LED panels), the TLC59025 provides great
flexibility and device performance. Users can adjust the output current from 3 mA to 45 mA through an external
resistor, Rext, which gives flexibility in controlling the light intensity of LEDs. TLC59025 is designed for up to 17 V
at the output port. The high clock frequency, 30 MHz, also satisfies the system requirements of high-volume data
transmission.
The serial data is transferred into TLC59025 via SDI, shifted in the shift register, and transferred out via SDO. LE
can latch the serial data in the shift register to the output latch. OE enables the output drivers to sink current.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TLC59025IPWR
TOP-SIDE MARKING
PREVIEW
PW
Reel of 2000
–40°C to 85°C
W-SOIC – DW
SSOP – DBQ
Reel of 2000
Reel of 2000
TLC59025IDWR
PREVIEW
TLC59025
TLC59025IDBQR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TLC59025
SLVS934–JUNE 2009 ...................................................................................................................................................................................................... www.ti.com
BLOCK DIAGRAM
OUT0 OUT1
OUT14 OUT15
R-EXT
I/O REGULATOR
VDD
8
OUTPUT DRIVER
OE
LE
CONTROL
LOGIC
16
16
16-BIT OUTPUT
LATCH
CONFIGURATION
LATCHES
16
CLK
8
16-BIT SHIFT
REGISTER
SDI
SDO
16
2
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TLC59025
www.ti.com ...................................................................................................................................................................................................... SLVS934–JUNE 2009
DBQ, DW, OR PWP PACKAGE
(TOP VIEW)
1
GND
SDI
24 VDD
2
23
22
21
20
19
18
17
16
15
14
13
R-EXT
SDO
CLK
3
4
LE
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OE
5
OUT15
OUT14
OUT13
OUT12
OUT11
OUT10
OUT9
OUT8
6
7
8
9
10
11
12
Terminal Descriptions
TERMINAL
NAME
DESCRIPTION
CLK
Clock input for data shift on rising edge
GND
Ground for control logic and current sink
Data strobe input
Serial data is transferred to the respective latch when LE is high.
The data is latched when LE goes low.
LE has an internal pull-down resistor.
LE
Output enable
When OE is active (low), the output drivers are enabled.
When OE is high, all output drivers are turned OFF (blanked).
OE has an internal pullup resistor.
OE
OUT0–OUT15
R-EXT
SDI
Constant-current outputs
Input used to connect an external resistor (Rext) for setting output currents
Serial-data input to the Shift register
SDO
Serial-data output to the following SDI of next driver IC or to the microcontroller
Supply voltage
VDD
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TLC59025
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Timing Diagram
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
CLK
1
0
OE
LE
SDI
off
on
off
on
off
on
off
on
OUT0
OUT1
OUT2
OUT3
off
on
OUT15
SDO
Don't care
Figure 1. Timing Diagram
Truth Table in Normal Operation
CLK
LE
OE
L
SDI
OUT0...OUT15...OUT15
Dn...Dn – 7...Dn – 15
No change
SDO
↑
↑
↑
↓
↓
H
L
Dn
Dn – 15
Dn – 14
Dn – 13
Dn – 13
Dn – 13
L
Dn + 1
Dn + 2
Dn + 3
Dn + 3
H
X
X
L
Dn + 2...Dn – 5...Dn – 13
Dn + 2...Dn – 5...Dn – 13
off
L
H
4
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Product Folder Link(s): TLC59025
TLC59025
www.ti.com ...................................................................................................................................................................................................... SLVS934–JUNE 2009
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
MIN
0
MAX
7
UNIT
V
VDD
VI
Supply voltage
Input voltage
–0.4
–0.5
VDD + 0.4
20
V
VO
Output voltage
V
IOUT
IGND
TA
Output current
45
mA
mA
°C
°C
°C
GND terminal current
Operating free-air temperature range
Operating virtual-junction temperature range
Storage temperature range
750
–40
–40
–55
125
TJ
150
Tstg
150
Power Dissipation and Thermal Impedance
MIN
MAX
1.6
UNIT
DBQ package
DW package
PW package
DBQ package
DW package
PW package
DBQ package
DW package
PW package
Mounted on JEDEC 4-layer board (JESD 51-7),
No airflow, TA = 25°C, TJ = 125°C
PD
Power dissipation
2.2
W
1.1
99.8
80.5
118.8
61.0
45.5
87.9
Mounted on JEDEC 1-layer board (JESD 51-3),
No airflow
Thermal impedance,
junction to free air
θJA
°C/W
Mounted on JEDEC 4-layer board (JESD 51-7),
No airflow
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Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS
MIN
MAX
5.5
UNIT
V
VDD
VO
Supply voltage
Output voltage
3
OUT0 to OUT15
DC test circuit
17
V
V
O ≥ 0.6 V
O ≥ 1 V
3
IO
Output current
mA
V
45
IOH
IOL
VIH
VIL
tR
High-level output current
Low-level output current
High-level input voltage
Low-level input voltage
Rise time
SDO
–1
1
mA
mA
V
SDO
CLK, OE, LE, and SDI
0.7 × VDD
GND
VDD
0.3 × VDD
500
CLK, OE, LE, and SDI
V
CLK
CLK
ns
ns
tF
Fall time
500
Recommended Timing
VDD = 3 V to 5.5 V (unless otherwise noted)
MIN
MAX
UNIT
ns
tw(L)
LE pulse duration
CLK pulse duration
OE pulse duration
Setup time for SDI
Hold time for SDI
Setup time for LE
Hold time for LE
Clock frequency
15
15
300
3
tw(CLK)
tw(OE)
tsu(D)
th(D)
ns
ns
ns
2
ns
tsu(L)
th(L)
5
ns
5
ns
fCLK
Cascade operation
30
MHz
6
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TLC59025
www.ti.com ...................................................................................................................................................................................................... SLVS934–JUNE 2009
Electrical Characteristics
VDD = 3 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
Input voltage
TEST CONDITIONS
MIN
TYP
MAX UNIT
VDD
VO
3
5.5
17
V
V
Output voltage
V
O ≥ 0.6 V
O ≥ 1 V
3
IO
Output current
mA
mA
V
V
45
IOH
IOL
VIH
VIL
High-level output current, source
Low-level output current, sink
High-level input voltage
-1
1
0.7 × VDD
GND
VDD
0.3 × VDD
0.5
Low-level input voltage
TJ = 25°C
Ileak
Output leakage current
VOH = 17 V
µA
TJ = 125°C
2
VOH
VOL
High-level output voltage
Low-level output voltage
Output current 1
SDO, IOL = –1 mA
VDD – 0.4
V
V
SDO, IOH = 1 mA
0.4
VOUT = 0.6 V, Rext = 1440 Ω
13
±3
mA
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TJ = 25°C
Output current error, die-die
±6
±5
%
IO(1)
Output current error,
channel-to-channel
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TJ = 25°C
±1.5
26
%
mA
%
Output current 2
VO = 0.8 V, Rext = 720 Ω
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TJ = 25°C
Output current error, die-die
±3
±6
±5
IO(2)
Output current error,
channel-to-channel
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TJ = 25°C
±1.5
%
VO = 1 V to 3 V, IO = 13 mA
±0.1
±1
IOUT vs
VOUT
Output current vs
output voltage regulation
%/V
VDD = 3.0 V to 5.5 V, IO = 13 mA to 45 mA
Pullup resistance
OE
LE
500
500
175
15
kΩ
kΩ
°C
°C
Pulldown resistance
Overtemperature shutdown(1)
Tsd
150
200
Thys
Restart temperature hysteresis
Rext = Open
7
10
12
13
10
IDD
Supply current
Rext = 1440 Ω
9
mA
pF
Rext = 720 Ω
11
CIN
Input capacitance
VI = VDD or GND, CLK, SDI, SDO, OE
(1) Specified by design
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TLC59025
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Electrical Characteristics
VDD = 5.5 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
Input voltage
TEST CONDITIONS
MIN
TYP
MAX UNIT
VDD
VO
3
5.5
17
V
V
Output voltage
V
O ≥ 0.6 V
O ≥ 1 V
3
IO
Output current
mA
mA
V
V
45
IOH
IOL
VIH
VIL
High-level output current, source
Low-level output current, sink
High-level input voltage
-1
1
0.7 × VDD
GND
VDD
03 × VDD
0.5
Low-level input voltage
TJ = 25°C
Ileak
Output leakage current
VOH = 17 V
µA
TJ = 125°C
2
VOH
VOL
High-level output voltage
Low-level output voltage
Output current 1
SDO, IOL = –1 mA
VDD – 0.4
V
V
SDO, IOH = 1 mA
0.4
VOUT = 0.6 V, Rext = 1440 Ω
13
±3
mA
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TJ = 25°C
Output current error, die-die
±6
±5
%
IO(1)
Output current error,
channel-to-channel
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TJ = 25°C
±1.5
26
%
mA
%
Output current 2
VO = 0.8 V, Rext = 720 Ω
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TJ = 25°C
Output current error, die-die
±3
±6
±5
IO(2)
Output current error,
channel-to-channel
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TJ = 25°C
±1.5
%
VO = 1 V to 3 V , IO = 26 mA
±0.1
±1
IOUT vs
VOUT
Output current vs
output voltage regulation
%/V
VDD = 3.0 V to 5.5 V, IO = 13 mA to 45 mA
Pullup resistance
OE
LE
500
500
175
15
kΩ
kΩ
°C
°C
Pulldown resistance
Overtemperature shutdown(1)
Tsd
150
200
Thys
Restart temperature hysteresis
Rext = Open
9
11
14
16
10
IDD
Supply current
Rext = 1440 Ω
12
mA
pF
Rext = 720 Ω
14
CIN
Input capacitance
VI = VDD or GND, CLK, SDI, SDO, OE
(1) Specified by design
8
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TLC59025
www.ti.com ...................................................................................................................................................................................................... SLVS934–JUNE 2009
Switching Characteristics
VDD = 3 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
Low-to-high propagation delay time, CLK to OUTn
Low-to-high propagation delay time, LE to OUTn
Low-to-high propagation delay time, OE to OUTn
Low-to-high propagation delay time, CLK to SDO
High-to-low propagation delay time, CLK to OUTn
High-to-low propagation delay time, LE to OUTn
High-to-low propagation delay time, OE to OUTn
High-to-low propagation delay time, CLK to SDO
Pulse duration, CLK
TEST CONDITIONS
MIN
30
TYP
45
45
45
30
65
65
65
30
MAX UNIT
tPLH1
tPLH2
tPLH3
tPLH4
tPHL1
tPHL2
tPHL3
tPHL4
tw(CLK)
tw(L)
tw(OE)
th(D)
tsu(D)
th(L)
60
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
30
30
60
40
40
40
40
100
100
100
40
15
15
300
2
VIH = VDD, VIL = GND,
Rext = 720 Ω, VL = 4 V,
RL = 88 Ω, CL = 10 pF
Pulse duration LE
Pulse duration, OE
Hold time, SDI
Setup time, SDI
3
Hold time, LE
5
tsu(L)
tr
Setup time, LE
Rise time, CLK(1)
Fall time, CLK(1)
5
500
500
70
tf
tor
Rise time, outputs (off)
35
15
50
50
tof
Rise time, outputs (on)
120
fCLK
Clock frequency
Cascade operation
30 MHz
(1) If the devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer between two
cascaded devices.
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Switching Characteristics
VDD = 5.5 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
Low-to-high propagation delay time, CLK to OUTn
Low-to-high propagation delay time, LE to OUTn
Low-to-high propagation delay time, OE to OUTn
Low-to-high propagation delay time, CLK to SDO
High-to-low propagation delay time, CLK to OUTn
High-to-low propagation delay time, LE to OUTn
High-to-low propagation delay time, OE to OUTn
High-to-low propagation delay time, CLK to SDO
Pulse duration, CLK
TEST CONDITIONS
MIN
20
TYP
35
35
35
20
28
28
28
20
MAX UNIT
tPLH1
tPLH2
tPLH3
tPLH4
tPHL1
tPHL2
tPHL3
tPHL4
tw(CLK)
tw(L)
tw(OE)
th(D)
tsu(D)
th(L)
55
55
55
30
42
42
42
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
20
15
15
15
10
10
200
2
VIH = VDD, VIL = GND,
Rext = 720 Ω, VL = 4 V,
RL = 88 Ω, CL = 10 pF
Pulse duration LE
Pulse duration, OE
Hold time, SDI
Setup time, SDI
3
Hold time, LE
5
tsu(L)
tr
Setup time, LE
Rise time, CLK(1)
Fall time, CLK(1)
5
500
500
65
tf
tor
Rise time, outputs (off)
25
7
45
12
tof
Rise time, outputs (on)
20
fCLK
Clock frequency
Cascade operation
30 MHz
(1) If the devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer between two
cascaded devices.
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TLC59025
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PARAMETER MEASUREMENT INFORMATION
IDD
VDD
IOUT
OE
OUT0
IIH, IIL
CLK
LE
OUT15
SDO
SDI
VIH, VIL
R-EXT
GND
Iref
Figure 2. Test Circuit for Electrical Characteristics
IDD
IOUT
VDD
VIH, VIL
OUT0
OUT15
SDO
OE
CLK
LE
Function
Generator
RL
CL
SDI
R-EXT
GND
Logic input
waveform
Iref
VL
CL
VIH = VDD
VIL = 0V
Figure 3. Test Circuit for Switching Characteristics
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PARAMETER MEASUREMENT INFORMATION (continued)
tw(CLK)
CLK
SDI
50%
tsu(D)
50%
50%
th(D)
50%
50%
tPLH4, tPHL4
50%
SDO
tw(L)
50%
LE
tsu(L)
th(L)
LOW
OE
tPLH2, tPHL2
Output off
Output on
OUTn
50%
tPLH1, tPHL1
tw(OE)
HIGH
OE
50%
50%
tPLH3
tPHL3
Output off
90%
90%
OUTn
50%
50%
10%
10%
tof
tor
Figure 4. Normal Mode Timing Waveforms
12
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TLC59025
www.ti.com ...................................................................................................................................................................................................... SLVS934–JUNE 2009
APPLICATION INFORMATION
Operating Principles
Constant Current
In LED display applications, TLC59025 provides nearly no current variations from channel to channel and from
IC to IC. While IOUT ≤ 45 mA, the maximum current skew between channels is less than ±5% and between ICs is
less than ±6%.
Adjusting Output Current
TLC59025 sets IOUT based on the external resistor Rext. Users can follow the below formulas to calculate the
target output current IOUT,target in the saturation region:
IOUT,target = (1.21 V / Rext) × 15.5, where Rext is the external resistance connected between R-EXT and GND.
Therefore, the default current is approximately 26 mA at 720 Ω and 13 mA at 1440 Ω. The default relationship
after power on between IOUT,target and Rext is shown in Figure 5.
40
30
20
10
0
0
500
1000
1500
2000
2500
3000
3500
4000
Rext – W
Figure 5. Default Relationship Curve Between IOUT,target and Rext After Power Up
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Propagation Delay Times
Figure 6. CLK to OUT7
Figure 7. OE to OUT1
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Figure 8. OE to OUT7
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PACKAGE OPTION ADDENDUM
www.ti.com
2-Jul-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TLC59025IDBQR
ACTIVE
SSOP/
QSOP
DBQ
24
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jun-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TLC59025IDBQR
SSOP/
QSOP
DBQ
24
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jun-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SSOP/QSOP DBQ 24
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
TLC59025IDBQR
2500
Pack Materials-Page 2
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