TLE2662IDWR [TI]

DUAL uPOWER JFET-INPUT OPERATIONAL AMPLIFIER WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER; 双微功耗JFET输入运算放大器,开关电容电压转换器
TLE2662IDWR
型号: TLE2662IDWR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

DUAL uPOWER JFET-INPUT OPERATIONAL AMPLIFIER WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
双微功耗JFET输入运算放大器,开关电容电压转换器

转换器 开关 运算放大器 放大器电路 光电二极管 输入元件
文件: 总40页 (文件大小:588K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
DW PACKAGE  
(TOP VIEW)  
Single-Supply Operation With Rail-to-Rail  
Inputs  
= 0.000 V While Sinking 25 mA  
V
OL  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
CC+  
2OUT  
Wide V  
Range . . . 3.5 V to 15 V  
CC  
SCOUT Supplies up to 100 mA for External  
Loads  
2IN–  
2IN+  
CAP–  
GND  
CAP+  
FB/SD  
V
CC–  
Shutdown Mode  
SCOUT  
SCREF  
OSC  
External 2.5-V Voltage Reference Available  
description  
SCIN  
TheTLE2662offerstheadvantagesofJFET-input  
operational amplifiers and rail-to-rail common-  
mode input voltage range with the convenience of single-supply operation. By combining a switched-capacitor  
voltage converter with a dual operational amplifier in a single package, Texas Instruments now gives circuit  
designers new options for conditioning low-level signals in single-supply systems.  
The TLE2662 features two low power, high-output drive JFET-input operational amplifiers with a switched-  
capacitor building block. Using two external capacitors, the switched-capacitor network can be configured as  
a voltage inverter, generating a negative supply voltage capable of sourcing up to 100 mA. This supply functions  
not only as the amplifier negative rail but is also available to drive external circuitry. In this configuration, the  
amplifier common-mode input voltage range extends from the positive rail to below ground, providing true  
rail-to-rail inputs from a single supply. Furthermore, the outputs can swing to and below ground while sinking  
over 25 mA. This feature was previously unavailable in operational amplifier circuits. The TLE2662 operational  
amplifier section has output stages that can drive 100-loads to 2.5 V from a 5-V rail. With a 10-kload, the  
output swing extends to 3.5 V and can include the positive rail with a pullup resistor.  
This operational amplifier offers the high slew rate, wide bandwidth, and high input impedance commonly  
associated with JFET-input amplifiers, making the TLE2662 operational amplifier section suited for amplifying  
fast signals without loading the signal source. When not sourcing or sinking current into a load, the amplifier  
consumes only microamperes of supply current, thereby reducing the drain on and extending the life of the  
power supply.  
The TLE2662 features a shutdown pin (FB/SD), which can be used to disable the switched capacitor section.  
When disabled, the voltage converter block draws less than 150 µA from the power supply. This feature,  
combined with the operational amplifier’s low quiescent current, makes the TLE2662 a real power saver in the  
standby mode.  
The switched-capacitor building block also provides an on-board regulator; with the addition of an external  
divider, awell-regulatedoutputvoltageiseasilyobtained. Additionalfilteringcanbeaddedtominimizeswitching  
noise. The internal oscillator runs at a nominal frequency of 25 kHz. This can be synchronized to an external  
clock signal or can be varied using an external capacitor. A 2.5-V reference is brought out to SCREF for use  
with the on-board regulator or external circuitry.  
TheTLE2662ischaracterizedforoperationovertheindustrialtemperaturerangeof 40°Cto85°C. Thisdevice  
is available in a 16-pin wide-body surface-mount package.  
AVAILABLE OPTION  
PACKAGE  
T
A
SMALL OUTLINE  
(DW)  
40°C to 85°C  
TLE2662IDW  
The DW package is available taped and reeled. Add  
the suffix R to the device type (i.e., TLE2662IDWR).  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
functional block diagram  
Amplifier Block  
1
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
V
CC+  
2
_
+
1IN–  
1IN+  
2OUT  
2IN–  
_
+
3
4
5
6
7
8
V
CC–  
2IN+  
SCOUT  
CAP–  
GND  
SCREF  
OSC  
Switched-  
Capacitor  
Block  
CAP+  
FB/SD  
SCIN  
ACTUAL DEVICE COMPONENT COUNT  
AMPLIFIER  
BLOCK  
SWITCHED-  
CAPACITOR BLOCK  
Transistors  
42  
9
Transistors  
Resistors  
Diodes  
71  
44  
2
Resistors  
Diodes  
3
Capacitors  
2
Capacitors  
5
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, SCIN (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V  
Supply voltage, V  
Supply voltage, V  
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V  
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V  
CC+  
CC–  
Differential input voltage, V (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 V  
ID  
Input voltage, V (any input of amplifier) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
I
CC±  
FB/SD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to SCIN  
OSC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to SCREF  
Input current, I (each input of amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA  
I
Output current, I (each output of amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA  
O
Total current into V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA  
CC+  
CC–  
Total current out of V  
Duration of short-circuit current at (or below) T = 25°C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . unlimited  
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
A
Junction temperature (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C  
Operating free-air temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C  
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. Voltage values are with respect to the switched-capacitor block GND.  
2. Voltage values, except differential voltages, are with respect to the midpoint between V  
3. Differential voltages are at IN+ with respect to IN.  
and V  
.
CC–  
CC+  
4. The output can be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum  
dissipation rating is not exceeded.  
5. The devices are functional up to the absolute maximum junction temperature.  
DISSIPATION RATING TABLE  
T
25°C  
DERATING FACTOR  
T
= 70°C  
T = 85°C  
A
POWER RATING  
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING  
A
DW  
1025 mW  
8.2 mW/°C  
656 mW  
533 mW  
recommended operating conditions  
MIN  
3.5  
MAX  
15  
UNIT  
Supply voltage, V  
/SCIN  
V
CC+  
V
V
= ±5 V  
1.6  
11  
40  
0
4
CC±  
Common-mode input voltage, V  
V
IC  
Operating free-air temperature, T  
= ±15 V  
13  
CC±  
85  
°C  
A
Output current at SCOUT, I  
100  
mA  
O
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
OPERATIONAL AMPLIFIER SECTION  
electrical characteristics at specified free-air temperature, V  
= ±5 V (unless otherwise noted)  
CC±  
PARAMETER  
TEST CONDITIONS  
T
A
MIN  
TYP  
MAX  
5
UNIT  
25°C  
Full range  
Full range  
25°C  
1
V
IO  
Input offset voltage  
mV  
6.3  
α
Temperature coefficient of input offset voltage  
Input offset voltage long-term drift (see Note 6)  
6
0.04  
1
µV/°C  
µV/mo  
pA  
VIO  
V
IC  
= 0,  
R
= 50 Ω  
S
25°C  
I
I
Input offset current  
Input bias current  
IO  
Full range  
25°C  
2
4
nA  
3
pA  
IB  
Full range  
nA  
1.6  
to  
–2  
to  
6
25°C  
V
V
4
V
ICR  
Common-mode input voltage range  
1.6  
to  
Full range  
4
25°C  
Full range  
25°C  
3.4  
3
3.7  
3.1  
3.9  
2.7  
80  
I
I
I
I
= 2 mA  
= 20 mA  
= 2 mA  
= 20 mA  
L
L
L
L
V
V
Maximum positive peak output voltage swing  
Maximum negative peak output voltage swing  
V
V
OM+  
2.5  
2
Full range  
25°C  
3.4  
–3  
Full range  
25°C  
OM–  
2.5  
–2  
Full range  
25°C  
15  
V
V
V
= ± 2.8 V,  
R
R
R
= 10 kΩ  
= 100 Ω  
= 100 Ω  
O
O
O
L
L
L
Full range  
25°C  
2
0.75  
0.5  
0.5  
0.25  
45  
A
VD  
Large-signal differential voltage amplification  
= 0 to 2 V,  
= 0 to 2 V,  
V/mV  
Full range  
25°C  
3
Full range  
25°C  
12  
4
r
i
Input resistance  
10  
pF  
C
Input capacitance  
25°C  
i
z
Open-loop output impedance  
I
O
= 0  
25°C  
560  
82  
o
25°C  
65  
65  
75  
65  
R
V
= 50 ,  
S
CMRR Common-mode rejection ratio  
dB  
dB  
µA  
= V  
min  
Full range  
25°C  
IC  
ICR  
93  
V
R
= ± 5 V to ±15 V,  
= 50 Ω  
CC±  
S
k
Supply-voltage rejection ratio (V  
/V  
)
IO  
SVR  
CC±  
Full range  
25°C  
560  
620  
640  
I
Supply current  
I = 0  
L
CC  
Full range  
supply.  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
CC–  
Full range is 40°C to 85°C.  
NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated  
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.  
A
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
operating characteristics at specified free-air temperature, V  
= ±5 V  
CC±  
PARAMETER  
TEST CONDITIONS  
T
A
MIN  
2.2  
TYP  
MAX  
UNIT  
25°C  
Full range  
25°C  
3.4  
SR  
Slew rate at unity gain (see Figure 1)  
R
= 10 k,  
C
= 100 pF  
V/µs  
L
L
1.7  
f = 10 Hz,  
f = 1 kHz,  
R
R
= 20 Ω  
= 20 Ω  
59  
43  
1.1  
1
100  
60  
S
S
V
n
Equivalent input noise voltage (see Figure 2)  
nV/Hz  
25°C  
V
Peak-to-peak equivalent input noise voltage  
Equivalent input noise current  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
25°C  
µV  
N(PP)  
I
n
25°C  
fA/Hz  
V
A
= 2 V,  
f = 10 kHz,  
O(PP)  
= 2,  
THD  
Total harmonic distortion  
25°C  
0.025%  
R
C
C
= 10 kΩ  
= 100 pF  
= 100 pF  
VD  
L
L
L
R
= 10 k,  
25°C  
25°C  
1.8  
1.3  
5
L
L
B
1
Unity-gain bandwidth (see Figure 3)  
MHz  
R
= 100 ,  
To 0.1%  
To 0.01%  
25°C  
t
s
Settling time  
µs  
25°C  
10  
B
Maximum output-swing bandwidth  
Phase margin at unity gain (see Figure 3)  
A
= 1,  
R
C
C
= 10 kΩ  
= 100 pF  
= 100 pF  
25°C  
140  
58°  
75°  
kHz  
OM  
VD  
L
L
L
R
R
= 10 k,  
= 100 ,  
25°C  
L
L
φ
m
25°C  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
Full range is 40°C to 85°C.  
supply.  
CC–  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
electrical characteristics at specified free-air temperature, V  
= ±15 V (unless otherwise noted)  
CC±  
PARAMETER  
TEST CONDITIONS  
T
A
MIN  
TYP  
MAX  
4
UNIT  
25°C  
Full range  
Full range  
25°C  
0.9  
V
IO  
Input offset voltage  
mV  
5.3  
α
Temperature coefficient of input offset voltage  
Input offset voltage long-term drift (see Note 6)  
6
0.04  
2
µV/°C  
µV/mo  
pA  
VIO  
V
IC  
= 0,  
R
= 50 Ω  
S
25°C  
I
I
Input offset current  
Input bias current  
IO  
Full range  
25°C  
3
5
nA  
4
pA  
IB  
Full range  
nA  
11  
to  
13  
12  
to  
16  
25°C  
V
V
V
ICR  
Common-mode input voltage range  
11  
to  
Full range  
13  
25°C  
Full range  
25°C  
13.2  
13  
13.7  
13.2  
I
I
I
I
= 2 mA  
= 20 mA  
= 2 mA  
= 20 mA  
L
L
L
L
V
V
Maximum positive peak output voltage swing  
Maximum negative peak output voltage swing  
V
V
OM+  
12.5  
12  
Full range  
25°C  
13.2 13.7  
13  
Full range  
25°C  
OM–  
12.5  
12  
30  
13  
230  
100  
25  
Full range  
25°C  
V
V
V
= ± 10 V,  
R
R
R
= 10 kΩ  
= 600 Ω  
= 600 Ω  
O
O
O
L
L
L
Full range  
25°C  
20  
25  
A
VD  
Large-signal differential voltage amplification  
= 0 to 8 V,  
= 0 to 8 V,  
V/mV  
Full range  
25°C  
10  
3
Full range  
25°C  
1
12  
4
r
i
Input resistance  
10  
pF  
C
Input capacitance  
25°C  
i
z
Open-loop output impedance  
I
O
= 0  
25°C  
560  
90  
o
25°C  
72  
65  
75  
65  
R
V
= 50 ,  
S
CMRR Common-mode rejection ratio  
dB  
dB  
µA  
= V  
min  
Full range  
25°C  
IC  
ICR  
93  
V
R
= ± 5 V to ±15 V,  
= 50 Ω  
CC±  
S
k
Supply-voltage rejection ratio (V  
/V  
)
IO  
SVR  
CC±  
Full range  
25°C  
625  
690  
720  
I
Supply current  
I = 0  
L
CC  
Full range  
supply.  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
CC–  
Full range is 40°C to 85°C.  
NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated  
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.  
A
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
operating characteristics at specified free-air temperature, V  
= ±15 V  
CC±  
PARAMETER  
TEST CONDITIONS  
T
A
MIN  
2.6  
TYP  
MAX  
UNIT  
25°C  
3.4  
SR  
Slew rate at unity gain (see Figure 1)  
R
= 10 k,  
C
= 100 pF  
V/µs  
L
L
Full range  
25°C  
2.1  
f = 10 Hz,  
f = 1 kHz,  
R
R
= 20 Ω  
= 20 Ω  
70  
40  
100  
60  
Equivalent input noise voltage  
(see Figure 2)  
S
S
V
n
nV/Hz  
25°C  
Peak-to-peak equivalent input noise  
voltage  
V
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
25°C  
25°C  
25°C  
1.1  
1.1  
µV  
N(PP)  
I
n
Equivalent input noise current  
Total harmonic distortion  
fA/Hz  
V
A
= 2 V,  
f = 10 kHz,  
O(PP)  
= 2,  
THD  
0.025%  
R
C
C
= 10 kΩ  
= 100 pF  
= 100 pF  
VD  
L
L
L
R
= 10 k,  
25°C  
25°C  
25°C  
25°C  
25°C  
25°C  
25°C  
2
1.5  
5
L
L
B
1
Unity-gain bandwidth (see Figure 3)  
MHz  
R
= 600 ,  
To 0.1%  
To 0.01%  
t
s
Settling time  
µs  
10  
B
OM  
Maximum output-swing bandwidth  
Phase margin at unity gain (see Figure 3)  
A
= 1,  
R
C
C
= 10 kΩ  
= 100 pF  
= 100 pF  
40  
kHz  
VD  
L
L
L
R
R
= 10 k,  
= 600 ,  
60°  
70°  
L
L
φ
m
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
Full range is 40°C to 85°C.  
supply.  
CC–  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
SWITCHED-CAPACITOR SECTION  
electrical characteristics over recommended supply voltage range and at specified free-air  
temperature  
PARAMETER  
TEST CONDITIONS  
T
A
MIN  
TYP  
MAX  
UNIT  
SCIN = 7 V,  
See Note 7  
5.2  
–5  
4.7  
Regulated output voltage,  
SCOUT  
R
R
R
= 500 Ω  
25°C  
V
L(SCOUT)  
L(SCOUT)  
L(SCOUT)  
SCIN = 5 V,  
See Note 8  
4.25  
–4 –3.75  
SCIN = 7 V to 12 V,  
See Note 7  
5
25  
27  
Input regulation  
= 500 Ω  
Full range  
Full range  
mV  
SCIN = 5 V to 15 V,  
See Note 8  
SCIN = 7 V,  
See Note 7  
10  
50  
Output regulation  
= 100 to 500 Ω  
mV  
V
SCIN = 5 V,  
See Note 8  
100  
I
I
= 10 mA  
0.35  
1.1  
0.55  
1.6  
Voltage loss, SCIN – SCOUT  
(see Note 9)  
SCIN = 7 V,  
CIN = COUT = 100-µF tantalum  
O
Full range  
Full range  
= 100 mA  
O
SCIN = 7 V,  
See Note 10  
I = 10 mA to 100 mA,  
O
Output resistance  
10  
15  
Oscillator frequency  
Full range  
25°C  
15  
2.35  
2.25  
2.35  
2.25  
25  
35  
2.65  
2.75  
2.65  
2.75  
kHz  
2.5  
SCIN = 7 V,  
SCIN = 5 V,  
I
I
= 60 µA  
= 50 µA  
V
ref  
Full range  
25°C  
Reference voltage, V  
ref  
2.5  
V
ref  
Full range  
25°C  
Maximum switch current  
Supply current, I  
300  
2.5  
3
mA  
mA  
µA  
SCIN = 3.5 V  
SCIN = 15 V  
SCIN = 5 V  
3.5  
4.5  
I
O
= 0  
Full range  
Full range  
S
Supply current in shutdown  
V
= 0,  
I
O
= 0,  
100  
150  
(FB/SD)  
Data applies for the switched-capacitor block only. Amplifier block is not connected.  
Full range is 40°C to 85°C.  
NOTES: 7. All regulation specifications are for the switched-capacitor section connected as a positive to negative converter/regulator with  
R1 = 20 k, R2 = 102.5 k, CIN = 10 µF (tantalum), COUT = 100 µF (tantalum) and C1 = 0.002 µF (see Figure 63).  
8. All regulation specifications are for the switched-capacitor section connected as a positive to negative converter/regulator with  
R1 = 23.7 k, R2 = 102.2 k, CIN = 10 µF (tantalum), COUT = 100 µF (tantalum) and C1 = 0.002 µF (see Figure 63).  
9. For voltage-loss tests, the switched-capacitor section is connected as a voltage inverter, with SCREF, OSC, and FB/SD  
unconnected. The voltage losses may be higher in other configurations.  
10. Outputresistance is defined as the slope of the curve (V vs I )foroutputcurrentsof10mAto100mA. Thisrepresentsthelinear  
O
O
portion of the curve. The incremental slope of the curve is higher at currents less than 10 mA due to the characteristics of the switch  
transistors.  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
AMPLIFIER AND SWITCHED-CAPACITOR SECTIONS CONNECTED  
electrical characteristics, V  
= 5 V, T = 25°C (see Figure 4)  
CC+  
A
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
3.7  
MAX  
UNIT  
R
R
R
R
R
R
= 10 kΩ  
= 600 Ω  
= 100 Ω  
= 10 kΩ  
= 600 Ω  
= 100 Ω  
L
L
L
L
L
L
Maximum positive peak output voltage swing, V  
OM+  
3.5  
V
3.1  
3.7  
3.0  
2.2  
0.46  
0.50  
0.9  
Maximum negative peak output voltage swing, V  
Voltage loss, SCIN – |SCOUT| (see Note 9)  
V
V
OM–  
R
R
R
= 10 kΩ  
= 600 Ω  
= 100 Ω  
L
L
L
CIN = COUT = 100-µF tantalum,  
= 100 mV,  
V
ID  
Both amplifiers  
NOTES: 9. For voltage-loss tests, the switched-capacitor section is connected as a voltage inverter with SCREF, OSC, and FB/SD  
unconnected. The voltage losses may be higher in other configurations.  
supply current (no load), T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
3.4  
MAX  
UNIT  
mA  
Supply current  
V
V
= 5 V,  
= 5 V,  
SCIN = 5 V,  
SCIN = 5 V,  
V
= 2.5 V,  
= 0 V,  
V
V
= 0  
= 0  
CC+  
(FB/SD)  
(FB/SD)  
O
Supply current in shutdown  
V
265  
µA  
CC+  
O
PARAMETER MEASUREMENT INFORMATION  
operational amplifier  
2 kΩ  
V
CC+  
V
CC+  
V
O
+
V
O
V
I
+
V
CC–  
C
R
L
L
V
CC–  
R = 20 Ω  
S
(see Note A)  
R
= 20 Ω  
S
NOTE A: C includes fixture capacitance.  
L
Figure 1. Slew-Rate Test Circuit  
Figure 2. Noise-Voltage Test Circuit  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
PARAMETER MEASUREMENT INFORMATION  
10 kΩ  
V
CC+  
100 Ω  
V
I
+
V
O
V
CC–  
C
R
L
L
(see Note A)  
NOTE A: C includes fixture capacitance.  
L
Figure 3. Unity-Gain Bandwidth and Phase-Margin Test Circuit  
amplifier input bias offset current  
At the picoampere bias-current level typical of the TLE2662, accurate measurement of the amplifier’s bias  
current becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can  
easily exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments  
uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but  
with no device in the socket. The device is then inserted into the socket and a second test that measures both  
the socket leakage and the device input bias current is performed. The two measurements are then subtracted  
algebraically to determine the bias current of the device.  
R
L
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
+
CC  
+
0.1 µF  
2 µF  
2OUT  
2IN–  
R
L
V
CC–  
2IN+  
TLE2662  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
COUT  
0.1 µF  
+
CIN  
1N4933  
+
CAP+  
FB/SD  
SCIN  
Figure 4. Test Circuit  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
Table of Graphs  
operational amplifier section  
FIGURE  
V
Input offset voltage  
Distribution  
5
6
6
7
IO  
I
Input bias current  
vs Free-air temperature  
vs Free-air temperature  
vs Free-air temperature  
IB  
IO  
I
Input offset current  
V
V
V
Common-mode input voltage  
IC  
vs Output current  
vs Supply voltage  
8, 9  
10,11,12  
Maximum peak output voltage  
OM  
Maximum peak-to-peak output voltage  
Differential voltage amplification  
vs Frequency  
13, 14  
O(PP)  
vs Frequency  
vs Free-air temperature  
15  
16  
A
VD  
OS  
vs Time  
vs Free-air temperature  
17  
18  
I
Short-circuit output current  
Output impedance  
z
vs Frequency  
vs Frequency  
19  
20  
o
CMRR Common-mode rejection ratio  
vs Supply voltage  
vs Free-air temperature  
21  
22  
I
Supply current  
Pulse response  
CC  
Small signal  
Large signal  
23, 24  
25, 26  
Noise voltage (referenced to input)  
Equivalent input noise voltage  
Total harmonic distortion  
0.1 to 10 Hz  
vs Frequency  
vs Frequency  
27  
28  
V
n
THD  
29, 30  
vs Supply voltage  
vs Free-air temperature  
31  
32  
B
1
Unity-gain bandwidth  
vs Supply voltage  
vs Load capacitance  
vs Free-air temperature  
33  
34  
35  
φ
m
Phase margin  
Phase shift  
vs Frequency  
15  
switched-capacitor section  
Shutdown threshold voltage  
vs Free-air temperature  
vs Input voltage  
36  
37  
38  
39  
40  
I
f
Supply current  
CC  
Oscillator frequency  
Supply current in shutdown  
Average supply current  
vs Free-air temperature  
vs Input voltage  
osc  
vs Output current  
vs Input capacitance  
vs Oscillator frequency  
41  
42, 43  
Output voltage loss  
V
O
Regulated output voltage  
Reference voltage change  
Voltage loss  
vs Free-air temperature  
vs Free-air temperature  
vs Output current  
44  
45  
46  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
INPUT BIAS CURRENT  
AND INPUT OFFSET CURRENT  
vs  
DISTRIBUTION OF  
INPUT OFFSET VOLTAGE  
FREE-AIR TEMPERATURE  
15  
5
10  
V
V
= ±15 V  
= 0  
IC  
1836 Amplifiers Tested From 1 Wafer Lot  
CC±  
V = ±15 V  
CC±  
= 25°C  
T
A
4
3
2
10  
10  
10  
10  
I
IB  
5
I
IO  
1
0
10  
0
10  
– 4 – 3 – 2  
– 1  
0
1
2
3
4
25  
45  
65  
85  
V
IO  
– Input Offset Voltage – mV  
T
A
– Free-Air Temperature – °C  
Figure 5  
Figure 6  
COMMON-MODE INPUT VOLTAGE  
vs  
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
OUTPUT CURRENT  
20  
V
V
+2  
+1  
CC+  
T
A
= 25°C  
18  
16  
14  
CC+  
V
IC+  
V
CC±  
= ±15 V  
12  
V
CC+  
10  
8
V
V
V
+4  
+3  
+2  
CC–  
6
4
2
0
CC–  
CC–  
V
IC–  
V
CC±  
= ±5 V  
0
–10  
– 20  
I – Output Current – mA  
O
– 30  
– 40  
– 50  
– 60  
– 75 – 50 – 25  
0
25  
50  
75  
100  
T
A
– Free-Air Temperature – °C  
Figure 7  
Figure 8  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE  
MAXIMUM PEAK OUTPUT VOLTAGE  
vs  
vs  
OUTPUT CURRENT  
SUPPLY VOLTAGE  
20  
15  
– 20  
– 18  
– 16  
– 14  
R
= 10 kΩ  
= 25°C  
L
T
A
= 25°C  
T
A
10  
V
OM+  
5
V
CC±  
= ±15 V  
– 12  
– 10  
0
– 8  
– 5  
– 10  
– 6  
– 4  
– 2  
0
V
OM–  
V
= ±5 V  
– 15  
– 20  
CC±  
0
5
10  
15  
20  
25  
30  
35  
40  
0
2
4
6
8
10  
12  
14  
16  
I
O
– Output Current – mA  
|V | – Supply Voltage – V  
CC±  
Figure 9  
Figure 10  
MAXIMUM PEAK OUTPUT VOLTAGE  
MAXIMUM PEAK OUTPUT VOLTAGE  
vs  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
20  
15  
6
4
R
= 100 Ω  
= 25°C  
R
T
= 600 Ω  
L
L
T
A
= 25°C  
A
V
OM+  
10  
V
OM+  
2
5
0
0
– 5  
– 10  
– 2  
– 4  
– 6  
V
OM–  
V
OM–  
– 15  
– 20  
0
2
4
6
8
10  
12  
14  
16  
0
2
4
6
8
|V | – Supply Voltage – V  
CC±  
|V | – Supply Voltage – V  
CC±  
Figure 11  
Figure 12  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE  
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE  
vs  
vs  
FREQUENCY  
FREQUENCY  
30  
25  
10  
8
V
R
= ±5 V  
CC±  
= 10 kΩ  
V
R
= ±15 V  
CC±  
= 10 kΩ  
L
L
T
A
= 25°C  
T
A
= 25°C  
20  
15  
10  
6
4
2
5
0
0
10 k  
100 k  
1 M  
10 M  
10 k  
100 k  
1 M  
10 M  
f – Frequency – Hz  
f – Frequency – Hz  
Figure 13  
Figure 14  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION and PHASE SHIFT  
vs  
FREQUENCY  
120  
60°  
Phase Shift  
100  
80  
80°  
100°  
120°  
A
VD  
60  
40  
140°  
20  
0
160°  
180°  
200°  
V
= ±15 V  
CC±  
R
= 10 kΩ  
L
L
C
= 100 pF  
T
A
= 25°C  
– 20  
0.1  
1
10  
100 1 k 10 k 100 k 1 M 10 M  
f – Frequency – Hz  
Figure 15  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
14  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION  
vs  
FREE-AIR TEMPERATURE  
400  
350  
300  
R
= 10 kΩ  
L
250  
V
CC±  
= ±15 V  
200  
150  
V
CC±  
= ±5 V  
100  
50  
0
– 75 – 50 – 25  
0
25  
50  
75  
100  
T
A
– Free-Air Temperature – °C  
Figure 16  
SHORT-CIRCUIT OUTPUT CURRENT  
SHORT-CIRCUIT OUTPUT CURRENT  
vs  
vs  
TIME  
FREE-AIR TEMPERATURE  
80  
60  
40  
20  
80  
60  
40  
20  
V
V
= ±15 V  
CC±  
V
ID  
= 100 mV  
= 0  
O
V
ID  
= 100 mV  
V
T
= ±15 V  
CC±  
= 25°C  
A
V
O
= 0  
0
0
– 20  
– 20  
V
ID  
= 100 mV  
– 40  
– 60  
– 80  
– 40  
– 60  
– 80  
V
= 100 mV  
50  
ID  
0
10  
20  
30  
40  
60  
– 75 – 50 – 25  
0
25  
50  
75  
100  
t – Time – s  
T
A
– Free-Air Temperature – °C  
Figure 17  
Figure 18  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
15  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
COMMON-MODE REJECTION RATIO  
OUTPUT IMPEDANCE  
vs  
vs  
FREQUENCY  
FREQUENCY  
35  
30  
25  
20  
100  
80  
V
= ±15 V  
T
A
= 25°C  
CC±  
= 25°C  
T
A
V
CC±  
= ±5 V  
A
= 10  
VD  
60  
15  
10  
40  
A
VD  
= 100  
A
VD  
= 1  
20  
0
5
0
100  
1 k  
10 k  
100 k  
1 M  
10 M  
10 M  
10  
100  
1 k  
10 k  
100 k  
1 M  
f – Frequency – Hz  
f – Frequency – Hz  
Figure 19  
Figure 20  
SUPPLY CURRENT  
vs  
SUPPLY CURRENT  
vs  
SUPPLY VOLTAGE  
FREE-AIR TEMPERATURE  
700  
675  
650  
625  
600  
575  
550  
700  
675  
650  
625  
600  
575  
550  
V
= 0  
O
No Load  
V
= 0  
O
No Load  
T
A
= 85°C  
V
CC±  
= ±15 V  
T
= 25°C  
A
V
CC±  
= ±5 V  
T
A
= 55°C  
525  
500  
525  
500  
0
2
4
6
8
10  
12  
14  
16  
– 75 – 50 – 25  
0
25  
50  
75  
100  
|V | – Supply Voltage – V  
CC±  
T
A
– Free-Air Temperature – °C  
Figure 21  
Figure 22  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
16  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
VOLTAGE-FOLLOWER SMALL-SIGNAL  
PULSE RESPONSE  
VOLTAGE-FOLLOWER SMALL-SIGNAL  
PULSE RESPONSE  
100  
50  
100  
50  
0
0
V
R
C
= ±5 V  
= 10 kΩ  
= 100 pF  
= 25°C  
CC±  
L
L
V
R
C
= ±15 V  
= 10 kΩ  
= 100 pF  
= 25°C  
CC±  
L
L
– 50  
– 50  
T
A
T
A
See Figure 1  
See Figure 1  
– 100  
– 100  
0
1
2
3
0
1
2
3
t – Time – µs  
t – Time – µs  
Figure 23  
Figure 24  
VOLTAGE-FOLLOWER LARGE-SIGNAL  
PULSE RESPONSE  
VOLTAGE-FOLLOWER LARGE-SIGNAL  
PULSE RESPONSE  
4
3
2
1
0
15  
V
= ±5 V  
V
R
= ±15 V  
= 10 kΩ  
= 100 pF  
= 25°C  
CC±  
L
L
CC ±  
L
L
R
C
T
= 10 kΩ  
= 100 pF  
= 25°C  
C
T
10  
5
A
A
See Figure 1  
See Figure 1  
0
– 5  
– 10  
– 15  
– 1  
– 2  
0
5
10  
15  
0
10  
20  
30  
40  
t – Time – µs  
t – Time – µs  
Figure 25  
Figure 26  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
17  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
NOISE VOLTAGE  
(REFERRED TO INPUT)  
0.1 TO 10 Hz  
EQUIVALENT INPUT NOISE VOLTAGE  
vs  
FREQUENCY  
1
100  
80  
V
T
= ±15 V  
CC±  
= 25°C  
V
R
= ±5 V  
DD±  
= 20Ω  
A
S
T
= 25°C  
A
See Figure 2  
0.5  
60  
0
– 0.5  
– 1  
40  
20  
0
0
1
2
3
4
5
6
7
8
9
10  
1
10  
100  
1 k  
10 k  
t – Time – s  
f – Frequency – Hz  
Figure 27  
Figure 28  
TOTAL HARMONIC DISTORTION  
TOTAL HARMONIC DISTORTION  
vs  
vs  
FREQUENCY  
FREQUENCY  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.3  
A
= 10  
VD  
A
= 2  
VD  
V
=2V  
O(PP)  
V
=2V  
O(PP)  
0.25  
0.2  
T
A
= 25°C  
T
A
= 25°C  
0.15  
0.1  
V
CC±  
= ±5 V  
V
CC±  
= ±5 V  
Source Signal  
0.5  
0
Source Signal  
100  
0
10  
100  
1 k  
10 k  
100 k  
10  
1 k  
10 k  
100 k  
f – Frequency – Hz  
f – Frequency – Hz  
Figure 29  
Figure 30  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
18  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
UNITY-GAIN BANDWIDTH  
vs  
UNITY-GAIN BANDWIDTH  
vs  
FREE-AIR TEMPERATURE  
SUPPLY VOLTAGE  
2.5  
2.5  
R
C
T
= 10 kΩ  
= 100 pF  
= 25°C  
L
L
A
V
CC±  
= ±15 V  
See Figure 3  
2
2
V
CC±  
= ±5 V  
1.5  
1.5  
R
C
= 10 kΩ  
= 100 pF  
L
L
See Figure 3  
1
– 75 – 50 – 25  
1
0
25  
50  
75  
100  
0
2
4
6
8
10  
12  
14  
16  
T
A
– Free-Air Temperature – °C  
|V | – Supply Voltage – V  
CC±  
Figure 31  
Figure 32  
PHASE MARGIN  
vs  
PHASE MARGIN  
vs  
SUPPLY VOLTAGE  
LOAD CAPACITANCE  
60°  
50°  
62°  
61°  
V
R
= ±15 V  
CC±  
= 10 kΩ  
R
C
= 10 kΩ  
= 100 pF  
= 25°C  
L
L
L
T
= 25°C  
A
T
A
See Figure 3  
See Figure 3  
60°  
59°  
58°  
57°  
40°  
30°  
20°  
10°  
56°  
55°  
0°  
0
200  
400  
600  
800  
1000  
0
2
4
6
8
10  
12  
14  
16  
C
– Load Capacitance – pF  
|V | – Supply Voltage – V  
CC±  
L
Figure 33  
Figure 34  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
19  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
OPERATIONAL AMPLIFIER SECTION  
PHASE MARGIN  
vs  
FREE-AIR TEMPERATURE  
66°  
64°  
62°  
R
C
= 10 kΩ  
= 100 pF  
L
L
See Figure 3  
V
CC±  
= ±15 V  
60°  
58°  
56°  
V
CC±  
= ±5 V  
54°  
– 75  
0
25  
50  
75  
100  
50 25  
T
A
– Free-Air Temperature – °C  
Figure 35  
SHUTDOWN THRESHOLD VOLTAGE  
SUPPLY CURRENT  
vs  
INPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
5
I
O
= 0  
4
3
2
V
(FB/SD)  
1
0
– 50  
– 25  
0
25  
50  
75  
100  
0
5
10  
15  
T
– Free-Air Temperature – °C  
A
V – Input Voltage – V  
I
Figure 36  
Figure 37  
Data applies for the amplifier block only; the switched-capacitor block is not supplying V  
supply.  
CC–  
20  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
SWITCHED-CAPACITOR SECTION  
SUPPLY CURRENT IN SHUTDOWN  
OSCILLATOR FREQUENCY  
vs  
vs  
INPUT VOLTAGE  
FREE-AIR TEMPERATURE  
120  
100  
80  
60  
40  
20  
0
35  
33  
31  
29  
27  
25  
V
= 0  
(FB/SD)  
V
= 15 V  
CC  
V
= 3.5 V  
CC  
23  
21  
19  
17  
15  
0
25  
50  
75  
100  
– 75 – 50 – 25  
0
5
10  
15  
V – Input Voltage – V  
I
T
A
– Free-Air Temperature – °C  
Figure 38  
Figure 39  
OUTPUT VOLTAGE LOSS  
vs  
INPUT CAPACITANCE  
AVERAGE SUPPLY CURRENT  
vs  
OUTPUT CURRENT  
1.4  
1.2  
1
140  
120  
100  
T
A
= 25°C  
I
O
= 100 mA  
0.8  
0.6  
80  
60  
I
I
= 50 mA  
= 10 mA  
O
O
0.4  
40  
Inverter Configuration  
COUT = 100-µF Tantalum  
0.2  
0
20  
0
f
= 25 kHz  
osc  
0
10 20 30 40 50 60 70 80 90 100  
0
20  
40  
60  
80  
100  
C – Input Capacitance – µF  
i
I
O
– Output Current – mA  
Figure 40  
Figure 41  
Data applies for the switched-capacitor block only. Amplifier block is not connected.  
21  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
SWITCHED-CAPACITOR SECTION  
OUTPUT VOLTAGE LOSS  
vs  
OUTPUT VOLTAGE LOSS  
vs  
OSCILLATOR FREQUENCY  
OSCILLATOR FREQUENCY  
2.5  
2.25  
2
2.5  
2.25  
2
Inverter Configuration  
CIN = 100-µF Tantalum  
COUT= 100-µF Tantalum  
Inverter Configuration  
CIN = 10-µF Tantalum  
COUT = 100-µF Tantalum  
1.75  
1.5  
1.25  
1
1.75  
1.5  
1.25  
1
I
= 100 mA  
O
I
= 100 mA  
O
I
= 50 mA  
O
I
= 50 mA  
= 10 mA  
O
O
0.75  
0.5  
0.75  
0.5  
I
= 10 mA  
O
0.25  
0
0.25  
0
I
1
10  
100  
1
10  
100  
f
– Oscillator Frequency – kHz  
f
– Oscillator Frequency – kHz  
osc  
osc  
Figure 42  
Figure 43  
REFERENCE VOLTAGE CHANGE  
vs  
REGULATED OUTPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
100  
80  
– 4.7  
– 4.8  
SCREF = 2.5 V  
= 25°C  
T
A
60  
40  
– 4.9  
– 5  
20  
0
– 5.1  
–11.6  
– 20  
– 40  
– 60  
–11.8  
–12  
–12.2  
– 80  
–12.4  
–12.6  
– 100  
– 50  
– 25  
0
25  
50  
75  
100  
0
25  
50  
75  
100  
50  
25  
T
– Free-Air Temperature – °C  
T
A
– Free-Air Temperature – °C  
A
Figure 44  
Figure 45  
Data applies for the switched-capacitor block only. Amplifier block is not connected.  
22  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
TYPICAL CHARACTERISTICS  
SWITCHED-CAPACITOR SECTION  
VOLTAGE LOSS  
vs  
OUTPUT CURRENT  
2
3.5 V V  
CIN = COUT = 100 µF  
15 V  
CC  
1.8  
1.6  
1.4  
1.2  
1
T
A
= 85°C  
0.8  
0.6  
0.4  
T
A
= 25°C  
0.2  
0
0
10 20 30 40 50 60 70  
Output Current – mA  
80 90 100  
Figure 46  
Data applies for the switched-capacitor block only. Amplifier block is not connected.  
23  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
amplifier section  
input characteristics  
The TLE2662 is specified with a minimum and a maximum input voltage that if exceeded at either input, could  
cause the device to malfunction.  
Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2662  
operational amplifier section is well suited for low-level signal processing; however, leakage currents on printed-  
circuit boards and sockets can easily exceed bias-current requirements and cause degradation in system  
performance. It is a good practice to include guard rings around inputs (see Figure 47). These guards should  
be driven from a low-impedance source at the same voltage level as the common-mode input.  
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.  
V
I
+
+
V
I
+
V
O
V
O
V
O
V
I
Figure 47. Use of Guard Rings  
switched-capacitor section  
V
CC  
SCREF  
2.5 V  
REF  
R
R
Drive  
CAP +  
+
CIN  
FB/SD  
OSC  
Q
Q
OSC  
CAP –  
Drive  
Drive  
GND  
COUT  
SCOUT  
Drive  
External capacitors  
Figure 48. Functional Block Diagram for Switched-Capacitor Block Only  
24  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
switched-capacitor section (continued)  
The TLE2662, with its high-output-drive amplifiers and switched-capacitor voltage converter, readily lends itself  
to applications like headphone drivers where large signal swing into heavy loads is paramount. Another  
application is analog-to-digital interfacing when only a single rail is available to the system, but maximization  
of the ADC dynamic range is key. See Figure 48 for the functional block diagram of the switched-capacitor block.  
typical application  
In its most basic configuration, the TLE2662 switched-capacitor section is used as a voltage inverter to provide  
the negative rail for the amplifiers in a single-supply system. As shown in Figure 49, the positive 5-V supply is  
connected to both V  
and SCIN. V  
is connected to the output of the charge pump, SCOUT. Only three  
CC+  
CC–  
external components (excluding the resistors used with the amplifiers) are necessary: the storage capacitors,  
CIN and COUT, and a fast-recovery Schottky diode to clamp SCOUT during start up. The diode is necessary  
because the amplifiers present a load referenced to the positive rail and tends to pull SCOUT above ground,  
which can cause the device to fail to start up (see pin functions section in APPLICATION INFORMATION). As  
shown in Figure 50, one amplifier is shown driving a resistive load; the other is interfacing to an analog-to-digital  
converter (ADC).  
R
L
5 V  
To ADC  
R
F
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
CC+  
R
R
F
Signal  
From  
F
2OUT  
2IN–  
Preamplifier  
R
IN  
Signal  
From  
Transducer  
V
CC–  
2IN+  
Filter  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
CIN  
1N4933  
+
COUT  
CAP+  
FB/SD  
+
SCIN  
Shutdown  
Figure 49. Switched-Capacitor Block Supplying Negative Rail for Amplifiers  
25  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
typical application (continued)  
5 V  
R
R
F
F
R
R
I
I
Signal  
From  
Preamplifier  
Signal  
From  
Transducer  
To ADC  
Amplifier 2  
+
+
Amplifier 1  
R
L
SCIN  
SCOUT  
Voltage  
Converter  
FB/SD SCREF  
Shutdown  
Figure 50. Equivalent Schematic: Amplifier 1 Driving Resistive Load,  
Amplifier 2 Interfacing to an ADC  
Though simple, this configuration has the inherent disadvantage of having ripple and switching-noise  
components on SCOUT. These are coupled into the amplifier’s signal path, effectively introducing distortion into  
the output waveform. The effect is most pronounced when the outputs are driven low, loading the negative rail  
generatedbythechargepump. AfirstapproachtominimizingtheseeffectsistoincreasethesizeofCOUTusing  
a low-ESR type capacitor (refer to the switched-capacitor selection section under capacitor selection and output  
ripple). Figures 51 and 52 compare the ripple and noise present at the amplifier output with COUT = 10 µF and  
COUT = 100 µF, respectively, with the outputs driven low into a 600-load.  
26  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
typical application (continued)  
RIPPLE AND SWITCHING NOISE ON  
RIPPLE AND SWITCHING NOISE ON  
AMPLIFIER OUTPUT  
AMPLIFIER OUTPUT  
vs  
TIME  
vs  
TIME  
V
V
V
+20  
+15  
+10  
+5  
V
OL  
V
OL  
V
OL  
V
OL  
+80  
+60  
+40  
+20  
OL  
OL  
OL  
V
R
= 5 V  
= 600 Ω  
V
R
= 5 V  
= 600 Ω  
CC+  
L
CC+  
L
CIN = 100 µF  
COUT = 100 µF  
CIN = 100 µF  
COUT = 10 µF  
V
ID  
= –100 mV  
V
ID  
= –100 mV  
V
OL  
V
OL  
V
OL  
V
–5  
V
V
20  
OL  
OL  
V
10  
15  
20  
40  
OL  
OL  
OL  
OL  
V
V
V
V
60  
80  
OL  
OL  
0
10 20 30 40 50 60 70 80 90 100  
0
10 20 30 40 50 60 70 80 90 100  
t – Time – µs  
t – Time – µs  
Figure 51  
Figure 52  
Additional filtering can be added between SCOUT and V  
to further reduce ripple and noise. For example,  
CC–  
adding the simple low-pass LC filter shown in Figure 53, implemented using a 50-µH inductor and 220-µF  
capacitor (available in surface mount), results in the reduced levels of ripple and switching noise at the  
amplifier’s outputs (see Figures 54 and 55). Larger values of L or C can be used for even better attenuation.  
L
H
SCOUT  
V
CC  
COUT  
0.1 µF  
C
F
+
1
f =  
r
2 π LC  
Filter  
Figure 53. LC Filter Used to Reduce Ripple and Switching Noise, f = 1/2πLC, A = 40 dB Per Decade  
r
27  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
typical application (continued)  
RIPPLE AND SWITCHING NOISE ON  
RIPPLE AND SWITCHING NOISE ON  
AMPLIFIER OUTPUT  
AMPLIFIER OUTPUT  
vs  
vs  
TIME  
TIME  
V
V
V
V
+8  
+6  
+4  
+2  
V
V
V
V
+8  
+6  
+4  
+2  
OL  
OL  
OL  
OL  
OL  
OL  
V
R
= 5 V  
= 600 Ω  
CC+  
L
V
R
= 5 V  
= 600 Ω  
CC+  
L
CIN = 100 µF  
COUT = 100 µF  
CIN = 100 µF  
COUT = 10 µF  
OL  
V
OL  
V
OL  
–2  
OL  
–2  
V
V
V
V
OL  
OL  
–4  
OL  
–4  
OL  
Filter:  
Filter:  
L
C
= 50 µH  
= 220 µF  
L
C
= 50 µH  
= 220 µF  
F
F
F
F
V
–6  
V
–6  
OL  
OL  
OL  
OL  
See Figure 53  
See Figure 53  
V
–8  
V
–8  
0
10 20 30 40 50 60 70 80 90 100  
0
10 20 30 40 50 60 70 80 90 100  
t – Time – µs  
t – Time – µs  
Figure 54  
Figure 55  
28  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
precision measurement techniques  
In systems where the amplifier outputs are being sampled by an analog-to-digital converter (ADC), the  
switched-capacitornetwork can be temporarily disabled by applying a voltage of less then 0.45 V to FB/SD. This  
is easily accomplished using any open-collector gate (shown by dashed lines in Figure 49). When disabled, the  
internal switches are set to dump any remaining charge onto COUT. The voltage at SCOUT decays to zero at  
a rate dependent on both the size of COUT and loading. During this time, the amplifier’s outputs are free of any  
switching-inducedripple and noise. Figure 56 shows the relationship of the output voltage decay time to the size  
of the output storage capacitor when one channel of the amplifier is driving a 100-load to ground. SCOUT  
rises again when the external gate is turned off (see Figure 57).  
OFF-STATE VOLTAGE DECAY AT OUTPUT  
TURN-ON VOLTAGE RISE AT OUTPUT  
vs  
vs  
TIME  
TIME  
6
4
6
4
V
V
= 5 V  
= SCOUT  
V
= 5 V  
CC+  
CC+  
CC–  
V
CC–  
= SCOUT  
CIN = 100 µF  
CIN = 100 µF  
R
V
= 100 Ω  
R
V
= 100 Ω  
L
L
= 100 mV  
= 100 mV  
ID  
ID  
2
2
COUT = 22 µF  
COUT = 100 µF  
0
0
COUT = 100 µF  
COUT = 220 µF  
– 2  
– 4  
– 6  
– 2  
– 4  
– 6  
COUT = 220 µF  
COUT = 22 µF  
30 40  
0
10  
20  
30  
40  
50  
60  
70  
80  
0
10  
20  
50  
60  
70  
80  
t – Time – ms  
t – Time – ms  
Figure 56  
Figure 57  
The amplifier’s negative input common-mode voltage limit (V  
) is specified as an offset from the negative  
ICR–  
rail. Care should be taken to ensure that the input signal does not violate this limit as SCOUT decays. The  
negative output voltage swing is similarly affected by the gradual loss of the negative rail.  
This application takes advantage of the otherwise unused SCREF output of the switched-capacitor block to bias  
one amplifier to 2.5 V. This is especially useful when the amplifier is followed by an ADC, keeping the signal  
centered in the middle of the converter dynamic range. Other biasing methods may be necessary in precision  
systems.  
In Figure 58, SCREF, R1, and R2 are used to generate a feedback voltage to the TLE2662 error amplifier. This  
voltage, fed into FB/SD, is used to regulate the voltage at SCOUT. When used this way, there is higher voltage  
loss (SCIN – |SCOUT|) associated with the regulation. For example, the inverter generates an unregulated  
voltage of approximately 4.5 V from a positive 5-V source; it can achieve a regulated output voltage of only  
about3.5V.Thoughthisreducestheamplifierinputandoutputdynamicrange,bothV  
to below ground.  
andV stillextend  
ICR–  
OL  
29  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
precision measurement techniques (continued)  
R
L
5 V  
To ADC  
R
F
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
CC+  
R
R
F
I
2OUT  
2IN–  
R
I
COUT  
+
V
CC–  
2IN+  
+
C1  
R2  
R1  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
CIN  
+
1N4933  
CAP+  
FB/SD  
SCIN  
Restart  
R3  
R4  
Shutdown  
| SCOUT |  
SCREF  
R2  
R1  
1
40 mV  
2
Where: SCREF = 2.5 V Nominal  
Figure 58. Voltage Inverter With Regulated Output  
The reference voltage, though being used as part of the regulation circuitry, is still available for other uses if total  
current drawn from it is limited to under 60 µA. The shutdown feature also remains available, though a restart  
pulse may be necessary to start the switched-capacitor if the voltage on COUT is not fully discharged. This  
restart pulse is isolated from the feedback loop using a blocking diode in the regulation section.  
The circuit designer should be aware that the TLE2662 amplifier and switched-capacitor sections are tested  
and specified separately. Performance may differ from that shown in the typical characteristics section when  
used together. This is evident, for example, in the dependence of V  
and V  
on V  
. The impact of  
ICR–  
OL  
CC–  
supplying the amplifier negative rail using the switched-capacitor block in each design should be considered  
and carefully evaluated.  
The more esoteric features of the switched-capacitor building block, including external synchronization of the  
internal oscillator and power dissipation considerations, are covered in detail in the following section.  
30  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
switched-capacitor function  
A review of a basic switched-capacitor building block is helpful in understanding the operation of the TLE2662.  
When the switch shown in Figure 59 is in the left position, capacitor C1 charges to the voltage at V1. The total  
charge on C1 is q1 = C1V1. When the switch is moved to the right, C1 is discharged to the voltage at V2. After  
this discharge time, the charge on C1 is q2 = C1V2. The charge has been transferred from the source V1 to  
the output V2. The amount of charge transferred is as shown in equation 1.  
q = q1 – q2 = C1(V1 – V2)  
If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is shown in equation 2.  
I = f x q = f x C1(V1 – V2)  
(2)  
(1)  
To obtain an equivalent resistance for a switched-capacitor network, this equation can be rewritten in terms of  
voltage and impedance equivalence as shown in equation 3.  
V1  
(1 fC1)  
V2  
V1  
R
V2  
I
(3)  
EQUIV  
V1  
V2  
f
R
L
C1  
C2  
Figure 59. Switched-Capacitor Block  
,isdefinedasR =1÷fC1.Theequivalentcircuitfortheswitched-capacitornetwork  
Anewvariable,R  
EQUIV  
EQUIV  
is as shown in Figure 60. The TLE2662 has the same switching action as the basic switched-capacitor voltage  
converter. Even though this simplification does not include finite switch-on resistance and output-voltage ripple,  
it provides an insight into how the device operates.  
These simplified circuits explain voltage loss as a function of oscillator frequency (see Figure 43). As oscillator  
frequency is decreased, the output impedance is eventually dominated by the 1/fC1 term and voltage losses  
rise.  
Voltage losses also rise as oscillator frequency increases. This is caused by internal switching losses that occur  
due to some finite charge being lost on each switching cycle. This charge loss per-unit-cycle, when multiplied  
by the switching frequency, becomes a current loss. At high frequency, this loss becomes significant and voltage  
losses again rise. The oscillator of the TLE2662 switched-capacitor section is designed to run in the frequency  
band where voltage losses are at a minimum.  
R
EQUIV  
V1  
V2  
C2  
R
L
1
R
=
EQUIV  
fC1  
Figure 60. Switched-Capacitor Equivalent Circuit  
31  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
pin functions (see functional block diagram – converter)  
Supply voltage (SCIN) alternately charges CIN to the input voltage when CIN is switched in parallel with the  
input supply, and then transfers charge to COUT when CIN is switched in parallel with COUT. Switching  
occurs at the oscillator frequency. During the time that CIN is charging, the peak supply current is  
approximately 2.2 times the output current. During the time that CIN is delivering a charge to COUT, the  
supply current drops to approximately 0.2 times the output current. An input supply bypass capacitor supplies  
part of the peak input current drawn by the TLE2662 switched-capacitor section and averages out the current  
drawn from the supply. A minimum input supply bypass capacitor of 2 µF, preferably tantalum or some other  
low-ESR type, is recommended. A larger capacitor is desirable in some cases. An example is when the actual  
input supply is connected to the TLE2662 through long leads or when the pulse currents drawn by the  
TLE2662 might affect other circuits through supply coupling.  
In addition to being the output pin, SCOUT is tied to the substrate of the device. Special care must be taken in  
TLE2662 circuits to avoid making SCOUT positive with respect to any of the other pins. For circuits with the  
output load connected from V  
external Schottky diode must be added (see Figure 61). This diode prevents SCOUT from being pulled above  
to SCOUT or from some external positive supply voltage to SCOUT, an  
CC+  
the GND during start up. A fast-recovery diode such as IN4933 with low forward voltage (V 0.2 V) can be  
f
used.  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
+
CC  
2OUT  
2IN–  
V
CC–  
2IN+  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
SCOUT  
COUT  
IN4933  
CIN  
+
+
CAP+  
FB/SD  
SCIN  
Load  
V
CC+  
or External Supply Voltage  
Figure 61. Circuit With Load Connected From V  
to SCOUT  
CC  
The voltage reference (SCREF) output provides a 2.5-V reference point for use in TLE2662-based regulator  
circuits. The temperature coefficient (TC) of the reference voltage has been adjusted so that the TC of the  
regulated output voltage is near zero. As seen in the typical performance curves, this requires the reference  
output to have a positive TC. This nonzero drift is necessary to offset a drift term inherent in the internal  
reference divider and comparator network tied to the feedback pin. The overall result of these drift terms is a  
regulated output that has a slight positive TC at output voltages below 5 V and a slight negative TC at output  
voltages above 5 V. For regulator-feedback networks, reference output current should be limited to  
approximately 60 µA. SCREF draws approximately 100 µA when shorted to ground and does not affect the  
internal reference/regulator. This pin can also be used as a pullup for TLE2662 circuits that require  
synchronization.  
32  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
pin functions (continued)  
CAP+ is the positive side of input capacitor (CIN) and is alternately driven between V  
and ground. When  
CC  
driven to V , CAP+ sources current from V . When driven to ground, CAP+ sinks current to ground. CAP–  
CC  
CC  
is the negative side of the input capacitor and is driven alternately between ground and SCOUT. When driven  
to ground, CAP– sinks current to ground. When driven to SCOUT, CAP– sources current from COUT. In all  
cases, current flow in the switches is unidirectional as should be expected when using bipolar switches.  
OSC can be used to raise or lower the oscillator frequency or to synchronize the device to an external clock.  
Internally, OSC is connected to the oscillator timing capacitor (C 150 pF), which is alternately charged and  
t
discharged by current sources of ±7 µA, so that the duty cycle is approximately 50%. The TLE2662  
switched-capacitor section oscillator is designed to run in the frequency band where switching losses are  
minimized. However, the frequency can be raised, lowered, or synchronized to an external system clock if  
necessary.  
The frequency can be increased by adding an external capacitor (C2 in Figure 62) in the range of 5 pF20 pF  
from CAP+ to OSC. This capacitor couples a charge into C at the switch transitions. This shortens the charge  
t
and discharge time and raises the oscillator frequency. Synchronization can be accomplished by adding an  
external pullup resistor from OSC to SCREF. A 20-kpullup resistor is recommended. An open-collector gate  
or an npn transistor can then be used to drive OSC at the external clock frequency as shown in Figure 62. The  
frequency can be lowered by adding an external capacitor (C in Figure 62) from OSC to ground. This increases  
1
the charge and discharge times, which lowers the oscillator frequency.  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
+
CC  
2OUT  
2IN–  
V
CC–  
2IN+  
COUT  
C1  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
+
CIN  
+
CAP+  
FB/SD  
SCIN  
SCIN  
C2  
Figure 62. External Clock System  
The feedback/shutdown (FB/SD) pin has two functions. Pulling FB/SD below the shutdown threshold (0.45 V)  
puts the device into shutdown. In shutdown, the reference/regulator is turned off and switching stops. The  
switches are set such that both CIN and COUT are discharged through the output load. Quiescent current in  
shutdown drops to approximately 100 µA . Any open-collector gate can be used to put the TLE2662 into  
shutdown. For normal (unregulated) operation, the device restarts when the external gate is shut off. In  
TLE2662 circuits that use the regulation feature, the external resistor divider can provide enough pulldown to  
keep the device in shutdown until the output capacitor (COUT) has fully discharged. For most applications  
33  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
where the TLE2662 is run intermittently, this does not present a problem because the discharge time of the  
output capacitor is short compared to the off time of the device. In applications where the device has to start-up  
before the output capacitor (COUT) has fully discharged, a restart pulse must be applied to FB/SD of the  
TLE2662.  
Using the circuit shown in Figure 63, the restart signal can be either a pulse (t > 100 µs) or a logic high. Diode  
p
coupling the restart signal into FB/SD allows the output voltage to rise and regulate without overshoot. The  
resistor divider R3/R4 shown in Figure 63 should be chosen to provide a signal level at FB/SD of 0.7 V1.1 V.  
FB/SD is also the inverting input of the TLE2662 switched-capacitor section error amplifier, and as such can  
be used to obtain a regulated output voltage.  
COUT  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
+
100 µF Tantalum  
CC  
+
2OUT  
2IN–  
C1  
+
SCOUT  
R2  
V
CC–  
2IN+  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
CIN  
R1  
10 µF  
+
Tantalum  
CAP+  
FB/SD  
SCIN  
SCIN  
R3  
R4  
+
2.2 µF  
| SCOUT |  
R2  
R1  
1
SCREF  
2
40 mV  
Shutdown  
Restart  
Where: SCREF = 2.5 V Nominal  
Figure 63. Basic Regulation Configuration  
regulation  
TheerroramplifieroftheTLE2662switched-capacitorsectiondrivesthenpnswitchtocontrolthevoltageacross  
the input capacitor (CIN), which determines the output voltage. When the reference and error amplifier of the  
TLE2662 is used, an external resistive divider is all that is needed to set the regulated output voltage. Figure 63  
shows the basic regulator configuration and the formula for calculating the appropriate resistor values. R1  
should be 20 kor greater because the reference current is limited to ±100 µA. R2 should be in the range of  
100 kto 300 k. Frequency compensation is accomplished by adjusting the ratio of CIN to COUT. For best  
results, this ratio should be approximately 1 to 10. Capacitor C1, required for good load regulation, should be  
0.002 µF for all output voltages.  
34  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
regulation (continued)  
The functional block diagram shows that the maximum regulated output voltage is limited by the supply voltage.  
For the basic configuration, SCOUT referenced to GND of the TLE2662 must be less than the total of the  
supply voltage minus the voltage loss due to the switches. The voltage loss versus output current due to the  
switches can be found in the typical performance curves.  
capacitor selection  
While the exact values of CIN and COUT are noncritical, good-quality low-ESR capacitors such as solid  
tantalum are necessary to minimize voltage losses at high currents. For CIN, the effect of the equivalent series  
resistance (ESR) of the capacitor is multiplied by four, since switch currents are approximately two times higher  
than output current. Losses occur on both the charge and discharge cycle, which means that a capacitor with  
1 of ESR for CIN has the same effect as increasing the output impedance of the switched-capacitor section  
by4. Thisrepresentsasignificantincreaseinthevoltagelosses. COUTisalternatelychargedanddischarged  
at a current approximately equal to the output current. The ESR of the capacitor causes a step function to occur  
in the output ripple at the switch transitions. This step function degrades the output regulation for changes in  
output load current and should be avoided. A technique used is to parallel a smaller tantalum capacitor with a  
large aluminum electrolytic capacitor to gain both low ESR and reasonable cost.  
output ripple  
The peak-to-peak output ripple is determined by the output capacitor and the output current values.  
Peak-to-peak output ripple is approximated as shown in equation 4:  
I
O
(4)  
V
2 fC  
O
where:  
V = peak-to-peak ripple  
= oscillator frequency  
f
OSC  
For output capacitors with significant ESR, a second term must be added to account for the voltage step at the  
switch transitions. This step is approximately equal to equation 5:  
2I  
ESR of C  
(5)  
O
O
power dissipation (switched-capacitor section only)  
The power dissipation of any TLE2662 circuit must be limited so that the junction temperature of the device does  
not exceed the maximum junction temperature ratings. The total power dissipation is calculated from two  
components, thepowerlossduetovoltagedropsintheswitches, andthepowerlossduetodrivecurrentlosses.  
The total power dissipated by the TLE2662 is calculated as shown in equation 6:  
(6)  
P
(V  
V
) I  
(V ) (I ) (0.2)  
CC  
CC  
O
O
O
where both V  
and SCOUT refer to GND. The power dissipation is equivalent to that of a linear regulator. Due  
CC  
to limitations of the DW package, steps must be taken to dissipate power externally for large input or output  
differentials. This is accomplished by placing a resistor in series with CIN as shown in Figure 64. A portion of  
the input voltage is dropped across this resistor without affecting the output regulation. Since switch current is  
approximately 2.2 times the output current and the resistor causes a voltage drop when CIN is both charging  
and discharging, the resistor chosen is as shown in equation 7.  
35  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
power dissipation (continued)  
R
V
(4.4 I )  
X
O
(7)  
X
where:  
V
V
– (TLE2662 voltage loss) (1.3)  
V
X
CC  
O
and I  
= maximum required output current. The factor of 1.3 allows some operating margin for the TLE2662.  
OUT  
When using a 12-V to 5-V converter at 100-mA output current, calculate the power dissipation without an  
external resistor as shown in equation 8.  
|
|
P
P
(12 V  
5 V ) (100 mA)  
(12 V) (100 mA) (0.2)  
(8)  
700 mW  
240 mW  
940 mW  
1
2
3
4
5
6
7
8
16  
1OUT  
1IN–  
1IN+  
V
+
CC  
COUT  
+
15  
14  
13  
12  
11  
10  
9
2OUT  
2IN–  
C1  
+
SCOUT  
R2  
V
CC–  
2IN+  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
R1  
CIN  
+
CAP+  
FB/SD  
Rx  
SCIN  
+
SCIN  
Figure 64. Power-Dissipation-Limiting Resistor in Series With CIN  
At θ of 130°C/W for a commercial plastic device, a junction temperature rise of 122°C is seen. The device  
JA  
exceeds the maximum junction temperature at an ambient temperature of 25°C. To calculate the power  
dissipation with an external-resistor (R ), determine how much voltage can be dropped across R . The  
X
X
maximum voltage loss of the TLE2662 in the standard regulator configuration at 100 mA output current is 1.6 V  
(see equation 9).  
V
12 V  
(1.6 V) (1.3)  
–5 V  
4.9 V  
(9)  
X
and  
R
4.9 V (4.4) (100 mA)  
11  
X
36  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
power dissipation (continued)  
The resistor reduces the power dissipated by the TLE2662 by (4.9 V) (100 mA) = 490 mW. The total power  
dissipated by the TLE2662 is equal to (940 mW – 490 mW) = 450 mW. The junction temperature rise is 58°C.  
Although commercial devices are functional up to a junction temperature of 125°C, the specifications are tested  
to a junction temperature of 100°C. In this example, this means limiting the ambient temperature to 42°C. To  
allow higher ambient temperatures, the thermal resistance numbers for the TLE2662 packages represent  
worst-case numbers with no heat sinking and still air. Small clip-on heat sinks can be used to lower the thermal  
resistance of the TLE2662 package. Airflow in some systems helps to lower the thermal resistance. Wide PC  
board traces from the TLE2662 leads helps to remove heat from the device. This is especially true for plastic  
packages.  
basic voltage inverter  
The switched-capacitor block is connected as a basic voltage inverter with regulation as shown in Figure 65.  
The magnitude of SCIN must exceed that of the desired SCOUT to accommodate voltage losses due to  
switching and regulation. Losses of 1 V to 2 V are typical.  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
100 µF  
1OUT  
1IN–  
1IN+  
V
+
CC  
+
2OUT  
2IN–  
0.002 µF  
+
SCOUT  
R2  
V
CC–  
2IN+  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
R1  
10 µF  
+
CAP+  
FB/SD  
SCIN  
SCIN  
+
2 µF  
| SCOUT |  
| SCOUT |  
1.121 V  
R2  
R1  
1
R1  
1
SCREF  
2
40 mV  
Figure 65. Basic Voltage Inverter/Regulator  
37  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLE2662  
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER  
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER  
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994  
APPLICATION INFORMATION  
positive voltage doubler  
In this configuration (see Figure 66), the voltage converter is configured as a positive voltage doubler providing a  
higher positive rail, approximately 9 V for the amplifiers or other external circuitry. Filtering (not shown) of the output  
of the doubler may be necessary.  
Output  
Signal  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1OUT  
1IN–  
1IN+  
V
+
CC  
R
F
R
R
2OUT  
2IN–  
R
IN  
Input  
Signal  
V
CC–  
2IN+  
SCOUT  
SCREF  
OSC  
CAP–  
GND  
CAP+  
FB/SD  
10 µF  
5 V  
SCIN  
+
V
O
+
1N4001  
1N4001  
+
2 µF  
100 µF  
Figure 66. Voltage Converter Configured as Positive Doubler  
38  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SOIC  
SOIC  
Drawing  
TLE2662IDW  
OBSOLETE  
OBSOLETE  
DW  
16  
16  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
TLE2662IDWR  
DW  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
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Addendum-Page 1  
IMPORTANT NOTICE  
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