TLIN2027-Q1_技术文档

TLIN2027-Q1

ZHCSLG5C –JULY 2020 –REVISED MARCH 2022

TLIN2027-Q1 不具有显性状态超时、提供故障保护功能的LIN 收发器

1 特性

2 应用

• 符合面向汽车应用的AEC-Q100 标准

• 车身电子装置和照明

• 信息娱乐系统与仪表组

• 混合动力电动汽车和动力总成系统

• 被动安全

– 温度等级1：–40°C 至125°C T_A

– 器件HBM 认证等级：±8kV

– 器件CDM 认证等级：±1.5kV

• 符合LIN 2.0、LIN 2.1、LIN 2.2、LIN 2.2 A 和

ISO/DIS 17987-4 标准（请参阅开关特性）

• 符合适用于LIN 的SAE J2602 推荐实践的要求

• 支持ISO 9141 (K-Line)

• 支持24 V 应用

• LIN 传输数据速率高达20kbps

• 宽工作范围

• 电器

3 说明

TLIN2027-Q1 是一款本地互连网络 (LIN) 物理层收发

器，集成了唤醒和保护功能，兼容 LIN 2.0、LIN 2.1、

LIN 2.2、LIN 2.2 A 和 ISO/DIS 17987-4 标准。LIN 是

一种单线双向总线，通常用于数据传输速率高达 20

kbps 的车载网络。TLIN2027-Q1 旨在为 24V 应用提

供支持，具有更宽的工作电压和额外的总线故障保护。

– 4V 至48V 电源电压

– ±60V LIN 总线故障保护

LIN 接收器支持高达 100 kbps 的数据传输速率，从而

实现更快的内联编程。TLIN2027-Q1 使用一个可降低

电磁辐射(EME) 的限流波形整形驱动器将 TXD 输入上

的数据流转化为一个 LIN 总线信号。接收器将数据流

转化为逻辑电平信号，此信号通过开漏 RXD 引脚发送

到微处理器。睡眠模式可实现超低电流消耗，该模式允

许通过LIN 总线或EN 引脚进行唤醒。

• 休眠模式：超低电流消耗允许以下类型的唤醒事

件：

– LIN 总线

– 通过EN 引脚实现本地唤醒

• 无显性状态超时

• 上电和断电无干扰运行

• 保护特性：

– V_SUP欠压保护

– 热关断保护

– 系统级未供电节点或接地断开失效防护。

• 采用SOIC (8) 和无引线VSON (8) 封装，提高了自

动光学检测(AOI) 能力

器件信息

封装⁽¹⁾

封装尺寸（标称值）

4.90mm x 3.91mm

3.00mm x 3.00mm

器件型号

SOIC (D) (8)

TLIN2027-Q1

VSON (DRB) (8)

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

V_BAT

V_SUP

VREG

V_SUP

VREG

V_SUP

V_DD

Commander

Node

V_SUP

Pull-up

NC NC

EN

8

3

7

8

3

7

2

V_DD

I/O

MCU w/o

pull-up

MCU w/o

pull-up

V_DDI/O

1 k

LIN

LIN Bus

MCU

6

MCU

6

LIN Controller

or

SCI/UART

LIN Controller

or

SCI/UART

1

4

1

4

200 pF

RXD

TXD

RXD

TXD

GND

5

GND

5

简化版原理图，指挥官模式

简化版原理图，响应者模式

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLLSF59

TLIN2027-Q1

ZHCSLG5C –JULY 2020 –REVISED MARCH 2022

www.ti.com.cn

Table of Contents

9.2 Functional Block Diagram.........................................21

9.3 Feature Description...................................................21

9.4 Device Functional Modes..........................................25

10 Application and Implementation................................27

10.1 Application Information........................................... 27

10.2 Typical Application.................................................. 27

11 Power Supply Recommendations..............................28

12 Layout...........................................................................29

12.1 Layout Guidelines................................................... 29

12.2 Layout Example...................................................... 30

13 Device and Documentation Support..........................31

13.1 Documentation Support.......................................... 31

13.2 Receiving Notification of Documentation Updates..31

13.3 支持资源..................................................................31

13.4 Trademarks.............................................................31

13.5 Electrostatic Discharge Caution..............................32

13.6 术语表..................................................................... 32

14 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 说明（续）.........................................................................2

6 Pin Configuration and Functions...................................3

7 Specifications.................................................................. 4

7.1 Absolute Maximum Ratings ....................................... 4

7.2 ESD Ratings .............................................................. 4

7.3 ESD Ratings - IEC ..................................................... 4

7.4 Thermal Information ...................................................4

7.5 Recommended Operating Conditions ........................5

7.6 Electrical Characteristics ............................................5

7.7 Switching Characteristics ...........................................7

7.8 Timing Requirements .................................................9

7.9 Typical Characteristics..............................................10

8 Parameter Measurement Information..........................12

9 Detailed Description......................................................21

9.1 Overview...................................................................21

Information.................................................................... 32

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision B (December 2021) to Revision C (March 2022)

Page

• 删除了原理图后面的注释.................................................................................................................................... 1

• Changed V_LOGICabsolute maximum rating MAX from 5.5 V to 6 V................................................................... 4

Changes from Revision A (October 2020) to Revision B (December 2021)

Page

• 将特性从支持12V 应用更改为支持24V 应用....................................................................................................1

• 将特性从4V 至36V 电源电压更改为4V 至48V 电源电压................................................................................ 1

• 将特性从±45V LIN 总线故障保护更改为±60V LIN 总线故障保护.......................................................................1

• 通篇将“领导者”更改为“指挥官”.................................................................................................................. 1

• 通篇将“跟随者”更改为“响应者”.................................................................................................................. 1

• 将说明中的ISO/DIS 17987–4.2 标准更改为ISO/DIS 17987–4 标准.............................................................1

• Changed ISO/DIS 17987–4.2 standards To ISO/DIS 17987–4 standards in the Overview ......................... 21

• Changed ISO/DIS 17987–1.2 standards To ISO/DIS 17987–1 standards in the Related Documentation ...31

• Changed ISO/DIS 17987–4.2 standards To ISO/DIS 17987–4 standards in the Related Documentation ...31

Changes from Revision * (July 2020) to Revision A (October 2020)

Page

• Changed R_ENtypical from 350 kΩ to 205 kΩ.................................................................................................... 5

• Changed TH_REC(MIN) 0.442 to 0.422..................................................................................................................7

5 说明（续）

集成电阻器、静电放电(ESD) 和故障保护功能支持设计人员在其应用中节省布板空间。

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6 Pin Configuration and Functions

RXD

EN

1

2

3

4

8

7

6

5

NC

RXD

EN

1

2

3

4

8

7

6

5

NC

V

VSUP

LIN

SUP

Thermal

Pad

NC

LIN

TXD

GND

TXD

GND

Not to scale

图6-1. D Package, 8-Pin (SOIC), Top View

图6-2. DRB Package, 8-Pin (VSON), Top View

表6-1. Pin Functions

Type

DESCRIPTION

Name

RXD

No.

1

DO

DI

RXD output (open-drain) interface reporting state of LIN bus voltage

EN

2

Enable input - High puts the device in normal operation mode and low puts the device in sleep mode

NC

3

Not connected

–

DI

TXD

GND

LIN

4

TXD input interface to control state of LIN output - Internally pulled to ground

5

GND

HV I/O

Ground

6

LIN bus single-wire transmitter and receiver

V_SUP

NC

7

HV Supply Device supply voltage (connected to battery in series with external reverse blocking diode)

8

Not connected

–

No electrical connection. Can be connected to the PCB to improve thermal coupling (DRB package

only)

Thermal Pad

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7 Specifications

7.1 Absolute Maximum Ratings

parameters valid across -40℃≤T_A≤125℃(unless otherwise noted)⁽¹⁾

Symbol

Parameter

MIN

–0.3

–60

–0.3

–40

–55

MAX

60

UNIT

V

V_SUP

V_LIN

Supply voltage range (ISO/DIS 17987 Param 10)

LIN bus input voltage (ISO/DIS 17987 Param 82)

Logic pin voltage (RXD, TXD, EN)

Ambient temperature range

60

V

V_LOGIC

T_A

6

V

125

150

°C

T_J

Junction temperature range

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

7.2 ESD Ratings

ESD Ratings

VALUE

UNIT

Human body model (HBM) TXD, RXD, EN Pins, per AEC

Q100-002⁽¹⁾

±4000

Human body model (HBM) LIN and V_SUPPin, per AEC

Q100-002⁽²⁾

V_(ESD)

Electrostatic discharge

±8000

±1500

V

Charged device model (CDM),

All terminals

per AEC Q100-011

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) LIN bus is stressed with respect to GND.

7.3 ESD Ratings - IEC

ESD and Surge Protection Ratings

ISO 10605 per IEC 62228-3 Contact

VALUE

UNIT

V_(ESD)

Electrostatic discharge

±8000

V

discharge

contact discharge

air-gap discharge

Pulse 1

±8000

±25000

–100

75

Powered ESD Performance, per

SAEJ2962-1⁽¹⁾

V_(ESD)

V

Pulse 2

ISO 7637-2 and IEC 62215-3 transients according to

IBEE LIN EMC test specifications⁽²⁾(LIN and V_SUP

)

Pulse 3a

–150

100

Pulse 3b

(1) SAEJ2962-1 Testing performed at 3rd party EMC test facility, test report available upon request.

(2) ISO 7637 is a system level transient test. Different system level configurations may lead to diffrent results.

7.4 Thermal Information

D (SOIC)

8-PINS

115.5

58.7

DRB (VSON)

THERMAL METRIC⁽¹⁾

UNIT

8-PINS

48.5

55.5

22.2

1.2

R_ΘJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_ΘJC(top)

R_ΘJB

58.9

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

14.1

Ψ_JT

58.2

22.2

4.8

Ψ_JB

R_ΘJC(bot)

-

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

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7.5 Recommended Operating Conditions

parameters valid across -40℃≤T_A≤125℃(unless otherwise noted)

PARAMETER - DEFINITION

MIN

4

NOM

MAX

48

UNIT

V

V_SUP

Supply voltage

V_LIN

LIN Bus input voltage

0

48

V

V_LOGIC

TSD

Logic Pin Voltage (RXD, TXD, EN)

Thermal shutdown temperature

Thermal shutdown hysteresis

0

5.25

V

165

°C

TSD_(HYS)

15

7.6 Electrical Characteristics

parameters valid across -40℃≤T_A≤125℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

4

TYP

MAX UNIT

Power Supply

Device is operational beyond the LIN

defined nominal supply voltage

range.See 图8-1 and 图8-2

Operational supply voltage (ISO/DIS

17987 Param 10, 53)

V_SUP

48

V

Normal and Standby Modes: ramp V_SUP

while LIN signal is a 10 kHz square

wave with 50 % duty cycle and 36V

swing. See 图8-1 and 图8-2

4

Nominal supply voltage (ISO/DIS 17987

Param 10, 53)

V_SUP

Sleep Mode

4

48

V

Min is falling edge and Max is rising

edge

UV_SUP

UV_HYS

Under voltage V_SUPthreshold

2.9

3.85

Delta hysteresis voltage for V_SUPunder

voltage threshold

0.2

V

Normal Mode: EN = high, bus dominant:

total bus load where R_LIN> 500 Ωand

C_LIN< 10 nF (See 图8-7)

5

mA

I_SUP

Supply current

Standby Mode: EN = low, bus dominant:

total bus load where R_LIN> 500 Ωand

C_LIN< 10 nF (See 图8-7)

1

2.1

mA

Normal Mode: EN = high, bus recessive

400

20

700

35

µA

(LIN = V_SUP

Standby Mode: EN = low, bus recessive

(LIN = V_SUP

)

I_SUP

Supply current

Sleep Mode: 4.0 V < V_SUP≤27 V, LIN

= VSUP, EN = 0 V, TXD and RXD

floating

9

15

30

µA

Sleep Mode: 27 V < V_SUP≤48 V, LIN =

VSUP, EN = 0 V, TXD and RXD floating

TSD

Thermal shutdown

165

℃

TSD_(HYS)

Thermal shutdown hysteresis

15

0

RXD OUTPUT PIN (OPEN DRAIN)

V_OL

Output low voltage

0.6

5

V

R_PU= 2.4 kΩ

I_OL

Low level output current, open drain

Leakage current, high-level

LIN = 0 V, RXD = 0.4 V

LIN = V_SUP, RXD = 5 V

1.5

mA

µA

I_ILG

–5

TXD INPUT PIN

V_IL

Low level input voltage

0.8

5.5

5

V

–0.3

2

V_IH

High level input voltage

I_ILG

R_TXD

Low level input leakage current

Internal pull-down resistor value

TXD = low

0

µA

kΩ

–5

125

350

800

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MAX UNIT

7.6 Electrical Characteristics (continued)

parameters valid across -40℃≤T_A≤125℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

LIN PIN

LIN recessive, TXD = high, I_O= 0 mA,

V_SUP= 7 V to 48 V⁽¹⁾

0.85

3

V_SUP

V

V_OH

HIGH level output voltage

LIN recessive, TXD = high, I_O= 0 mA,

V_SUP= 4 V ≤V_SUP< 7 V⁽¹⁾

LIN dominant, TXD = low, V_SUP= 7 V to

48 V⁽¹⁾

0.2 V_SUP

V_OL

LOW level output voltage

LIN dominant, TXD = low, V_SUP= 4 V ≤

1.2

58

V

V_SUP< 7 V⁽¹⁾

VSUP where impact of recessive LIN

V_{SUP_NON_OP}bus < 5% (ISO/DIS 17987 Param 11,

54/56)

TXD & RXD open LIN = 4 V to 58 V

–0.3

TXD = 0 V, V_LIN= 36 V, R_MEAS= 440 Ω,

V_SUP= 36 V, V_BUSdom< 4.518 V See 图

8-6

Limiting current (ISO/DIS 17987 Param

12)

I_{BUS_LIM}

40

90

200

mA

LIN = 0 V, V_SUP= 24 V Driver off/

recessive 图8-7

Receiver leakage current, dominant

I_{BUS_PAS_dom}

mA

µA

–1

(ISO/DIS 17987 Param 13, 58)

Receiver leakage current, recessive

I_{BUS_PAS_rec1}

LIN > V_SUP, 4 V ≤V_SUP≤45 V Driver

off; 图8-8

20

5

(ISO/DIS 17987 Param 14, 59)

Receiver leakage current, recessive

I_{BUS_PAS_rec2}

µA

LIN = V_SUP, Driver off; 图8-8

–5

–1

(ISO/DIS 17987 Param 14, 59)

Leakage current, loss of ground

I_{BUS_NO_GND}

GND = V_SUP, V_SUP= 27 V, LIN = 0 V; 图

8-9

1

mA

µA

(ISO/DIS 17987 Param 15, 60)

Leakage current, loss of ground

I_{BUS_NO_GND}

GND = V_SUP, V_SUP≥36 V, LIN = 0

V; 图8-9

1.5

5

–1.5

(ISO/DIS 17987 Param 15, 60)

Leakage current, loss of supply

I_{BUS_NO_BAT}

LIN = 48 V, V_SUP= GND; 图8-10

(ISO/DIS 17987 Param 16, 61)

LIN dominant (including LIN dominant

for wake up) See 图8-4, 图8-3

Low level input voltage (ISO/DIS 17987

Param 17, 62)

V_BUSdom

0.4 V_SUP

V_SUP

High level input voltage (ISO/DIS 17987

Param 18, 63)

V_BUSrec

0.6

LIN recessive See 图8-4, 图8-3

Receiver center threshold (ISO/DIS

V_{BUS_CNT}

V_{BUS_CNT}= (V_IL+ V_IH)/2 See 图8-4, 图

8-3

0.475

0.5

0.525 V_SUP

0.175 V_SUP

17987 Param 19, 64)

Hysteresis voltage (ISO/DIS 17987

V_HYS

V_HYS= (V_IL- V_IH) See 图8-4, 图8-3

Param 20, 65)

V_{SERIAL_DIODE}Serial diode LIN term pull-up path

By design and characterization

Normal and standby modes

Sleep mode, V_SUP= 27 V, LIN = GND

V_SUP= 14 V

0.4

20

0.7

45

1

V

R_PU-LIN

I_RSLEEP

C_LINPIN

EN INPUT PIN

V_IL

Internal pull-up resistor to V_SUP

Pull-up current source to V_SUP

Capacitance of the LIN pin

60

kΩ

µA

pF

–2

–20

25

Low level input voltage

High level input voltage

Hysteresis voltage

0.8

5.5

500

5

V

–0.3

V_IH

2

V_IT

By design and characterization

EN = low

50

0

mV

µA

I_ILG

Low level input current

Internal pull-down resistor

–5

R_EN

125

205

800

kΩ

(1) LIN driver bus load conditions (C_LIN, R_LIN): No external load

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7.7 Switching Characteristics

parameters valid across -40℃≤T_A≤125℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

TH_REC(MAX)= 0.744 x V_SUP, TH_DOM(MAX)

= 0.581 x V_SUP, V_SUP= 4 V to 7.4 V, t_BIT

= 50 µs (20 kbps), D1 = t_{BUS_rec(min)}/(2 x

t_BIT) (See 图8-11, 图8-12)

Duty Cycle 1 (ISO/DIS 17987 Param

27)⁽¹⁾

D1_12V

0.396

TH_REC(MAX)= 0.625 x V_SUP, TH_DOM(MAX)

= 0.581 x V_SUP, V_SUP= 7.4 V to 9.4 V,

t_BIT= 50 µs (20 kbps), D1 =

t_{BUS_rec(min)}/(2 x t_BIT) (See 图8-11, 图

8-12)

D1_12V

Duty Cycle 1

0.368

0.396

TH_REC(MAX)= 0.744 x V_SUP, TH_DOM(MAX)

= 0.581 x V_SUP, V_SUP= 9.4 V to 18 V,

t_BIT= 50 µs (20 kbps), D1 =

t_{BUS_rec(min)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 1 (ISO/DIS 17987 Param

27)

D1_12V

D2_12V

TH_REC(MIN)= 0.422 x V_SUP, TH_DOM(MIN)

= 0.284 x V_SUP, V_SUP= 4 V to 7.4 V, t_BIT

= 50 µs (20 kbps), D2 = t_{BUS_rec(MAX)}/(2

x t_BIT) (See 图8-11, 图8-12)

Duty Cycle 2 (ISO/DIS 17987 Param

28)

0.581

0.67

TH_REC(MIN)= 0.422 x V_SUP, TH_DOM(MIN)

= 0.284 x V_SUP, V_SUP= 7.4 V to 9.4 V,

t_BIT= 50 µs (20 kbps), D2 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 2

TH_REC(MIN)= 0.422 x V_SUP, TH_DOM(MIN)

= 0.284 x V_SUP, V_SUP= 9.4 V to 18 V,

t_BIT= 50 µs (20 kbps), D2 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 2 (ISO/DIS 17987 Param

28)

D2_12V

0.581

TH_REC(MAX)= 0.778 x V_SUP, TH_DOM(MAX)

= 0.616 x V_SUP, V_SUP= 7 V to 18 V, t_BIT

= 96 µs (10.4 kbps), D3 = t_{BUS_rec(min)}/(2

x t_BIT) (See 图8-11, 图8-12)

Duty Cycle 3 (ISO/DIS 17987 Param

29)

D3_12V

0.417

TH_REC(MAX)= 0.645 x V_SUP, TH_DOM(MAX)

= 0.616 x V_SUP, V_SUP= 4 V to 7 V, t_BIT

=

D3_12V

Duty Cycle 3

96 µs (10.4 kbps), D3 = t_{BUS_rec(min)}/(2 x

t_BIT) (See 图8-11, 图8-12)

TH_REC(MIN)= 0.389 x V_SUP, TH_DOM(MIN)

= 0.251 x V_SUP, V_SUP= 4.6 V to 7.4 V,

t_BIT= 96 µs (10.4 kbps), D4 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 4 (ISO/DIS 17987 Param

30)

D4_12V

D1_24V

0.59

0.6

TH_REC(MIN)= 0.389 x V_SUP, TH_DOM(MIN)

= 0.251 x V_SUP, V_SUP= 7.4 V to 9.4 V,

t_BIT= 96 µs (10.4 kbps), D4 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 4

TH_REC(MIN)= 0.389 x V_SUP, TH_DOM(MIN)

= 0.251 x V_SUP, V_SUP= 7.4 V to 18 V,

t_BIT= 96 µs (10.4 kbps), D4 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 4 (ISO/DIS 17987 Param

30)

0.59

TH_REC(MAX)= 0.710 x V_SUP, TH_DOM(MAX)

= 0.544 x V_SUP, V_SUP= 15 V to 36 V,

t_BIT= 50 µs (20 kbps), D1 =

t_{BUS_rec(min)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 1 (ISO/DIS 17987 Param

72)⁽¹⁾

0.33

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7.7 Switching Characteristics (continued)

parameters valid across -40℃≤T_A≤125℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

TH_REC(MIN)= 0.446 x V_SUP, TH_DOM(MIN)

= 0.302 x V_SUP, V_SUP= 15.6 V to 36 V,

t_BIT= 50 µs (20 kbps), D2 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 2 (ISO/DIS 17987 Param

73)

D2_24V

0.642

TH_REC(MAX)= 0.744 x V_SUP, TH_DOM(MAX)

= 0.581 x V_SUP, V_SUP= 7 V to 36 V, t_BIT

= 96 µs (10.4 kbps), D3 = t_{BUS_rec(min)}/(2

x t_BIT) (See 图8-11, 图8-12)

Duty Cycle 3 (ISO/DIS 17987 Param

74)

D3_24V

0.386

TH_REC(MAX)= 0.645 x V_SUP, TH_DOM(MAX)

= 0.581 x V_SUP, V_SUP= 4 V to 7 V, t_BIT

=

D3_24V

Duty Cycle

96 µs (10.4 kbps), D3 = t_{BUS_rec(min)}/(2 x

t_BIT) (See 图8-11, 图8-12)

TH_REC(MIN)= 0.422 x V_SUP, TH_DOM(MIN)

= 0.284 x V_SUP, V_SUP= 4.6 V to 36 V,

t_BIT= 96 µs (10.4 kbps), D4 =

t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

Duty Cycle 4 (ISO/DIS 17987 Param

75)

D4_24V

0.591

(1) Duty cycles: LIN driver bus load conditions (C_LIN, R_LIN): Load1 = 1 nF, 1 kΩ; Load2 = 10 nF, 500 Ω, Load3 = 6.8 nF, 660 Ω. Duty

cycles 3 and 4 are defined for 10.4-kbps operation. The TLIN2027 also meets these lower data rate requirements, while it is capable of

the higher speed 20-kbps operation as specified by duty cycles 1 and 2. SAEJ2602 derives propagation delay equations from the LIN

2.0 duty cycle definitions, for details see the SAEJ2602 specification

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7.8 Timing Requirements

SYMBOL

DESCRIPTION

TEST CONDITIONS

MIN

NOM

MAX UNIT

Receiver rising and falling propagation

delay time (ISO/DIS 17987 Param 31,

76)

R_RXD= 2.4 kΩ, C_RXD= 20 pF (See 图

8-13 and 图8-14 )

t_{rx_pdr,}t_{rx_pdf}

6

µs

Rising edge with respect to falling edge,

Symmetry of receiver propagation delay (trx_sym = t_{rx_pdf}–t_{rx_pdr}), R_RXD= 2.4

t_{rx_sym}

t_LINBUS

t_CLEAR

2

150

50

µs

–2

25

8

time

kΩ_,C_RXD= 20 pF (See 图8-13 and 图

8-14 )

LIN wakeup time (Minimum dominant

time on LIN bus for wakeup)

65

25

See 图8-17, 图9-2, and 图9-3

See 图9-3

Time to clear false wakeup prevention

logic if LIN bus had a bus stuck

dominant fault (recessive time on LIN

bus to clear bus stuck dominant fault)

Time to change from standby mode to

normal mode or normal mode to sleep

mode through EN pin (See 图8-15

and 图9-4)

t_{MODE_CHANGE}Mode change delay time

2

15

µs

Time for normal mode to initialize and

data on RXD pin to be valid (See 图

8-15)

t_NOMINT

Normal mode initialization time

Power up time

35

µs

Upon power up time it takes for valid

data on RXD

t_PWR

1.5

ms

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7.9 Typical Characteristics

70

60

50

40

30

20

10

0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

-40èC

25èC

125èC

-40èC

25èC

125èC

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

D002

D001

图7-2. V_OLvs V_SUPand Temperature

图7-1. V_OHvs V_SUPand Temperature

4

3.5

3

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

2.5

2

1.5

1

-40èC

27èC

125èC

-40èC

27èC

125èC

0.5

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

D003

D004

图7-3. Dominant I_SUPvs V_SUPand Temperature

图7-4. Recessive I_SUPvs V_SUPand Temperature

0.014

0.012

0.01

1.8

1.6

1.4

1.2

1

0.008

0.006

0.004

0.002

0

0.8

0.6

0.4

0.2

0

-40èC

27èC

125èC

-40èC

27èC

125èC

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

D006

D005

图7-6. Standby Recessive I_SUPvs V_SUPand Temperature

图7-5. Standby Dominant I_SUPvs V_SUPand Temperature

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7.9 Typical Characteristics (continued)

0.02

0.018

0.016

0.014

0.012

0.01

0.008

0.006

0.004

0.002

0

-40èC

27èC

125èC

0

5

10 15 20 25 30 35 40 45 50 55 60

Supply Voltage (V)

D007

图7-7. Sleep Current vs V_SUPand Temperature

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8 Parameter Measurement Information

1

8

7

NC

RXD

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

2

V_SUP

V_PS

EN

NC

3

4

6

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

LIN

:

t_R/t_FTriangle Wave: < 40ns

TXD

5

GND

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-1. Test System: Operating Voltage Range with RX and TX Access: Parameters 9, 10

Delta t = + 5 µs

Trigger Point

(t_BIT= 50 µs)

RX

2 x t_BIT= 100 µs (20 kBaud)

图8-2. RX Response: Operating Voltage Range

Period T = 1/f

Amplitude

(signal range)

LIN Bus Input

Frequency: f = 20 Hz

Symmetry: 50%

图8-3. LIN Bus Input Signal

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1

2

3

4

8

7

NC

RXD

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

V_SUP

V_PS

EN

NC

6

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

LIN

:

t_R/t_FTriangle Wave: < 40ns

TXD

5

GND

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-4. LIN Receiver Test with RX access Param 17, 18, 19, 20

1

8

7

NC

RXD

EN

Power Supply 1

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

2

V_SUP

V_PS1

D

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

6

5

3

4

NC

LIN

V_PS2

TXD

R_BUS

GND

Measurement Tools

O-scope:

DMM

图8-5. V_{SUP_NON_OP}Param 11

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1

2

8

7

NC

RXD

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

V_SUP

V_PS

EN

NC

R_MEAS

3

4

6

LIN

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

:

5

:

t_R/t_FTriangle Wave: < 40ns

TXD

GND

Frequency: 20 ppm

T = 10 ms

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-6. Test Circuit for I_{BUS_LIM}at Dominant State (Driver on) Param 12

1

RXD

8

7

NC

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

2

3

V_SUP

V_PS

EN

NC

R_MEAS= 499 Ω

6

LIN

5

4

TXD

GND

Measurement Tools

O-scope:

DMM

图8-7. Test Circuit for I_{BUS_PAS_dom}; TXD = Recessive State V_BUS= 0 V, Param 13

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Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

1

2

8

7

NC

RXD

EN

V_PS1

V_SUP

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

V_PS2

1 kΩ

6

3

4

NC

LIN

V_PS22 V/s ramp

[8 V ‰ 36 V]

5

TXD

GND

V Drop across resistor

< 20 mV

Measurement Tools

O-scope:

DMM

图8-8. Test Circuit for I_{BUS_PAS_rec}Param 14

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

1

2

8

7

NC

RXD

EN

5 V

V_PS1

V_SUP

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

V_PS2

1 kΩ

6

5

3

4

NC

LIN

V_PS22 V/s ramp

[0 V ‰ 36 V]

TXD

GND

V Drop across resistor

< 1V

Measurement Tools

O-scope:

DMM

图8-9. Test Circuit for I_{BUS_NO_GND}Loss of GND

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8

7

1

NC

RXD

5 V

2

V_SUP

EN

Power Supply 2

Resolution: 10mV/ 1mA

10 kΩ

6

3

Accuracy: 0.2%

V_PS

NC

LIN

V_PS2 V/s ramp

[0 V ‰ 36 V]

5

4

TXD

GND

V Drop across resistor

< 1V

Measurement Tools

O-scope:

DMM

图8-10. Test Circuit for I_{BUS_NO_BAT}Loss of Battery

1

2

8

7

RXD

NC

5 V

Power Supply 1

Resolution: 10mV/1mA

Accuracy: 0.2%

V_SUP

EN

NC

V_PS1

R_MEAS

6

3

4

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

LIN

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

5

:

V_PS2

TXD

GND

:

t_R/t_FTriangle Wave: < 40ns

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-11. Test Circuit Slope Control and Duty Cycle Param 27, 28, 29, 30

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t_BIT

RECESSIVE

D = 0.5

TXD (Input)

DOMINANT

D1₂₄: 0.710 * V_SUP

D3₂₄: 0.744 * V_SUP

D1₁₂: 0.744 * V_SUP

D3₁₂: 0.778 * V_SUP

TH_REC(MAX)

TH_DOM(MAX)

TH_REC(MIN)

TH_DOM(MIN)

Thresholds

RX Node 1

D1₁₂: 0.581 * V_SUP

D3₁₂: 0.616 * V_SUP

D1₂₄: 0.554 * V_SUP

D3₂₄: 0.581 * V_SUP

LIN Bus

Signal

D2₁₂: 0.422 * V_SUP

D4₁₂: 0.389 * V_SUP

D2₂₄: 0.446 * V_SUP

D4₂₄: 0.442 * V_SUP

V_SUP

Thresholds

RX Node 2

D2₁₂: 0.284 * V_SUP

D4₁₂: 0.251 * V_SUP

D2₂₄: 0.302 * V_SUP

D4₂₄: 0.284 * V_SUP

t_{BUS_REC(MIN)}

t_{BUS_DOM(MAX)}

RXD: Node 1

D1 (20 kbps)

D3 (10.4 kbps)

D = t_{BUS_REC(MIN)}/(2 x t_BIT

)

t_{BUS_DOM(MIN)}

t_{BUS_REC(MAX)}

RXD: Node 2

D2 (20 kbps)

D4 (10.4 kbps)

D = t_{BUS_REC(MAX)}/(2 x t_BIT

)

图8-12. Definition of Bus Timing Parameters

V_CC

2.4 kΩ

1

2

8

RXD

EN

NC

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

20 pF

7

V_SUP

V_PS

6

3

4

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

NC

LIN

:

t_R/t_FTriangle Wave: < 40ns

5

TXD

GND

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-13. Propagation Delay Test Circuit; Param 31, 32

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TH_REC(MAX)

Thresholds

RX Node 1

TH_DOM(MAX)

LIN Bus

Signal

V_SUP

TH_REC(MIN)

Thresholds

RX Node 2

TH_DOM(MIN)

RXD: Node 1

D1 (20 kbps)

t_{rx_pdr(1)}

t_{rx_pdf(1)}

D3 (10.4 kbps)

RXD: Node 2

D2 (20 kbps)

D4 (10.4 kbps)

t_{rx_pdr(2)}

t_{rx_pdf(2)}

图8-14. Propagation Delay

Wake Event

t_{MODE_CHANGE}

EN

t_{MODE_CHANGE}

t_NOMINT

Normal

Transi on

Sleep

Standby

Transi on

Normal

MODE

Mirrors

Bus

Indeterminate

Ignore

Wake Request

RXD = Low

RXD

Mirrors Bus

Floa ng

Indeterminate Ignore

图8-15. Mode Transitions

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EN

Weak Internal Pull-down

TXD

Weak Internal Pull-down

V_SUP

LIN

RXD

Floa ng

Sleep

MODE

Normal

图8-16. Wake-up Through EN

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LIN

0.6 x V_SUP

V_SUP

0.4 x V_SUP

t < t_LINBUS

t_LINBUS

TXD

Weak Internal Pull-down

EN

RXD

Floa ng

MODE

Standby

Sleep

Normal

图8-17. Wake-up through LIN

R_RXD

RXD

NC

C_RXD

V_SUP

100 nF

EN

R_LIN

LIN

NC

C_LIN

GND

TXD

图8-18. Test Circuit for AC Characteristics

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9 Detailed Description

9.1 Overview

The TLIN2027-Q1 is a Local Interconnect Network (LIN) physical layer transceiver, compatible with LIN 2.0, LIN

2.1, LIN 2.2, LIN 2.2A and ISO/DIS 17987–4 standards, with integrated wake-up and protection features. The

LIN bus is a single-wire bidirectional bus typically used for low speed in-vehicle networks using data rates from

2.4 kbps to 20 kbps. The TLIN2027-Q1 LIN receiver works up to 100 kbps supporting in-line programming. The

LIN protocol data stream on the TXD input is converted by the TLIN2027-Q1 into a LIN bus signal using a

current-limited wave-shaping driver as outlined by the LIN physical layer specification. The receiver converts the

data stream to logic-level signals that are sent to the microprocessor through the open-drain RXD pin. The LIN

bus has two states: dominant state (voltage near ground) and recessive state (voltage near battery). In the

recessive state, the LIN bus is pulled high by the internal pull-up resistor (45 kΩ) and a series diode. No external

pull-up components are required for responder mode applications. Commander mode applications require an

external pull-up resistor (1 kΩ) plus a series diode per the LIN specification. The TLIN2027-Q1 provides many

protection features such as immunity to ESD and high bus standoff voltage. The device also provides two

methods to wake up: EN pin and from the LIN bus.

9.2 Functional Block Diagram

NC

RXD

V_SUP/2

V_SUP

Comp

45 k

Filter

EN

NC

Wake-Up

State & Control

205 k

Fault Detection

& Protection

LIN

DR / Slope CTL

TXD

350 k

GND

9.3 Feature Description

9.3.1 LIN (Local Interconnect Network) Bus

This high voltage input/output pin is a single-wire LIN bus transmitter and receiver. The LIN pin can survive

transient voltages up to 60 V. Reverse currents from the LIN to supply (V_SUP) are minimized with blocking

diodes, even in the event of a ground shift or loss of supply (V_SUP).

9.3.1.1 LIN Transmitter Characteristics

The transmitter has thresholds and AC parameters according to the LIN specification. The transmitter is a low-

side transistor with internal current limitation and thermal shutdown. During a thermal shut-down condition, the

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transmitter is disabled to protect the device. There is an internal pull-up resistor with a serial diode structure to

V_SUP, so no external pull-up components are required for the LIN responder mode applications. An external pull-

up resistor and series diode to V_SUPmust be added when the device is used for a commander mode node

application.

9.3.1.2 LIN Receiver Characteristics

The receiver’s characteristic thresholds are proportional to the device supply pin in accordance to the LIN

specification.

The receiver is capable of receiving higher data rates (> 100 kbps) than supported by LIN or SAEJ2602

specifications. This allows the TLIN2027-Q1 to be used for high speed downloads at the end-of-line production

or other applications. The actual data rate achievable depends on system time constants (bus capacitance and

pull-up resistance) and driver characteristics used in the system.

9.3.1.2.1 Termination

There is an internal pull-up resistor with a serial diode structure to V_SUP, so no external pull-up components are

required for the LIN responder mode applications. An external pull-up resistor (1 kΩ) and a series diode to V_SUP

must be added when the device is used for commander mode applications as per the LIN specification.

图9-1 shows a commander node configuration and how the voltage levels are defined

Voltage drop across the

diodes in the pull-up path

V_{LIN_Bus}

Simplified Transceiver

V_SUP/2

RXD

V_SUP

V_Battery

V_{LIN_RecesSsUivPe}

V

Receiver

Filter

1 k

LIN

Bus

LIN

45 k

TXD

350 k

GND

Transmitter

with slope control

V_{LIN_Dominant}

t

图9-1. Commander Node Configuration with Voltage Levels

9.3.2 TXD (Transmit Input and Output)

TXD is the interface to the MCU’s LIN protocol controller or SCI and UART that is used to control the state of

the LIN output. When TXD is low the LIN output is dominant (near ground). When TXD is high the LIN output is

recessive (near V_Battery). See 图 9-1. The TXD input structure is compatible with microcontrollers with 3.3 V and

5 V I/O.

9.3.3 RXD (Receive Output)

RXD is the interface to the MCU’s LIN protocol controller or SCI and UART, which reports the state of the LIN

bus voltage. LIN recessive (near V_Battery) is represented by a high level on the RXD and LIN dominant (near

ground) is represented by a low level on the RXD pin. The RXD output structure is an open-drain output stage.

This allows the device to be used with 3.3 V and 5 V I/O microcontrollers. If the microcontroller’s RXD pin does

not have an integrated pull-up, an external pull-up resistor to the microcontroller I/O supply voltage is required. In

standby mode the RXD pin is driven low to indicate a wake-up request from the LIN bus.

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9.3.4 V_SUP(Supply Voltage)

V_SUPis the power supply pin. V_SUPis connected to the battery through an external reverse-blocking diode (图

9-1). If there is a loss of power at the ECU level, the device has extremely low leakage from the LIN pin, which

does not load the bus down. This is optimal for LIN systems in which some of the nodes are unpowered (ignition

supplied) while the rest of the network remains powered (battery supplied).

9.3.5 GND (Ground)

GND is the device ground connection. The device can operate with a ground shift as long as the ground shift

does not reduce the V_SUPbelow the minimum operating voltage, as well as ensuring the input and output

voltages are within their appropriate thresholds. If there is a loss of ground at the ECU level, the device has

extremely low leakage from the LIN pin, which does not load the bus down. This is optimal for LIN systems in

which some of the nodes are unpowered (ignition supplied) while the rest of the network remains powered

(battery supplied).

9.3.6 EN (Enable Input)

EN controls the operational modes of the device. When EN is high the device is in normal operating mode

allowing a transmission path from TXD to LIN and from LIN to RXD. When EN is low the device is put into sleep

mode and there are no transmission paths available. The device can enter normal mode only after wake-up. EN

has an internal pull-down resistor to ensure the device remains in low-power mode even if EN floats.

9.3.7 Protection Features

The TLIN2027-Q1 has several protection features, described below.

9.3.8 Bus Stuck Dominant System Fault: False Wake-Up Lockout

The TLIN2027-Q1 contains logic to detect bus stuck dominant system faults and prevents the device from

waking up falsely during the system fault. Upon entering sleep mode, the device detects the state of the LIN bus.

If the bus is dominant, the wake-up logic is locked out until a valid recessive on the bus “clears”the bus stuck

dominant, preventing excessive current consumption. 图9-2 and 图9-3 show the behavior of this protection.

RXD

EN

LIN Bus

t_LINBUS

< t_LINBUS

图9-2. No Bus Fault: Entering Sleep Mode with Bus Recessive Condition and Wake-Up

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RXD

EN

t_LINBUS

LIN Bus

t_CLEAR

< t_CLEAR

图9-3. Bus Fault: Entering Sleep Mode with Bus Stuck Dominant Fault, Clearing, and Wake-Up

9.3.9 Thermal Shutdown

The LIN transmitter is protected by current limiting circuitry; however, if the junction temperature of the device

exceeds the thermal shutdown threshold, the device puts the LIN transmitter into the recessive state. Once the

over-temperature fault condition has been removed and the junction temperature has cooled beyond the

hysteresis temperature, the transmitter is re-enabled, assuming the device remained in the normal operation

mode. During this fault, the transceiver remains in normal mode (assuming no change of state request on EN),

the transmitter is in recessive state, the RXD pin reflects the LIN bus and LIN bus pull-up termination remains

on.

9.3.10 Under Voltage on V_SUP

The TLIN2027-Q1 contains a power-on reset circuit to avoid false bus messages during under voltage conditions

when V_SUPis less than UV_SUP

.

9.3.11 Unpowered Device and LIN Bus

In automotive applications some LIN nodes in a system can be unpowered (ignition supplied) while others in the

network remain powered by the battery. The TLIN2027-Q1 has extremely low unpowered leakage current from

the bus so an unpowered node does not affect the network or load it down.

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9.4 Device Functional Modes

The TLIN2027-Q1 has three functional modes of operation: normal, sleep, and standby. The next sections will

describe these modes as well as how the device moves between the different modes. 图 9-4 graphically shows

the relationship while 表9-1 shows the state of pins.

表9-1. Operating Modes

LIN BUS

TERMINATION

MODE

Sleep

EN

Low

RXD

Floating

Low

TRANSMITTER

COMMENT

Weak current pull-up

Off

Wake-up event detected,

waiting on MCU to set EN

Standby

45 kΩ (typical)

LIN bus

data

Normal

High

On

LIN transmission up to 20 kbps

Unpowered System

V_SUP< UV_SUP

V_SUP> UV_SUP

EN = Low

V_SUP< UV_SUP

V_SUP> UV_SUP

EN = High

V_SUP< UV_SUP

Standby Mode

Driver: Off

RXD: Low

Termination: 45 k

EN = High

LIN Bus Wake-up

Normal Mode

Sleep Mode

Driver: On

RXD: LIN Bus Data

Termination: 45 k

Driver: O

RXD: Floa ng

Termina on: Weak pull-up

EN = Low

EN = High

图9-4. Operating State Diagram

9.4.1 Normal Mode

If the EN pin is high at power up the device will power up in normal mode. If the EN pin is low, it will power up in

standby mode. The EN pin controls the mode of the device. In normal operational mode the receiver and

transmitter are active and the LIN transmission up to the LIN specified maximum of 20 kbps is supported. The

receiver detects the data stream on the LIN bus and outputs it on RXD for the LIN controller. A recessive signal

on the LIN bus is a logic high and a dominant signal on the LIN bus is a logic low. The driver transmits input data

from TXD to the LIN bus. Normal mode is entered as EN transitions high while the TLIN2027-Q1 is in sleep or

standby mode for > t_{MODE_CHANGE}plus t_NOMINT

.

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9.4.2 Sleep Mode

Sleep mode is the power saving mode for the TLIN2027-Q1. Sleep mode is only entered when the EN pin is low

and from normal mode. Even with extremely low current consumption in this mode, the TLIN2027-Q1 can still

wake up from LIN bus through a wake-up signal or if EN is set high for ≥ t_{MODE_CHANGE}. The LIN bus is filtered

to prevent false wake-up events. The wake-up events must be active for the respective time periods (t_LINBUS).

The sleep mode is entered by setting EN low for longer than t_{MODE_CHANGE}

While the device is in sleep mode, the following conditions exist:

.

• The LIN bus driver is disabled and the internal LIN bus termination is switched off (to minimize power loss if

LIN is short circuited to ground). However, the weak current pull-up is active to prevent false wake-up events

in case an external connection to the LIN bus is lost.

• The normal receiver is disabled.

• EN input and LIN wake-up receiver are active.

9.4.3 Standby Mode

This mode is entered whenever a wake-up event occurs through LIN bus while the device is in sleep mode. The

LIN bus responder mode termination circuit is turned on when standby mode is entered. Standby mode is

signaled through a low level on RXD. See 节10.2.2.2 for more application information.

When EN is set high for longer than t_{MODE_CHANGE}while the device is in standby mode, the device returns to

normal mode. The normal transmission paths from TXD to LIN bus and LIN bus to RXD are enabled.

9.4.4 Wake-Up Events

There are two ways to wake up from sleep mode:

• Remote wake-up initiated by the falling edge of a recessive (high) to dominant (low) state transition on LIN

bus where the dominant state is be held for t_LINBUSfilter time. After this t_LINBUSfilter time has been met and a

rising edge on the LIN bus going from dominant state to recessive state initiates a remote wake-up event,

eliminating false wake-ups from disturbances on the LIN bus or if the bus is shorted to ground.

• Local wake-up through EN being set high for longer than t_{MODE_CHANGE}

.

9.4.4.1 Wake-Up Request (RXD)

When the TLIN2027-Q1 encounters a wake-up event from the LIN bus, RXD goes low and the device transitions

to standby mode until EN is reasserted high and the device enters normal mode. Once the device enters normal

mode, the RXD pin is releases the wake-up request signal and the RXD pin then reflects the receiver output

from the LIN bus.

9.4.4.2 Mode Transitions

When the TLIN2027-Q1 is transitioning from normal to sleep or standby modes the device needs the time

t_{MODE_CHANGE}to allow the change to fully propagate from the EN pin through the device into the new state.

When transitioning from sleep or standby to normal mode the device needs t_{MODE_CHANGE}plus t_NOMINT

.

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10 Application and Implementation

备注

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

10.1 Application Information

The TLIN2027-Q1 can be used as both a responder node device and a commander node device in a LIN

network. The device comes with the ability to support both remote wake-up request and local wake-up request.

10.2 Typical Application

The device integrates a 45 kΩ pull-up resistor and series diode for responder node applications. For commander

applications an external 1 kΩ pull-up resistor with series blocking diode can be used. 图 10-1 shows the device

being used in both commander mode and responder mode applications.

V_SUP

COMMANDER

NODE

VREG

V_SUP

V_DD

V_SUP

NC

8

NC

3

(D)

EN

7

I/O

2

V_DD

Commander

Node

MCU w/o

pull-up^(B)

Pull-up^(C)

V_DDI/O

1 k

LIN

MCU

TLIN2027-Q1

6

LIN Controller

1

4

220 pF

Or

RXD

TXD

SCI/UART^(A)

GND

5

V_SUP

RESPONDER

NODE

VREG

V_SUP

V_DD

V_SUP

NC

8

NC

3

(D)

EN

7

I/O

2

V_DD

MCU w/o

pull-up^(B)

V_DDI/O

LIN

MCU

TLIN2027-Q1

6

LIN Controller

Or

1

4

220 pF

RXD

TXD

SCI/UART^(A)

GND

5

A. If RXD on MCU on LIN responder node has internal pull-up, no external pull-up resistor is needed.

B. If RXD on MCU on LIN responder node does not have an internal pull-up, requires external pull-up resistor.

C. Commander node applications require and external 1 kΩpull-up resistor and serial diode.

D. Decoupling capacitor values are system dependent but usually have 100 nF, 1 µF and ≥10 µF.

图10-1. Typical LIN Bus

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10.2.1 Design Requirements

The RXD output structure is an open-drain output stage. This allows the TLIN2027-Q1 to be used with 3.3- V

and 5-V I/O processor. If the RXD pin of the processor does not have an integrated pull-up, an external pull-up

resistor to the processor I/O supply voltage is required. The select external pull-up resistor value should be

between 1 kΩ to 10 kΩ, depending on supply used (See I_OLin electrical characteristics). The V_SUPpin of the

device should be decoupled with a 100-nF capacitor as close to the supply pin of the device as possible.

10.2.2 Detailed Design Procedures

10.2.2.1 Normal Mode Application Note

When using the TLIN2027-Q1 in systems which are monitoring the RXD pin for a wake-up request, special care

should be taken during the mode transitions. The output of the RXD pin is indeterminate for the transition period

between states as the receivers are switched. The application software should not look for an edge on the RXD

pin indicating a wake-up request until t_{MODE_CHANGE}. This is shown in 图8-15

10.2.2.2 Standby Mode Application Note

If the TLIN2027-Q1 detects an under voltage on V_SUPthe RXD pin transitions low and would signal to the

software that the TLIN2027-Q1 is in standby mode and should be returned to sleep mode for the lowest power

state.

10.2.3 Application Curves

The below figures show the propagation delay from the TXD pin to the LIN pin for both dominant to recessive

and recessive to dominant stated under lightly loaded conditions.

图10-2. Recessive to Dominant Propagation

图10-3. Dominant to Recessive Propagation

11 Power Supply Recommendations

The TLIN2027-Q1 was designed to operate directly off a car battery, or any other DC supply ranging from 4 V to

45 V. A 100 nF decoupling capacitor should be placed as close to the V_SUPpin of the device as possible. It is

good practice for some applications with noisier supplies to include 1 µF and 10 µF decoupling capacitor, as

well.

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12 Layout

In order for your PCB design to be successful, start with design of the protection and filtering circuitry. Because

ESD transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high frequency layout

techniques must be applied during PCB design. Placement at the connector also prevents these noisy events

from propagating further into the PCB and system.

12.1 Layout Guidelines

• Pin 1 (RXD): The pin is an open-drain output and requires an external pull-up resistor in the range of 1 kΩ to

10 kΩ to function properly. Note that the minimum value will depend on the VIO supply used. See I_OLin

electrical specifications. If the microprocessor paired with the transceiver does not have an integrated pull-up,

an external resistor should be placed between RXD and the regulated voltage supply for the microprocessor.

• Pin 2 (EN): EN is an input pin that is used to place the device in a low-power sleep mode. If this feature is not

used the pin should be pulled high to the regulated voltage supply of the microprocessor through a series

resistor between 1 kΩ and 10 kΩ. Additionally, a series resistor may be placed on the pin to limit current on

the digital lines in the case of an over voltage fault.

• Pin 3 (NC): Not Connected.

• Pin 4 (TXD): The TXD pin is used to transmit the input signal from the microcontroller. A series resistor can

be placed to limit the input current to the device in the case of an over-voltage on this pin. A capacitor to

ground can be placed close to the input pin of the device to filter noise.

• Pin 5 (GND): This is the ground connection for the device. This pin should be tied to the ground plane

through a short trace with the use of two vias to limit total return inductance.

• Pin 6 (LIN): This pin connects to the LIN bus. For responder mode applications, a 220 pF capacitor to ground

is implemented. For commander mode applications, an additional series resistor and blocking diode should

be placed between the LIN pin and the V_SUPpin. See 图10-1.

• Pin 7 (VSUP): This is the supply pin for the device. A 100 nF decoupling capacitor should be placed as close

to the device as possible.

• Pin 8 (NC): Not Connected.

备注

All ground and power connections should be made as short as possible and use at least two vias to

minimize the total loop inductance.

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12.2 Layout Example

V_DD

RXD

EN

1

2

NC

8

U1

V_DD

V_SUP

EN

7

R2

V_SUP

C3

GND

D1

LIN

Only needed for

the commander node

3

5

NC

6

LIN

GND

TXD

GND 5

R6

GND

图12-1. Layout Example

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13 Device and Documentation Support

13.1 Documentation Support

13.1.1 Related Documentation

For related documentation see the following:

• LIN Standards:

– ISO/DIS 17987-1: Road vehicles -- Local Interconnect Network (LIN) -- Part 1: General information and

use case definition

– ISO/DIS 17987-4: Road vehicles -- Local Interconnect Network (LIN) -- Part 4: Electrical Physical Layer

(EPL) specification 12V/24V

– SAEJ2602-1: LIN Network for Vehicle Applications

– LIN Specifications LIN 2.0, LIN 2.1, LIN 2.2 and LIN 2.2A

• EMC requirements:

– SAEJ2962-1: Communication Transceivers Qualification Requirements - LIN

– ISO 10605: Road vehicles - Test methods for electrical disturbances from electrostatic discharge

– ISO 11452-4:2011: Road vehicles - Component test methods for electrical disturbances from narrowband

radiated electromagnetic energy - Part 4: Harness excitation methods

– ISO 7637-1:2015: Road vehicles - Electrical disturbances from conduction and coupling - Part 1:

Definitions and general considerations

– ISO 7637-3: Road vehicles - Electrical disturbances from conduction and coupling - Part 3: Electrical

transient transmission by capacitive and inductive coupling via lines other than supply lines

– IEC 62132-4:2006: Integrated circuits - Measurement of electromagnetic immunity 150 kHz to 1 GHz -

Part 4: Direct RF power injection method

– IEC 61000-4-2

– IEC 61967-4

– CISPR25

• Conformance Test requirements:

– ISO/DIS 17987-7.2: Road vehicles -- Local Interconnect Network (LIN) -- Part 7: Electrical Physical Layer

(EPL) conformance test specification

– SAEJ2602-2: LIN Network for Vehicle Applications Conformance Test

•

13.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

13.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

13.4 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

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13.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

13.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE OUTLINE

VSON - 1 mm max height

DRB0008J

PLASTIC QUAD FLAT PACK- NO LEAD

3.1

2.9

B

A

PIN 1 INDEX AREA

3.1

2.9

0.1 MIN

(0.13)

SECTION A-A

TYPICAL

1 MAX

C

SEATING PLANE

0.08 C

0.05

0.00

1.75

1.55

(0.2) TYP

6X 0.65

(0.19)

4

5

SYMM

9

2.5

2.3

1.95

1

8

0.36

0.26

8X

PIN 1 ID

(OPTIONAL)

0.1

0.05

C A B

C

SYMM

0.5

0.3

8X

4225036/A 06/2019

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.

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EXAMPLE BOARD LAYOUT

VSON - 1 mm max height

DRB0008J

PLASTIC QUAD FLAT PACK- NO LEAD

(2.8)

(1.65)

8X (0.6)

8X (0.31)

SYMM

1

8

6X (0.65)

SYMM

9

(1.95) (2.4)

(0.95)

(R0.05) TYP

4

5

(Ø 0.2) VIA

TYP

(0.575)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 20X

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

METAL

SOLDER MASK

OPENING

EXPOSED METAL

SOLDER MASK

OPENING

METAL

NON- SOLDER MASK

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4225036/A 06/2019

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

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EXAMPLE STENCIL DESIGN

VSON - 1 mm max height

DRB0008J

PLASTIC QUAD FLAT PACK- NO LEAD

(2.8)

2X

(1.51)

8X (0.6)

8X (0.31)

SYMM

1

8

2X

(1.06)

6X (0.65)

SYMM

(1.95)

(0.63)

9

(R0.05) TYP

4

5

METAL

TYP

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD

81% PRINTED COVERAGE BY AREA

SCALE: 20X

4225036/A 06/2019

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

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PACKAGE OUTLINE

D0008A

SOIC - 1.75 mm max height

SCALE 2.800

SMALL OUTLINE INTEGRATED CIRCUIT

C

SEATING PLANE

.228-.244 TYP

[5.80-6.19]

.004 [0.1] C

A

PIN 1 ID AREA

6X .050

[1.27]

8

1

2X

.189-.197

[4.81-5.00]

NOTE 3

.150

[3.81]

4X (0 -15 )

4

5

8X .012-.020

[0.31-0.51]

B

.150-.157

[3.81-3.98]

NOTE 4

.069 MAX

[1.75]

.010 [0.25]

C A B

.005-.010 TYP

[0.13-0.25]

4X (0 -15 )

SEE DETAIL A

.010

[0.25]

.004-.010

[0.11-0.25]

0 - 8

.016-.050

[0.41-1.27]

DETAIL A

TYPICAL

(.041)

[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

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EXAMPLE BOARD LAYOUT

D0008A

SOIC - 1.75 mm max height

SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )

[1.55]

SYMM

SEE

DETAILS

1

8

8X (.024)

[0.6]

SYMM

(R.002 ) TYP

[0.05]

5

4

6X (.050 )

[1.27]

(.213)

[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED

METAL

EXPOSED

METAL

.0028 MAX

[0.07]

.0028 MIN

[0.07]

ALL AROUND

SOLDER MASK

DEFINED

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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EXAMPLE STENCIL DESIGN

D0008A

SOIC - 1.75 mm max height

SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )

[1.55]

SYMM

1

8

8X (.024)

[0.6]

SYMM

(R.002 ) TYP

[0.05]

5

4

6X (.050 )

[1.27]

(.213)

[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

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TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TLIN2027-Q1
厂家：	TEXAS INSTRUMENTS
描述：	适用于 K-Line、具有故障保护功能的汽车本地互联网络 (LIN) 收发器
文件：	总44页 (文件大小：2346K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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