TLV2463AQDRG4Q1 [TI]
LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH SHUTDOWN; 低功耗轨至轨输入/输出运算放大器，带有关断
| 型号： | TLV2463AQDRG4Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH SHUTDOWN |
| 文件： | 总38页 (文件大小：1424K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
LOW-POWER RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS
WITH SHUTDOWN
Check for
Samples: TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1, TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-
Q1, TLV2464A-Q1
1
FEATURES
•
Qualified for Automotive Applications
•
•
•
•
•
Supply Current . . . 500 mA/Channel
Input Offset Voltage . . . 100 mV
Input Noise Voltage . . . 11 nV/√Hz
Slew Rate . . . 1.6 V/ms
•
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
•
•
•
Rail-to-Rail Output Swing
Micropower Shutdown Mode
(TLV2460/TLV2463) . . . 0.3 mA/Channel
Gain Bandwidth Product . . . 6.4 MHz
±80-mA Output Drive Capability
•
Universal Operational Amplifier EVM
TLV2460
D OR PW PACKAGE
(TOP VIEW)
TLV2461
TLV2462
D OR PW PACKAGE
(TOP VIEW)
D, DGK, OR PW PACKAGE
(TOP VIEW)
SHDN
VDD
NC
IN
NC
1OUT
1IN
VDD+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
NC
IN
+
VDD
+
2OUT
2IN
OUT
NC
IN+
GND
OUT
NC
1IN+
GND
IN+
GND
2IN+
TLV2464
TLV2463
D OR PW PACKAGE
(TOP VIEW)
D OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
1IN
VDD
+
1OUT
1IN
1
2
3
4
5
6
7
14
13
12
11
10
9
4OUT
4IN
2OUT
2IN
1IN+
GND
NC
1IN+
4IN+
GND
3IN+
3IN
2IN+
NC
VDD+
2IN+
2IN
1SHDN
NC
2SHDN
NC
8
8
2OUT
3OUT
NC – No internal connection
DESCRIPTION
The devices in the TLV246x family of low-power rail-to-rail input/output operational amplifiers are specifically
designed for portable applications. The input common-mode voltage range extends beyond the supply rails for
maximum dynamic range in low-voltage systems. The amplifier output has rail-to-rail performance with
high-output-drive capability, solving one of the limitations of older rail-to-rail input/output operational amplifiers.
This rail-to-rail dynamic range and high output drive make the TLV246x ideal for buffering analog-to-digital
converters.
The operational amplifier has 6.4-MHz bandwidth and 1.6-V/ms slew rate with only 500-mA supply current,
providing good ac performance with low power consumption. Devices are available with an optional shutdown
terminal, which places the amplifier in an ultralow supply-current mode (IDD = 0.3 mA/channel). While in
shutdown, the operational amplifier output is placed in a high-impedance state. DC applications are also well
served with an input noise voltage of 11 nV/√Hz and input offset voltage of 100 mV.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
www.ti.com
ORDERING INFORMATION(1)
VIOmax
AT 25�C
ORDERABLE PART
TA
PACKAGE(2)
TOP-SIDE MARKING
NUMBER
TLV2460QDRQ1
2460Q1
TLV2461QDRQ1
2461Q1
2462Q1
2463Q1
2464Q1
2460Q1
2461Q1
2462Q1
2463Q1
2464Q1
QVM
SOP − D
Reel of 2500
TLV2462QDRQ1
TLV2463QDRQ1
TLV2464QDRQ1(3)
TLV2460QPWRQ1
TLV2461QPWRQ1
TLV2462QPWRQ1
TLV2463QPWRQ1
TLV2464QPWRQ1(3)
TLV2462QDGKRQ1
TLV2460AQDRQ1
TLV2461AQDRQ1
TLV2462AQDRQ1
TLV2463AQDRQ1
TLV2464AQDRQ1(3)
TLV2460AQPWRQ1
TLV2461AQPWRQ1
TLV2462AQPWRQ1
TLV2463AQPWRQ1
TLV2464AQPWRQ1
2000 mV
TSSOP − PW
MSOP − DGK
SOP − D
Reel of 2000
Reel of 2500
Reel of 2500
–40°C to 125°C
2460AQ
2461AQ
2462AQ
TLV2463AQ1
2464AQ
2460AQ
2461AQ
2462AQ
2463AQ
2464AQ
1500 mV
TSSOP − PW
Reel of 2000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) Product Preview
2
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VDD
VID
II
Supply voltage(2)
6 V
–0.2 V to VDD + 0.2 V
±200 mA
Differential input voltage range
Input current (any input)
Output current
IO
±175 mA
II
Total input current (into VDD+
)
175 mA
IO
Total output current (out of GND)
Operating free-air temperature range
Maximum junction temperature
175 mA
TA
TJ
–40°C to 125°C
150°C
D (8 pin)
176°C/W
D (14 pin)
PW (8 pin)
PW (14 pin)
DGK (8 pin)
123°C/W
qJA
Thermal impedance, junction to ambient(3)
259°C/W
174°C/W
242°C/W
Tstg
Storage temperature range
–65°C to 150°C
Class I
Latch-Up performance meets 100 mA per AEC-Q100 ( Class I )
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to GND.
(3) Package thermal impedance is calculated in accordance with JESD 51-5.
RECOMMENDED OPERATING CONDITIONS
MIN
2.7
MAX UNIT
Single supply
Split supply
6
V
VDD
Supply voltage
±1.35
±3
VICR
TA
Common-mode input voltage range
Operating free-air temperature
–0.2 VDD + 0.2
V
–40
2
125
°C
VIH
VIL
Shutdown on/off voltage level(1)
V
0.7
(1) Relative to voltage on the GND terminal of the device
Copyright © 2003–2010, Texas Instruments Incorporated
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
www.ti.com
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 3 V (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
100
2000
VDD = 3 V,
TLV246x
Full range
25°C
2200
mV
VIC = 1.5 V,
VO = 1.5 V,
RS = 50 Ω
VIO
Input offset voltage
150
1500
TLV246xA
Full range
1700
Temperature coefficient of
input offset voltage
VDD = 3 V, VIC = 1.5 V,
VO = 1.5 V, RS = 50 Ω
aVIO
2
mV/°C
25°C
Full range
25°C
2.8
7
pA
75
VDD = 3 V, VIC = 1.5 V,
VO = 1.5 V, RS = 50 Ω
IIO
Input offset current
Input bias current
4.4
2.9
2.7
0.1
0.3
50
14
pA
75
IIB
VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω
IO = –2.5 mA
Full range
25°C
Full range
25°C
2.8
2.5
VOH
High-level output voltage
Low-level output voltage
V
IO = –10 mA
Full range
25°C
VIC = 1.5 V, IOL = 2.5 mA
VIC = 1.5 V, IOL = 10 mA
Sourcing
Full range
25°C
0.2
V
VOL
Full range
25°C
0.5
Full range
25°C
20
20
IOS
Short circuit output current
Output current
mA
40
Sinking
Full range
25°C
IO
Measured 1 V from rail
RL = 10 kΩ
±40
105
mA
dB
25°C
90
89
Large-signal differential
voltage amplification
AVD
Full range
25°C
ri(d)
Differential input resistance
109
7
Ω
Common-mode input
capacitance
ci(o)
f = 10 kHz
25°C
25°C
pF
Closed-loop output
impedance
zo
f = 100 kHz, AV = 10
33
80
Ω
25°C
Full range
25°C
66
60
80
75
85
80
Common-mode rejection
ratio
CMRR
VICR = 0 V to 3 V, RS = 50 Ω
dB
85
95
VDD = 2.7 V to 6 V, VIC = VDD/2, No load
VDD = 3 V to 5 V, VIC = VDD/2, No load
VO = 1.5 V, No load
Full range
25°C
Supply-voltage rejection
kSVR
dB
ratio (ΔVDD±/ΔVIO
)
Full range
25°C
0.5
0.3
0.575
mA
Supply current
(per channel)
IDD
Full range
25°C
0.9
Supply current in shutdown
(TLV2460, TLV2463)
IDD(SHDN)
SHDN < 0.7 V, Per channel in shutdown
mA
Full range
2.5
(1) Full range is –40°C to 125°C.
4
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
OPERATING CHARACTERISTICS
VDD = 3 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
1
TYP
MAX
UNIT
25°C
1.6
SR
Slew rate at unity gain
VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ
V/ms
Full range
0.8
f = 100 Hz
f = 1 kHz
16
11
Vn
In
Equivalent input noise voltage
25°C
25°C
nV/√Hz
pA/√Hz
Equivalent input noise current f = 1 kHz
0.13
0.006
0.02
0.08
7.6
AV = 1
Total harmonic distortion
plus noise
VO(PP) = 2 V,
RL = 10 kΩ, f = 1 kHz
THD+N
AV = 10
25°C
25°C
%
AV = 100
Both channels
Channel 1
only,
Channel 2 on
t(on)
Amplifier turn-on time
Amplifier turn-off time
AV = 1, RL = 10 kΩ
ms
7.65
333
328
Both channels
Channel 1
only,
Channel 2 on
t(off)
AV = 1, RL = 10 kΩ
25°C
ns
Channel 2
only,
329
Channel 1 on
Gain-bandwidth product
Settling time
f = 10 kHz, CL = 160 pF, RL = 10 kΩ
25°C
25°C
5.2
MHz
V(STEP)PP = 2 V,
AV = –1, CL = 10 pF,
RL = 10 kΩ
0.1%
1.47
0.01%
0.1%
1.78
1.77
1.98
ts
ms
V(STEP)PP = 2 V,
AV = –1, CL = 56 pF,
RL = 10 kΩ
0.01%
fm
Phase margin at unity gain
Gain margin
RL = 10 kΩ, CL = 160 pF
RL = 10 kΩ, CL = 160 pF
25°C
25°C
44
7
°
dB
(1) Full range is –40°C to 125°C.
Copyright © 2003–2010, Texas Instruments Incorporated
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
www.ti.com
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 5 V (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
150
2000
VDD = 5 V,
VIC = 2.5 V,
VO = 2.5 V,
RS = 50 Ω
TLV246x
Full range
25°C
2200
mV
VIO
Input offset voltage
150
1500
TLV246xA
Full range
1700
Temperature coefficient of VDD = 5 V, VIC = 2.5 V,
aVIO
2
mV/°C
input offset voltage
VO = 2.5 V, RS = 50 Ω
25°C
Full range
25°C
0.3
7
pA
60
VDD = 5 V, VIC = 2.5 V,
VO = 2.5 V, RS = 50 Ω
IIO
Input offset current
1.3
4.9
4.8
4.8
0.1
0.2
145
100
14
pA
60
VDD = 5 V, VIC = 2.5 V,
VO = 2.5 V, RS = 50 Ω
IIB
Input bias current
Full range
25°C
IO = –2.5 mA
Full range
25°C
4.8
4.7
4.4
VOH
High-level output voltage
TLV246x,TLV246xA
V
Full range
25°C
IO = –10 mA
TLV2462QDGKRQ1
Full range
25°C
VIC = 2.5 V, IOL = 2.5 mA
VIC = 2.5 V, IOL = 10 mA
Sourcing
Full range
25°C
0.2
V
VOL
Low-level output voltage
Full range
25°C
0.3
Full range
25°C
60
60
IOS
Short circuit output current
Output current
mA
Sinking
Full range
25°C
IO
Measured 1 V from rail
±80
109
mA
dB
25°C
92
90
Large-signal differential
voltage amplification
VIC = 2.5 V, RL = 10 kΩ,
VO = 1 V to 4 V
AVD
Full range
Differential input
resistance
ri(d)
ci(o)
zo
25°C
25°C
25°C
109
7
Ω
pF
Ω
Common-mode input
capacitance
f = 10 kHz
Closed-loop output
impedance
f = 100 kHz, AV = 10
29
85
25°C
Full range
25°C
71
60
80
75
85
80
Common-mode rejection
ratio
CMRR
kSVR
IDD
VICR = 0 V to 5 V, RS = 50 Ω
dB
dB
85
95
VDD = 2.7 V to 6 V, VIC = VDD/2, No load
VDD = 3 V to 5 V, VIC = VDD/2, No load
VO = 2.5 V, No load
Full range
25°C
Supply-voltage rejection
ratio (ΔVDD±/ΔVIO
)
Full range
25°C
0.55
1
0.65
mA
1
Supply current
(per channel)
Full range
25°C
Supply current in
shutdown
(TLV2460, TLV2463)
IDD(SHD
N)
SHDN < 0.7 V, Per channel in shutdown
mA
Full range
3
(1) Full range is –40°C to 125°C.
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
OPERATING CHARACTERISTICS
VDD = 5 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
1
TYP
MAX
UNIT
25°C
1.6
SR
Slew rate at unity gain
VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ
V/ms
Full range
0.8
f = 100 Hz
f = 1 kHz
14
11
Vn
In
Equivalent input noise voltage
25°C
25°C
nV/√Hz
pA/√Hz
Equivalent input noise current f = 100 Hz
0.13
0.004
0.01
0.04
7.6
AV = 1
Total harmonic distortion
plus noise
VO(PP) = 4 V,
RL = 10 kΩ, f = 10 kHz
THD+N
AV = 10
25°C
%
AV = 100
Both channels
Channel 1
only,
7.65
t(on)
Amplifier turn-on time
AV = 1, RL = 10 kΩ
Channel 2 on
25°C
ms
Channel 2
only,
Channel 1 on
7.25
333
328
Both channels
Channel 1
only,
t(off)
Amplifier turn-off time
AV = 1, RL = 10 kΩ
Channel 2 on
25°C
ns
Channel 2
only,
329
Channel 1 on
Gain-bandwidth product
Settling time
f = 10 kHz, CL = 160 pF, RL = 10 kΩ
25°C
25°C
6.4
MHz
V(STEP)PP = 2 V,
AV = –1, CL = 10 pF,
RL = 10 kΩ
0.1%
1.53
0.01%
0.1%
1.83
3.13
3.33
ts
ms
V(STEP)PP = 2 V,
AV = –1, CL = 56 pF,
RL = 10 kΩ
0.01%
fm
Phase margin at unity gain
Gain margin
RL = 10 kΩ, CL = 160 pF
RL = 10 kΩ, CL = 160 pF
25°C
25°C
45
7
°
dB
(1) Full range is –40°C to 125°C.
Copyright © 2003–2010, Texas Instruments Incorporated
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
TYPICAL CHARACTERISTICS
Table of Graphs
www.ti.com
FIGURE
1, 2
VIO
Input offset voltage
vs Common-mode input voltage
vs Free-air temperature
vs Free-air temperature
vs High-level output current
vs Low-level output current
vs Frequency
IIB
Input bias current
3, 4
IIO
Input offset current
3, 4
VOH
VOL
VO(PP)
High-level output voltage
Low-level output voltage
Maximum peak-to-peak output voltage
Open-loop gain
5, 6
7, 8
9, 10
11, 12
11, 12
13
vs Frequency
Phase
vs Frequency
AVD
Differential voltage amplification
Capacitive load
vs Load resistance
vs Load resistance
vs Frequency
14
zo
Output impedance
15, 16
17
CMRR
kSVR
Common-mode rejection ratio
Supply-voltage rejection ratio
vs Frequency
vs Frequency
18, 19
20
vs Supply voltage
IDD
Supply current
vs Free-air temperature
21
Amplifier turnon characteristics
Amplifier turnoff characteristics
Supply current turnon
Supply current turnoff
Shutdown supply current
Slew rate
22
23
24
25
vs Free-air temperature
vs Load capacitance
vs Frequency
26
SR
Vn
27
28, 29
30, 31
32, 33
34, 35
11, 12
36
Equivalent input noise voltage
vs Common-mode input voltage
vs Frequency
THD
Total harmonic distortion
THD + N
Total harmonic distortion plus noise
vs Peak-to-peak signal amplitude
vs Frequency
fm
Phase margin
vs Load capacitance
vs Free-air temperature
vs Supply voltage
37
38
Gain-bandwidth product
vs Free-air temperature
39
Large signal follower
Small signal follower
Inverting large signal
Inverting small signal
40, 41
42, 43
44, 45
46, 47
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
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SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
INPUT OFFSET VOLTAGE
INPUT OFFSET VOLTAGE
vs
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
1
1
V
= 3 V
= 25°C
V
= 5 V
= 25°C
DD
DD
0.8
T
A
T
A
0.6
0.4
0.6
0.4
0.2
0
0.2
0
0.2
0.2
0.4
0.6
0.4
0.6
0.8
1
0.8
1
0
0.5
1
1.5
2
2.5
(V)
3
0
1
2
3
4
5
Common-Mode Input Voltage,V
(V)
Common-Mode Input Voltage,V
ICR
ICR
Figure 1.
Figure 2.
INPUT BIAS AND INPUT OFFSET CURRENT
INPUT BIAS AND INPUT OFFSET CURRENT
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
5
4.5
4
6
5
4
3
V
= 3 V
V
= 5 V
DD
V = 1.5 V
DD
V = 2.5 V
I
I
I
IB
I
IB
3.5
3
2.5
2
2
1
1.5
1
I
0.5
0
IO
I
IO
0
1
0.5
–55 –35 –15
5
25
45
65 85 105 125
–55 –35 –15
5
25
45
65 85 105 125
Free-Air Temperature,T (°C)
Free-Air Temperature,T (°C)
A
A
Figure 3.
Figure 4.
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
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HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
3
5
V
DD
= 3 V
DC
V
DD
= 5 V
DC
4.5
4
2.5
T
A
= 55 °C
T
A
= 55 °C
3.5
3
2
1.5
1
T
= 125°C
= 85°C
T
= 125°C
= 85°C
A
A
2.5
T
T
A
A
2
T
= 25°C
A
T
A
= 25°C
1.5
1
T
A
= 40 °C
T
A
= 40 °C
0.5
0
0.5
0
0
10
20
30
40
50
60
70
80
0
20 40 60 80 100 120 140 160 180 200
High-Level Output Current, I
(mA)
High-Level Output Current, I
(mA)
OH
OH
Figure 5.
Figure 6.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3
4.5
4
V
DD
= 3 V
V = 5 V
DD DC
DC
2.5
T
= 40 °C
A
T
= 40 °C
3.5
3
A
2
1.5
1
T
= 25°C
= 85°C
A
T
= 25°C
= 85°C
= 125°C
A
2.5
2
T
A
T
A
T
A
= 125°C
T
A
1.5
1
0.5
0
T
A
= 55 °C
0.5
0
T
A
= 55 °C
0
10
20
30
40
50
60
(mA)
70
0
20
40
60
80
100 120 140 160
Low-Level Output Current, I
OL
Figure 7.
Figure 8.
10
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
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SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
PEAK-TO-PEAK OUTPUT VOLTAGE
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
5.5
5
3
2.5
2
V
= 3 V
DD
= 10
V
= 5 V
DD
= 10
A
V
A
V
THD = 1%
= 10 kΩ
THD = 1%
= 10 kΩ
4.5
4
R
R
L
L
3.5
3
1.5
2.5
2
1.5
1
1
0.5
0
0.5
0
10k
100k
1M
10M
10k
100k
1M
10M
Frequency, f (Hz)
Frequency, f (Hz)
Figure 9.
Figure 10.
OPEN-LOOP GAIN AND PHASE
OPEN-LOOP GAIN AND PHASE
vs
vs
FREQUENCY
FREQUENCY
100
90
80
70
60
50
40
100
90
80
70
60
50
40
40°
20°
0°
40°
20°
0°
V
= ±1.5 V
= 10 kΩ
= 0
V
= ±2.5 V
= 10 kΩ
= 0
DD
DD
R
C
T
R
C
T
L
L
L
L
= 25°C
= 25°C
A
A
20°
40°
60°
80°
100°
20°
40°
60°
80°
100°
A
A
VD
VD
30
20
30
20
Phase
Phase
120°
140°
160°
180°
200°
120°
140°
160°
180°
200°
10
0
10
0
–10
–20
–10
–20
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
Frequency, f (Hz)
Frequency, f (Hz)
Figure 11.
Figure 12.
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
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DIFFERENTIAL VOLTAGE AMPLIFICATION
CAPACITIVE LOAD
vs
vs
LOAD RESISTANCE
LOAD RESISTANCE
10000
1000
100
180
160
140
120
100
80
T
= 25°C
A
Phase Margin < 30°
V
= ±2.5 V
DD
V
DD
= ±1.5 V
60
Phase Margin > 30°
40
V
= 5 V
DD
Phase Margin = 30°
= 25°C
20
T
A
0
10
100
1k
Load Resistance, R (Ω)
10k
100
1k
100k
10k
Load Resistance, R (Ω)
1M
L
L
Figure 13.
Figure 14.
OUTPUT IMPEDANCE
vs
OUTPUT IMPEDANCE
vs
FREQUENCY
FREQUENCY
1000
1000
100
10
V
= ±1.5 V
= 25°C
V
T
= ±2.5 V
= 25°C
DD
DD
T
A
A
100
10
1
A
V
= 100
A
= 100
= 10
V
1
A
= 10
= 1
V
A
V
0.1
0.1
A
V
A
V
= 1
0.01
0.01
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
Frequency, f (Hz)
Frequency, f (Hz)
Figure 15.
Figure 16.
12
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
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SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
COMMON-MODE REJECTION RATIO
SUPPLY-VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
110
100
90
85
+k
SVR
V
= ±1.5 V
= 25°C
DD
T
A
90
80
70
60
80
75
k
SVR
V
V
= 5 V
= 2.5 V
DD
IC
V
V
= 3 V
= 1.5 V
DD
IC
70
+k
SVR
65
60
50
40
k
SVR
10
100
1k
10k
100k
1M
10M
10
100
10k
100k
1M
10M
1k
Frequency, f (Hz)
Frequency, f (Hz)
Figure 17.
Figure 18.
SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY CURRENT
vs
vs
FREQUENCY
SUPPLY VOLTAGE
90
80
70
0.8
0.7
+k
SVR
I
= 125°C
DD
V
T
= ±2.5 V
= 25°C
DD
I
= 85°C
A
DD
k
SVR
0.6
0.5
0.40
0.30
60
50
40
I
I
= 25°C
DD
I
= 55 °C
DD
+k
SVR
= 40 °C
DD
0.20
0.10
k
SVR
2.5
3
3.5
4
4.5
5
5.5
6
10
100
10k
100k
1M
10M
1k
Supply Voltage, V
(V)
Frequency, f (Hz)
DD
Figure 19.
Figure 20.
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
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SUPPLY CURRENT
vs
AMPLIFIER WITH A SHUTDOWN PULSE
TURNON CHARACTERISTICS
FREE-AIR TEMPERATURE
0.8
0.7
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
I
= 125°C
DD
I
= 85°C
DD
V
= 5 V
V = 2.5 V
DD
I
0.6
0.5
0.40
0.30
V
= 3 V
DD
V = 1.5 V
I
I
I
= 25°C
DD
I
= 55 °C
DD
= 40 °C
DD
0.20
0.10
0.35
0.30
2.5
3
3.5
4
4.5
5
5.5
6
–55 –35 –15
5
25
45
65 85
105 125
Supply Voltage, V
(V)
Free-Air Temperature,T (°C)
DD
A
Figure 21.
Figure 22.
AMPLIFIER WITH A SHUTDOWN PULSE
TURNOFF CHARACTERISTICS
SUPPLY CURRENT WITH A SHUTDOWN PULSE
TURNON CHARACTERISTICS
5
4
3
2
1
0
3
2
5
V
= 5 V
= 10 kΩ
= 1
DD
R
L
Shutdown Pin
4
3
2
1
0
3
2
Shutdown Pin
A
V
T
A
= 25°C
Amplifier Output
Amplifier Output
V
= 5 V
= 10 kΩ
= 1
DD
R
L
A
V
1
0
T
A
= 25°C
1
0
9
–5
–3
–1
1
3
11
5
7
–5
–3
–1
1
3
5
7
Time, t (μs)
Time, t (μs)
Figure 23.
Figure 24.
14
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
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SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
SHUTDOWN SUPPLY CURRENT
TURNOFF SUPPLY CURRENT
WITH A SHUTDOWN PULSE
vs
FREE-AIR TEMPERATURE
1
5.5
4.5
3
2.5
2
V
= 5 V
V = 2.5 V
DD
I
Shutdown Pin
A
V
= 1
= 25°C
0.8
T
A
V
= 5 V
V = 2.5 V
DD
I
0.6
0.4
3.5
2.5
1.5
1
Supply Current
V
= 3 V
V = 1.5 V
DD
0.5
0
I
0.2
0
1.5
0.5
0.5
0.5
1
0.2
–55 –35 –15
5
25
45
65 85
105 125
–0.40
–0.20
0
0.2
0.4
0.6
Time, t (μs)
Free-Air Temperature,T (°C)
A
Figure 25.
Figure 26.
SLEW RATE
vs
EQUIVALENT INPUT NOISE VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
18
17
1.8
V
= 3 V
DD
A
= 10
V = 1.5 V
1.75
V
I
T
A
= 25°C
1.7
1.65
1.6
16
15
14
SR+
1.55
SR
1.5
1.45
1.4
13
12
V
= 2 V
= 160 pF
= 1
O(PP)
C
L
A
V
11
10
R
= 10 kΩ
= 25°C
L
1.35
1.3
T
A
100
100k
1k
10k
Frequency, f (Hz)
2.5
3
3.5
4
4.5
5
5.5
6
Supply Voltage, V
(V)
DD
Figure 27.
Figure 28.
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
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EQUIVALENT INPUT NOISE VOLTAGE
EQUIVALENT INPUT NOISE VOLTAGE
vs
vs
FREQUENCY
COMMON-MODE INPUT VOLTAGE
18
17
20
15
14
13
12
V
= 5 V
V
= 3 V
DD
DD
A
= 10
V = 2.5 V
A
= 10
f = 1 kHz
V
V
I
T
A
= 25°C
T
A
= 25°C
16
15
14
13
12
11
10
11
10
0
0.5
1
1.5
2
2.5
(V)
100
100k
1k
10k
Frequency, f (Hz)
Common-Mode Input Voltage,V
ICR
Figure 29.
Figure 30.
EQUIVALENT INPUT NOISE VOLTAGE
vs
TOTAL HARMONIC DISTORTION
vs
COMMON-MODE INPUT VOLTAGE
FREQUENCY
0.5
0.1
20
15
14
13
12
V
= ±1.5 V
= 2 V
= 10 kΩ
V
= 5 V
DD
DD
V
O(PP)
A
= 10
f = 1 kHz
V
R
L
T
A
= 25°C
A
= 100
= 10
= 1
V
A
V
A
V
11
10
0.001
10
100
1k
10k
100k
0
1
2
3
4
5
Common-Mode Input Voltage,V
(V)
Frequency, f (Hz)
ICR
Figure 31.
Figure 32.
16
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
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SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
vs
FREQUENCY
PEAK-TO-PEAK SIGNAL AMPLITUDE
1
1
V
V
= ±2.5 V
= 4 V
= 10 kΩ
V
= 3 V
DD
DD
R
L
= 250 Ω
A = 1
V
TA = 25°C
O(PP)
R
L
R
L
= 2 kΩ
0.1
0.1
0.010
0.001
A
= 100
V
R
L
= 10 kΩ
A
V
= 10
= 1
R
L
= 100 kΩ
A
V
0.001
10
100
1k
10k
100k
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6 2.8
3
3.2
Frequency, f (Hz)
Peak-to-Peak Signal Amplitude ( V)
Figure 33.
Figure 34.
TOTAL HARMONIC DISTORTION PLUS NOISE
PHASE MARGIN
vs
vs
PEAK-TO-PEAK SIGNAL AMPLITUDE
LOAD CAPACITANCE
1
90
80
70
60
50
40
30
20
10
0
R
= 250 Ω
L
V
= ±2.5 V
DD
= 25°C
= 10 kΩ
T
A
R
L
R
= 2 kΩ
L
R
null
= 50 Ω
0.1
0.010
0.001
R
L
= 10 kΩ
R
null
= 20 Ω
R
L
= 100 kΩ
R
null
= 0 Ω
V
= 5 V
DD
= 1
= 25°C
A
V
T
A
10
100
1k
10k
100k
4
4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9
Peak-to-Peak Signal Amplitude (V)
5
Load Capacitance, C (pF)
L
Figure 35.
Figure 36.
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TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
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PHASE MARGIN
vs
GAIN BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
60
55
50
5
R
C
= 10 kΩ
= 160 pF
L
C
R
= 160 pF
= 10 kΩ
L
L
L
f = 10 kHz
= 25°C
4.75
4.5
4.25
4
T
A
V
V
= ±2.5 V
= ±1.5 V
DD
45
40
DD
35
30
3.75
3.5
–55 –35 –15
5
25
45
65 85
105 125
2.5
3
3.5
4
4.5
5
5.5
6
Free-Air Temperature,T (°C)
Supply Voltage, V
(V)
A
DD
Figure 37.
Figure 38.
GAIN BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
LARGE SIGNAL FOLLOWER
5
2.2
2
R
C
= 10 kΩ
L
= 160 pF
L
4.75
V
= ±2.5 V
DD
Input
4.5
4.25
4
1.8
1.6
1.4
1.2
Output
V
V
= 3 V
DD
3.75
3.5
Input
= 1 V
I(PP)
V
DD
= ±1.5 V
V = 1.5 V
I
Output
R
C
= 10 kΩ
= 160 pF
= 1
L
L
1
3.25
3
A
V
T
A
= 25°C
0.8
–55 –35 –15
5
25
45
65 85
105 125
–2
0
2
4
6
8
10 12 14 16 18
Time, t (μs)
Free-Air Temperature,T (°C)
A
Figure 39.
Figure 40.
18
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
LARGE SIGNAL FOLLOWER
SMALL SIGNAL FOLLOWER
3.7
3.3
1.6
1.55
1.5
Input
2.9
2.5
2.1
Input
Output
V
V
= 5 V
DD
Output
Input
= 2 V
I(PP)
V = 2.5 V
I
R
C
A
= 10 kΩ
= 160 pF
= 1
L
L
1.45
1.4
Output
V
V
= 3 V
DD
1.7
1.3
C
A
= 160 pF
= 1
= 25°C
= 100 mV
V
L
I(PP)
T
A
= 25°C
V = 1.5 V
I
V
T
A
R
= 10 kΩ
L
–2
0
2
4
6
8
10 12 14 16 18
–0.2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
Time, t (μs)
Time, t (μs)
Figure 41.
Figure 42.
SMALL SIGNAL FOLLOWER
INVERTING LARGE SIGNAL
2.6
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
Input
2.55
2.5
V
V
= 3 V
DD
= 1 V
I(PP)
V = 1.5 V
I
Input
R
C
= 10 kΩ
= 160 pF
= 1
L
L
A
V
T
A
= 25°C
Output
2.45
2.4
Output
V
V
= 5 V
DD
C
A
= 160 pF
= 1
= 25°C
= 100 mV
L
I(PP)
0.7
0.5
V = 2.5 V
I
V
T
A
R
= 10 kΩ
L
–0.2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
–0.2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
Time, t (μs)
Time, t (μs)
Figure 43.
Figure 44.
Copyright © 2003–2010, Texas Instruments Incorporated
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
www.ti.com
INVERTING LARGE SIGNAL
INVERTING SMALL SIGNAL
1.6
1.55
1.5
4
Input
3.5
3
Input
= 3 V
V
V
= 5 V
DD
V
V
DD
= 2 V
I(PP)
= 100 mV
I(PP)
V = 2.5 V
I
V = 1.5 V
I
R
C
= 10 kΩ
= 160 pF
= 1
L
R
C
= 10 kΩ
= 160 pF
= 1
L
L
2.5
2
L
A
V
A
V
T
A
= 25°C
T
A
= 25°C
1.45
1.4
Output
Output
1.5
1
–0.2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
–0.2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
Time, t (μs)
Time, t (μs)
Figure 45.
Figure 46.
INVERTING SMALL SIGNAL
2.6
2.55
2.5
Input
V
V
= 5 V
DD
= 100 mV
I(PP)
V = 2.5 V
I
R
C
= 10 kΩ
= 160 pF
= 1
L
L
A
V
T
A
= 25°C
2.45
2.4
Output
–0.2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
Time, t (μs)
Figure 47.
PARAMETER MEASUREMENT INFORMATION
R
null
_
+
R
L
C
L
Figure 48.
20
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
APPLICATION INFORMATION
Driving a Capacitive Load
When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device’s
phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10
pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in
Figure 49. A minimum value of 20 Ω works well for most applications.
R
F
R
G
_
R
NULL
Input
Output
+
C
LOAD
Figure 49. Driving a Capacitive Load
Offset Voltage
The output offset voltage (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The schematic and formula in Figure 50 can be used to calculate the output offset
voltage.
R
F
I
IB
R
G
+
V
I
V
O
+
R
S
I
IB+
R
R
V
OO =VIO(1+ ( F )) ±IIB +R (1+ ( F )) ±IIB -
S
RF
RG
RG
Figure 50. Output Offset Voltage Model
Copyright © 2003–2010, Texas Instruments Incorporated
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21
Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
www.ti.com
General Configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see
Figure 51).
R
G
R
F
V
O
+
V
I
R1
C1
1
2pR1C1
=
f
–3dB
V
O
1
= (1+ F )(
R
RG
)
V
I
1+ sR1C1
Figure 51. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is eight to ten times the filter frequency
bandwidth. Failure to do this can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
+
_
V
I
R1
R2
1
2pRC
=
f
–3dB
C2
RF
=
RG
R
F
1
2 – Q
R
G
Figure 52. 2-Pole Low-Pass Sallen-Key Filter
Shutdown Function
Two members of the TLV246x family (TLV2460 and TLV2463) have a shutdown terminal for conserving battery
life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.3
mA/channel, the amplifier is disabled, and the outputs are placed in a high-impedance mode. To enable the
amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left
floating, care should be taken to ensure that parasitic leakage current at the shutdown terminal does not
inadvertently place the operational amplifier into shutdown. The shutdown terminal threshold is always
referenced to VDD/2. Therefore, when operating the device with split supply voltages (e.g., ±2.5 V), the shutdown
terminal must be pulled to VDD− (not GND) to disable the operational amplifier.
The amplifier’s output with a shutdown pulse is shown in Figure 22, Figure 23, Figure 24, and Figure 25. The
amplifier is powered with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The
amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of
the output waveform. The times for the single, dual, and quad are listed in the data tables.
Circuit Layout Considerations
To achieve the levels of high performance of the TLV246x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
•
Ground planes − It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and output,
the ground plane can be removed to minimize the stray capacitance.
22
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
•
Proper power supply decoupling − Use a 6.8-mF tantalum capacitor in parallel with a 0.1-mF ceramic capacitor
on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the
application, but a 0.1-mF ceramic capacitor should always be used on the supply terminal of every amplifier.
In addition, the 0.1-mF capacitor should be placed as close as possible to the supply terminal. As this distance
increases, the inductance in the connecting trace makes the capacitor less effective. The designer should
strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors.
•
•
Sockets − Sockets can be used but are not recommended. The additional lead inductance in the socket pins
often leads to stability problems. Surface-mount packages soldered directly to the printed circuit board is the
best implementation.
Short trace runs/compact part placements − Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the
amplifier. Its length should be kept as short as possible. This minimizes stray capacitance at the input of the
amplifier.
•
Surface-mount passive components − Using surface-mount passive components is recommended for
high-performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout, thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept
as short as possible.
General Power Dissipation Considerations
For a given qJA, the maximum power dissipation is shown in Figure 53 and is calculated by Equation 1:
TMAX -T
= (
A
P
D
)
q
JA
(1)
Where:
PD = Maximum power dissipation of TLV246x (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA = Ambient free-air temperature (°C)
qJA = qJC + qCA
qJC = Thermal coefficient from junction to case
qCA = Thermal coefficient from case to ambient air (°C/W)
2
T
J
= 150°C
PDIP Package
Low-K Test PCB
1.75
1.5
θ
JA
= 104°C/W
MSOP Package
Low-K Test PCB
SOIC Package
θ
JA
= 260°C/W
1.25
1
Low-K Test PCB
θ
JA
= 176°C/W
0.75
0.5
SOT-23 Package
Low-K Test PCB
0.25
0
θ
JA
= 324°C/W
–55 –40 –25 –10
5
20 35 50 65 80 95 110 125
Free-Air Temperature,T (°C)
A
Figure 53. Maximum Power Dissipation vs Free-Air Temperature
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
www.ti.com
Macromodel Information
Macromodel information provided was derived using Microsim Parts™ Release 8, the model generation software
used with Microsim PSpice™. The Boyle macromodel(1) and subcircuit in Figure 54 were generated using the
TLV246x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations
of the following key parameters can be generated to a tolerance of 20% (in most cases):
(1) G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
•
•
•
•
•
•
Unity gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
•
•
•
•
•
•
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
24
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
TLV2460-Q1, TLV2461-Q1, TLV2462-Q1, TLV2463-Q1, TLV2464-Q1
TLV2460A-Q1, TLV2461A-Q1, TLV2462A-Q1, TLV2463A-Q1, TLV2464A-Q1
www.ti.com
SGLS008D –MARCH 2003–REVISED SEPTEMBER 2010
99
EGND
+
FB
RO2
C2
R2
VB
6
3
7
V
DD +
+
+
9
VLIM
RSS
VD
ISS
CSS
+
8
GA
RP
GCM
53
10
2
1
IN
DC
RO1
J1
J2
OUT
IN+
5
DLN
DE
11
12
92
54
C1
91
90
DP
+
RD1
+
+
RD2
DLP
VLP
VLN
VE
HLIM
+
4
GND
.SUBCKT TLV246X 1 2 3 4 5
RD1
RD2
R01
R02
RP
RSS
VB
VC
3
11
12
5
99
4
99
0
53
4
2.8964E3
2.8964E3
5.6000
6.2000
8.9127
10.610E6
DC 0
DC .7836
DC .7436
DC 0
C1
C2
CSS
DC
DE
DLP
DLN
DP
EGND 99
FB
11 12 2.46034E-12
10.0000E-12
10 99 443.21E-15
53 DY
3
8
7
3
10
9
3
54
7
6
7
5
5
54
90 91 DX
92 90 DX
DY
4
3
0
99
DX
POLY (2) (3,0) (4,0) 0 .5 .5
POLY (5) VB VC VE VLP
VE
VLIM
VLP
VLN
8
0
92
7
91
0
DC 117
DC 117
+ VLN 0 21.600E6 – 1E3 1E3 22E6 – 22E6
GA
GCM
ISS
HLIM
J1
6
0
0
6
4
0
2
1
9
11
10
12 345.26E- 6
99 15.4226E- 9
.MODEL DX D (IS=800.00E–18)
.MODEL DY D (IS=800.00E–18 Rs = 1m Cjo=10p)
.MODEL JX1 NJF (IS=1.0000E–12 BETA=6.3239E–3
+ VTO=–1)
.MODEL JX2 NJF (IS=1.0000E–12 BETA=6.3239E–3
10
90
11
12
6
DC 18.850E- 6
VLIM 1K
10 JX1
10 JX2
100.00E3
J2
R2
+ VTO=–1)
.ENDS
.subckt TLV_246Y 1 2 3 4 5 6
rp
3
10
6
6
6
71
99
4
4
4
4
4
5
74
4
0
53
4
8
0
92
8.9127
10.610E6
1G
1G
1G
c1
c2
11 12 2.4603E-12
72 10.000E-12
rss
rs1
rs2
rs3
rs4
s1
s2
s3
s4
vb
vc
ve
vlim
vlp
7
css
dc
de
dlp
dln
dp
10 99 443.21E-15
70 53 dy
54 70 dy
90 91 dx
92 90 dx
6
1G
71
70
10
74
9
3
54
7
6 4 s1x
6 4 s1x
6 4 s1x
6 4 s2x
dc 0
dc .7836
dc .7436
dc 0
4
3
dx
poly(2) (3,0) (4,0) 0 .5 .5
egnd 99
fb
21.600E6 – 1E3 1E3 22E6 – 22E6
0
7
99 poly(5) vb vc ve vlp vln 0
ga
gcm
72
0
0
72
11 12 345.26E- 6
10 99 15.422E- 9
dc 18.850E- 6
vlim 1K
10 jx1
10 jx2
100.00E3
2.8964E3
2.8964E3
5.6000
91
0
dc 117
dc 117
iss
hlim
j1
74
90
11
4
0
2
vln
.model dx D(Is=800.00E–18)
.model dy D(Is=800.00E–18 Rs=1m Cjo=10p)
.model jx1 NJF(Is=1.0000E–12 Beta=6.3239E–3 Vto=–1)
.model jx2 NJF(Is=1.0000E–12 Beta=6.3239E–3 Vto=–1)
.model s1x VSWITCH(Roff=1E8 Ron=1.0 Voff=2.5 Von=0.0)
.model s2x VSWITCH(Roff=1E8 Ron=1.0 Voff=0 Von=2.5)
.ends
j2
12
1
r2
72
3
3
8
7
9
rd1
rd2
ro1
ro2
11
12
70
99 6.2000
Figure 54. Boyle Macromodel and Subcircuit
Copyright © 2003–2010, Texas Instruments Incorporated
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Product Folder Link(s): TLV2460-Q1 TLV2461-Q1 TLV2462-Q1 TLV2463-Q1 TLV2464-Q1 TLV2460A-Q1
TLV2461A-Q1 TLV2462A-Q1 TLV2463A-Q1 TLV2464A-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TLV2460AQDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2460AQDRQ1
ACTIVE
ACTIVE
SOIC
D
8
8
TBD
Call TI
Call TI
TLV2460AQPWRG4Q1
TSSOP
PW
2000
2500
2000
2500
2000
2500
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2460AQPWRQ1
TLV2460QDRG4Q1
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
8
8
TBD
Call TI
Call TI
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2460QDRQ1
ACTIVE
ACTIVE
SOIC
D
8
8
TBD
Call TI
Call TI
TLV2460QPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2460QPWRQ1
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
8
8
TBD
Call TI
Call TI
TLV2461AQDRG4Q1
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2461AQDRQ1
ACTIVE
ACTIVE
SOIC
D
8
8
TBD
Call TI
Call TI
TLV2461AQPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2461AQPWRQ1
TLV2461QDRG4Q1
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
8
8
TBD
Call TI
Call TI
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2461QDRQ1
ACTIVE
ACTIVE
SOIC
D
8
8
TBD
Call TI
Call TI
TLV2461QPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2461QPWRQ1
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
8
8
TBD
Call TI
Call TI
TLV2462AQDRG4Q1
2500
2500
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
TLV2462AQDRQ1
TLV2462AQPWRG4Q1
TLV2462AQPWRQ1
ACTIVE
ACTIVE
ACTIVE
SOIC
D
8
8
8
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
PW
PW
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TLV2462QDGKRQ1
TLV2462QDRG4Q1
TLV2462QDRQ1
VSSOP
SOIC
DGK
D
8
8
8
8
2500
2500
2500
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
SOIC
D
Green (RoHS
& no Sb/Br)
TLV2462QPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
TLV2462QPWRQ1
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
8
TBD
Call TI
Call TI
TLV2463AQDRG4Q1
14
2500
2000
2500
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2463AQDRQ1
ACTIVE
ACTIVE
SOIC
D
14
14
TBD
Call TI
Call TI
TLV2463AQPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2463AQPWRQ1
TLV2463QDRG4Q1
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
14
14
TBD
Call TI
Call TI
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2463QDRQ1
ACTIVE
ACTIVE
SOIC
D
14
14
TBD
Call TI
Call TI
TLV2463QPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2463QPWRQ1
ACTIVE
ACTIVE
TSSOP
TSSOP
PW
PW
14
14
TBD
Call TI
Call TI
TLV2464AQPWRG4Q1
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2464AQPWRQ1
ACTIVE
TSSOP
PW
14
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2460-Q1, TLV2460A-Q1, TLV2461-Q1, TLV2461A-Q1, TLV2462-Q1, TLV2462A-Q1, TLV2463-Q1, TLV2463A-Q1,
TLV2464A-Q1 :
Catalog: TLV2460, TLV2460A, TLV2461, TLV2461A, TLV2462, TLV2462A, TLV2463, TLV2463A, TLV2464A
•
Enhanced Product: TLV2462A-EP, TLV2464A-EP
•
Military: TLV2460M, TLV2460AM, TLV2461M, TLV2461AM, TLV2462M, TLV2462AM, TLV2463M, TLV2463AM
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLV2462QDGKRQ1
TLV2462QDGKRQ1
VSSOP
VSSOP
DGK
DGK
8
8
2500
2500
330.0
330.0
12.4
12.4
5.3
5.3
3.4
3.4
1.4
1.4
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLV2462QDGKRQ1
TLV2462QDGKRQ1
VSSOP
VSSOP
DGK
DGK
8
8
2500
2500
364.0
358.0
364.0
335.0
27.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
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have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
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Copyright © 2012, Texas Instruments Incorporated
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