TLV61048 [TI]
采用 SOT-23 封装的 14V 输出电压非同步升压转换器;
| 型号： | TLV61048 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 SOT-23 封装的 14V 输出电压非同步升压转换器 升压转换器 |
| 文件： | 总21页 (文件大小：827K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TLV61048
ZHCSJH5 –MARCH 2019
采用 SOT-23 封装的 TLV61048 15V 输出电压非同步升压转换器
1 特性
3 说明
1
•
输入电压：2.61V 至 5.5V（下降 2.4V）
输出电压最高 15V
TLV61048 是一款非同步升压转换器，为由低电压超级
电容器和单芯锂离子电池供电的产品提供电源解决方
案。TLV61048 将电源开关与 4.7A 典型电流限制相集
成，在不影响最大负载交付的情况下增强了输入电源的
放电能力。TLV61048 也支持使用尺寸更小的宽范围外
部电感器和输出电容器来简化设计工作。
•
•
集成低侧 FET：输入电压为 3.3V 时，电阻为
85mΩ
•
•
•
•
•
•
•
•
4.7A（典型值）开关电流限制
600kHz 或 1MHz 可选开关频率
1µA 关断电流
通过配置 FREQ 引脚，TLV61048 的可选开关频率为
600kHz 或 1MHz。在轻负载时，该器件会进入 PFM
运行模式来实现更高的效率。TLV61048 具有 2ms 内
置软启动时间，从而可最大程度地降低浪涌电流。
输出电压精度为 2.5%
轻负载下采用 PFM 运行模式
内部 2ms 软启动时间
热关断保护
TLV61048 采用 3mm × 3mm 6 引脚 SOT-23 封装。
6 引脚 3mm × 3mm SOT-23 封装
器件信息(1)
2 应用
器件型号
TLV61048
封装
SOT-23 (6)
封装尺寸（标称值）
•
•
•
PLC 备用电源
2.90mm × 1.60mm
LCD 偏置电源
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
直流/直流工业隔离
简化原理图
L1
1.5 V ~ 2.6 V
C1
12V
D1
3.3V
VIN
SW
FREQ
FB
C3
C2
GND
R1
R2
ON
OFF
EN
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSEX0
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
8
9
Application and Implementation .......................... 9
8.1 Application Information.............................................. 9
8.2 Typical Applications .................................................. 9
Power Supply Recommendations...................... 14
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
Detailed Description .............................................. 6
7.1 Overview ................................................................... 6
7.2 Functional Block Diagram ......................................... 6
7.3 Feature Description................................................... 6
7.4 Device Functional Modes.......................................... 7
10 Layout................................................................... 14
10.1 Layout Guidelines ................................................. 14
10.2 Layout Example .................................................... 14
11 器件和文档支持 ..................................................... 15
11.1 器件支持 ............................................................... 15
11.2 接收文档更新通知 ................................................. 15
11.3 社区资源................................................................ 15
11.4 商标....................................................................... 15
11.5 静电放电警告......................................................... 15
11.6 术语表 ................................................................... 15
12 机械、封装和可订购信息....................................... 15
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
日期
修订版本
说明
2019 年 3 月
*
初始发行版
2
Copyright © 2019, Texas Instruments Incorporated
TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
5 Pin Configuration and Functions
DBV Package
6-Pin SOT-23
Top View
SW
GND
FB
FREQ
VIN
EN
Pin Functions
PIN
I/O
DESCRIPTION
NO.
1
NAME
SW
PWR
PWR
The switch pin of the converter. It is connected to the drain of the internal power MOSFET.
Ground
2
GND
Voltage feedback of adjustable output voltage. Connected to the center tap of a resistor
divider to program the output voltage.
3
FB
I
Enable logic input. Logic high voltage enables the device. Logic low voltage disables the
device and turns it into shutdown mode.
4
5
6
EN
VIN
I
I
I
IC power supply input
Frequency select pin. The device operates at 600 kHz if FREQ is left floating and at 1 MHz if
connected to GND.
FREQ
Copyright © 2019, Texas Instruments Incorporated
3
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
– 0.3
–0.3
-0.3
MAX
UNIT
V
VIN, EN, FREQ
6
18
(2)
Voltage range at terminals
SW
FB
V
3.6
150
V
Operating junction temperature range, TJ
–40
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
V
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(2)
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(3)
(1)
V(ESD)
Electrostatic discharge
V
(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in
to the device.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.6
TYP
MAX
5.5
14
UNIT
V
VIN
VOUT
L
Input voltage range
Output voltage range
3.3
V
Effective inductance range
Effective input capacitance range
Effective output capacitance range
Operating junction temperature
2.2
4.7
1
10
µH
µF
µF
°C
CIN
COUT
TJ
0.22
4.7
–40
125
6.4 Thermal Information
TLV61048
DBV (SOT23)
6 PINS
177.7
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
RθJC(top)
RθJB
120.6
Junction-to-board thermal resistance
33.2
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
21.5
ψJB
32.6
RθJC(bot)
n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2019, Texas Instruments Incorporated
TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
6.5 Electrical Characteristics
TA = –40°C to 85°C, VIN = 3.3 V. Typical values are at TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
2.6
TYP
MAX
UNIT
POWER SUPPLY
VIN
Input voltage range
5.5
V
V
VIN rising
VIN falling
2.55
2.4
2.61
VIN_UVLO
Under voltage lockout threshold
2.3
VIN_HYS
IQ_VIN
ISD
VIN UVLO hysteresis
150
100
mV
µA
µA
Quiescent current into VIN pin
Shutdown current into VIN pin
IC enabled, no load, no switching
IC disabled, VIN = 2.6 V to 5.5 V, TA = 25°C
1.0
OUTPUT
VOUT
Output voltage range
Feedback voltage
3.3
15
V
V
PWM mode, TJ=-40°C to 125°C
PFM mode, TA=25°C
TA = 25°C
0.78
0.8
0.82
VREF
0.81
V
IFB_LKG
ISW_LKG
Leakage current into FB pin
Leakage current into SW pin
50
nA
nA
IC disabled, SW = 5.5V
500
POWER SWITCH
RDS(on) Low-side MOSFET on resistance
Vin = 3.3, Vout = 12V
Default, SW = 1.5V
Default, SW = 2.6V
600kHz, SW = 1.5V
600kHz, VIN = 3.3V
85
550
1150
130
4.7
mΩ
kHz
kHz
ns
480
620
fSW
Switching frequency
1020
1280
tOFF_min Min. off time
ILIM_SW
Peak switch current limit
Startup time
3.8
0.4
0.4
5.6
1.2
A
tSTARTUP
2
ms
LOGIC INTERFACE
VEN_H
VEN_L
EN Logic high threshold
V
V
EN Logic low threshold
EN Pull Down Resistor
FREQ pull up resistance
FREQ logic high threshold
FREQ logic low threshold
REN
1
MΩ
kΩ
V
RFREQ
VFREQ_H
VFREQ_L
800
1.2
V
PROTECTION
TSD
Thermal shutdown threshold
Thermal shutdown hysteresis
TJ rising
150
20
°C
°C
TSD_HYS
TJ falling below TSD
版权 © 2019, Texas Instruments Incorporated
5
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
7 Detailed Description
7.1 Overview
The TLV61048 is a non-synchronous boost converter supporting output voltage up to 15 V with input ranging
from 2.61 V to 5.5 V. The TLV61048 integrates a power switch with current limit up to 4.7 A (typical). The device
operates in a current mode scheme with quasi-constant frequency with internal loop compensation built in. The
switching frequency is selectable between 600 kHz and 1 MHz. There is internal fixed soft start time which is 2
ms typically to control the inrush current during startup.
Topology of the TLV61048 boost converter is adaptive off-time with peak current control, which provides superior
load and line transient responses. The selectable switching frequency offers the possibility to optimize the design
either for the use of small sized inductor (1 MHz) or for higher system efficiency (600 kHz).
The converter operates in continuous conduction mode (CCM) when the inductor valley current is above zero,
while switches into discontinuous conduction mode (DCM) if valley current crossing zero. If the load is further
lowered, the device enters into PFM operation to achieve even higher efficiency.
7.2 Functional Block Diagram
1
VIN
SW
5
Gate Driver
UVLO
Current
Limit
VIN
SW
4
EN
Control
Logic
FREQ
6
PWM Generator
Off Time
On Time
EA
3
FB
GND
2
Thermal Shutdown
SS
REF
7.3 Feature Description
7.3.1 Undervoltage Lockout
An undervoltage lockout (UVLO) circuit stops the operation of the converter when the input voltage drops below
the typical UVLO threshold of 2.4 V. A hysteresis of 150 mV is added so that the device cannot be enabled again
until the input voltage goes up to 2.55 V. This function is implemented in order to prevent malfunctioning of the
device when the input voltage is between 2.4 V and 2.55 V.
6
版权 © 2019, Texas Instruments Incorporated
TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
Feature Description (接下页)
7.3.2 Enable and Disable
When the input voltage is above typical UVLO rising threshold of 2.55 V and the EN pin is pulled high, the
TLV61048 is enabled. When the EN pin is pulled low, the TLV61048 stops the PWM switch and turns off the low
side switch. The EN pin has an internal pull-down resistance of 1MΩ, the device is disabled when the EN pin is
floating. In shutdown mode, less than 1-µA input current is consumed.
7.3.3 Soft Start
The soft-start feature helps the regulator to gradually reach the steady state operating point, thus reducing start-
up stresses and surge. When the input voltage is applied, the output capacitor is charged to VIN through the
inductor and high side rectifier diode. After reaching the 2.55 V (typical) UVLO threshold, the internal soft-start
control circuit initiates to ramp the reference voltage to 0.8 V within 2 ms (typical), while the low side FET starts
switching after output capacitor is charged to the input voltage.
7.3.4 Frequency Select (FREQ)
The frequency select pin FREQ allows to set the switching frequency of the device to 600 kHz (FREQ = floating)
or 1 MHz (FREQ = GND). Higher switching frequency improves load transient response but reduces efficiency
slightly. The other benefit of higher switching frequency is lower output ripple voltage.
7.4 Device Functional Modes
The TLV61048 has two operation modes: PWM mode and PFM mode.
7.4.1 PWM Mode
The TLV61048 uses a quasi-constant frequency pulse width modulation (PWM) at moderate to heavy load
currents. Based on the VIN/VOUT ratio, a circuit predicts the required off-time. At the beginning of the switching
cycle, the integrated NMOS switching FET, shown in the functional block diagram, is turned on. The input voltage
is applied across the inductor and the inductor current ramps up. In this phase, the output capacitor is discharged
by the load current. When the inductor current hits the current threshold that is set by the error amplifier output,
the PWM switch is turned off, and the external power diode is forward-biased. The inductor transfers its stored
energy to replenish the output capacitor and supply the load. When the off-time is expired, the next switching
cycle starts again. The error amplifier compares the FB pin voltage with an internal reference, and its output
determines the duty cycle of the PWM switching.
The TLV61048 has a built-in compensation circuit that can accommodate a wide range of input and output
voltages for stable operation.
7.4.2 PFM Mode
The TLV61048 integrates a power save mode with pulse frequency modulation (PFM) to improve efficiency at
light load. When the load current decreases, the inductor peak current set by the output of the error amplifier
declines to regulate the output voltage. When the inductor peak current hits the low limit (400 mA typical), the
output voltage exceeds the set threshold voltage as the load current decreases further. When the FB voltage hits
the PFM reference voltage, the TLV61048 goes into power-save mode. In the power-save mode, the device only
switches when the output voltage trips below a set threshold voltage. It ramps up the output with several pulses
and enters the power save mode when the output voltage exceeds the set threshold voltage.
版权 © 2019, Texas Instruments Incorporated
7
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
Device Functional Modes (接下页)
Output
Voltage
PFM mode at light load
1.01 x VOUT_NOM
VOUT_NOM
PWM mode at heavy load
8
版权 © 2019, Texas Instruments Incorporated
TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
TLV61048 is a boost DC/DC converter integrating a power switch and loop compensation circuits. The device
supports up to 15-V output with the input range from 2.61 V to 5.5 V. The device can operate down to 1.5 V if an
external 3.3-V bias supply is applied to the VIN pin. The TLV61048 adopts the current-mode control with
adaptive constant off-time. The switching frequency is quasi-constant and selectable between 600 kHz and 1
MHz. The following design procedure can be used to select component values for the TLV61048.
8.2 Typical Applications
8.2.1 12-V Output Boost Converter With External Bias
In this design example, TLV61048 VIN pin is supplied by an external 3.3-V bias voltage to keep internal circuitry
on in order to extend power stage operating VIN to 1.5 V. 600-kHz switching frequency is selected to reduce
switching loss in order to improve overall efficiency.
L1
1.5 V ~ 2.6 V
VIN
C1
1.0uF
4.7uH
12 V
3.3 V
Bias VIN
VIN
SW
FREQ
FB
C3
0.1uF
C2
10uF
R1
GND
1.5Mꢀ
TLV61048
ON
OFF
EN
R2
107kꢀ
图 1. 12-V Boost Converter With External Bias
8.2.1.1 Design Requirements
For this design example, see parameters are shown in 表 1:
表 1. Design Requirements
PARAMETERS
Power input voltage
Control input voltage
Output voltage
VALUE
1.5 V to 2.7 V
3.3 V
12 V
Frequency
600 kHz
0 - 100 mA
Output current
版权 © 2019, Texas Instruments Incorporated
9
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Programming the Output Voltage
Output voltage is programmed via external resistor divider. By selecting the external resistor divider R1 and R2,
as shown in 公式 1, the output voltage is programmed to the desired value. When the output voltage is regulated,
the typical voltage at the FB pin is VREF of 800 mV.
≈
∆
«
’
VOUT
VREF
R1=
-1 ìR2
÷
◊
where
•
•
VOUT is the desired output voltage
VREF is the internal reference voltage at the FB pin
(1)
For best accuracy, R2 should be kept smaller than 150 kΩ to ensure the current flowing through R2 is at least
100 times larger than the FB pin leakage current. Changing R2 towards a lower value increases the immunity
against noise injection. Changing the R2 towards a higher value reduces the quiescent current for achieving
higher efficiency at low load currents.
8.2.1.2.2 Inductor Selection
Because the selection of the inductor affects steady state operation, transient behavior, and loop stability, the
inductor is the most important component in power regulator design. There are three important inductor
specifications, inductor value, saturation current, and DC resistance (DCR). The TLV61048 is designed to work
with inductor values between 2.2 µH and 10 µH. Use 公式 2 to 公式 4 to calculate the peak current of the
application inductor. To calculate the current in the worst case, use the minimum input voltage, maximum output
voltage, and maximum load current of the application. To have enough design margin, choose the inductor value
with –30% tolerance, and a low power-conversion efficiency for the calculation. In a boost regulator, the inductor
dc current can be calculated with 公式 2.
VOUT ìIOUT
IL(DC)
=
V ì h
IN
where
•
•
•
•
VOUT = output voltage
IOUT = output current
VIN = input voltage
η = power conversion efficiency, use 80% for most applications
(2)
The inductor ripple current is calculated with the 公式 3 for an asynchronous boost converter in continuous
conduction mode (CCM).
V
ì V
+ 0.8V - V
(
)
IN
OUT IN
DIL(P-P)
=
L ì fSW ì V
+ 0.8V
OUT
where
•
•
•
•
•
ΔIL(P-P) = inductor ripple current
L = inductor value
fSW = switching frequency
VOUT = output voltage
VIN = input voltage
(3)
(4)
Therefore, the inductor peak current is calculated with 公式 4.
DIL P-P
(
)
IL P = IL DC
+
(
)
(
)
Normally, it is advisable to work with an inductor peak-to-peak current of less than 40% of the average inductor
current for maximum output current. A smaller ripple from a larger valued inductor reduces the magnetic
hysteresis losses in the inductor and EMI. However, in the same way, load transient response time is increased.
表 2 lists the recommended inductor for the TLV61048 in the 600-kHz configuration.
10
版权 © 2019, Texas Instruments Incorporated
TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
表 2. Recommended Inductors for the TLV61048 at 600-kHz Configuration
SATURATION CURRENT
TYPICAL (A)
PART NUMBER
L (µH)
DCR MAX (mΩ)
SIZE (L×W×H) (mm)
VENDOR(1)
SWPA5040S4R7NT
XAL4030-472ME
SWPA5040S100MT
XAL4040-103ME
4.7
4.7
10
39
44.1
83
3.9
4.5
2.9
3
5 × 5 × 4
4 × 4 × 3
5 × 5 × 4
4 × 4 × 4
Sunlord
Coilcraft
Sunlord
Coilcraft
10
92.4
(1) See Third-party Products Disclaimer
8.2.1.2.3 Input and Output Capacitor Selection
The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. This ripple
voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a ceramic
capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by:
IOUT ìDMAX
fSW ì VRIPPLE
COUT
=
where
•
•
DMAX = maximum switching duty cycle
VRIPPLE = peak to peak output voltage ripple
(5)
The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are
used.
Take care when evaluating the derating of a ceramic capacitor under DC bias, aging, and AC signal. For
example, the DC bias can significantly reduce capacitance. A ceramic capacitor can lose more than 50% of its
capacitance at its rated voltage. Therefore, always leave margin on the voltage rating to ensure adequate
capacitance at the required output voltage.
TI recommends using the output capacitor with effective capacitance in the range of 4.7 µF to 10 µF for 600-kHz
configuration. TI also recommends placing a small 1 µF capacitor right across the rectifier diode cathode to the
GND pin of the TLV61048 to reduce the high RMS current loop's inductance. The output capacitor affects the
small signal control loop stability of the boost regulator. If the output capacitor is below the range, the boost
regulator can potentially become unstable. Increasing the output capacitor makes the output voltage ripple
smaller in PWM mode. 表 3 lists the recommended capacitor for the TLV61048.
表 3. Recommended Output Capacitors for the TLV61048
PART NUMBER
TMK316BLD106KL
CC1206KKX5R8BB106
COUT (µF)
RATING
25 V, X5R
25 V, X5R
PACKAGE
1206
VENDOR(1)
Taiyo Yuden
Yageo
10
10
1206
(1) See Third-party Products Disclaimer.
版权 © 2019, Texas Instruments Incorporated
11
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
For input capacitor, a ceramic capacitor with more than 1 µF is enough for most applications.
8.2.1.3 Application Curves
SW
SW
5 V/div
5 V/div
Vout (AC)
20 mV/div
Vout (AC)
50 mV/div
Inductor
Current
Inductor
Current
300 mA/div
400 mA/div
VIN = 2.5 V
VOUT = 12 V
IOUT = 0.1 A
VIN = 2.5 V
VOUT = 12 V
IOUT = 10 mA
图 2. Switching Waveform in CCM
图 3. Switching Waveform in PFM
EN
EN
2 V/div
2 V/div
Vout
Vout
3 V/div
3 V/div
Inductor
Current
Inductor
Current
300 mA/div
300 mA/div
图 4. Start-up Waveform
图 5. Shutdown Waveform
Vout (AC)
Vout (AC)
300 mV/div
100 mV/div
Input
Voltage
1 V/div
Output
Current
50 mA/div
VIN= 2.5 V
VOUT= 12 V
IOUT= 0.06A to 0.1
A
VIN= 1.5 V to 2.6 V
VOUT= 12 V
IOUT= 0.1 A
图 7. Line Transient
图 6. Load Transient
12
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TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
8.2.2 15-V Output Boost Converter
In this design example, TLV61048 is configured to output 15-V DC voltage. 1-MHz switching frequency is
selected to reduce output ripple and improve load transient performance. TI recommends placing an RC snubber
from the switch node to the ground node to ensure voltage spike does not exceed the specified absolute
maximum rating.
L1
3.3 µH
C1
1 µF
15 V
VIN
SW
FREQ
FB
C2
10 µF
R1
2 Mꢀ
GND
TLV61048
EN
R2
113 kꢀ
图 8. 15-V Boost Converter
表 4. Design Requirements
8.2.2.1 Design Requirements
PARAMETER
Power input voltage
Output voltage
Frequency
VALUE
2.6 V to 5.5 V
15 V
1 MHz
Output current
0 to 300 mA
8.2.2.2 Detailed Design Procedure
8.2.2.2.1 Inductor Selection
Load transient and loop response performance is optimized at 1-MHz configuration, a smaller inductance is
selected to push the right-half-plane-zero to a higher frequency beyond the crossover frequency of the control
loop. The recommended inductors for 1-MHz operation are listed in 表 5.
表 5. Recommended Inductors for the TLV61048 at 1-MHz Configuration
SATURATION CURRENT
PART NUMBER
L (µH) DCR MAX (mΩ)
SIZE (LxWxH) (mm)
VENDOR(1)
TYPICAL (A)
SWPA5040S2R2NT
XAL4020-222ME
SWPA5040S3R3NT
XAL4030-332ME
2.2
2.2
3.3
3.3
25
38.7
31
5.6
5.6
4.6
5.5
5 × 5 × 4
4 × 4 × 3
5 × 5 × 4
4 × 4 × 4
Sunlord
Coilcraft
Sunlord
Coilcraft
28.6
(1) See Third-party Products Disclaimer.
8.2.2.2.2 Input and Output Capacitor Selection
For 1-MHz configuration, use the information provided in Input and Output Capacitor Selection.
版权 © 2019, Texas Instruments Incorporated
13
TLV61048
ZHCSJH5 –MARCH 2019
www.ti.com.cn
9 Power Supply Recommendations
The device is designed to operate from an input voltage supply range between 1.5 V to 5.5 V. This input supply
must be well regulated. If the input supply is located more than a few inches from the converter, additional bulk
capacitance may be required in addition to the ceramic bypass capacitors. A typical choice is an electrolytic or
tantalum capacitor with a value of 47 µF. Output current of the input power supply must be rated according to the
supply voltage, output voltage and output current of the TLV61048.
10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those running at high switching frequency and high currents,
layout is an important design step. If the layout is not carefully done, the regulator could suffer from instability
and noise problems. To maximize efficiency, switch rise and fall time are very fast. To prevent radiation of high
frequency noise (for example, EMI), proper layout of the high-frequency switching path is essential. Minimize the
length and area of all traces connected to the SW pin, and always use a ground plane under the switching
regulator to minimize interplane coupling. The input capacitor must not only to be close to the VIN pin, but also to
the GND in in order to reduce input supply ripple.
The most critical current path for all boost converters is from the switching FET, through the rectifier diode, then
the output capacitors, and back to ground of the switching FET. This high current path contains nanosecond rise
and fall time and must be kept as short as possible. Therefore, the output capacitor must not only to be close to
the VOUT pin, but also to the GND pin to reduce the overshoot at the SW pin and VOUT pin.
10.2 Layout Example
VIN
FREQ
VIN
EN
GND
SW
GND
FB
VOUT
图 9. TLV61048 Layout
14
版权 © 2019, Texas Instruments Incorporated
TLV61048
www.ti.com.cn
ZHCSJH5 –MARCH 2019
11 器件和文档支持
11.1 器件支持
11.1.1 第三方产品免责声明
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11.2 接收文档更新通知
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下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
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TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
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Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
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11.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此产品说明书的浏览器版本，请查阅左侧的导航栏。
版权 © 2019, Texas Instruments Incorporated
15
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TLV61048DBVR
TLV61048DBVT
ACTIVE
ACTIVE
SOT-23
SOT-23
DBV
DBV
6
6
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
1VSF
1VSF
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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