TLV62084ADSGR [TI]
采用 2mm x 2mm 小外形尺寸无引线 (SON) 封装的 2A 高效降压转换器 | DSG | 8 | -40 to 125;
| 型号： | TLV62084ADSGR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 2mm x 2mm 小外形尺寸无引线 (SON) 封装的 2A 高效降压转换器 | DSG | 8 | -40 to 125 开关 光电二极管 输出元件 转换器 |
| 文件： | 总30页 (文件大小：1869K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
TLV6208x 采用 2mm x 2mm WSON 封装的 1.2A 和 2A 高效降压转换器
1 特性
3 说明
1
•
•
•
DCS-Control™架构，用于快速瞬态稳压
TLV6208x 系列器件是小型降压转换器，所用外部组件
较少，可实现具有成本效益的解决方案。此类器件属于
同步降压转换器，其输入电压范围为
2.5V 至 6V 输入电压范围 (TLV62080)
2.7V 至 6V 输入电压范围（TLV62084 和
TLV62084A）
2.5V/2.7V（TLV62080 为 2.5V，TLV62084x 为
2.7V）至 6V。TLV6208x 器件专注于在宽输出电流范
围内实现高效降压转换。该转换器在中等至高负载条件
下采用脉宽调制 (PWM) 模式，而在轻载电流条件下自
动进入省电模式，从而在整个负载电流范围内保持高效
运行。
•
•
•
•
•
•
100% 占空比，以实现最低压降
用于实现轻载效率的省电模式
输出放电功能
电源正常输出
热关断
采用 2mm x 2mm、8 引脚晶圆级小外形无引线
(WSON) 封装
为了满足系统电源轨需求，内部补偿电路支持在较大外
部输出电容值范围内进行选择。凭借 DCS-Control™
（无缝过渡至节能模式的直接控制）架构，该器件实现
了优异的负载瞬态性能和输出电压稳压精度。该器件采
用带有散热焊盘的 2mm x 2mm 晶圆级小外形无引线
(WSON) 封装。
•
•
有关改进的 特性 集，请参见 TPS62080
使用 TLV6208x 并借助 WEBENCH® Power
Designer 创建定制设计方案
2 应用范围
•
•
•
•
•
电池供电类便携式器件
负载点稳压器
器件信息(1)
器件型号
TLV62080
封装
封装尺寸（标称值）
PC、笔记本电脑、服务器
机顶盒
WSON (8)
2.00mm x 2.00mm
TLV62084,
TLV62084A
固态硬盘 (SSD)、存储器电源
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
空白
典型应用电路原理图
效率与输出电流间的关系(VOUT = 1.2V)
空白
空白
POWER GOOD
100
90
80
70
60
50
40
30
20
10
0
2.7 V to 6 V
VIN
VIN
EN
PG
180 kΩ
1 µH
SW
VOUT
TLV62084
10 µF
22 µF
GND
GND
VOS
FB
R1
R2
VIN = 2.8 V
VIN = 3.6 V
VIN = 4.2 V
1E-5
0.0001
0.001
0.01
0.1
1
2
Copyright © 2016, Texas Instruments Incorporated
Output Current (A)
D002
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
English Data Sheet: SLVSAK9
TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
目录
1
2
3
4
5
6
7
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 4
Pin Configurations and Functions....................... 4
Specifications......................................................... 5
7.1 Absolute Maximum Ratings ...................................... 5
7.2 ESD Ratings.............................................................. 5
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Typical Characteristics.............................................. 7
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 11
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application .................................................. 12
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 18
11.1 Layout Guidelines ................................................. 18
11.2 Layout Example .................................................... 18
11.3 Thermal Considerations........................................ 19
12 器件和文档支持 ..................................................... 20
12.1 器件支持................................................................ 20
12.2 文档支持................................................................ 20
12.3 相关链接................................................................ 20
12.4 商标....................................................................... 20
12.5 静电放电警告......................................................... 20
12.6 接收文档更新通知 ................................................. 21
12.7 社区资源................................................................ 21
12.8 Glossary................................................................ 21
13 机械、封装和可订购信息....................................... 21
8
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision G (September 2016) to Revision H
Page
•
•
已添加 WEBENCH® 信息至 特性、详细设计流程和器件支持部分 ......................................................................................... 1
Added SW (AC, less than 10 ns) to the Absolute Maximum Rating table ............................................................................. 5
Changes from Revision F (January 2015) to Revision G
Page
•
•
•
•
•
已添加 TLV62084A 器件和 相关应用 ..................................................................................................................................... 1
已添加 Power Good Pin Logic Table (TLV62080/84) and Power Good Pin Logic Table (TLV62084A) ............................. 10
已添加 scale factors in 图 14 ............................................................................................................................................... 16
已更改 PCB Layout Image ................................................................................................................................................... 18
已添加 接收文档更新通知和社区资源部分。 ........................................................................................................................ 21
Changes from Revision E (February 2014) to Revision F
Page
•
•
•
•
已更改 器件信息表。 .............................................................................................................................................................. 1
Renamed the Configuration and Functions section .............................................................................................................. 4
已添加 new TI-Legal note to Application and Implementation section................................................................................. 12
Renamed "Thermal Information" to Thermal Considerations............................................................................................... 19
Changes from Revision D (June 2013) to Revision E
Page
•
•
•
已添加 器件信息表，电源相关建议，器件和文档支持以及机械、封装和可订购信息部分...................................................... 1
阐明了 TLV62080 器件的输入范围 2.5V 至 5.5V 以及 TLV62084 器件的输入范围 2.7V 至 5.5V.......................................... 1
Changed the Ordering Information table to the Device Comparison table and removed the Package Marking, TA,
and Package columns from the table .................................................................................................................................... 4
•
•
Changed the word pin to terminal in most cases throughout the document ......................................................................... 4
Added the Handling Ratings table which now contains the storage temperature range and ESD ratings ........................... 5
2
版权 © 2011–2017, Texas Instruments Incorporated
TLV62080, TLV62084, TLV62084A
www.ti.com.cn
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
•
•
Added ILIM range for TLV62084 in Electrical Characteristics table......................................................................................... 6
Replaced the Switching Frequency vs Load Current graph to the new Switching Frequency vs Output Current graph
in the Typical Characteristics section ..................................................................................................................................... 7
•
•
•
已添加 the higher output voltage Output Voltage vs Load Current graph in the Typical Characteristics section .................. 8
Replaced the TLV62080 typical application circuit with the circuit for the TLV62084.......................................................... 12
已删除 the Parameter Measurement Information Section and moved image and list of components to Typical
Application section................................................................................................................................................................ 12
•
•
已添加 表 4 to the Design Requirements section ................................................................................................................ 12
已添加 Moved Waveforms from the Typical Characteristics section into the Application Curves section. Changed
LCOIL (coil inductance) to ICOIL (coil current) in the Typical Application (PWM Mode and PFM Mode), Load Transient,
Line Transient, and Startup waveforms................................................................................................................................ 15
•
•
已添加 the output capacitance and inductance conditions to the first (original) Load Transient graph ............................... 16
已添加 the second Load Transient graph (图 14)................................................................................................................. 16
Changes from Revision C (May 2013) to Revision D
Page
•
已删除 TLV62084 device number from datasheet ............................................................................................................... 19
Changes from Revision B (July 2012) to Revision C
Page
•
Changed the Thermal Information table values ..................................................................................................................... 5
Changes from Revision A (November 2011) to Revision B
Page
•
•
•
•
•
•
Changed QFN to SON in ORDERING INFORMATION......................................................................................................... 4
Changed QFN to SON in DEVICE INFORMATION............................................................................................................... 4
Changed Thermal Pad description in Pin Functions .............................................................................................................. 4
Changed TJ in the Absolute Maximum Ratings(1) From: –40 to 125°C To: -40 to 150°C ...................................................... 5
已更改 several instances of DSC to DCS in DEVICE OPERATION section ......................................................................... 9
已更改 DSC to DCS in Functional Block Diagram.................................................................................................................. 9
Changes from Original (October 2011) to Revision A
Page
•
•
已更改 pin VSNS to VOS in 图 9.......................................................................................................................................... 12
已更改 pin VSNS to VOS in 图 10........................................................................................................................................ 15
版权 © 2011–2017, Texas Instruments Incorporated
3
TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
5
Device Comparison Table
PART NUMBER(1)
TLV62080
INPUT VOLTAGE
OUTPUT CURRENT
Power Good Logic Level (EN=Low)
High Impedance
2.5 V to 6 V
2.7 V to 6 V
2.7 V to 6 V
1.2 A
2 A
TLV62084
High Impedance
TLV62084A
2 A
Low
(1) For detailed ordering information please check the 机械、封装和可订购信息 section at the end of this datasheet.
6 Pin Configurations and Functions
space
8-Pin WSON With Thermal Pad
DSG Package
(Top View)
EN
GND
GND
FB
1
2
3
4
8
7
6
5
VIN
SW
PG
Exposed
Thermal
Pad
VOS
space
space
Pin Functions
PIN
NO. NAME
I/O
DESCRIPTION
Device enable logic input. Do not leave floating.
Logic HIGH enables the device, logic LOW disables the device and turns it into shutdown.
1
EN
IN
2, 3 GND
PWR Power and signal ground.
Feedback terminal for the internal control loop.
Connect this terminal to the external feedback divider to program the output voltage.
4
5
FB
IN
VOS
IN
Output voltage sense terminal for the internal control loop. Must be connected to output.
Power Good open drain output.
6
PG
OUT
This terminal is pulled to low if the output voltage is below regulation limits. This terminal can be left floating if not
used.
Switch terminal connected to the internal MOSFET switches and inductor terminal.
Connect the inductor of the output filter here.
7
8
SW
VIN
PWR
PWR Power supply voltage input.
Exposed
Thermal Pad
—
Must be connected to GND. Must be soldered to achieve appropriate power dissipation and mechanical
reliability.
4
Copyright © 2011–2017, Texas Instruments Incorporated
TLV62080, TLV62084, TLV62084A
www.ti.com.cn
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
7 Specifications
7.1 Absolute Maximum Ratings(1)
MIN
– 0.3
– 0.3
– 3.0
– 0.3
– 0.3
MAX UNIT
VIN, PG, VOS
SW
SW (AC, less than 10 ns)(3)
7
VIN + 0.3
10
V
V
Voltage range(2)
V
FB
EN
3.6
V
VIN + 0.3
1
V
Power Good Sink Current PG
mA
°C
°C
Operating junction temperature range, TJ
Storage temperature range, Tstg
– 40
– 65
150
150
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) While switching.
7.2 ESD Ratings
VALUE
±2000
±500
UNIT
V
Human body model (HBM) ESD stress voltage(1)
Charged device model (CDM) ESD stress voltage(2)
Electrostatic
discharge
V(ESD)
V
(1) Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows safe
manufacturing with a standard ESD control process.
(2) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions(1)
MIN
2.5
TYP
MAX
6
UNIT
V
VIN
VIN
TJ
Input voltage range, TLV62080
Input voltage range, TLV62084, TLV62084A
Operating junction temperature
2.7
6
V
–40
125
°C
(1) Refer to the Application Information section for further information.
7.4 Thermal Information
TLV6208x
DSG
THERMAL METRIC(1)
UNITS
(8 PINS)
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
59.7
70.1
30.9
1.4
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θJCtop
θJB
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
31.5
8.6
θJCbot
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2011–2017, Texas Instruments Incorporated
5
TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
7.5 Electrical Characteristics
Over recommended free-air temperature range, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted),
VIN= 3.6 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY
VIN
Input voltage range,TLV62080
Input voltage range,TLV62084, TLV62084A
Quiescent current into VIN
Shutdown current into VIN
Under voltage lock out
2.5
2.7
6
6
V
V
VIN
IQ
IOUT = 0 mA, Device not switching
EN = LOW
30
uA
µA
V
ISD
1
2
Input voltage falling
1.8
120
150
20
VUVLO
TJSD
Under voltage lock out hysteresis
Thermal shutdown
Rising above VUVLO
mV
°C
°C
Temperature rising
Thermal shutdown hysteresis
Temperature falling below TJSD
LOGIC INTERFACE (EN)
VIH
VIL
High level input voltage
2.5 V ≤ VIN ≤ 6 V
2.5 V ≤ VIN ≤ 6 V
1
V
V
Low level input voltage
Input leakage current
0.4
0.5
ILKG
0.01
µA
POWER GOOD
VPG Power good threshold
VOUT falling referenced to VOUT nominal
–15
–10
5
–5
%
%
V
Power good hysteresis
Low level voltage
VOL
Isink = 500 µA
VPG = 5.0 V
0.3
0.1
IPG,LKG PG Leakage current
0.01
µA
OUTPUT
VOUT
VFB
IFB
Output voltage range
0.5
4
V
Feedback regulation voltage
Feedback input bias current
Output discharge resistor
High side FET on-resistance
Low side FET on-resistance
V
IN ≥ 2.5 V and VIN ≥ VOUT + 1 V
0.438
0.45 0.462
V
VFB = 0.45 V
10
1
100
nA
kΩ
mΩ
mΩ
RDIS
EN = LOW, VOUT = 1.8 V
ISW = 500 mA
120
90
RDS(on)
ISW = 500 mA
High side FET switch current-limit,
TLV62080
ILIM
ILIM
Rising inductor current
Rising inductor current
1.6
2.3
2.8
2.8
4
4
A
A
High side FET switch current-limit,
TLV62084, TLV62084A
6
版权 © 2011–2017, Texas Instruments Incorporated
TLV62080, TLV62084, TLV62084A
www.ti.com.cn
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
7.6 Typical Characteristics
See Typical Application for characterization setup.
space
表 1. Table of Graphs
FIGURE
图 1
Load current, VOUT = 0.9 V
Load current, VOUT = 1.2 V
Load current, VOUT = 2.5 V
Input Voltage, VOUT = 0.9 V
Input Voltage, VOUT = 2.5 V
Load current, VOUT = 0.9 V
Load current, VOUT = 2.5 V
Efficiency
图 2
图 3
图 4
图 5
Output Voltage
Accuracy
图 6
图 7
Switching Frequency Load current, VOUT = 2.5 V
图 8
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VIN = 2.8 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 2.8 V
VIN = 3.6 V
VIN = 4.2 V
1E-5
0.0001
0.001
0.01
0.1
1
2
1E-5
0.0001
0.001
0.01
0.1
1 2
Output Current (A)
Output Current (A)
D001
D002
VOUT = 0.9 V
VOUT = 1.2 V
图 1. Efficiency vs Load Current
图 2. Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
0.91
0.905
0.9
0.895
0.89
0.885
0.88
IOUT = 10 mA, TA = 25èC
IOUT = 1 A, TA = 25èC
IOUT = 2 A, TA = 25èC
IOUT = 10 mA, TA = -40èC
IOUT = 1 A, TA = -40èC
IOUT = 2 A, TA = -40èC
IOUT = 10 mA, TA = 85èC
IOUT = 1 A, TA = 85èC
IOUT = 2 A, TA = 85èC
VIN = 3.6 V
VIN = 4.2 V
VIN = 5 V
1E-5
0.0001
0.001
Output Current (A)
0.01
0.1
1
2
2.5
3
3.5
4
4.5
5
5.5
6
D003
Input Voltage (V)
D004
VOUT = 2.5 V
VOUT = 0.9 V
图 3. Efficiency vs Load Current
图 4. Output Voltage vs Input Voltage
版权 © 2011–2017, Texas Instruments Incorporated
7
TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
0.92
0.912
0.904
0.896
0.888
0.88
2.54
2.52
2.5
2.48
IOUT = 10 mA, TA = 25èC
IOUT = 1 A, TA = 25èC
IOUT = 2 A, TA = 25èC
IOUT = 10 mA, TA = -40èC
IOUT = 1 A, TA = -40èC
IOUT = 2 A, TA = -40èC
IOUT = 10 mA, TA = 85èC
IOUT = 1 A, TA = 85èC
IOUT = 2 A, TA = 85èC
2.46
2.44
2.42
TA = -40èC
TA = 25èC
TA = 85èC
1E-5
0.0001
0.001
0.01
0.1
1 2
2.5
3
3.5
4
4.5
5
5.5
6
Output Current (A)
D006
Input Voltage (V)
D005
VIN = 3.6 V
VOUT = 2.5 V
图 6. Output Voltage vs Load Current
图 5. Output Voltage vs Input Voltage
2.54
2.52
2.5
5
4
3
2
1
0
VIN = 3.3 V
VIN = 4.2 V
VIN = 5 V
2.48
TA = -40èC
TA = 25èC
TA = 85èC
2.46
1E-5
0.0001
0.001
0.01
0.1
1
2
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Output Current (A)
Output Current (A)
D007
D008
VIN = 3.6 V
VOUT = 2.5 V
图 7. Output Voltage vs Load Current
图 8. Switching Frequency vs Output Current
8
版权 © 2011–2017, Texas Instruments Incorporated
TLV62080, TLV62084, TLV62084A
www.ti.com.cn
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
8 Detailed Description
8.1 Overview
The TLV62080 and TLV62084x synchronous switched-mode converters are based on DCS-Control™. DCS-
Control™ is an advanced regulation topology that combines the advantages of hysteretic and voltage mode
control.
The DCS-Control™ topology operates in PWM (pulse width modulation) mode for medium to heavy load
conditions and in power save mode at light load currents. In PWM mode, the TLV6208x converter operates with
the nominal switching frequency of 2 MHz, having a controlled frequency variation over the input voltage range.
As the load current decreases, the converter enters power save mode, reducing the switching frequency and
minimizing the IC quiescent current to achieve high efficiency over the entire load current range. DCS-Control™
supports both operation modes (PWM and PFM) using a single building block with a seamless transition from
PWM to power save mode without effects on the output voltage. The TLV62080 and TLV62084x devices offer
both excellent DC voltage and superior load transient regulation, combined with very low output voltage ripple,
minimizing interference with RF circuits.
8.2 Functional Block Diagram
space
VIN
High Side
N-MOS
Power
Good
PG
50
Gate
Control
Logic
Driver
SW
Low Side
N-MOS
Active
Output
Discharge
Thermal
Shutdown
GND
VOS
ramp
Softstart
EN
direct control
&
compensation
comparator
Under
Voltage
Shutdown
FB
error
amplifier
minimum
on-timer
REF
DCS-CONTROLTM
Copyright © 2016, Texas Instruments Incorporated
space
8.3 Feature Description
8.3.1 100% Duty-Cycle Low-Dropout Operation
The devices offer low input-to-output voltage difference by entering the 100% duty-cycle mode. In this mode the
high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. This mode is
particularly useful in battery powered applications to achieve the longest operation time by taking full advantage
of the whole battery voltage range. 公式 1 calculates the minimum input voltage to maintain regulation based on
the load current and output voltage.
版权 © 2011–2017, Texas Instruments Incorporated
9
TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
Feature Description (接下页)
space
V
= VOUT + IOUT,MAX ´(RDS(on) + RL )
IN,MIN
With:
•
VIN,MIN = Minimum input voltage
IOUT,MAX = Maximum output current
RDS(on) = High-side FET on-resistance
RL = Inductor ohmic resistance
•
•
•
(1)
space
8.3.2 Enabling and Disabling the Device
The device is enabled by setting the EN input to a logic HIGH. Accordingly, a logic LOW disables the device. If
the device is enabled, the internal power stage starts switching and regulates the output voltage to the
programmed threshold. The EN input must be terminated and not left floating.
8.3.3 Output Discharge
The output gets discharged through the SW terminal with a typical discharge resistor of RDIS whenever the
device shuts down (by disable, thermal shutdown or UVLO).
8.3.4 Soft Start
When EN is set to start device operation, the device starts switching after a delay of about 40 μs and VOUT rises
with a slope of about 10mV/μs (See 图 16 and 图 17 for typical startup operation). Soft start avoids excessive
inrush current and creates a smooth output voltage rise slope. Soft start also prevents excessive voltage drops of
primary cells and rechargeable batteries with high internal impedance.
If the output voltage is not reached within the soft start time, such as in the case of heavy load, the converter
enters standard operation. Consequently, the inductor current limit operates as described in Inductor Current-
Limit. The TLV62080 and TLV62084x devices are able to start into a pre-biased output capacitor. The converter
starts with the applied bias voltage and ramps the output voltage to the nominal value.
8.3.5 Power Good
The TLV62080 and TLV62084x devices have a power-good output going low when the output voltage is below
the nominal value. The power good maintains high impedance once the output is above 95% of the regulated
voltage, and is driven to low once the output voltage falls below typically 90% of the regulated voltage. The PG
terminal is an open drain output and is specified to sink typically up to 0.5 mA. The power good output requires a
pull-up resistor which is recommended connecting to the device output. When the device is off because of
disable, UVLO, or thermal shutdown, the PG terminal is at high impedance. TLV62084A features PG=Low in
these cases. 表 2 and 表 3 show the different PG operation for the TLV6208x and TLV62084A. The PG output
can be left floating if unused.
space
表 2. Power Good Pin Logic Table (TLV62080/84)
PG Logic Status
Device Information
High Z
Low
V
FB ≥ VPG
FB ≤ VPG
√
Enable (EN=High)
V
√
Shutdown (EN=Low)
UVLO
√
√
√
√
0.7V < VIN < VUVLO
TJ > TJSD
Thermal Shutdown
Power Supply Removal
VIN < 0.7V
10
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TLV62080, TLV62084, TLV62084A
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ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
space
表 3. Power Good Pin Logic Table (TLV62084A)
PG Logic Status
Device Information
High Z
Low
V
FB ≥ VPG
FB ≤ VPG
√
Enable (EN=High)
V
√
√
√
√
Shutdown (EN=Low)
UVLO
0.7V < VIN < VUVLO
TJ > TJSD
Thermal Shutdown
Power Supply Removal
VIN < 0.7V
√
space
The PG signal can be used for sequencing of multiple rails by connecting to the EN terminal of other converters.
Leave the PG terminal unconnected when not in use.
8.3.6 Undervoltage Lockout
To avoid misoperation of the device at low input voltages, an undervoltage lockout is implemented which shuts
down the device at voltages lower than VUVLO with a VHYS_UVLO hysteresis.
8.3.7 Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically TJSD. Once the device
temperature falls below the threshold, the device returns to normal operation automatically.
8.3.8 Inductor Current-Limit
The Inductor current-limit prevents the device from high inductor current and drawing excessive current from the
battery or input voltage rail. Excessive current can occur with a shorted or saturated inductor, a heavy load, or
shorted output circuit condition.
The incorporated inductor peak-current limit measures the current during the high-side and low-side power
MOSFET on-phase. Once the high-side switch current-limit is tripped, the high-side MOSFET is turned off and
the low-side MOSFET is turned on to reduce the inductor current. When the inductor current drops down to the
low-side switch current-limit, the low-side MOSFET is turned off and the high-side switch is turned on again. This
operation repeats until the inductor current does not reach the high-side switch current-limit. Because of an
internal propagation delay, the real current-limit value exceeds the static-current limit in the Electrical
Characteristics table.
8.4 Device Functional Modes
8.4.1 Power Save Mode
As the load current decreases, the TLV62080 and TLV62084x devices enter power save mode operation. During
power save mode, the converter operates with a reduced switching frequency in PFM mode and with a minimum
quiescent current maintaining high efficiency. Power save mode occurs when the inductor current becomes
discontinuous. Operation in power save mode is based on a fixed on time architecture. The typical on time is
given by ton = 400 ns × (VOUT / VIN). The switching frequency over the whole load current range is shown in 图 8.
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The devices are designed to operate from an input voltage supply range between 2.5 V (2.7 V for the TLV62084x
devices) and 6 V with a maximum output current of 2 A (1.2 A for the TLV62080 device). The TLV6208x devices
operate in PWM mode for medium to heavy load conditions and in power save mode at light load currents.
In PWM mode the TLV6208x converters operate with the nominal switching frequency of 2 MHz which provides a
controlled frequency variation over the input voltage range. As the load current decreases, the converter enters
power save mode, reducing the switching frequency and minimizing the IC quiescent current to achieve high
efficiency over the entire load current range.
The WEBENCH software uses an iterative design procedure and accesses a comprehensive database of
components when generating a design. See the 文档支持 section for additional documentation.
9.2 Typical Application
POWER GOOD
2.7 V to 6 V
VIN
VIN
EN
PG
SW
VOS
FB
R3
R1
R2
L1
VOUT
+
TLV62084
C3
C1
C2
GND
GND
Copyright © 2016, Texas Instruments Incorporated
图 9. Typical Application Schematic
9.2.1 Design Requirements
Use the following typical application design procedure to select external components values for the TLV62084
device.
表 4. Design Parameters
DESIGN PARAMETERS
Input Voltage Range
Output Voltage
EXAMPLE VALUES
2.8 V to 4.2 V
1.2 V
Transient Response
Input Voltage Ripple
Output Voltage Ripple
Output Current Rating
Operating frequency
±5% VOUT
400 mV
30 mV
2 A
2 MHz
12
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ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
9.2.2 Detailed Design Procedure
9.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TLV62080 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
•
•
•
•
Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
表 5. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER(1)
C1
10 μF, Ceramic Capacitor, 6.3 V, X5R, size 0603
Std
22 μF, Ceramic Capacitor, 6.3 V, X5R, size 0805,
GRM21BR60J226ME39L
C2
C3
L1
Murata
Kemet
47 μF, Tantalum Capacitor, 8 V, 35 mΩ, size 3528,
T520B476M008ATE035
1 μH, Power Inductor, 2.2 A, size 3 mm × 3 mm × 1.2 mm,
XFL3012-102MEB
Coilcraft
R1
R2
R3
65.3 kΩ, Chip Resistor, 1/16 W, 1%, size 0603
39.2 kΩ, Chip Resistor, 1/16 W, 1%, size 0603
178 kΩ, Chip Resistor, 1/16 W, 1%, size 0603
Std
Std
Std
(1) See Third-party Products Disclaimer
9.2.2.2 Output Filter Design
The inductor and the output capacitor together provide a low pass frequency filter. To simplify this process 表 6
outlines possible inductor and capacitor value combinations for the most application.
表 6. Matrix of Output Capacitor and Inductor Combinations
COUT [µF](1)
L [µH](1)
10
22
47
100
150
0.47
1
(2)(3)
+
+
+
+
+
+
+
2.2
4.7
+
(1) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by
+20% and –50%. Inductor tolerance and current de-rating is anticipated. The effective inductance can
vary by +20% and –30%.
(2) Plus signs (+) indicates recommended filter combinations.
(3) Filter combination in typical application.
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ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
9.2.2.3 Inductor Selection
The main parameter for the inductor selection is the inductor value and then the saturation current of the
inductor. To calculate the maximum inductor current under static load conditions, 公式 2 is given.
DIL
IL,MAX = IOUT,MAX
+
2
VOUT
1-
V
IN
DIL = VOUT
´
L ´ fSW
Where
•
•
•
•
IOUT,MAX = Maximum output current
ΔIL = Inductor current ripple
fSW = Switching frequency
L = Inductor value
(2)
space
TI recommends choosing the saturation current for the inductor 20% to approximately 30% higher than the IL,MAX
,
out of 公式 2. A higher inductor value is also useful to lower ripple current, but increases the transient response
time as well. The following inductors are recommended to be used in designs (see 表 7).
表 7. List of Recommended Inductors
INDUCTANCE
[µH]
CURRENT RATING
[mA]
DIMENSIONS
DC RESISTANCE
TYPE
MANUFACTURER(1)
L x W x H [mm3]
[mΩ typ]
1
2500
1650(2)
2500
3 × 3 × 1.2
3 × 3 × 1.2
35
40
49
81
XFL3012-102ME
LQH3NPN1R0NJ0
LQH44PN2R2MP0
XFL3012-222ME
Coilcraft
Murata
Murata
Coilcraft
1
2.2
2.2
4 × 3.7 × 1.65
3 × 3 × 1.2
1600(2)
(1) See Third-party Procucts Disclaimer
(2) Recommended for TLV62080 only due to limited current rating
9.2.2.4 Capacitor Selection
The input capacitor is the low impedance energy source for the converter which helps to provide stable
operation. A low ESR multilayer ceramic capacitor is recommended for best filtering and must be placed between
VIN and GND as close as possible to those terminals. For most applications 10 μF is sufficient though a larger
value reduces input current ripple.
The architecture of the TLV6208x device allows use of tiny ceramic-type output capacitors with low equivalent-
series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep the
resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends use
of the X7R or X5R dielectric. The TLV62080 and TLV62084x devices are designed to operate with an output
capacitance of 10 to 100 µF and beyond, as listed in 表 6. Load transient testing and measuring the bode plot
are good ways to verify stability with larger capacitor values.
表 8. List of Recommended Capacitors
CAPACITANCE
[µF]
DIMENSIONS
TYPE
MANUFACTURER(1)
L x W x H [mm3]
10
22
22
GRM188R60J106M
GRM188R60G226M
GRM21BR60J226M
0603: 1.6 × 0.8 × 0.8
0603: 1.6 × 0.8 × 0.8
0805: 2 × 1.2 × 1.25
Murata
Murata
Murata
(1) See Third-party Products Disclaimer
14
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ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
9.2.2.5 Setting the Output Voltage
By selecting R1 and R2, the output voltage is programmed to the desired value. Use 公式 3 to calculate R1 and
R2.
POWER GOOD
2.7 V to 6 V
VIN
VIN
EN
PG
SW
VOS
FB
180 kΩ
1 µH
VOUT
TLV62084
10 µF
22 µF
GND
GND
R1
R2
Copyright © 2016, Texas Instruments Incorporated
图 10. Typical Application Circuit
space
VOUT = VFB ´ 1+
R1
R1
æ
ö
÷
ø
æ
ö
= 0.45V ´ 1+
ç
ç
÷
R2
R2
è
è
ø
(3)
For best accuracy, R2 must be kept smaller than 40 kΩ to ensure that the current flowing through R2 is at least
100-times larger than IFB. Changing the sum towards a lower value increases the robustness against noise
injection. Changing the sum towards higher values reduces the current consumption.
9.2.3 Application Curves
SW
SW
(2 V/div)
(2 V/div)
VOUT
VOUT
(20 mV/div)
(20 mV/div)
ICOIL
ICOIL
(0.5 A/div)
(0.2 A/div)
Time (200 ns/div)
Time (2 µs/div)
VIN = 3.3 V
VOUT = 1.2 V
ILOAD = 500 mA
VIN = 3.3 V
VOUT = 1.2 V
ILOAD = 10 mA
图 11. Typical Application (PWM Mode)
图 12. Typical Application (PFM Mode)
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TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
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1 A
LOAD
50 mA
(1 A/div)
LOAD
(1A/div)
VOUT
(20 mV/div)
VOUT
(50mV/div)
ICOIL
(1 A/div)
ICOIL
(2A/div)
Time (20 µs/div)
COUT = 22 µF
Time (50 µs/div)
L = 1 µH
VOUT = 1.2 V
VIN = 3.3 V
L = 1 µH
COUT = 22 µF
VIN = 3.3 V
ILOAD = 200 mA to 1.8 A
VOUT = 1.2 V
ILOAD = 50 mA to 1 A
图 14. Load Transient
图 13. Load Transient
4.2 V
EN
(5 V/div)
VIN
3.3 V
(1 V/div)
PG
(1 V/div)
VOUT
(1 V/div)
VOUT
(50 mV/div)
ICOIL
(0.5 A/div)
Time (100 µs/div)
Time (20 µs/div)
VIN = 3.3 to 4.2 V
VOUT = 1.2 V
ILOAD = 2.2 Ω
VIN = 3.3 V
VOUT = 1.2 V
ILOAD = 2.2 Ω
图 15. Line Transient
图 16. Startup
16
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www.ti.com.cn
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
EN
(5 V/div)
PG
(1 V/div)
VOUT
(1 V/div)
ICOIL
(0.2 A/div)
Time (20 µs/div)
VIN = 3.3 V
VOUT = 1.2 V
图 17. Startup (No Load)
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TLV62080, TLV62084, TLV62084A
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
www.ti.com.cn
10 Power Supply Recommendations
The input power supply's output current needs to be rated according to the supply voltage, output voltage and
output current of the TLV6208x.
11 Layout
11.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the TLV62080 and TLV62084x devices.
•
Place input and output capacitors, along with the inductor, as close as possible to the IC which keeps the
traces short. Routing these traces direct and wide results in low trace resistance and low parasitic inductance.
•
•
Use a common-power GND.
Properly connect the low side of the input and output capacitors to the power GND to avoid a GND potential
shift.
•
The sense traces connected to FB and VOS terminals are signal traces. Keep these traces away from SW
nodes.
•
•
Use care to avoid noise induction. By a direct routing, parasitic inductance can be kept small.
Use GND layers for shielding if needed.
11.2 Layout Example
space
space
space
L1
VOUT
GND
VIN
C1
C2
GND
R1
R2
图 18. PCB Layout Suggestion
18
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www.ti.com.cn
ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
11.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-
dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
•
•
•
Improving the power dissipation capability of the PCB design.
Improving the thermal coupling of the component to the PCB by soldering the Thermal Pad.
Introducing airflow in the system.
For more details on how to use the thermal parameters, see the Thermal Characteristics application notes
SZZA017 and SPRA953.
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12 器件和文档支持
12.1 器件支持
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.1.2 开发支持
12.1.2.1 使用 WEBENCH® 工具定制设计方案
请单击此处，借助 WEBENCH® Power Designer 并使用 TLV62080 器件定制设计方案
1. 在开始阶段键入输出电压 (VIN)、输出电压 (VOUT) 和输出电流 (IOUT) 要求。
2. 使用优化器拨盘优化关键设计参数，如效率、封装和成本。
3. 将生成的设计与德州仪器 (TI) 的其他解决方案进行比较。
WEBENCH Power Designer 提供一份定制原理图以及罗列实时价格和组件可用性的物料清单。
在多数情况下，可执行以下操作：
•
•
•
•
运行电气仿真，观察重要波形以及电路性能
运行热性能仿真，了解电路板热性能
将定制原理图和布局方案导出至常用 CAD 格式
打印设计方案的 PDF 报告并与同事共享
有关 WEBENCH 工具的详细信息，请访问 www.ti.com/WEBENCH。
12.2 文档支持
相关文档请参见以下部分：
•
《TLV62080EVM-756 用户指南》，采用 2mm x 2mm 小外形尺寸无引线 (SON) 封装的 TLV62080，1.2A，高
效降压转换器，文献编号：SLVU640
12.3 相关链接
下面的表格列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件，并且可以快速访问样片或购
买链接。
表 9. 相关链接
器件
产品文件夹
请单击此处
请单击此处
请单击此处
立即购买
请单击此处
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
请单击此处
TLV62080
TLV62084
TLV62084A
12.4 商标
DCS-Control, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
20
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ZHCS484H –OCTOBER 2011–REVISED JANUARY 2017
12.6 接收文档更新通知
如需接收文档更新通知，请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册
后，即可每周定期收到已更改的产品信息。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
12.7 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2011–2017, Texas Instruments Incorporated
21
PACKAGE OPTION ADDENDUM
www.ti.com
29-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TLV62080DSGR
TLV62080DSGT
TLV62084ADSGR
TLV62084ADSGT
TLV62084DSGR
TLV62084DSGT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
WSON
WSON
WSON
WSON
WSON
WSON
DSG
DSG
DSG
DSG
DSG
DSG
8
8
8
8
8
8
3000 RoHS & Green NIPDAU | NIPDAUAG Level-2-260C-1 YEAR
250 RoHS & Green NIPDAU | NIPDAUAG Level-2-260C-1 YEAR
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
RAU
RAU
14M
14M
SLO
SLO
NIPDAU
NIPDAU
NIPDAU
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
29-Apr-2022
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLV62080DSGR
TLV62080DSGR
TLV62080DSGT
TLV62080DSGT
TLV62084ADSGR
TLV62084ADSGT
TLV62084DSGR
TLV62084DSGT
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
DSG
DSG
DSG
DSG
DSG
DSG
DSG
DSG
8
8
8
8
8
8
8
8
3000
3000
250
178.0
179.0
178.0
179.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
2.25
2.2
2.25
2.2
2.3
2.3
2.3
2.3
2.25
2.2
2.25
2.2
2.3
2.3
2.3
2.3
1.0
1.2
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
1.0
250
1.2
3000
250
1.15
1.15
1.15
1.15
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLV62080DSGR
TLV62080DSGR
TLV62080DSGT
TLV62080DSGT
TLV62084ADSGR
TLV62084ADSGT
TLV62084DSGR
TLV62084DSGT
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
DSG
DSG
DSG
DSG
DSG
DSG
DSG
DSG
8
8
8
8
8
8
8
8
3000
3000
250
205.0
213.0
205.0
213.0
210.0
210.0
210.0
210.0
200.0
191.0
200.0
191.0
185.0
185.0
185.0
185.0
33.0
35.0
33.0
35.0
35.0
35.0
35.0
35.0
250
3000
250
3000
250
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DSG 8
2 x 2, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224783/A
www.ti.com
PACKAGE OUTLINE
DSG0008A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
B
A
0.32
0.18
PIN 1 INDEX AREA
2.1
1.9
0.4
0.2
ALTERNATIVE TERMINAL SHAPE
TYPICAL
0.8
0.7
C
SEATING PLANE
0.05
0.00
SIDE WALL
0.08 C
METAL THICKNESS
DIM A
OPTION 1
0.1
OPTION 2
0.2
EXPOSED
THERMAL PAD
(DIM A) TYP
0.9 0.1
5
4
6X 0.5
2X
1.5
9
1.6 0.1
8
1
0.32
0.18
PIN 1 ID
(45 X 0.25)
8X
0.4
0.2
8X
0.1
C A B
C
0.05
4218900/E 08/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
(
0.2) VIA
8X (0.5)
TYP
1
8
8X (0.25)
(0.55)
SYMM
9
(1.6)
6X (0.5)
5
4
SYMM
(1.9)
(R0.05) TYP
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218900/E 08/2022
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.5)
METAL
8
SYMM
1
8X (0.25)
(0.45)
SYMM
9
(0.7)
6X (0.5)
5
4
(R0.05) TYP
(0.9)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218900/E 08/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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