TMS37157IRSARG4 [TI]

PASSIVE LOW FREQUENCY INTERFACE DEVICE WITH EEPROM AND 134.2 kHz TRANSPONDER INTERFACE; 带EEPROM和134.2千赫转发器接口的无源低频接口设备
TMS37157IRSARG4
型号: TMS37157IRSARG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

PASSIVE LOW FREQUENCY INTERFACE DEVICE WITH EEPROM AND 134.2 kHz TRANSPONDER INTERFACE
带EEPROM和134.2千赫转发器接口的无源低频接口设备

驱动程序和接口 接口集成电路 PC 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器
文件: 总47页 (文件大小:1185K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
PASSIVE LOW FREQUENCY INTERFACE DEVICE WITH EEPROM  
AND 134.2 kHz TRANSPONDER INTERFACE  
Check for Samples: TMS37157  
1
FEATURES  
APPLICATIONS  
Wireless Batteryless Sensor Interface using  
Energy Harvesting  
Wide Supply Voltage Range 2 V to 3.6 V  
Ultra Low Power Consumption  
Microcontroller and Sensor can be  
Powered Through the LF Link  
Data is Directly Transmitted Over the LF  
Link From the Base Station via the  
TMS37157 to the Micrcontroller and Vice  
Versa.  
Active Mode Max. 150 μA  
Power Down Mode 60 nA  
121 Free Bytes User Memory  
Low Frequency Halb Duplex (HDX) Interface  
HDX Transponder Communication  
Achieving Maximum Perfomance and  
Highest Noise Immunity  
Batteryless Configuration Memory  
Memory can be Written Without Battery  
Support  
Special Selective Addressing Mode Allows  
Anti Collision  
Microcontroller can Read the Content of the  
Memory When It Gets Connected to a  
Battery and Use It for Configuration  
Up to 8 kbit/s LF Uplink Data Rate  
126 Byte EEPROM:  
Microcontroller can Write the Memory,  
Which can be Read Out Later Through the  
LF Link  
121 Bytes Free Available EEPROM User  
Memory  
Ultra Low Power Data Logger Memory (Smart  
Metering)  
32 Bit Unique Serial Number  
8 Bit Selective Address  
High EEPROM Flexibility  
Memory Can Be Written By a  
Microcontroller  
Pages are Irreversible Lockable and  
Protectable  
Memory Can Be Read Through LF Interface  
Without Battery Support  
Battery Check and Battery Charge Function  
Resonance Frequency: 134.2 kHz  
Multi Purpose LF Interface to a Microcontroller  
Short Range RF Interface to a  
Microcontroller Where Other Frequencies  
are Not an Option  
Integrated Resonance Frequency Trimming  
Downlink – Amplitude Shift Keying  
Uplink – Frequency Shift Keying  
Ultra Low Power Mode can Result in an  
Overall Power Consumption of 60 nA  
3 Wire SPI Interface for Accessing the  
EEPROM and Exchanging Data With the  
Microcontroller Through the LF Interface  
Remote Control Application  
Combination With an UHF Transmitter or IR  
Transmitter and a μC  
Power Management of the TMS37157 can  
Power Down the Microcontroller  
The Push Button Detection Circuit can  
Power Up a Microcontroller  
0.6mm Pitch, 4mm x 4mm VQFN Package  
Stand Alone LF-Transponder with Memory  
RFID Transponder with Unique ID and 121  
Bytes Free Programmable EEPROM User  
Memory  
Only Few Additional Components Needed  
No Battery Required  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
DESCRIPTION/ORDERING INFORMATION  
The TMS37157 combines a Low Frequency Transponder Interface with an SPI Interface and Power  
Management for a connected microcontroller. It is the ideal device for any Configuration, Data Logger-, Sensor-  
or Remote Control Application. The Transponder memory is accessible through SPI and LF and, in the second  
case, operates without the need for a battery. The use of the Low Frequency Band ensures a communication in  
a defined direction and harsh environments.  
The TMS37157 manages the Transponder communication and push button interaction. During sleep state the  
devices enters a special low power mode with only 60 nA current consumption.  
The EEPROM memory is accessible over the LF interface without support from the battery or through SPI by a  
microcontroller if a battery is connected. The TMS37157 offers a special battery charge mode.  
The external resonance circuit with a LF coil and a resonance capacitor can be trimmed to the correct resonance  
frequency with the integrated trimming capability achieving an easy way to eliminate part tolerances.  
The small RSA 16-pin package together with only a few external components results in a cost efficient design.  
Digital or Analog  
Sensor  
Microcontroller  
ENERGY  
LF Reader  
134,2 kHz  
TMS37157  
LF DATA  
Sensor System  
Base Station  
2
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
PIN CONFIGURATION  
16 15 14 13  
12 SPI_SIMO  
11 SPI_SOMI  
10 SPI_CLK  
RF1 1  
TCLK 2  
TDAT 3  
TEN 4  
9
CLK_AM  
5
6
7
8
TERMINAL FUNCTIONS  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
NO.  
RF1  
1
I
I
Antenna  
Test interface - clock input. Data is shifted in and out of the TDAT pin on the rising edge of  
TCLK.  
TCLK  
2
TDAT  
TEN  
3
4
5
6
7
I/O  
I
Test interface – bidirectional serial data I/O for configuration and trimming.  
Test interface – enable input.  
EOB  
O
O
I
End of burst detector. This signal is high when the RF signal of the base station is OFF.  
Active low power-on-reset (open drain) - can be used to reset the microcontroller.  
Input of the push button detector – can be used to recognize that a push event has occurred.  
Indicates internal control unit activity:  
NPOR  
PUSH  
During initialization  
BUSY  
8
O
O
During transponder operation  
During SPI communication (handshaking)  
This output provides clock signals derived from the external antenna resonance circuit to the  
microcontroller. This function can be activated by an SPI command. Two frequencies are  
selectable FRES and FRES/4.  
CLKA_M  
9
SPI_CLK  
SPI_SOMI  
SPI_SIMO  
VBATI  
10  
11  
12  
13  
14  
15  
16  
I
SPI clock input  
O
SPI data output  
SPI data input  
I
PWR  
PWR  
PWR  
PWR  
Can be used as μC supply voltage  
Battery supply  
VBAT  
GND  
Ground  
VCL  
Charge capacitor  
ORDERING INFORMATION  
(1) (2)  
TA  
PACKAGE  
ORDERABLE PART NUMBER  
TOPSIDE MARKING  
37157I  
–40°C to 85°C VQFN – RSA  
Reel of 3000  
TMS37157IRSARG4  
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–40  
–40  
–0.3  
MAX  
85  
UNIT  
°C  
TA  
Operating free air temperature  
Storage temperature(2)  
Battery voltage  
Ts  
125  
3.6  
7
°C  
VBAT  
VCL  
IRF  
V
VCL input voltage  
Input current(3)  
V
10  
mA  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) One cycle up to 1000h  
(3) Continuous  
OPERATING CONDITIONS  
PARAMETER  
Operating system quality factor  
Battery voltage  
MIN  
TYP  
30  
3
MAX  
UNIT  
Qop  
VBAT  
2
3.55  
V
IC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE  
SUPPLY AND REFERENCE CURRENTS  
PARAMETER  
MIN  
TYP  
MAX  
16  
UNIT  
mA  
mV  
nA  
IVBATI  
dVsw2  
Iquiet  
Current out of VBATI  
VBAT = 2.0 V  
Voltage drop at SW2 (VBAT – VBATI  
Quiescent current  
)
IBATI = 16 mA, VBAT = 2.0 V  
TMS37157 idle  
100  
300  
150  
2
60  
Iactive  
Operating current  
TMS37157 active  
μA  
Icharge  
Battery charge current  
mA  
MODULATION CAPACITOR  
PARAMETER  
MIN  
MIN  
NOM  
MAX  
UNIT  
CM  
Modulation capacitor  
L = 2.66 mH  
110  
pF  
FRONT END CONTROL  
PARAMETER  
NOM  
MAX  
UNIT  
ms  
treset  
tHdet  
TMS37157 front-end reset time  
High bit detection threshold time  
14  
fTX = 134.2kHz  
64/fTX  
us  
CHARACTERISTICS OF TRANSPONDER SECTION  
PARAMETER  
MIN  
NOM  
1.9  
MAX  
UNIT  
ms  
tprebit  
ttrans  
thigh  
tlow  
Prebit time  
fL = 134.7kHz  
High bit transition time of start byte 0x7E  
2
ms  
High bit time  
Low bit time  
Response time  
fH = 123.7kHz  
0.129  
0.118  
12  
ms  
fL = 134.7kHz  
ms  
Tresp  
ms  
VCL/VBAT CHECKER  
PARAMETER  
MIN  
NOM  
2.9  
MAX  
UNIT  
V
High Level VBAT checker threshold voltage  
Low Level VBAT checker threshold voltage  
2.1  
V
4
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
VCL/VBAT CHECKER (continued)  
PARAMETER  
MIN  
NOM  
3.4  
MAX  
MAX  
UNIT  
V
Vcharge  
Vch  
VBAT charge voltage  
VCL checker threshold voltage  
3.1  
V
TRIMMING CAPACITORS AND SWITCHES  
PARAMETER  
MIN  
NOM  
128  
0
UNIT  
Tstep  
CTmin  
CT1  
CT2  
CT3  
CT4  
CT5  
CT6  
CT7  
CT  
Trimming steps  
Minimum trimming capacitor  
Trimming capacitor 1  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
0.6  
Trimming capacitor 2  
1.2  
Trimming capacitor 3  
2.4  
Trimming capacitor 4  
4.7  
Trimming capacitor 5  
9.4  
Trimming capacitor 6  
18.8  
37.6  
74.4  
Trimming capacitor 7  
Maximum trimming capacitor (CT = CT1+ CT2+ … + CT7)  
63.5  
85.9  
RF LIMITER  
PARAMETER  
MIN  
10.5  
5.75  
NOM  
12  
MAX  
14  
UNIT  
V
VRFlim  
VCLlim  
RF limiter voltage  
Limited VCL voltage  
Limited VCL voltage is the result of the RF  
limiter in the application circuit  
5.9  
6.5  
V
CONTROL AND SPI INTERFACE  
PARAMETER  
MIN  
MIN  
NOM  
30-70  
10-30  
MAX  
UNIT  
μs  
Busy low time  
Busy high time  
See SPI Comm.  
See SPI Comm.  
ms  
PARAMETER  
NOM  
MAX  
UNIT  
VOL  
VOH  
VIL  
Low level output voltage, SPI_SOMI, VBAT = 2.0…3.6V, RL = 100 kΩ  
BUSY  
0.05 ×  
VBAT  
0.07 ×  
VBAT  
V
High level output voltage,  
SPI_SOMI, BUSY  
VBAT = 2.0…3.6V, RL = 100 kΩ  
0.93 ×  
VBAT  
0.95 ×  
VBAT  
V
V
V
Low level input voltage, SPI_SIMO, VBAT = 2.0…3.6V, RL = 100 kΩ  
SPI_CLK  
0.1 ×  
VBAT  
VIH  
High level input voltage, SPI_SIMO, VBAT = 2.0…3.6V, RL = 100 kΩ  
0.9 ×  
VBAT  
SPI_CLK  
VBAT  
ACTIVATION LIMIT OF TMS37157  
PARAMETER  
MIN  
NOM  
MAX  
UNIT  
Vact  
Activation level for transponder  
response  
f = 134.2 kHz(1)  
5.75  
5.9  
6.5  
V
(1) At beginning of the response the voltage VCL must be just limited. Only in this case the function is guaranteed if components and IC  
parameters are at the limit, see Figure 1 . The voltage is measured at VCL just before the Transponder starts with the response protocol.  
The longest in the application used downlink telegram with maximum number of high bits should be used. The low and high bit response  
frequency should be at the lowest value which occurs in the application. In case of an additional power phase (Programming) the level  
has to be after that additional power phase.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Transponder Charge  
Tx  
Vcl  
5.75  
0V  
Figure 1. Activation limit of TMS37157  
MEMORY  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
Cycles  
Years  
P/E-C  
XDRET  
Program/erase cycles  
Data retention  
25°C  
200000  
10  
Ts = 25°C  
TEST INTERFACE  
PARAMETER  
Pull-down resistor, TCLK  
Pull-down resistor, TDAT  
MIN  
7
TYP  
10  
MAX  
25  
UNIT  
kΩ  
kΩ  
kΩ  
V
RTCLK  
RTDAT  
RTEN  
VOL  
20  
5
150  
10  
375  
25  
Pull-down resistor, TEN  
Low level output voltage, TDAT  
High level output voltage, TDAT  
VCL = 5V, RL = 2.5 kΩ  
VCL = 5V, RL = 2.5 kΩ  
0.25  
VOH  
4.75  
V
TRANSPONDER MODE  
TRANSPONDER TIMING USING PPM  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
PPM - Pulse Position Modulation  
tofftrp  
Write pulse pause (PPM)(1)  
170  
230  
350  
400  
520  
μs  
μs  
μs  
μs  
μs  
tontrpL  
tontrpH  
tbittrpL  
tbittrpH  
Write pulse activation/ low bit (PPM)(1)  
Write pulse activation/ high bit (PPM)(1)  
Write low bit period(1)  
Write high bit period(1) (2) (3)  
510  
1730  
(1) This timing is measured at the transponder using a pickup coil. This timing is with Low Bit Frequency = 134.7kHz and is influenced by  
various factors e.g. detuning and coupling to the reader antenna and. Out of this timing the low and high bit are detected by the  
transponder logic.  
(2) Except the last bit this limitation of the duration is valid for all downlink bits.  
(3) To detect a High bit the absolute minimum of tbittrpH = 510 μs must be met.  
READER RECOMMENDATIONS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
QTX,  
QRX  
Reader operating quality factor  
10  
fTX  
Transmitter frequency  
Charge time  
134.16  
20  
134.2  
25  
134.24  
kHz  
ms  
ms  
ms  
ms  
tTX  
tTXoff  
tprog  
tRD  
Transmitter off time  
Programming time  
Read time  
3
15  
14.9  
15  
6
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
READER TIMINGS USING PPM  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
PPM - Pulse Position Modulation  
toff  
Off time (PPM)(1)  
Low bit on time (PPM)(1)  
Low bit duration (PPM)(1)  
170  
230  
400  
350  
520  
μs  
μs  
μs  
μs  
μs  
tonL  
tbitL  
tonH  
tbitH  
(1)  
High bit on time  
High bit duration (PPM)(1)  
1730  
(1) Timing recommendation is only valid for a Reader Operating Quality Factor QTX = QRX 10.  
ANTENNA CURRENTS FOR EQUIVALENT FIELD STRENGTH LEVELS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
(1)  
Ishort  
Equivalent current for operation (True RMS)  
Iprog  
4.3  
mA  
(1) The circuit below is used to determine equivalent short circuit current at the position of the TMS37157 transponder coil.  
The measured value must be equal or above the specified value in the table above. The operating Q factor Qop depends on used  
components (L, C) and the application environment.  
PARAMETER  
Ishort  
Ishort  
UNIT  
Tcharge = 20 ms  
Tcharge = 25 ms  
Equivalent for programming activation  
field strength  
Qop 60  
–40 to 85 °C  
Iprog  
Iprog  
0.32  
0.64  
0.23  
0.46  
mA  
mA  
Equivalent for programming activation  
field strength  
Qop 30  
–40 to 85 °C  
I
Figure 2. Short Circuit Current  
RECOMMENDED EXTERNAL COMPONENTS  
ANTENNA  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
LR  
Inductance of antenna  
(dLR = ± 2.8%)  
25°C CR = 470 pF, ±2% f= 134.2  
kHz  
2.586  
2.66  
2.734  
mH  
dLR/LRdT  
Temperature coefficient of LR  
Quality factor of LR  
–40 to 85°C  
25°C* Qop > 30(2) (1)  
250  
ppm/K  
(1)  
QLR  
60  
(1) Qop is Q factor measured when device is assembled on PCB.  
(2) Due to tester limitations currently only the value given in brackets can be guaranteed.  
RESONANCE CIRCUIT CAPACITOR  
PARAMETER  
Resonance capacitor  
Dielectric  
TEST CONDITIONS  
LR = 2.66 mH ± 2.8%  
dLR/LRdt 250 ppm(1)  
MIN  
NOM  
470  
MAX  
UNIT  
CR  
460.6  
479.4  
pF  
NP0  
QCR  
RF  
Quality factor  
2000  
20  
Operating voltage  
50  
Vpp  
(1) This type is recommended, if no temperature compensation is required for LR  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
7
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
CHARGE CAPACITOR  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
25°C  
fmeas = 1 kHz  
198  
220  
242  
nF  
CL  
Charge capacitor  
CLdiel  
VCL  
Dielectric of CL  
X7R  
Operating voltage  
16  
Vdc  
OTHER COMPONENTS  
PARAMETER  
TEST CONDITIONS  
Depends on application circuit  
Depends on application circuit  
MIN  
NOM  
1
MAX  
UNIT  
MΩ  
kΩ  
RVCL  
Rload  
CBAT  
CBATI  
VCL resistor  
VBATI load resistor  
Battery capacitor  
BATI capacitor  
100  
100  
100  
nF  
nF  
RECOMMENDED TEST INTERFACE PARAMETERS  
PARAMETER  
MIN  
NOM  
MAX  
UNIT  
V
VCL  
VIH  
Supply voltage for trim/test  
5
High level input voltage, TDAT, TCLK & TEN  
Low level input voltage, TDAT, TCLK & TEN  
0.9 × VCL  
0
1.1 × VCL  
0.1 × VCL  
V
VIL  
V
fTclk  
tr, tf  
tTclkl  
tTclkh  
tTres  
tTrc  
Clock frequency  
TCLK  
134  
50  
3.7  
3.7  
14  
1
kHz  
ns  
μs  
μs  
ms  
μs  
μs  
μs  
Rise and fall time, TDAT, TCLK, TEN  
Test clock low time  
Test clock high time  
Test reset time  
Test reset to clock time  
Test data setup time  
Test data hold time  
tTds  
tTdh  
1
1
TMS37157 BLOCK DIAGRAM  
RF1  
SPI_SIMO  
ANALOG  
FRONT END  
CONTROL  
UNIT  
SPI_SOMI  
SPI_CLK  
VCL  
VBAT  
POWER  
MANAGEMENT  
TANSPONDER & USER  
MEMORY  
GND  
VBATI  
NPOR  
PUSH  
8
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
BLOCK DESCRIPTION  
Analog Front End  
The Analog Front End implements all of the analog functions needed to support the TMS37157 transponder  
functions. It enables reception and transmission of LF signals when the transponder is active, and rectifies  
incoming LF energy and stores it in an external charge capacitor, to power the device.  
The Analog Front End also contains the capacitor array used to trim the transponder's resonance circuit and a  
clock regenerator function, which is able to recover the clock from an incoming signal so it can be used by the  
transponder functions.  
Control Unit  
DST Transponder  
The transponder implemented in the TMS37157 is compatible with Texas Instruments' DST ("Digital Signature  
Transponder") transponder. In addition the TMS37157 provides additional Memory for customer use.  
CRC Calculation  
A hardware cyclic redudancy check calculation engine is implemented in the Control Unit to provide error  
detection.  
Memory Access  
The Control Unit interfaces to the on-chip EEPROM. During power-up, the Control Unit reads the configuration  
parameters stored in the EEPROM and initializes the TMS37157 circuitry accordingly, and at various times  
during device operation it can read EEPROM data and provide it, for example, to a microcontroller.  
SPI Interface  
The Control Unit provides an SPI interface that allows it to communicate with a microcontroller. Via this interface,  
for example, the microcontroller is able to access the contents of the TMS37157 EEPROM.  
Test Interface  
The Control Unit provides a test interface that allows customers to trim the LF antenna's resonance circuit.  
Transponder and User Memory  
The Transponder Memory comprises a total of 126 bytes, organized in pages. Memory space is apportioned as  
follows:  
User Data 121 bytes  
Serial Number + Manufactorer Code 4 bytes  
Selective Address 1 byte  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
9
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
MSB  
LSB  
e.g  
.
PAGE 1  
SELECT. ADDRESS  
USER DATA  
PASSWORD  
DATA  
PAGE 2  
SERIAL  
NUMBER  
MANUF.  
CODE  
PAGE 3  
PAGE 8  
UNIQUE IDENTIFICATION  
USER DATA  
DATA  
DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
PAGE 9  
PAGE 10  
PAGE 11  
DATA  
DATA  
DATA  
DATA  
PAGE 12  
PAGE 13  
DATA  
DATA  
PAGE 14  
PAGE 15  
10  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
MSB  
LSB  
1
8
16  
24  
32  
40  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
USER DATA  
DATA  
DATA  
PAGE 40  
PAGE 41  
PAGE 42  
PAGE 43  
PAGE 44  
PAGE 45  
PAGE 46  
PAGE 47  
PAGE 48  
PAGE 49  
PAGE 50  
PAGE 51  
PAGE 52  
PAGE 53  
PAGE 54  
PAGE 55  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
Selective Address  
Page 1 of the transponder memory contains a Selective Address (password) and lock bit. The Selective Address  
is used for selective programming, selective locking,selective protecting and selective reading.  
The Selective Address may be programmed by the user via the program page 1 command (as long as the  
Selective Address lock bit is not set). The lock bit can be set by the user via the lock page 1 command. Once  
set, the lock bit cannot be reset.  
To activate the selective addressing feature, the user must write a value other than 0xFF into page 1. If the  
Selective Address is not 0xFF, it is compared with the Selective Address received from the base station during a  
command write phase. If the Selective Address is 0xFF (the factory default), no such comparison is performed  
and selective addressing is disabled.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
11  
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Whenever pages 1, 2 or 3 are accessed, the Selective Address (from page 1) is returned in the corresponding  
read phase, together with page 2 and the Manufacturer Code and Serial Number (from page 3). The status of the  
page 1 lock bit (1=locked) is only returned when page 1 is accessed.  
Page 2  
Page 2 of the transponder memory contains 8 bits of user data and lock bit.  
Page 2 is typically used for numbering keys in an application (e.g. the key number), it can also be used so save  
the value of the trim capacitor array or for anything else. It may be programmed by the user using the program  
page 2 command (as long as the lock bit is not set). The lock bit can be set by the user via the lock page 2  
command. Once set, the lock bit cannot be reset.  
Whenever pages 1, 2 or 3 are accessed, page 2 is returned in the corresponding read phase, together with the  
Selective Address (from page 1) and the Manufacturer Code and Serial Number (from page 3). The status of the  
page 2 lock bit (1=locked) is only returned when page 2 is accessed.  
Unique Identification  
Page 3 of the transponder memory contains an 8-bit Manufacturer Code and a 24-bit Serial Number. The  
Manufacturer Code and Serial Number are programmed and locked during manufacture and cannot be changed.  
The Manufacturer Code is used to distinguish between different devices, the Manufacturer Code of the  
TMS37157 is 0x0E. The Serial Number is unique for every single TMS37157 device.  
Whenever pages 1, 2 or 3 are accessed, the Manufacturer Code and Serial Number (from page 3) are returned  
in the corresponding read phase, together with the Selective Address (from page 1) and page 2. The status of  
the page 3 lock bit (1=locked) is only returned when page 3 is accessed.  
User Data  
The Transponder Memory provides the Pages 2, 8 to 15 and 40 to 55 for data storage. This memory is available  
to store any data defined by the user or application.  
12  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
POWER MANAGEMENT  
The Power Management block is responsible for the master control of all power supplies plus several additional  
tasks, such as responding when a push button is pressed, generating reset signals and receiving LF transponder  
commands.  
A block diagram of the power management function is shown in Figure 3. Activation of a push signal is detected  
by an ultra low-power detection circuit. While waiting for a high signal at PUSH, the only active component in  
theTMS73157 is a flip-flop, whose output is set when PUSH is set high. When this happens, SW5 is closed and  
the Control Unit is powered up and initialized. Also VBAT is switched to VBATI to power up a connected  
microcontroller. The Microcontroller can, after performing its desired actions, send a Power Down Command to  
the TMS37157, bringing the TMS37157 in the ultra low power mode (the Flip Flip is cleared and VBATI is  
disconnected waiting for a PUSH High signal to appear.  
When the Transponder Interface receives an MSP Access Command the Control Unit is powered up and  
initialized and sets the VBATI ON signal, which switches on the uC. The Control Unit waits for μC to fetch the  
data, process it and send the processed data back to the Control Unit. The TMS37157 switches VBATI off and  
waits for the RF to switch. If it detects a loss of the RF is transmitts the MSP Access data back .Then the  
TMS37157 goes into the ultra low power sleep mode again. Throughout the whole MSP Access process the RF  
of the reader has to stay on, because the TMS37157 Control Unit is powered out of the RF - field.  
CRC  
GEN.  
EEPROM  
ROM  
TMS37157  
RF  
TRP  
INTF.  
CLKA/M  
LR  
CR  
SIMO  
VBATI  
VCCD  
CHARGE  
REG.  
CONTROL  
UNIT  
S
P
I
SOMI  
SPI_CLK  
VOLT.  
REG.  
VCL  
CL  
BUSY  
RVCL  
GND  
SW5  
CLEAR  
VBATION  
Q CL  
S
VBAT  
BATBATI  
VBAT  
VBATI  
PUSH  
RVBATI  
CBATI  
BAT  
+
CBAT  
I
Figure 3. TMS37157 Power Management  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Link(s): TMS37157  
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
ADRESSING OF THE TRANSPONDER  
The addressing mode of the TMS37157 is defined by the content of page 1.  
General Addressing Page 1 = 0xFF  
Selective Addressing Page 1 <> 0xFF  
Standard configuration is General Addressing. Selective Addressing is activated by programming a value other  
than 0xFF into page 1 of the TMS37157 EEPROM. Selective Addressing affects the Lock Page, Protect Page  
(not available for Page 1-3) and Program Page commands for page 1 to page 15 and page 40 to page 55. Here  
the selective address has to be added to the Command. A Read Page of page 1 – 3 always gives back the  
selective address.  
A General Read is still possible on all pages. For page 1 – 3 a selective read be can done.  
To switch off Selective Addressing a selective program page 1 Command with User Data 0xFF has to be send to  
the TMS37157.  
USE OF THE LOCK BIT  
All pages can be locked by setting the corresponding lock bit. Locked pages can not be reprogrammed anymore.  
The Lock is irreversible.  
USE OF THE PROTECTION BIT  
Pages 8-15 and 40-55 can be protected by setting the corresponding Protection Bit. Protected pages can only be  
repgrammed via SPI. The TMS37157 will not answer to a program command on a protected page. General and  
Selective Read commands are still possible on protected pages. The protection is irreversible.  
14  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
PULSE POSITION MODULATION  
With Pulse Position Modulation the information is carried in the period duration of a bit (tbitL, tbitH). A bit consists of  
a pulse pause (toff) and a pulse activation (tonL, tonH).  
The difference of period durations at the reader must be selected in way that in case of a low bit the duration at  
the transponder location is lower than the High Bit Threshold Detection Time (tHdet). For a high bit, the bit  
duration mus at the transponder location must be higher that the High Bit Threshold Detection Time (tHdet).  
PPM in Case of General Read  
Figure 4. PPM in Case of General Read  
If the Pause between to positive transitions of EOB is at least as long as tHdet the Transponder writes a one. Is  
the Pause shorter it writes a 0.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
15  
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
PPM in Case of Programming or Locking  
Figure 5. PPM in Case of Programming  
For a program, lock or protect command a RF burst from the transmitter is needed after transmitting the  
program, lock or protect command, the length has to be at least tprg.  
16  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
TMS37157 COMMANDS  
This chapter describes the commands and data that can be transferred to and from the TMS37157 via its contact  
less LF interface, SPI and Test interfaces.  
When communicating with the transponder following naming conventions are used:  
Data Transmission from the base station to the transponder is called “write” and “write data are transferred”.  
Data Transmission from the transponder to the base station is called “read” and “read data re transferred”.  
This is applied independently from the command that is executes whether it is a read, write, program or  
authentication function.  
Write Formats  
In order to send commands to the TMS37157 LF interface, the user sends a Write Address byte comprising a  
2-bit Command field and a 6-bit Page field. The Command field, which is transmitted first, determines the  
function to be executed and whether command comprises additional data bytes that must also be sent. The Page  
field specifies the target of the command.  
Table 1 shows which additional data bytes must be included with each command type. The elements for each  
command are sent from left to the right of this table.  
Table 1. Data Bytes for different command types  
WRITE ADDRESS  
SELECTIVE  
ADDRESS  
FUNCTION  
WRITE DATA  
FRAME BCC  
COMMAND FIELD  
PAGE FIELD  
MSB LSB  
General read page, battery  
check  
00  
X
Selective read page  
Program page; MSP access  
Selective program page  
Lock page  
11  
01  
01  
10  
10  
11  
11  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X(1)  
X(1)  
Selective lock page  
Protect page  
Selective protect page  
(1) Length of Wrtite Data is 5 bytes for a program page command and 6 bytes for an MSP Access command.  
The summary for the available write address via the LF interface are shown in Table 2. It shows the valid  
Command and Page field combinations supported by the TMS37157.  
Table 2. Valid Command and Page Field Combinations (Command)  
WRITE ADDRESS  
LSB  
C C  
|
MSB  
P P P P P P  
|
COMMAND  
FIELD  
MSB LSB  
PAGE FIELD  
MSB LSB  
HEX  
VALUE  
Page 1  
Page 2  
000001  
000001  
000001  
000001  
00  
01  
10  
11  
04h  
05h  
06h  
07h  
General Read Page 1  
Program/Selective Program Page 1  
Lock/Selective Lock Page 1  
Selective Read Page 1  
000010  
000010  
000010  
000010  
00  
01  
10  
11  
08h  
09h  
0Ah  
0Bh  
General Read Page 2  
Program/Selective Program Page 2  
Lock/Selective Lock Page 2  
Selective Read Page 2  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
17  
Product Folder Link(s): TMS37157  
 
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Table 2. Valid Command and Page Field Combinations (Command) (continued)  
WRITE ADDRESS  
Page 3  
Page 8  
000011  
00  
01  
10  
11  
0Ch  
0Dh  
0Eh  
0Fh  
General Read Page 3  
000011  
000011  
000011  
Program/Selective Program Page 3  
Lock/Selective Lock Page 3  
Selective Read Page 3  
001000  
001000  
001000  
001000  
00  
01  
10  
11  
20h  
21h  
22h  
23h  
General Read Page 8  
Program/Selective Program Page 8  
Lock/Selective Lock Page 8  
Set Protection Bit/ Selective Set Protection Bit of Page 8  
Page 9  
001001  
001001  
001001  
001001  
00  
01  
10  
11  
24h  
25h  
26h  
27h  
General Read Page 9  
Program/Selective Program Page 9  
Lock/Selective Lock Page 9  
Set Protection Bit/ Selective Set Protection Bit of Page 9  
Page 10  
Page 11  
Page 12  
Page 13  
Page 14  
Page 15  
001010  
001010  
001010  
001010  
00  
01  
10  
11  
28h  
29h  
2Ah  
2Bh  
General Read Page 10  
Program/Selective Program Page 10  
Lock/Selective Lock Page 10  
Set Protection Bit/ Selective Set Protection Bit of Page 10  
001011  
001011  
001011  
001011  
00  
01  
10  
11  
2Ch  
2Dh  
2Eh  
2Fh  
General Read Page 11  
Program/Selective Program Page 11  
Lock/Selective Lock Page 11  
Set Protection Bit/ Selective Set Protection Bit of Page 11  
001100  
001100  
001100  
001100  
00  
01  
10  
11  
30h  
31h  
32h  
33h  
General Read Page 12  
Program/ Selective Program Page 12  
Lock/ Selective Lock Page 12  
Set Protection Bit/ Selective Set Protection Bit of Page 12  
001101  
001101  
001101  
001101  
00  
01  
10  
11  
34h  
35h  
36h  
37h  
General Read Page 13  
Program/ Selective Program Page 13  
Lock/ Selective Lock Page 13  
Set Protection Bit/ Selective Set Protection Bit of Page 13  
001110  
001110  
001110  
001110  
00  
01  
10  
11  
28h  
39h  
3Ah  
3Bh  
General Read Page 14  
Program/ Selective Program Page 14  
Lock/ Selective Lock Page 14  
Set Protection Bit/ Selective Set Protection Bit of Page 14  
001111  
001111  
001111  
001111  
00  
01  
11  
11  
3Ch  
3Dh  
3Eh  
3Fh  
General Read Page 15  
Program/ Selective Page 15  
Lock/ Selective Lock Page 15  
Set Protection Bit/ Selective Set Protection Bit of Page 15  
Page 19  
Page 26  
Page 31  
Page 40  
010011  
011010  
011111  
00  
00  
01  
4Ch  
68h  
7Dh  
Battery Check  
(1)  
Battery Charge  
MSP Access (Program Page 31)  
101000  
101000  
00  
01  
A0h  
A1h  
General Read Page 40  
Program/ Selective Program Page 40  
(1) The TMS37157 will not respond to a Battery Charge Command. The RF has to stay on after transmitting the Write Address. To end the  
battery charge command any other command can be performed.  
18  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Table 2. Valid Command and Page Field Combinations (Command) (continued)  
WRITE ADDRESS  
101000  
10  
11  
A2h  
A3h  
Lock/ Selective Lock Page 40  
101000  
Set Protection Bit/ Selective Set Protection Bit of Page 44  
Page 41  
Page 42  
Page 43  
Page 44  
Page 45  
Page 46  
Page 47  
Page 48  
Page 49  
Page 50  
Page 51  
101001  
101001  
101001  
101001  
00  
01  
10  
11  
A4h  
A5h  
A6h  
A7h  
General Read Page 41  
Program/ Selective Program Page 41  
Lock/ Selective Lock Page 41  
Set Protection Bit/ Selective Set Protection Bit of Page 41  
101010  
101010  
101010  
101010  
00  
01  
10  
11  
A8h  
A0h  
AAh  
ABh  
General Read Page 42  
Program/ Selective Program Page 42  
Lock/ Selective Lock Page 42  
Set Protection Bit/ Selective Set Protection Bit of Page 42  
101011  
101011  
101011  
101011  
00  
01  
10  
11  
ACh  
ADh  
AEh  
AFh  
General Read Page 43  
Program/ Selective Program Page 43  
Lock/ Selective Lock Page 43  
Set Protection Bit/ Selective Set Protection Bit of Page 43  
101100  
101100  
101100  
101100  
00  
01  
10  
11  
B0h  
B1h  
B2h  
B3h  
General Read Page 44  
Program/ Selective Program Page 44  
Lock/ Selective Lock Page 44  
Set Protection Bit/ Selective Set Protection Bit of Page 44  
101101  
101101  
101101  
101101  
00  
01  
10  
11  
B4h  
B5h  
B6h  
B7h  
General Read Page 45  
Program/ Selective Program Page 45  
Lock/ Selective Lock Page 45  
Set Protection Bit/ Selective Set Protection Bit of Page 45  
101110  
101110  
101110  
101110  
00  
01  
10  
11  
B8h  
B9h  
BAh  
BBh  
General Read Page 46  
Program/ Selective Program Page 46  
Lock/ Selective Lock Page 46  
Set Protection Bit/ Selective Set Protection Bit of Page 46  
101111  
101111  
101111  
101111  
00  
01  
10  
11  
BCh  
BDh  
BEh  
BFh  
General Read Page 47  
Program/ Selective Program Page 47  
Lock/ Selective Lock Page 47  
Set Protection Bit/ Selective Set Protection Bit of Page 47  
110000  
110000  
110000  
110000  
00  
01  
10  
11  
C0h  
C1h  
C2h  
C3h  
General Read Page 48  
Program/ Selective Program Page 48  
Lock/ Selective Lock Page 48  
Set Protection Bit/ Selective Set Protection Bit of Page 48  
110001  
110001  
110001  
110001  
00  
01  
10  
11  
C4h  
C5h  
C6h  
C7h  
General Read Page 49  
Program/ Selective Program Page 49  
Lock/ Selective Lock Page 49  
Set Protection Bit/ Selective Set Protection Bit of Page 49  
110010  
110010  
110010  
110010  
00  
01  
10  
11  
C8h  
C9h  
CAh  
CBh  
General Read Page 50  
Program/ Selective Program Page 50  
Lock/ Selective Lock Page 50  
Set Protection Bit/ Selective Set Protection Bit of Page 50  
110011  
00  
CCh  
General Read Page 51  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
19  
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Table 2. Valid Command and Page Field Combinations (Command) (continued)  
WRITE ADDRESS  
110011  
01  
10  
11  
CDh  
CEh  
CFh  
Program/ Selective Program Page 51  
Lock/ Selective Lock Page 51  
110011  
110011  
Set Protection Bit/ Selective Set Protection Bit of Page 51  
Page 52  
Page 53  
Page 54  
Page 55  
110100  
110100  
110100  
110100  
00  
01  
10  
11  
D0h  
D1h  
D2h  
D3h  
General Read Page 52  
Program/ Selective Program Page 52  
Lock/ Selective Lock Page 52  
Set Protection Bit/ Selective Set Protection Bit of Page 52  
110101  
110101  
110101  
110101  
00  
01  
10  
11  
D4h  
D5h  
D6h  
D7h  
General Read Page 53  
Program/ Selective Program Page 53  
Lock/ Selective Lock Page 53  
Set Protection Bit/ Selective Set Protection Bit of Page 53  
110110  
110110  
110110  
110110  
00  
01  
10  
11  
D8h  
D9h  
DAh  
DBh  
Lock/ Selective Lock Page 54  
Program/Selective Page 54  
Lock/Selective Lock Page 54  
Set Protection Bit/ Selective Set Protection Bit of Page 54  
110111  
110111  
110111  
110111  
00  
01  
10  
11  
DCh  
DDh  
DEh  
DFh  
General Read Page 55  
Program/Selective Page 55  
Lock/Selective Lock Page 55  
Set Protection Bit/ Selective Set Protection Bit of Page 55  
Read Formats  
The Read phase starts with each deactivation of the transmitter, which is detected by the transponder, because  
the transponder resonance circuit RF amplitude drops. The transponder starts with transmission of 16 Pre-bits.  
During this phase the resonance circuit resonates with the low bit transmit frequency (fL). During transmission of  
the read data or response, the resonance circuit frequency is shifted between the low bit transmit frequency (fL)  
and the high bit transmit frequency (fH).  
The typical data low bit frequency is 134.7 kHz; the typical data high bit frequency is 123.7 kHz. The low and  
high bits have different durations, because each bit takes 16 RF cycles to transmit.  
Figure 6 shows the FM principle used. Regardless of the number of low and high bits, the transponder response  
duration is always less than 15 ms.  
Data encoding is done in NRZ mode (Non Return to Zero). The clock is derived from the RF carrier by a  
divide-by-16 function.  
0
1
0
1
134.7 kHz  
123.7 kHz  
134.7 kHz  
123.7 kHz  
129.3 µs  
118.8 µs  
Figure 6. FM Principle Used in Read Function of Transponders  
20  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
After a charge phase only, having no write phase, the transponder discharges its capacitor at the end of the  
pre-bit phase, which results in no response. If a valid function was detected during the write phase, the complete  
read data format is transmitted. The content of the read data format depends on the previously executed  
function.  
When the last bit has been sent, the capacitor is discharged. During discharge no charge-up is possible.  
A sufficiently long read time (tRD) must be provided to ensure that the complete read data format can be  
received.  
During the response (read) phase, the transponder transmits 96 bits of data, formatted as described below. The  
content of the response depends on which page was addressed.  
All read data starts with a 16-bit preamble followed by an 8-bit start byte (7Eh), and ends with the 8-bit Read  
Address and 16-bit Read Frame BCC. All parts of the read data are transmitted LSB first.  
The Read Address byte comprises a 2-bit Status field, which is transmitted first and contains status information,  
and a 6-bit Page field, which contains page and additional status information. The contents of the Status field  
depend on which page is being addressed.  
Table 3. Overview of Read Data Format Content  
READ DATA FORMAT BYTE  
Page  
1
4
Sel. Address  
Sel. Address  
Sel. Address  
Page 2  
5
6
Man. Code  
Man. Code  
Man. Code  
Page 8  
7
8
9
Page 2  
Page 2  
Page 2  
Page 8  
Page 9  
Page 10  
Page 11  
Page 12  
Page 13  
Page 14  
Page 15  
Serial No.  
Serial No.  
Serial No.  
2
Serial No.  
Serial No.  
Page 8  
Serial No.  
Serial No.  
Page 8  
Serial No.  
Serial No.  
Page 8  
3
8
9
Page 2  
Page 9  
Page 9  
Page 9  
Page 9  
10  
11  
12  
13  
14  
15  
19  
31  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
Page 2  
Page 10  
Page 11  
Page 12  
Page 13  
Page 14  
Page 14  
‘00000000’  
MSP Data  
Page 40  
Page 41  
Page 42  
Page 43  
Page 44  
Page 45  
Page 46  
Page 47  
Page 48  
Page 49  
Page 50  
Page 51  
Page 52  
Page 53  
Page 54  
Page 55  
Page 10  
Page 11  
Page 12  
Page 13  
Page 14  
Page 14  
‘00000000’  
MSP Data  
Page 40  
Page 41  
Page 42  
Page 43  
Page 44  
Page 45  
Page 46  
Page 47  
Page 48  
Page 49  
Page 50  
Page 51  
Page 52  
Page 53  
Page 54  
Page 55  
Page 10  
Page 11  
Page 12  
Page 13  
Page 14  
Page 14  
‘00000000’  
MSP Data  
Page 40  
Page 41  
Page 42  
Page 43  
Page 44  
Page 45  
Page 46  
Page 47  
Page 48  
Page 49  
Page 50  
Page 51  
Page 52  
Page 53  
Page 54  
Page 55  
Page 10  
Page 11  
Page 12  
Page 13  
Page 14  
Page 14  
‘00000000’  
MSP Data  
Page 40  
Page 41  
Page 42  
Page 43  
Page 44  
Page 45  
Page 46  
Page 47  
Page 48  
Page 49  
Page 50  
Page 51  
Page 52  
Page 53  
Page 54  
Page 55  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Battery level  
MSP Data  
Page 2  
‘00000000’  
MSP Data  
Page 40  
Page 41  
Page 42  
Page 43  
Page 44  
Page 45  
Page 46  
Page 47  
Page 48  
Page 49  
Page 50  
Page 51  
Page 52  
Page 53  
Page 54  
Page 55  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Page 2  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
21  
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Table 4 to Table 5 show the valid Status and Page field combinations supported by the TMS37157.  
Table 4. Valid Responses, If Page 1 to 3 is Addressed  
READER  
TRANSPONDER  
Valid Responses  
Write Function  
Write Address  
Read Address  
General Read Page 1 to 3  
000001  
……….  
000011  
00  
000001  
……….  
000011  
00  
10  
Read unlocked Page 1…3  
Read locked Page 1…3  
Selective Read Page 1 to 3  
000001  
……….  
000011  
11  
01  
000001  
……….  
000011  
00  
10  
Read unlocked Page 1…3  
Read locked Page 1…3  
Program/Selective Program  
Page 1 to 3  
000001  
……….  
000011  
000001  
……….  
000011  
01  
10  
00  
Programming done on Page 1…3  
Read locked Page 1…3 programming not executed  
Read unlocked Page 1…3, programming not  
executed (field strength too low)  
000000  
01  
Programming Page 1…3 done, but possibly not  
reliable  
Lock / Selective Lock  
Page 1 to 3  
000001  
……….  
000011  
10  
000001  
……….  
000011  
10  
00  
Read locked Page 1…3  
Read unlocked Page 1…3, locking not execute  
(field strength too low)  
000000  
00  
10  
Read unlocked Page 1…3, locking not correctly  
executed  
Read locked Page 1…3, but locking possibly not  
reliable  
Table 5. Valid Responses, if Page 8 to 15 is Addressed  
READER  
TRANSPONDER  
Write Function  
General Read Page 8…15  
Write Address  
Read Address  
Possible Responses  
001000  
………  
001111  
00  
01  
001000  
………  
001111  
00  
10  
Read unlocked Page 8…15  
Read locked Page 8…15  
Program/ Sel. Program  
Page 8...15  
001000  
………  
001111  
001000  
………  
001111  
01  
10  
00  
Page 8…15 is locked, programming not executed  
Page 40…55 is locked, programming not executed  
Page 8…15 is unlocked, programming not  
executed (field strength too low)  
0000000  
01  
Programming Page 8…15 done, but possibly not  
reliable  
Lock/ Selective Lock  
Page 8…15  
001000  
………  
001111  
10  
11  
001000  
………  
001111  
10  
00  
Read locked Page 8…15  
Read unlocked Page 8…15, locking not executed  
(field strength too low)  
0000000  
00  
10  
00  
10  
Read unlocked Page 8…15, locking not correctly  
executed  
Read locked Page 8…15, but locking possibly not  
reliable  
Set/ Selective Set Protection  
Bit  
Page 8…15  
001000  
………  
001111  
001000  
………  
001111  
Read unlocked Page 8…15, Protection bit was not  
set (field strength too low)  
Read locked Page 8…15, Protection bit was not  
set (field strength too low)  
11  
11  
Protection Bit of Page 8...15 was set  
0000000  
Setting of Protection bit was executed, but possibly  
not reliable  
22  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Table 6. Valid Responses, If Battery Check (Page 19) is Addressed  
READER  
TRANSPONDER  
Valid Responses  
Read unlocked Page 19  
Write Function  
Write Address  
Read Address  
Read Page 19  
(Battery Check)  
010011  
00  
010011  
00  
Table 7. Valid Responses if MSP Access (Page 31) is Addressed  
READER  
TRANSPONDER  
Possible Responses  
Write Function  
Write Address  
Read Address  
011111  
01  
011111  
01  
00  
00  
01  
MSP Access execution O.K.  
SPI Programming failed  
Program Page 31  
(MSP Access)  
000000  
MSP Access execution failed  
MSP Access execution failed  
Table 8. Valid Responses, if Page 40 to 55 is Addressed  
READER  
TRANSPONDER  
Write Function  
Write Address  
Read Address  
Possible Responses  
General Read Page  
40…55  
101000  
………  
110110  
00  
01  
101000  
………  
110110  
00  
10  
Read / unlocked Page 40…55  
Read / locked Page 40…55  
Program/ Sel. Program  
Page 40...55  
101000  
………  
110110  
101000  
………  
110110  
01  
10  
00  
Programming done on Page 40…55  
Page 40…55 is locked, programming not executed  
Page 40…55 is unlocked, programming not  
executed (field strength too low)  
0
01  
Programming Page 40…55 done, but possibly not  
reliable  
Lock/ Selective Lock  
Page 40…55  
101000  
………  
110110  
10  
11  
101000  
………  
110110  
10  
00  
Read locked Page 40…55  
Read unlocked Page 40…55, locking not executed  
(field strength too low)  
0000000  
00  
10  
00  
10  
Read unlocked Page 40…55, locking not correctly  
executed  
Read locked Page 40…55, but locking possibly not  
reliable  
Set/ Selective Set  
Protection Bit  
Page 40…55  
101000  
………  
110110  
101000  
………  
110110  
Read unlocked Page 40…55, Protection bit was  
not set (field strength too low)  
Read locked Page 40…55, Protection bit was not  
set (field strength too low)  
11  
11  
Protection Bit of Page 40...55 was set  
000000  
Setting of Protection bit was executed, but possibly  
not reliable  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
23  
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
LF TELEGRAMS – MEMORY ACCESS  
Following sections show the structure of the Write - and Read Formats for the Memory Access through the Low  
Frequency Interface.  
Write to Transponder  
Read Commands  
The write format of the General Read command is shown in Figure 7.  
Write  
Adress  
Read or  
discharge  
CHARGE  
Figure 7. General Read/Get Status Command  
The write format of the Selective Read command is shown in Figure 8.  
Write  
Adress  
Selective  
Adress  
Read or  
discharge  
CHARGE  
Frame BCC  
Figure 8. Selective Read  
Program Commands  
The write format of the general program command is shown in Figure 9.  
CHARGE  
tprog  
CHARGE  
Write  
Adress  
Read or  
discharge  
ttx  
Write data  
Frame BCC  
Figure 9. General Program Command  
The write format of the selective program command is shown in Figure 10.  
CHARGE  
ttx  
CHARGE  
tprog  
Write  
Adress  
Selective  
Adress  
Read or  
discharge  
Write data  
Frame BCC  
Figure 10. Selective Program Command  
Lock and Protect Commands  
The write format of the Lock/Protect command is shown in Figure 11.  
CHARGE  
Write  
Adress  
CHARGE  
tprog  
Read or  
discharge  
Frame BCC  
ttx  
Figure 11. General Lock/Protect  
The write format of the Selective Lock/Protect command is shown in Figure 12.  
CHARGE  
ttx  
CHARGE  
tprog  
Write  
Adress  
Selective  
Adress  
Read or  
discharge  
Frame BCC  
Figure 12. Selective Lock/Protect  
Lock and Protect commands share the same write format.  
24  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
 
 
 
 
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Read From Transponder (Response)  
The write format of the General Read command is shown in Figure 7.  
Transponder Response Format of the General Read command is shown in Figure 13 and Figure 14. The  
Response Format is the same for Read, Program and Lock Commands.  
READ  
READ  
Selective  
8 Bits  
PREBITS  
16 Bits  
START  
8 Bits  
IDT  
Man  
8 Bits  
Serial Number  
24 Bits  
DISCHARGE  
ADDR.  
FRAME BCC  
8 Bits  
8 Bits  
16 Bits  
LSB  
96 Bits  
MSB  
Figure 13. Read Data Format of Page 1, 2, 3  
Read  
Read  
Selective  
8 Bits  
PREBITS  
16 Bits  
START  
8 Bits  
User Data  
40 Bits  
DISCHARGE  
ADDR.  
FRAME BCC  
8 Bits  
16 Bits  
LSB  
96 Bits  
MSB  
Figure 14. Read Data Format of Page 8–15 and Page 40 to 55  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
25  
Product Folder Link(s): TMS37157  
 
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
LF TELEGRAMS – SPECIAL FUNCTION  
MSP Access  
www.ti.com  
The MSP Access command allows transfer of LF data to and from the MSP 430 microcontroller via the  
TMS37157 Analog Front End. The microcontroller handles data transfers using the following SPI commands:  
MSP Read Data From PCU (Data In)  
MSP Write Data To PCU (Data Out)  
Write Data Format  
The write format of the MSP Access command is shown in Figure 15.  
WRITE  
ADDRESS  
WRITE  
FRAME BCC  
READ OR  
DISCHARGE  
CHARGE  
CHARGE  
DATA 0  
DATA 5  
8 Bits  
48 Bits  
16 Bits  
10  
111110  
LSB  
MSB LSB MSB  
Write MSP Data Page 31  
Figure 15. LF Write Format – MSP Access Command  
Read Data Format  
The read format of the MSP Access command is shown in .  
LF Read Format – MSP Access Command  
READ  
READ  
PREBITS  
16 Bits  
START  
MSP DATA  
DISCHARGE  
ADDRESS  
FRAME BCC  
16 Bits  
8 Bits  
48 Bits  
8 Bits  
LSB  
96 Bits  
MSB  
Flow of MSP Access Data Handling  
The following sequence is needed to implement an MSP Access command:  
The TMS37157 detects that an MSP Access command has been received and wakes the Microcontroller  
(e.g. MSP430).  
The Microcontroller reads the status using the SPI command Get Status.  
The MSP access request is detected and the data are requested by the Microcontroller. Data bytes are  
transferred to the Microcontroller using the SPI command MSP Read Data from PCU.  
The data bytes are processed and actions executed, as necessary.  
If necessary, the Microcontroller sends response data bytes back to the TMS37157, using the SPI command  
MSP Write Data to PCU.  
After the TMS37157 has detected removal of LF power, the response data bytes are sent back to the base  
station.  
NOTE  
The LF field must be present throughout the above sequence (except the last step),  
otherwise a malfunction of the TMS37157 may occur.  
26  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Battery Check  
When a Battery Check command has been received, the Control Unit compares the battery voltage with two  
pre-defined thresholds and responds with the result of the comparison.  
Write Data Format  
The write format of the Battery Check command is shown in Figure 16.  
CHARGE  
WRITE  
ADDRESS  
READ OR  
DISCHARGE  
LSB MSB  
00  
110010  
Page 19  
Figure 16. LF Write Format – Battery Check Command  
Read Data Format  
The read format of the Battery Check command is shown in Figure 17.  
BATTERY  
LEVEL  
READ  
PREBITS  
16 Bits  
START  
8 Bits  
ZERO BITS  
40 Bits  
READ FRAME BCC  
16 Bits  
DISCHARGE  
ADDR.  
8 Bits  
8 Bits  
96 Bits  
Figure 17. LF Read Format – Battery Check Command  
Whenever the TMS37157 receives a Battery Check command, it compares the battery voltage with two  
pre-defined thresholds – 2.1 V and 2.9 V - and responds with the result of the comparison in accordance with  
Figure 18.  
0
0
0
0
0
0
V
V
FULL  
2.9 V  
VV=00:  
VV=01:  
VV=11:  
VBAT < 2.1 V  
2.1 V < VBAT < 2.9 V  
VBAT > 2.9 V  
2.1 V  
EMPTY  
Figure 18. Battery Voltage Comparison  
Battery Charge  
When a Battery Charge Command has been received the TMS37157 applies a voltage of about 3.4 V to VBAT.  
The charge current depends mainly on the antenna of the LC Tank Circuit and the Field Strength of the Base  
Station. The TMS37157 does not answer to a Battery Charge Command. The LF Field has to remain on after  
transmitting the telegram. The telegram format corresponds to a Read Page 26 Command.  
The charging of the battery can be ended by any other command.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
27  
Product Folder Link(s): TMS37157  
 
 
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Write Data Format  
The write data format of the Battery Charge Command is shown in Figure 19.  
CHARGE  
WRITE  
ADDRESS  
Charge…..  
LSB MSB  
00 010110  
Page 26  
Figure 19. Battery Charge Write Command  
SPI COMMANDS  
The serial interface for communication between a Microcontroller and the TMS37157 is a synchronous SPI  
interface which uses clock and data lines to transfer data in bytes. The Microcontroller can use its on-chip  
hardware USART to implement this interface protocol, which allows efficient Microcontroller operation and  
simplifies software development. The USART should be used in synchronous SPI (Serial Peripheral Interface)  
mode, with the Microcontroller designated as the master for all bi-directional communications.  
The TMS37157 uses a 3 wire SPI Communication Interface (SIMO, SOMI, CLK). No Enable is necessary. For  
Synchronization the BUSY Output of the TMS37157 can be used.  
SPI Communication Structure  
SPI communications can only be initiated by the Microcontroller if the TMS37157 is ready to receive. This is  
indicated by a low level on the BUSY line – when the first byte is received via the SIMO line, BUSY goes high. A  
short BUSY low pulse confirms that a byte has been correctly received. After this low pulse, the next byte of the  
protocol can be sent. If the SPI command requires it, the TMS37157 will then send byte-wise response data via  
the SOMI line. Each byte sent by the TMS37157 will be confirmed by a short BUSY low pulse. After successful  
communication, the BUSY line will go from high to low after the last transferred byte and remain low (see  
Figure 20).  
CLK  
LEN  
CMD  
DATA  
SIMO  
SOMI  
BUSY  
DATA  
DATA  
OK  
Figure 20. SPI Communication  
The initial rising of the busy line happens latest after the 3rd rising edge of the SPI Clock. This indicates that the  
Front End starts to process the incoming data. It remains high until the Front End is ready with processing of the  
8-bit data. After this a low busy pulse (min 30 μs, typ.50 μs, max. 70 μs) indicates to the Microcontroller that the  
next data can be sent.  
The time the busy line stays high varies depending on the operations the Front End has to perform. The  
maximum duration is 30ms after all bytes on the SIMO are received. Sending out data on SOMI line depends  
mainly on the speed of the SPI-Clock. The next SPI Data must be sent within tBusyhigh=10ms. If the next data is  
not applied within tBusyhigh the SPI command is interrupted.  
28  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
If an error occurs during SPI communication, the BUSY line remains at the level it was when the error occurred.  
The following three types of error are possible:  
Error 1:  
Error 2:  
The TMS37157 stops communication via its SPI interface and indicates this by taking BUSY low. The microcontroller  
has not finished, but BUSY remains low.  
The TMS37157 is ready to continue communication via its SPI interface and indicates this by taking BUSY high. The  
microcontroller has finished, however, and expects BUSY to remain low. After max. 50ms = tBusyhigh an internal  
watchdog shuts down the whole TMS73157 IC.  
Error 3:  
If the TMS37157 receives an invalid command it performs a power down command. This command results in a shut  
down of the whole TMS37157 IC.  
SPI Protocol Structure  
The first 8 bits sent by the microcontroller contain telegram length information (LEN), which defines the number  
of following bytes to be transferred via the SIMO line. It is the number of bytes excluding the LEN-byte.  
The second 8 bits sent by the microcontroller contain the Command byte (CMD). The first (most significant) two  
bits of the Command byte determine which of the four different types the command is, and the six least  
significant bits contain various flags associated with the command (see Figure 21).  
Three types of command are available:  
Transponder Access Command (TAC)  
Enhanced Command (EC)  
Reserved Command (RC) – for future use.  
C
C
X
X
X
X
X
X
MSB  
LSB  
CC=00:  
CC=01:  
CC=10:  
CC=11:  
X :  
Transponder Access Command (TAC)  
n.a.  
Enhanced Commands (EC)  
Reserved Commands (RC)  
Don’t care  
Figure 21. SPI Command Byte Overview  
NOTE  
All SPI bits that are either not used or are marked with an "X" are reserved for future  
use and must be "0".  
Transponder Access Commands  
The microcontroller can access the contents of the Transponder Memory by sending the TMS37157 a  
Transponder Access Command via the SIMO line.  
The two most significant bits of the Command byte determine the Transponder Access Command and the six  
least significant bits are don’t care. If the contents of the Command byte are invalid for the device configuration,  
an error condition will be indicated via the BUSY line.  
This command is followed by the same Write Address used in LF data transmissions and, if necessary, is  
followed by further data bytes (e.g. Selective Address, Data). The TMS37157 responds by transferring the  
relevant transponder data to the microcontroller via the SOMI line (see Figure 20.)  
In all cases, responses to Transponder Access Commands are sent without the 16-bit preamble, start byte and  
BCC that are normally used in LF data transmissions.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
29  
Product Folder Link(s): TMS37157  
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Optional  
Sel.  
Addr.  
SIMO  
SOMI  
LEN  
CMD  
WA  
DATA  
DATA *  
DATA  
DATA  
Figure 22. TAC Protocol Overview  
NOTE  
The format of Transponder Access Commands format is identical to the format used  
for the LF communication. The optional data has to be added as it is described in the  
LF section.  
In the following figure some examples protocols are shown.  
The protocol of the General Read of Page 1 is shown in Figure 23.  
SIMO  
LEN  
CMD  
WA  
LSByte  
MSByte  
SOMI  
SEL. ADDR.  
IDT  
MAN.  
SER. NO. SER. NO. SER. NO. RD ADDR.  
Figure 23. TAC Format – General Read Page 1  
Table 9. Example:  
Length:  
0x02  
0x00  
Two bytes to follow.  
= 00 000000 (binary)  
Command:  
00  
000000  
= Transponder Access Command (TAC)  
= don’t care  
Write Address:  
0x04  
= 000001 00 (binary)  
000001  
00  
= Page 1  
= General Read  
Sel. Address:  
0x00  
Selective address is 0x00  
The 7 byte response depends on the Transponder Memory content.  
SIMO = 0x02 0x00 0x04  
SOMI = Sel.Ad. IDT Man. Ser.# Ser.# Ser.# Rd.Ad.  
The protocol of the Selective Read of Page 1 is shown in Figure 24.  
SEL.  
ADDR.  
SIMO  
LEN  
CMD  
WA  
LSByte  
MSByte  
SEL.  
ADDR.  
SOMI  
IDT  
MAN.  
SER. NO. SER. NO. SER. NO. RD ADDR.  
Figure 24. TAC Format – Selective Read Page 1  
Example:  
The 7 byte response depends on the Transponder Memory content.  
30  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Table 10. Example:  
Length:  
0x03  
0x00  
Three bytes to follow.  
= 00 000000 (binary)  
Command:  
00  
000000  
= Transponder Access Command (TAC)  
= don’t care  
Write Address:  
Sel. Address:  
0x07  
0x03  
= 000001 11 (binary)  
000001  
11  
= Page 1  
= Selective Read  
Selective address is 0x03  
SIMO = 0x03 0x00 0x07 0x03  
SOMI = Sel.Ad. IDT Man. Ser.# Ser.# Ser.# Rd.Ad.  
The protocol for the read of Page 19 (Battery Check) is shown in Figure 25.  
SIMO  
SOMI  
LEN  
CMD  
WA  
Battery  
level  
0x00  
0x00  
0x00  
0x00  
0x00  
RA  
WA  
= 010011 00  
Read Page  
Page 19  
Figure 25. TAC Format – Read Page 19 Battery Check  
SIMO = 0x02 0x00 0x4C  
Enhanced Commands  
The microcontroller can access the contents of the Transponder Memory by sending the TMS37157 a  
Transponder Access Command via the SIMO line.  
The two most significant bits of the Command byte determine the Enhanced Commands, Bit 6 to Bit 3 determine  
which Enhanced Command should be performed. The two least significant buts determine certain functions  
connected to the command. If the contents of the command byte are invalid for the device configuration, an error  
condition will be indicated via the BUSY line.  
The TMS37157 supports a number of Enhanced Commands (EC) which are used to transfer commands and  
data between the microcontroller and the TMS37157 (e.g. to perform a CRC calculation or trim the antenna).  
Command Byte  
SIMO  
1
0
M
M
M
M
F
F
MSB  
LSB  
M:  
F:  
Mode Bits.  
Flag Bits.  
Figure 26. EC Command Byte Contents  
The list contained in Table 11 shows the various Enhanced Commands supported by the TMS37157.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
31  
Product Folder Link(s): TMS37157  
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Table 11. Supported EC Commands  
MMMM = 0  
MMMM = 1  
MMMM = 2  
MMMM = 3  
MMMM = 4  
MMMM = 5  
MMMM = 6  
MMMM = 7  
MMMM = 8  
MMMM = 9  
MMMM = 10  
MMMM = 11  
MMMM = 12  
MMMM = 13  
MMMM = 14  
MMMM = 15  
= ‘0000’:  
= ‘0001’:  
= ‘0010’:  
= ‘0011’:  
= ‘0100’:  
= ‘0101’:  
= ‘0110’:  
= ‘0111’:  
= ‘1000’:  
= ‘1001’:  
= ‘1010’:  
= ‘1011’:  
= ‘1100’:  
= ‘1101’:  
= ‘1110’:  
= ‘1111’:  
CRC Calculation Command  
Reserved For Future Use  
Antenna Trimming with Programming Command  
Reserved For Future Use  
Reserved For Future Use  
Oscillator ON Command  
Reserved For Future Use  
CLKA ON command  
Reserved For Future Use  
Reserved For Future Use  
Antenna trimming without Program. Command  
Reserved for Future Use  
MSP Read/Write Data from/to Control Unit  
MSP Read Control Unit Status  
Power Down Command  
Reserved For Future Use  
CRC CALCULATION COMMAND  
The CRC Calculation command allows the microcontroller to use the transponder in the TMS37157 to perform a  
CRC16 calculation (instead of having to implement it in software). The contents of the command byte and two  
sample protocols are shown in Figure 27 to Figure 29.  
Command Byte  
SIMO  
1
0
0
0
0
0
0
S
MSB  
LSB  
S=0:  
S=1:  
Start Value is 3791  
Send Start Value  
Figure 27. EC CRC Calculation Command Byte  
LSByte  
MSByte  
DATA  
SIMO  
SOMI  
LEN  
CMD  
# BYTE DATA  
LSByte MSByte  
CRC CRC  
Figure 28. EC Format – CRC Calculation With Start Value "3791"  
NOTE  
The second byte of the CRC Calculation command (# of Bytes) refers only to data  
bytes and does not include the start bytes.  
32  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
LSByte MSByte LSByte  
# BYTE START START DATA  
MSByte  
DATA  
SIMO  
SOMI  
LEN  
CMD  
LSByte MSByte  
CRC CRC  
Figure 29. EC Format – CRC Calculation Command Including Start Value  
ANTENNA TRIMMING WITHOUT PROGRAMMING COMMAND  
The Antenna Trimming without Programming command enables faster trimming than the Antenna Trimming with  
Programming command. Using this command the trimming capacitors are controlled, but the trim configuration is  
not stored in the configuration EEPROM. The contents of the command byte and a sample protocol are shown  
below.  
NOTE  
In order to use the Antenna Trimming Without Programming function, the trimming  
capacitors must first be programmed to the OFF state using the Antenna Trimming  
With Programming command.  
Command Byte  
SIMO  
1
0
1
0
1
0
0
1
MSB  
LSB  
Figure 30. EC Format – Antenna Trimming Without Programming Command Byte  
SIMO  
SOMI  
LEN  
CMD  
DATA  
Figure 31. EC Format – Antenna Trimming Without Programming Command Protocol  
ANTENNA TRIMMING WITH PROGRAMMING  
The Antenna Trimming with Programming command can be used to switch in or out each of the on-chip trimming  
capacitors. The command programs the trim settings and saves them in a non-volatile EEPROM. The contents of  
the command byte and a sample protocol are shown below.  
Command Byte  
SIMO  
1
0
0
0
1
0
0
1
MSB  
LSB  
Figure 32. EC Format – Antenna Trimming With Programming Command Byte  
SIMO  
SOMI  
LEN  
CMD  
DATA  
Figure 33. EC Format – Antenna Trimming Command Protocol  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
33  
Product Folder Link(s): TMS37157  
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
OSCILLATOR ON COMMAND  
The Oscillator command can be used to enable the TMS37157 LC tank (connected to RF1). The output of this  
oscillator is presented at the TMS37157 CLKA pin and can be used as a time reference by the microcontroller or  
for measurements for antenna trimming. The contents of the command byte and a sample protocol are shown in  
Figure 34 and Figure 35.  
NOTE  
Once the oscillator has been enabled using the Oscillator On command, its output  
must be switched to the CLKA pin using the CLKA On command.  
This function needs a minimum battery voltage of 2.3V .  
Command Byte  
SIMO  
1
0
0
1
0
1
C
C
MSB  
LSB  
CC=00: Oscillator Off  
CC=01: Oscillator On (134 kHz)  
CC=10: Oscillator/4 On (134/4 kHz)  
Figure 34. EC Format – Oscillator Command Byte  
SIMO  
LEN  
CMD  
SOMI  
Figure 35. EC Format – Oscillator Command Protocol  
CLKA ON COMMAND  
The CLKA command can be used to switch oscillator output to the CLKA pin. This is necessary if during  
production no trimming is performed and the microcontroller has to trim the LC circuit of the TMS37157. It is  
recommended to connect CLKA to a Timer clock input of a microcontroller. For a precise time base a crystal or a  
resonator is needed at the microcontroller.  
If CLKA is not needed after trimming, it can be switched off to avoid the noise influences of the CLKA signal line.  
The contents of the command byte and a sample protocol are shown in Figure 36 and Figure 37.  
Command Byte  
SIMO  
1
0
0
1
1
1
X
C
MSB  
LSB  
C=0:  
C=1:  
CLKA Off  
CLKA On  
Figure 36. EC Format – CLKA Command Byte  
34  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
 
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
SIMO  
SOMI  
LEN  
CMD  
Figure 37. EC Format – CLKA Command Protocol  
MSP READ DATA FROM CU (DATA IN)  
If the TMS37157 receives a MSP Access Command it signalizes it by a high Pulse at busy and by setting VBATI.  
The busy signal could be used as interrupt to wake a microcontroller from Low Power Mode.  
The MSP Read Data from CU command can be used to transfer the decoded LF data from the Control Unit in  
the TMS37157 to the microcontroller. This command returns always 6 bytes to the MSP430. The contents of the  
command byte and a sample protocol are shown in Figure 38 and Figure 39.  
Command Byte  
SIMO  
1
0
1
1
0
0
0
0
MSB  
LSB  
Figure 38. EC Format – MSP Read Data From CU Command Byte  
SIMO  
SOMI  
LEN  
CMD  
DATA 0  
DATA 1 DATA 2  
DATA 3 DATA 4  
DATA 5  
Figure 39. EC Format – MSP Read Data From CU Command Protocol  
MSP WRITE DATA TO CU (DATA OUT)  
The MSP Write Data to CU command enables the microcontroller to transfer data to the Control Unit in the  
TMS37157 for LF transmission. The contents of the command byte and a sample protocol are shown in  
Figure 40 to Figure 41.  
Command Byte  
SIMO  
1
0
1
1
0
0
0
1
MSB  
LSB  
Figure 40. EC Format – MSP Write Data to CU Command Byte  
SIMO  
SOMI  
LEN  
CMD  
DATA 0  
DATA 1  
DATA 2 DATA 3  
DATA 4  
DATA 5  
STATUS  
Figure 41. EC Format – MSP Write Data to CU Command Protocol  
NOTE  
To complete the Data out command the RF Field must be present at least for 500μs  
after the last SPICLK.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
35  
Product Folder Link(s): TMS37157  
 
 
 
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
MSP READ CU STATUS (INFO)  
The Info command enables the microcontroller to check the Control Unit in the TMS37157 to see if any  
commands/data are waiting to be processed.  
The contents of the command byte and a sample protocol are shown in Figure 42 to Figure 43. The contents of  
the mask field can be ignored.  
Figure 44 shows the contents of the status byte sent as a response.  
Command Byte  
SIMO  
1
0
1
1
0
1
0
0
MSB  
LSB  
Figure 42. EC Format – MSP Read Status From CU Command Byte  
SIMO  
SOMI  
LEN  
CMD  
STATUS  
MASK  
Figure 43. EC Format – MSP Read Status From CU Protocol  
Status Byte  
SIMO  
0
0
0
0
0
0
S
S
MSB  
LSB  
SS=01: Push  
SS=10: MSP Access  
Figure 44. EC Format – MSP Read Status From CU Status Byte  
POWER DOWN  
The Power Down command enables the microcontroller to shut down the TMS37157 after all operations have  
been completed. After detecting this command, the Control Unit in the TMS37157 opens SW2 and SW5 and  
clears the push button detection flip-flop. All TMS37157 functions except push button detection are not powered  
and the TMS73157 enters a standby condition. The contents of the command byte and a sample protocol are  
shown in Figure 45 and Figure 46.  
Command Byte  
SIMO  
1
0
1
1
1
0
0
0
MSB  
LSB  
Figure 45. EC Format – Power Down Command Byte  
SIMO  
LEN  
CMD  
SOMI  
Figure 46. EC Format – Power Down Protocol  
36  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
 
 
 
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
TEST COMMANDS  
The Test Interface is needed to tune the resonance frequency to 134.2kHz during production e.g. at the end of  
line test.  
It comprises two input pins (TEN and TCLK) and one bi-directional pin (TDAT). The CLK signal is used to strobe  
data into and out of the TMS37157, as shown in the typical timing diagram in Figure 47. Communication via the  
Test Interface is activated when a valid voltage is applied to VCL and TCLK and TEN are taken high. After  
waiting a suitable time (the Probe Test Reset period) TCLK can be taken low and the Write Phase started (TEN  
having already been taken low). Probe Test Write Data is read into the TMS37157 on each rising edge of TCLK.  
Taking TEN high starts the Read Phase, during which the TMS37157 places new data on the TDAT line on  
every rising edge of TCLK (data valid on the falling edge of TCLK).  
Probe Test Reset  
Probe Test Write Data  
Probe Test Read Data  
VCL  
TCLK  
TDAT  
TEN  
tTclk = 1/fTclk  
tTclkh  
tTclkl  
tTds  
tTdh  
tTdd  
tTres  
tTrc  
Figure 47. Test Interface Timing  
Resonance Frequency Measurement  
The first step in the antenna trimming process is to measure the resonance frequency of the antenna circuit. For  
optimum energy transfer, trimming should be performed with VCL=4V, which is high enough to ensure an LF  
response, but below the limitation voltage.  
The resonance frequency of the antenna circuit can be measured using Probe Test Mode PTx18 (see Figure 48).  
After Probe Test Reset, the 6-bit PT Mode (0x18) and the 8-bit Password (0x5A) are shifted into the TMS37157,  
followed by 131 clock cycles. The measurement phase begins when TEN is taken high, whereupon the TCLK  
pulse triggers an oscillation in the antenna circuit.  
The resulting oscillation will decay at a rate determined by the Q-factor of the antenna circuit, and a clock signal  
will appear at TDAT as soon as oscillation starts. The measurement time should last at least 10 clock cycles and  
the average period of one cycle calculated from that. The average resonance frequency is simply the reciprocal  
of the average resonance period. If longer measurement times are required, the resonance circuit oscillation can  
be stimulated again with additional TCLK pulses.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
37  
Product Folder Link(s): TMS37157  
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
VCL  
Period  
Duration  
>= 10  
Period  
Duration  
>= 10  
Period  
Duration  
>= 10  
PT Mode (0x18)  
(6 clocks)  
LSB  
PT Password (0x5A)  
(8 clocks)  
(147 clocks)  
MSB LSB  
MSB  
TCLK  
TDAT  
0
0
0
1
1
0
0
1
0
1
1
0
1
0
TEN  
RF1  
Figure 48. Test Interface Timing – Resonance Frequency Measurement  
Trimming EEPROM Programming  
The second step in the frequency trimming process is to program the 7-bit trim word in the trimming EEPROM.  
The trimming EEPROM can be programmed using Probe Test Mode PTx14 (see Figure 49). After Probe Test  
Reset, the 6-bit PT Mode (0x14) and the 8-bit Password (0x5A) are shifted into the TMS37157, followed by 8 trim  
bits. Programming begins when TEN is taken high.  
NOTE  
Trimming EEPROM Programming requires that 8 trim bits are clocked in, however,  
only the 7 LSB’s after functional – the state of the MSB has no effect.  
The result of the programming process should be verified re-measuring the resonance frequency, and the whole  
process repeated until optimum performance achieved.  
VCL  
PT Mode (0x14)  
(6 clocks)  
PT Password (0x5A)  
(8 clocks)  
Trim Bits  
(8 clocks)  
Programming  
(11 msec)  
LSB  
MSBLSB  
MSBLSB  
MSB  
TCLK  
TDAT  
7 Trim Bits  
0
0
1
0
1
0
0
1
0
1
1
0
1
0
T1 T2 T3 T4 T5 T6 T7  
0
TEN  
Figure 49. Test Interface Timing – Trimming EEPROM Programming  
38  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Modulation Frequency Check  
During LF transmissions a FSK signal is transmitted. The resonance frequency of the trimmed antenna circuit  
(fL) represents a low bit and high bits are represented by a lower frequency (fH), which is achieved by switching  
in a Modulation Capacitor in parallel with the antenna resonance circuit. This frequency can be measured in the  
same way as the normal resonance frequency, but using Probe Test Mode 0x16 instead of 0x18.  
CRC Calculation  
A Cyclic Redundancy Check (CRC) generator is used in the TMS37157 during receipt and transmission of data  
to generate a 16-Bit Block Check Character (BCC), applying the CRC-CCITT algorithm as shown in Figure 51.  
The CRC generator consists of 16 shift register cells with 3 exclusive OR (Xor) Gates. The first Xor gate (X16)  
combines the input of the CRC generator with the output of the shift register (LSB first) and feeds back to the  
input of the shift register. The other two Xor gates combine certain cell outputs (X12, X5) with the output of the  
first Xor Gate and feed into the next cell input.  
The CRC Generator is initialized with the value 0x3791 as shown in Figure 50).  
MSB  
LSB  
0
0
1
1
0
1
1
1
1
0
0
1
0
0
0
1
9
3
7
1
Figure 50. Initial CRC Value 0x3791  
Figure 51. CRC Generator Block Schematic  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
39  
Product Folder Link(s): TMS37157  
 
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
The CRC generation is started with the first shifted bit, received during write phase RXCK, RXDT. After reception  
of program or lock command and the additional bits, including the write frame BCC, the CRC Generator content  
is compared to 0x0000 (CRC_OK).  
During read function CRC generation is started after transmission of the start byte (0x7E). After the read data (6  
bytes) and the read address byte, the CRC generator content is shifted out using the CRC generator as a normal  
shift register (SHIFT signal). DATA OUT represents the BCC which is added to read data and read address. The  
BCC format is one Word with LSB shifted out first.  
From a mathematics point of view, the data, which are serially shifted through the CRC generator with LSB first,  
are multiplied by 16 and divided by the CRC-CCITT generator polynomial:  
P(X) =X16 + X12 + X5 + 1  
(1)  
The remainder from this division is the Read Frame Block Check Character (Read Frame BCC).  
The interrogator control unit has to use the same algorithm to generate the Write Frame BCC and to check the  
Read Frame BCC received from the transponder. The response is checked by shifting the Read Frame BCC  
through the CRC generator in addition to the received data; the content of the CRC generator must be zero after  
this action.  
Typically the CRC generator is realized in the Base Stations by means of software and not hardware. The  
algorithm can be handled on a bit-by-bit basis (see Figure 52) or by using look-up tables.  
Figure 52. Routine - Generate Block Check Character Bit by Bit  
40  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
 
TMS37157  
www.ti.com  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
Application Circuit  
Only a few additional components are required for using the TMS37157. The recommended application circuits  
are shown in Figure 53 and Figure 54.  
In Figure 53 a typical application of a sensor with a data logger is shown. The Microcontroller is connected to a  
battery and can wake the TMS37157 to write data into the EEPROM of the TMS37157. The data can be read out  
through the LF Interface of the TMS37157. This application may also be used for powering the μC out of the RF  
Field if a battery is not an applicable solution. The battery has to be replaced by a big enough capacitor which is  
used as a buffer during the LF communication.  
Figure 53. Application Circuit With μC Directly Connected to Battery  
In Figure 54 a typical application of a Low Power Sensor with an external interrupt is shown. The μC VCC is  
connected to the VBATI output. If an external interrupt at Push occurs the TMS37157 initializes and powers up  
the μC by applying 3 V to VBATI. The μC can perform a measurement store the data in the EEPROM of the  
TMS37157 and send a power down command to the TMS37157, which switches off VBATI, resulting in an  
overall power consumption of the whole system of about 60 nA (TMS37157 is in Push Detection Mode).  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
41  
Product Folder Link(s): TMS37157  
 
TMS37157  
SWRS083A SEPTEMBER 2009REVISED NOVEMBER 2009  
www.ti.com  
Figure 54. Application Circuit With μC Connected to VBATI output of TMS37157  
42  
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): TMS37157  
PACKAGE OPTION ADDENDUM  
www.ti.com  
5-Nov-2009  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TMS37157IRSARG4  
ACTIVE  
QFN  
RSA  
16  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information  
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a  
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual  
property of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied  
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive  
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional  
restrictions.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all  
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not  
responsible or liable for any such statements.  
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably  
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing  
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and  
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products  
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be  
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in  
such safety-critical applications.  
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are  
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military  
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at  
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.  
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are  
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated  
products in automotive applications, TI will not be responsible for any failure to meet such requirements.  
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
dataconverter.ti.com  
www.dlp.com  
www.ti.com/audio  
Data Converters  
DLP® Products  
Automotive  
www.ti.com/automotive  
www.ti.com/communications  
Communications and  
Telecom  
DSP  
dsp.ti.com  
Computers and  
Peripherals  
www.ti.com/computers  
Clocks and Timers  
Interface  
www.ti.com/clocks  
interface.ti.com  
logic.ti.com  
Consumer Electronics  
Energy  
www.ti.com/consumer-apps  
www.ti.com/energy  
Logic  
Industrial  
www.ti.com/industrial  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Medical  
www.ti.com/medical  
microcontroller.ti.com  
www.ti-rfid.com  
Security  
www.ti.com/security  
Space, Avionics &  
Defense  
www.ti.com/space-avionics-defense  
RF/IF and ZigBee® Solutions www.ti.com/lprf  
Video and Imaging  
Wireless  
www.ti.com/video  
www.ti.com/wireless-apps  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2010, Texas Instruments Incorporated  

相关型号:

TMS37157_11

PASSIVE LOW FREQUENCY INTERFACE DEVICE WITH EEPROM AND 134.2 kHz TRANSPONDER INTERFACE

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS37C136

Controller Entry Transponder IC

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS37F128

CONTROLLER REMOTE ACCESS IDENTIFICATION DEVICE (CRAID) WITH INTEGRATED MICROCONTROLLER, 3D WAKEUP RECEIVER, AND IMMOBILIZER INTERFACE

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS37F128D3IDBTRG4

CONTROLLER REMOTE ACCESS IDENTIFICATION DEVICE (CRAID) WITH INTEGRATED MICROCONTROLLER, 3D WAKEUP RECEIVER, AND IMMOBILIZER INTERFACE

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS37F136

Controller Entry Transponder IC

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS37F158

CONTROLLER ENTRY DEVICE WITH INTEGRATED DST80 AUTHENTICATION, EEPROM, AND LF IMMOBILIZER INTERFACE

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS37F158LGIDBTRG4

CONTROLLER ENTRY DEVICE WITH INTEGRATED DST80 AUTHENTICATION, EEPROM, AND LF IMMOBILIZER INTERFACE

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI

TMS38010NL

Communications Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

TMS38020JDL

Controller Miscellaneous - Datasheet Reference

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

TMS38021NL

Protocol Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

TMS38030GBL-10

Communications Interface

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

TMS38030GBL-8

Communications Interface

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC