TMUX1119DCKR [TI]

3pA 导通状态泄漏电流、5V、2:1 (SPDT)、单通道精密多路复用器 | DCK | 6 | -40 to 125;


型号：	TMUX1119DCKR
厂家：	TEXAS INSTRUMENTS
描述：	3pA 导通状态泄漏电流、5V、2:1 (SPDT)、单通道精密多路复用器 \| DCK \| 6 \| -40 to 125 光电二极管复用器
文件：	总37页 (文件大小：1784K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

TMUX1119 5V、低泄漏电流、2:1 精密开关

1 特性

3 说明

•

宽电源电压范围：1.08V 至 5.5V

TMUX1119是一种互补金属氧化物半导体 (CMOS) 单

极双投 (2:1) 开关。1.08V 至 5.5V 的宽电源电压工作

范围可支持医疗设备到工业系统的大量应用。该器件

可在源极 (Sx) 和漏极 (D) 引脚上支持从 GND 到 V_DD

范围的双向模拟和数字信号。所有逻辑输入均具有兼容

1.8V 逻辑电平的阈值，当器件在有效电源电压范围内

运行时，这些阈值可确保 TTL 和 CMOS 逻辑兼容性。

失效防护逻辑电路允许在电源引脚之前的控制引脚上

施加电压，从而保护器件免受潜在的损害。

低泄漏电流：3pA

低导通电阻：1.8Ω

低电荷注入：–6pC

工作温度范围：-40°C 至 +125°C

兼容 1.8V 逻辑电平

失效防护逻辑

轨至轨运行

双向信号路径

先断后合开关

TMUX1119 是精密开关和多路复用器器件系列的一部

分。这些器件具有非常低的导通和关断泄漏电流以及较

低的电荷注入，因此可用于高精度测量应用的高速串

行链路的稳定性。3nA 的低电源电流和小型封装选项

使其可用于便携式应用的热管理优化而设计。中实现

高功率密度、高效率和稳健性。

ESD 保护 HBM：2000V

2 应用

•

超声波扫描仪

患者监护和诊断

血糖监测仪

器件信息⁽¹⁾

光学模块

器件型号

TMUX1119

封装

SC70 (6)

SOT-23 (6)⁽²⁾

封装尺寸（标称值）

2.00mm × 1.25mm

2.90mm x 1.60mm

光纤传输

远程无线电单元

数据采集系统

半导体测试设备

工厂自动化和工业控制

流量变送器

(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。

(2) 产品预览

SPACER

可编程逻辑控制器 (PLC)

模拟输入模块

电池测试

应用示例

方框图

OPA836

OPA835

TMUX1119

ADC

TMUX1119

SEL

MSP430FR599

TX/RX MOSI

MUX

TMUX1119

SEL

本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确

性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SCDS401

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Pin Configuration and Functions......................... 3

Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics (V_DD= 5 V ±10 %)............ 5

6.6 Electrical Characteristics (V_DD= 3.3 V ±10 %)......... 7

6.7 Electrical Characteristics (V_DD= 1.8 V ±10 %)......... 9

6.8 Electrical Characteristics (V_DD= 1.2 V ±10 %)....... 11

6.9 Typical Characteristics............................................ 13

Parameter Measurement Information ................ 16

7.1 On-Resistance ........................................................ 16

7.2 Off-Leakage Current ............................................... 16

7.3 On-Leakage Current ............................................... 17

7.4 Transition Time ....................................................... 17

7.5 Break-Before-Make................................................. 18

7.6 Charge Injection...................................................... 18

7.7 Off Isolation............................................................. 19

7.8 Crosstalk ................................................................. 19

7.9 Bandwidth ............................................................... 20

Detailed Description ............................................ 21

8.1 Overview ................................................................. 21

8.2 Functional Block Diagram ....................................... 21

8.3 Feature Description................................................. 21

8.4 Device Functional Modes........................................ 23

8.5 Truth Tables............................................................ 23

Application and Implementation ........................ 24

9.1 Application Information............................................ 24

9.2 Typical Application ................................................. 24

9.3 Design Requirements.............................................. 24

9.4 Detailed Design Procedure ..................................... 25

9.5 Application Curve.................................................... 25

10 Power Supply Recommendations ..................... 25

11 Layout................................................................... 26

11.1 Layout Guidelines ................................................. 26

11.2 Layout Example .................................................... 26

12 器件和文档支持 ..................................................... 27

12.1 文档支持................................................................ 27

12.2 相关链接................................................................ 27

12.3 接收文档更新通知 ................................................. 27

12.4 社区资源................................................................ 27

12.5 商标....................................................................... 27

12.6 静电放电警告......................................................... 27

12.7 Glossary................................................................ 27

13 机械、封装和可订购信息....................................... 27

4 修订历史记录

注：之前版本的页码可能与当前版本有所不同。

Changes from Original (December 2018) to Revision A

Page

•

将数据表标题从“精密模拟多路复用器”更改为“精密开关” ........................................................................................................ 1

更改了应用列表...................................................................................................................................................................... 1

Changed Thermal Information for DCK package ................................................................................................................... 4

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

5 Pin Configuration and Functions

DCK Package

6-Pin SC70

Top View

DBV Package

6-Pin SOT-23

Top View

SEL

VDD

GND

SEL

VDD

GND

Not to scale

Product Preview

Pin Functions

TYPE⁽¹⁾

DESCRIPTION

NAME

NO.

SEL

Select pin: controls state of the switch according to 表 1. (Logic Low = S1 to D, Logic High = S2 to D)

Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect

a decoupling capacitor ranging from 0.1 µF to 10 µF between V_DDand GND.

VDD

GND

Ground (0 V) reference

I/O

Source pin 1. Can be an input or output.

Drain pin. Can be an input or output.

Source pin 2. Can be an input or output.

(1) I = input, O = output, I/O = input and output, P = power

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

MIN

–0.5

–30

–0.5

–30

–65

MAX

UNIT

V_DD

Supply voltage

V_SELor V_EN

I_SELor I_EN

V_Sor V_D

I_Sor I_{D (CONT)}

T_stg

Logic control input pin voltage (SEL)

Logic control input pin current (SEL)

Source or drain voltage (Sx, D)

Source or drain continuous current (Sx, D)

Storage temperature

V_DD+0.5

°C

150

T_J

Junction temperature

150

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

6.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per

±2000

ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾

V_(ESD)

Electrostatic discharge

Charged device model (CDM), per JEDEC

specification JESD22-C101, all pins⁽²⁾

±750

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

1.08

NOM

MAX

5.5

UNIT

V_DD

Supply voltage

V_Sor V_D

V_SEL

T_A

Signal path input/output voltage (source or drain pin) (Sx, D)

Logic control input pin voltage (SEL)

Ambient temperature

V_DD

5.5

–40

125

°C

6.4 Thermal Information

TMUX1119

THERMAL METRIC⁽¹⁾

SC70 (DCK)

6 PINS

243.1

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

206.0

128.3

Ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

107.8

Ψ_JB

128.0

R_θJC(bot)

N/A

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

6.5 Electrical Characteristics (V_DD= 5 V ±10 %)

at T_A= 25°C, V_DD= 5 V (unless otherwise noted)

PARAMETER

ANALOG SWITCH

TEST CONDITIONS

MIN

TYP

MAX UNIT

25°C

1.8

4.5

4.9

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

R_ON

On-resistance

–40°C to +85°C

–40°C to +125°C

25°C

0.13

0.85

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

On-resistance matching between

channels

ΔR_ON

–40°C to +85°C

–40°C to +125°C

25°C

0.4

0.5

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

R_ON

FLAT

On-resistance flatness

–40°C to +85°C

–40°C to +125°C

25°C

1.4

1.6

V_DD= 5 V

Switch Off

V_D= 4.5 V / 1.5 V

V_S= 1.5 V / 4.5 V

Refer to Off-Leakage Current

–0.08 ±0.005

–0.3

0.08

0.3

–40°C to +85°C

I_S(OFF)

Source off leakage current⁽¹⁾

–40°C to +125°C

–0.9

0.9

V_DD= 5 V

Switch On

V_D= V_S= 2.5 V

Refer to On-Leakage Current

25°C

–0.025 ±0.003

–0.3

0.025

0.3

I_D(ON)

I_S(ON)

–40°C to +85°C

Channel on leakage current

–40°C to +125°C

–0.95

0.95

V_DD= 5 V

Switch On

V_D= V_S= 4.5 V / 1.5 V

Refer to On-Leakage Current

25°C

–0.1

±0.01

0.1

I_D(ON)

I_S(ON)

–40°C to +85°C

–0.35

0.35

–40°C to +125°C

–2

LOGIC INPUTS (SEL)

V_IH

V_IL

Input logic high

Input logic low

–40°C to +125°C

1.49

5.5

0.87

I_IH

I_IL

Input leakage current

25°C

±0.005

µA

I_IH

I_IL

–40°C to +125°C

±0.05

C_IN

Logic input capacitance

25°C

–40°C to +125°C

POWER SUPPLY

25°C

0.003

µA

I_DDV_DDsupply current

Logic inputs = 0 V or 5.5 V

–40°C to +125°C

(1) When V_Sis 4.5 V, V_Dis 1.5 V, and vice versa.

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

Electrical Characteristics (V_DD= 5 V ±10 %) (continued)

at T_A= 25°C, V_DD= 5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

DYNAMIC CHARACTERISTICS

25°C

V_S= 3 V

t_TRAN

Switching time between channels R_L= 200 Ω, C_L= 15 pF

–40°C to +85°C

–40°C to +125°C

25°C

Refer to Transition Time

V_S= 3 V

t_OPEN

(BBM)

Break before make time

Charge Injection

R_L= 200 Ω, C_L= 15 pF

Refer to Break-Before-Make

–40°C to +85°C

–40°C to +125°C

V_D= 1 V

R_S= 0 Ω, C_L= 1 nF

Refer to Charge Injection

Q_C

25°C

–6

–65

–45

–65

–45

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Off Isolation

O_ISO

Off Isolation

Crosstalk

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Off Isolation

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Crosstalk

X_TALK

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Crosstalk

R_L= 50 Ω, C_L= 5 pF

Refer to Bandwidth

Bandwidth

25°C

250

MHz

C_SOFF

Source off capacitance

On capacitance

f = 1 MHz

C_SON

C_DON

f = 1 MHz

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

6.6 Electrical Characteristics (V_DD= 3.3 V ±10 %)

at T_A= 25°C, V_DD= 3.3 V (unless otherwise noted)

PARAMETER

ANALOG SWITCH

TEST CONDITIONS

MIN

TYP

MAX UNIT

25°C

3.7

8.8

9.5

9.8

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

R_ON

On-resistance

–40°C to +85°C

–40°C to +125°C

25°C

0.13

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

On-resistance matching between

channels

ΔR_ON

–40°C to +85°C

–40°C to +125°C

25°C

0.4

0.5

1.9

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

R_ON

FLAT

On-resistance flatness

–40°C to +85°C

–40°C to +125°C

25°C

2.2

V_DD= 3.3 V

Switch Off

V_D= 3 V / 1 V

–0.05 ±0.001

–0.1

0.05

0.1

–40°C to +85°C

I_S(OFF)

Source off leakage current⁽¹⁾

V_S= 1 V / 3 V

Refer to Off-Leakage Current

–40°C to +125°C

–0.5

0.5

V_DD= 3.3 V

Switch On

V_D= V_S= 3 V / 1 V

Refer to On-Leakage Current

25°C

–0.1 ±0.005

–0.35

0.1

I_D(ON)

I_S(ON)

–40°C to +85°C

0.35

Channel on leakage current

–40°C to +125°C

–2

LOGIC INPUTS (SEL)

V_IH

V_IL

Input logic high

Input logic low

–40°C to +125°C

1.35

5.5

0.8

I_IH

I_IL

Input leakage current

25°C

±0.005

µA

I_IH

I_IL

-40°C to 125°C

±0.05

C_IN

Logic input capacitance

25°C

–40°C to +125°C

POWER SUPPLY

25°C

0.003

µA

I_DD

V_DDsupply current

Logic inputs = 0 V or 5.5 V

–40°C to +125°C

0.8

(1) When V_Sis 3 V, V_Dis 1 V, and vice versa.

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

Electrical Characteristics (V_DD= 3.3 V ±10 %) (continued)

at T_A= 25°C, V_DD= 3.3 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

DYNAMIC CHARACTERISTICS

25°C

V_S= 2 V

t_TRAN

Switching time between channels R_L= 200 Ω, C_L= 15 pF

–40°C to +85°C

–40°C to +125°C

25°C

Refer to Transition Time

V_S= 2 V

t_OPEN

(BBM)

Break before make time

Charge Injection

R_L= 200 Ω, C_L= 15 pF

Refer to Break-Before-Make

–40°C to +85°C

–40°C to +125°C

V_D= 1 V

R_S= 0 Ω, C_L= 1 nF

Refer to Charge Injection

Q_C

25°C

–6

–65

–45

–65

–45

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Off Isolation

O_ISO

Off Isolation

Crosstalk

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Off Isolation

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Crosstalk

X_TALK

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Crosstalk

R_L= 50 Ω, C_L= 5 pF

Refer to Bandwidth

Bandwidth

25°C

250

MHz

C_SOFF

Source off capacitance

On capacitance

f = 1 MHz

C_SON

C_DON

f = 1 MHz

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

6.7 Electrical Characteristics (V_DD= 1.8 V ±10 %)

at T_A= 25°C, V_DD= 1.8 V (unless otherwise noted)

PARAMETER

ANALOG SWITCH

TEST CONDITIONS

MIN

TYP

MAX UNIT

25°C

V_S= 0 V to V_DD

R_ON

On-resistance

I_SD= 10 mA

Refer to On-Resistance

–40°C to +85°C

–40°C to +125°C

25°C

0.4

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

On-resistance matching between

channels

ΔR_ON

–40°C to +85°C

–40°C to +125°C

25°C

1.5

V_DD= 1.98 V

Switch Off

V_D= 1.62 V / 1 V

V_S= 1 V / 1.62 V

Refer to Off-Leakage Current

–0.05 ±0.003

–0.1

0.05

0.1

–40°C to +85°C

I_S(OFF)

Source off leakage current⁽¹⁾

Channel on leakage current

–40°C to +125°C

–0.5

0.5

V_DD= 1.98 V

Switch On

V_D= V_S= 1.62 V / 1 V

Refer to On-Leakage Current

25°C

–0.1 ±0.005

–0.5

0.1

0.5

I_D(ON)

I_S(ON)

–40°C to +85°C

–40°C to +125°C

–2

LOGIC INPUTS (SEL)

V_IH

V_IL

Input logic high

Input logic low

–40°C to +125°C

1.07

5.5

0.68

I_IH

I_IL

Input leakage current

25°C

±0.005

µA

I_IH

I_IL

–40°C to +125°C

±0.05

C_IN

Logic input capacitance

25°C

–40°C to +125°C

POWER SUPPLY

25°C

0.001

µA

I_DDV_DDsupply current

Logic inputs = 0 V or 5.5 V

–40°C to +125°C

0.85

(1) When V_Sis 1.62 V, V_Dis 1 V, and vice versa.

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

Electrical Characteristics (V_DD= 1.8 V ±10 %) (continued)

at T_A= 25°C, V_DD= 1.8 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

DYNAMIC CHARACTERISTICS

25°C

V_S= 1 V

t_TRAN

Transition time between channels R_L= 200 Ω, C_L= 15 pF

–40°C to +85°C

–40°C to +125°C

25°C

Refer to Transition Time

V_S= 1 V

t_OPEN

(BBM)

Break before make time

Charge Injection

R_L= 200 Ω, C_L= 15 pF

Refer to Break-Before-Make

–40°C to +85°C

–40°C to +125°C

V_D= 1 V

R_S= 0 Ω, C_L= 1 nF

Refer to Charge Injection

Q_C

25°C

–3

–65

–45

–65

–45

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Off Isolation

O_ISO

Off Isolation

Crosstalk

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Off Isolation

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Crosstalk

X_TALK

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Crosstalk

Bandwidth

R_L= 50 Ω, C_L= 5 pF

25°C

250

MHz

C_SOFF

Source off capacitance

f = 1 MHz

C_SON

C_DON

On capacitance

f = 1 MHz

25°C

TMUX1119

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ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

6.8 Electrical Characteristics (V_DD= 1.2 V ±10 %)

at T_A= 25°C, V_DD= 1.2 V (unless otherwise noted)

PARAMETER

ANALOG SWITCH

TEST CONDITIONS

MIN

TYP

MAX UNIT

25°C

V_S= 0 V to V_DD

R_ON

On-resistance

I_SD= 10 mA

Refer to On-Resistance

–40°C to +85°C

–40°C to +125°C

25°C

105

0.4

V_S= 0 V to V_DD

I_SD= 10 mA

Refer to On-Resistance

On-resistance matching between

channels

ΔR_ON

–40°C to +85°C

–40°C to +125°C

25°C

1.5

V_DD= 1.32 V

Switch Off

V_D= 1 V / 0.8 V

V_S= 0.8 V / 1 V

Refer to Off-Leakage Current

–0.05 ±0.003

–0.1

0.05

0.1

–40°C to +85°C

I_S(OFF)

Source off leakage current⁽¹⁾

Channel on leakage current

–40°C to +125°C

–0.5

0.5

V_DD= 1.32 V

Switch On

V_D= V_S= 1 V / 0.8 V

Refer to On-Leakage Current

25°C

–0.1 ±0.005

–0.5

0.1

0.5

I_D(ON)

I_S(ON)

–40°C to +85°C

–40°C to +125°C

–2

LOGIC INPUTS (SEL)

V_IH

V_IL

Input logic high

Input logic low

–40°C to +125°C

0.96

5.5

0.36

I_IH

I_IL

Input leakage current

25°C

±0.005

µA

I_IH

I_IL

–40°C to +125°C

±0.05

C_IN

Logic input capacitance

25°C

–40°C to +125°C

POWER SUPPLY

25°C

0.003

µA

I_DDV_DDsupply current

Logic inputs = 0 V or 5.5 V

–40°C to +125°C

0.7

(1) When V_Sis 1 V, V_Dis 0.8 V, and vice versa.

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

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Electrical Characteristics (V_DD= 1.2 V ±10 %) (continued)

at T_A= 25°C, V_DD= 1.2 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

DYNAMIC CHARACTERISTICS

25°C

V_S= 1 V

t_TRAN

Transition time between channels R_L= 200 Ω, C_L= 15 pF

–40°C to +85°C

–40°C to +125°C

25°C

190

Refer to Transition Time

V_S= 1 V

t_OPEN

(BBM)

Break before make time

Charge Injection

R_L= 200 Ω, C_L= 15 pF

Refer to Break-Before-Make

–40°C to +85°C

–40°C to +125°C

V_D= 1 V

R_S= 0 Ω, C_L= 1 nF

Refer to Charge Injection

Q_C

25°C

–2

–65

–45

–65

–45

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Off Isolation

O_ISO

Off Isolation

Crosstalk

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Off Isolation

R_L= 50 Ω, C_L= 5 pF

f = 1 MHz

Refer to Crosstalk

X_TALK

R_L= 50 Ω, C_L= 5 pF

f = 10 MHz

Refer to Crosstalk

Bandwidth

R_L= 50 Ω, C_L= 5 pF

25°C

250

MHz

C_SOFF

Source off capacitance

f = 1 MHz

C_SON

C_DON

On capacitance

f = 1 MHz

25°C

TMUX1119

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ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

6.9 Typical Characteristics

at T_A= 25°C, V_DD= 5 V (unless otherwise noted)

4.5

V_DD= 3 V

T_A= 125èC

T_A= 85èC

V_DD= 3.63 V

3.5

V_DD= 4.5 V

2.5

V_DD= 5.5 V

1.5

T_A= -40èC

T_A= 25èC

0.5

V_Sor V_D- Source or Drain Voltage (V)

5.5

V_Sor V_D- Source or Drain Voltage (V)

D001

D002

T_A= 25°C

V_DD= 5 V

图 1. On-Resistance vs Source or Drain Voltage

图 2. On-Resistance vs Temperature

V_DD= 1.08 V

V_DD= 1.32 V

T_A= 85èC

T_A= 125èC

V_DD= 1.62 V

V_DD= 1.98 V

T_A= -40èC T_A= 25èC

1.5

V_Sor V_D- Source or Drain Voltage (V)

0.5

2.5

3.5

0.2 0.4 0.6 0.8

1 1.2 1.4 1.6 1.8

V_Sor V_D- Source or Drain Voltage (V)

D003

D004

V_DD= 3.3 V

T_A= 25°C

图 3. On-Resistance vs Temperature

图 4. On-Resistance vs Source or Drain Voltage

100

V_DD= 1.32 V

V_DD= 1.98 V

V_DD= 3.63 V

-20

-40

-60

-80

-100

-10

-20

-30

-40

0.5

V_Sor V_D- Source or Drain Voltage (V)

1.5

2.5

3.5

V_Sor V_D- Source or Drain Voltage (V)

D005

D006

T_A= 25°C

V_DD= 5 V

图 5. On-Leakage vs Source or Drain Voltage

图 6. On-Leakage vs Source or Drain Voltage

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

Typical Characteristics (接下页)

0.75

0.5

I_S(OFF)

0.25

-0.25

-1

-2

-3

I_(ON)

-0.5

-0.75

-1

-40

-20

100

120

-40

-20

100

120

Temperature (èC)

D007

D008

V_DD= 3.3 V

V_DD= 5 V

图 7. Leakage Current vs Temperature

图 8. Leakage Current vs Temperature

0.4

0.3

0.2

0.1

500

400

300

200

100

V_DD= 5 V

V_DD= 3.3 V

V_DD= 1.8 V

V_DD= 3.3 V

V_DD= 5 V

V_DD= 1.2 V

-0.1

-40

-20

100 120 140

0.5

1.5

Logic Voltage (V)

2.5

3.5

4.5

Temperature (èC)

D009

D010

V_SEL= 5.5 V

T_A= 25°C

图 9. Supply Current vs Temperature

图 10. Supply Current vs Logic Voltage

V_DD= 3.3 V

V_DD= 1.2 V

V_DD= 5 V

-1

-3

-5

V_DD= 1.8 V

-10

-15

-20

V_D- Drain Voltage (V)

0.5

V_D- Drain Voltage (V)

1.5

D011

D012

T_A= -40°C to 125°C

图 11. Charge Injection vs Drain Voltage

图 12. Charge Injection vs Drain Voltage

TMUX1119

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ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

Typical Characteristics (接下页)

-10

-20

-30

-40

-50

-60

-70

-80

-90

Rising

Falling

0.5

1.5

2.5 3.5

V_DD- Supply Voltage (V)

4.5

5.5

100k

10M

Frequency (Hz)

100M

D013

D014

T_A= 25°C

图 13. Output T_TRANSITIONvs Supply Voltage

图 14. Xtalk and Off-Isolation vs Frequency

-1

-2

-3

-4

-5

-6

-7

-8

10M

Frequency (Hz)

100M

D015

T_A= 25°C

图 15. On Response vs Frequency

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

7 Parameter Measurement Information

7.1 On-Resistance

The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (D) pins of the device.

The on-resistance varies with input voltage and supply voltage. The symbol R_ONis used to denote on-resistance.

The measurement setup used to measure R_ONis shown in 图 16. Voltage (V) and current (I_SD) are measured

using this setup, and R_ONis computed with R_ON= V / I_SD

I_SD

V_S

图 16. On-Resistance Measurement Setup

7.2 Off-Leakage Current

Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is

off. This current is denoted by the symbol I_S(OFF)

The setup used to measure off-leakage current is shown in 图 17.

V_DD

I_{s (OFF)}

V_S

V_D

GND

图 17. Off-Leakage Measurement Setup

TMUX1119

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ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

7.3 On-Leakage Current

Source on-leakage current is defined as the leakage current flowing into or out of the source pin when the switch

is on. This current is denoted by the symbol I_S(ON)

Drain on-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is

on. This current is denoted by the symbol I_D(ON)

Either the source pin or drain pin is left floating during the measurement. 图 18 shows the circuit used for

measuring the on-leakage current, denoted by I_S(ON)or I_D(ON)

V_DD

I_{S (ON)}

I_{D (ON)}

N.C.

V_S

V_D

GND

图 18. On-Leakage Measurement Setup

7.4 Transition Time

Transition time is defined as the time taken by the output of the device to rise or fall 10% after the address signal

has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of

the device. System level timing can then account for the time constant added from the load resistance and load

capacitance. 图 19 shows the setup used to measure transition time, denoted by the symbol t_TRANSITION

V_DD

0.1…F

V_DD

ADDRESS

DRIVE

(V_SEL

t_f< 5ns

t_r< 5ns

V_IH

)

V_IL

V_S

OUTPUT

0 V

R_L

C_L

t_TRANSITION

SEL

90%

OUTPUT

V_SEL

10%

GND

0 V

图 19. Transition-Time Measurement Setup

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

7.5 Break-Before-Make

Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is

switching. The output first breaks from the on-state switch before making the connection with the next on-state

switch. The time delay between the break and the make is known as break-before-make delay. 图 20 shows the

setup used to measure break-before-make delay, denoted by the symbol t_OPEN(BBM)

V_DD

0.1…F

V_DD

ADDRESS

DRIVE

t_r< 5ns

t_f< 5ns

V_S

OUTPUT

(V_SEL

)

0 V

R_L

C_L

90%

Output

SEL

t_BBM

t_BBM2

0 V

V_SEL

t_{OPEN (BBM)}= min ( t_BBM1, t_BBM2)

GND

图 20. Break-Before-Make Delay Measurement Setup

7.6 Charge Injection

The TMUX1119 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS

transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal.

The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted

by the symbol Q_C. 图 21 shows the setup used to measure charge injection from Drain (D) to Source (Sx).

V_DD

V_SS

0.1…F

V_SS

V_DD

V_SEL

N.C.

V_D

OUTPUT

V_OUT

0 V

C_L

Output

V_OUT

SEL

V_S

Q_C= C_L

V_OUT

V_SEL

GND

图 21. Charge-Injection Measurement Setup

TMUX1119

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ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

7.7 Off Isolation

Off isolation is defined as the ratio of the signal at the drain pin (D) of the device when a signal is applied to the

source pin (Sx) of an off-channel. 图 22 shows the setup used to measure, and the equation used to calculate off

isolation.

0.1µF

NETWORK

V_DD

ANALYZER

V_S

50Q

V_SIG

V_OUT

R_L

S_X

50Q

GND

R_L

50Q

图 22. Off Isolation Measurement Setup

≈

∆

’

◊

V_OUT

V_S

Off Isolation = 20 ∂ Log

(1)

7.8 Crosstalk

Crosstalk is defined as the ratio of the signal at the drain pin (D) of a different channel, when a signal is applied

at the source pin (Sx) of an on-channel. 图 23 shows the setup used to measure, and the equation used to

calculate crosstalk.

0.1µF

NETWORK

V_DD

ANALYZER

V_OUT

R_L

50Q

V_S

R_L

50Q

V_SIG

GND

图 23. Crosstalk Measurement Setup

≈

∆

’

◊

V_OUT

V_S

Channel-to-Channel Crosstalk = 20 ∂ Log

(2)

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

7.9 Bandwidth

Bandwidth is defined as the range of frequencies that are attenuated by less than 3 dB when the input is applied

to the source pin (Sx) of an on-channel, and the output is measured at the drain pin (D) of the device. 图 24

shows the setup used to measure bandwidth.

0.1µF

NETWORK

V_DD

ANALYZER

V_S

50Q

V_SIG

V_OUT

R_L

50Q

S_X

GND

R_L

50Q

图 24. Bandwidth Measurement Setup

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

8 Detailed Description

8.1 Overview

The TMUX1119 is an 2:1, 1-ch. (SPDT), analog switch where the input is controlled with a single select (SEL)

control pin.

8.2 Functional Block Diagram

TMUX1119

SEL

图 25. TMUX1119 Functional Block Diagram

8.3 Feature Description

8.3.1 Bidirectional Operation

The TMUX1119 conducts equally well from source (Sx) to drain (D) or from drain (D) to source (Sx). The device

has very similar characteristics in both directions and supports both analog and digital signals.

8.3.2 Rail to Rail Operation

The valid signal path input/output voltage for TMUX1119 ranges from GND to V_DD

8.3.3 1.8 V Logic Compatible Inputs

The TMUX1119 has 1.8-V logic compatible control for the logic control input (SEL). The logic input threshold

scales with supply but still provide 1.8-V logic control when operating at 5.5 V supply voltage. 1.8-V logic level

inputs allow the TMUX1119 to interface with processors that have lower logic I/O rails and eliminates the need

for an external translator, which saves both space and BOM cost. For more information on 1.8 V logic

implementations refer to Simplifying Design with 1.8 V logic Muxes and Switches

8.3.4 Fail-Safe Logic

The TMUX1119 supports Fail-Safe Logic on the control input pin (SEL) allowing for operation up to 5.5 V,

regardless of the state of the supply pin. This feature allows voltages on the control pin to be applied before the

supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by

removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic

feature allows the select pin of the TMUX1119 to be ramped to 5.5 V while V_DD= 0 V. Additionally, the feature

enables operation of the TMUX1119 with V_DD= 1.2 V while allowing the select pin to interface with a logic level

of another device up to 5.5 V.

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

Feature Description (接下页)

8.3.5 Ultra-low Leakage Current

The TMUX1119 provides extremely low on-leakage and off-leakage currents. The TMUX1119 is capable of

switching signals from high source-impedance inputs into a high input-impedance op amp with minimal offset

error because of the ultra-low leakage currents. 图 26 shows typical leakage currents of the TMUX1119 versus

temperature.

I_S(OFF)

-1

I_(ON)

-2

-3

-40

-20

100

120

Temperature (èC)

D008

图 26. Leakage Current vs Temperature

8.3.6 Ultra-low Charge Injection

The TMUX1119 has a transmission gate topology, as shown in 图 27. Any mismatch in the stray capacitance

associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed.

OFF ON

C_GDN

C_GSN

C_GSP

C_GDP

OFF ON

图 27. Transmission Gate Topology

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

Feature Description (接下页)

The TMUX1119 has special charge-injection cancellation circuitry that reduces the drain-to-source charge

injection to -6 pC at V_D= 1 V as shown in 图 28.

V_DD= 3.3 V

-5

V_DD= 5 V

-10

-15

-20

V_D- Drain Voltage (V)

D011

图 28. Charge Injection vs Drain Voltage

8.4 Device Functional Modes

The select (SEL) pin of the TMUX1119 controls which switch is connected to the drain of the device. When a

given input is not selected, that source pin is in high impedance mode (HI-Z). The control pins can be as high as

5.5 V.

8.5 Truth Tables

表 1. TMUX1119 Truth Table

CONTROL LOGIC (SEL)

Selected Source (Sx) Connected To Drain (D) Pin

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

9 Application and Implementation

注

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TMUX11xx family offers ulta-low input/output leakage currents and low charge injection. These devices

operate up to 5.5 V, and offer true rail-to-rail input and output of both analog and digital signals. The TMUX1119

has a low on-capacitance which allows faster settling time when multiplexing inputs in the time domain. These

features make the TMUX11xx devices a family of precision, high-performance switches and multiplexers for low-

voltage applications.

9.2 Typical Application

图 29 shows an ultrasonic gas meter front end. The ultrasonic front end design utilizes time of flight (TOF)

measurement to determine the amount of gas flowing in a pipe. The circuit utilizes the MSP430FR5994, two ultra

low power operational amplifiers, OPA835 and OPA836, along with two TMUX1119, 2:1 precision switches.

8 MHz

OPA836

OPA835

MSP430FR599

ADC

32 kHz

TMUX1119

SEL

TX/RX MOSI

MUX TX

TMUX1119

SEL

图 29. Ultrasonic Gas Meter System

9.3 Design Requirements

For this design example, use the parameters listed in 表 2.

表 2. Design Parameters

PARAMETERS

Supply (V_DD

VALUES

)

5 V

I/O signal range

Control logic thresholds

0 V to V_DD(Rail to Rail)

1.8 V compatible

<2 ns

Single-shot standard deviation (STD)

Zero-flow drift (ZFD)

<1 ns

TMUX1119

www.ti.com.cn

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

9.4 Detailed Design Procedure

The TMUX1119 can be operated without any external components except for the supply decoupling capacitors.

All inputs passing through the switch must fall within the recommend operating conditions of the TMUX1119,

including signal range and continuous current. For this design with a supply of 5 V the signal range can be 0 V to

5 V, and the max continuous current can be 30 mA.

The TMUX1119 device is a bidirectional, single-pole double-throw (SPDT) switch that offers low on-resistance,

low leakage, and low power. These features make this device suitable for portable and power sensitive

applications such as ultrasonic gas metering systems. The two TMUX1119 devices are used to switch the

transmission and reception signals from the MCU to the two transceivers in an efficient manner without distortion.

Exceptional on-resistance flatness, leakage performance, and charge injection allows the TMUX1119 to be

utilized in place of the TS5A9411 in Ultrasonic Gas Meter Front-End With MSP430™ Reference Design. For a

more detailed analysis of the entire system refer to the reference design.

9.5 Application Curve

The TMUX1119 is capable of switching signals with minimal distortion because of the ultra-low leakage currents

and excellent On-resistance flatness. 图 30 shows how the on-resistance fo the TMUX1119 varies with different

supply voltages.

V_DD= 3 V

V_DD= 3.63 V

V_DD= 4.5 V

V_DD= 5.5 V

V_Sor V_D- Source or Drain Voltage (V)

5.5

D001

T_A= 25°C

图 30. On-Leakage vs Source or Drain Voltage

10 Power Supply Recommendations

The TMUX1119 operates across a wide supply range of 1.08 V to 5.5 V. Do not exceed the absolute maximum

ratings because stresses beyond the listed ratings can cause permanent damage to the devices.

Power-supply bypassing improves noise margin and prevents switching noise propagation from the V_DDsupply to

other components. Good power-supply decoupling is important to achieve optimum performance. For improved

supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from V_DDto ground.

Place the bypass capacitors as close to the power supply pins of the device as possible using low-impedance

connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series

resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. For very sensitive

systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to

the device pins may offer superior noise immunity. The use of multiple vias in parallel lowers the overall

inductance and is beneficial for connections to ground planes.

TMUX1119

ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

www.ti.com.cn

11 Layout

11.1 Layout Guidelines

11.1.1 Layout Information

When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of

the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This

increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance

of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must

turn corners. 图 31 shows progressively better techniques of rounding corners. Only the last example (BEST)

maintains constant trace width and minimizes reflections.

WORST

BETTER

BEST

1W min.

图 31. Trace Example

Route high-speed signals using a minimum of vias and corners which reduces signal reflections and

impedance changes. When a via must be used, increase the clearance size around it to minimize its

capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of

picking up interference from the other layers of the board. Be careful when designing test points, through-

hole pins are not recommended at high frequencies.

图 32 illustrates an example of a PCB layout with the TMUX1119. Some key considerations are:

•

Decouple the V_DDpin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the

capacitor voltage rating is sufficient for the V_DDsupply.

•

Keep the input lines as short as possible.

Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.

Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

Via to

GND plane

TMUX1119

Wide (low inductance)

trace for power

图 32. TMUX1119 Layout Example

TMUX1119

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ZHCSJ88A –DECEMBER 2018–REVISED NOVEMBER 2019 2019

12 器件和文档支持

12.1 文档支持

12.1.1 相关文档

德州仪器 (TI)，《采用 MSP430™ 的超声波燃气表前端参考设计》。

德州仪器 (TI)，《真差分 4 x 2 多路复用器、模拟前端、同步采样 ADC 电路》。

德州仪器 (TI)，《使用低 CON 多路复用器改善稳定性问题》。

德州仪器 (TI)，《使用 1.8V 逻辑多路复用器和开关简化设计》。

德州仪器 (TI)，《利用关断保护信号开关消除电源排序》。

德州仪器 (TI)，《高电压模拟多路复用器的系统级保护》。

德州仪器 (TI)，《QFN/SON PCB 连接》。

德州仪器 (TI)，《四方扁平封装无引线逻辑封装》。

12.2 相关链接

下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件，以及立即订购快速访问。

12.3 接收文档更新通知

要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品

信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

12.4 社区资源

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

12.5 商标

E2E is a trademark of Texas Instruments.

12.6 静电放电警告

ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可

能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可

能会导致器件与其发布的规格不相符。

12.7 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 机械、封装和可订购信息

以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且

不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TMUX1119DBVR

TMUX1119DCKR

ACTIVE

SOT-23

SC70

DBV

DCK

3000 RoHS & Green

NIPDAU

Level-1-260C-UNLIM

-40 to 125

26HT

1DF

3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jun-2020

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TMUX1119DBVR

TMUX1119DCKR

SOT-23

SC70

DBV

DCK

3000

178.0

9.0

2.4

2.5

1.2

4.0

8.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jun-2020

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TMUX1119DBVR

TMUX1119DCKR

SOT-23

SC70

DBV

DCK

3000

180.0

18.0

Pack Materials-Page 2

PACKAGE OUTLINE

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

3.0

2.6

0.1 C

1.75

1.45

1.45 MAX

PIN 1

INDEX AREA

2X 0.95

1.9

3.05

2.75

0.50

0.25

C A B

0.15

0.00

0.2

(1.1)

TYP

0.25

GAGE PLANE

0.22

0.08

TYP

0.6

0.3

TYP

SEATING PLANE

4214840/C 06/2021

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.

4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.

5. Refernce JEDEC MO-178.

www.ti.com

EXAMPLE BOARD LAYOUT

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

SYMM

2X (0.95)

(R0.05) TYP

(2.6)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED METAL

0.07 MIN

ARROUND

0.07 MAX

ARROUND

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4214840/C 06/2021

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

SYMM

2X(0.95)

(R0.05) TYP

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4214840/C 06/2021

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

www.ti.com

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