TPA122DGNRG4 [TI]
150-mW STEREO AUDIO POWER AMPLIFIER; 150mW立体声音频功率放大器
| 型号： | TPA122DGNRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 150-mW STEREO AUDIO POWER AMPLIFIER |
| 文件： | 总28页 (文件大小：680K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
150-mW STEREO AUDIO POWER AMPLIFIER
FEATURES
DESCRIPTION
•
150-mW Stereo Output
The TPA122 is a stereo audio power amplifier pack-
aged in either an 8-pin SOIC, or an 8-pin
PowerPAD™ MSOP package capable of delivering
150 mW of continuous RMS power per channel into
8-Ω loads. Amplifier gain is externally configured by
means of two resistors per input channel and does
not require external compensation for settings of 1 to
10.
•
PC Power Supply Compatible
– Fully Specified for 3.3-V and 5-V Operation
– Operation to 2.5 V
•
•
•
•
Pop Reduction Circuitry
Internal Midrail Generation
Thermal and Short-Circuit Protection
Surface-Mount Packaging
– PowerPAD™ MSOP
THD+N when driving an 8-Ω load from 5 V is 0.1% at
1 kHz, and less than 2% across the audio band of 20
Hz to 20 kHz. For 32-Ω loads, the THD+N is reduced
to less than 0.06% at 1 kHz, and is less than 1%
across the audio band of 20 Hz to 20 kHz. For 10-kΩ
loads, the THD+N performance is 0.01% at 1 kHz,
and less than 0.02% across the audio band of 20 Hz
to 20 kHz.
– SOIC
•
Pin Compatible With LM4880 and LM4881
(SOIC)
D OR DGN PACKAGE
(TOP VIEW)
V 1
V
DD
1
2
3
4
8
7
6
5
O
IN1−
BYPASS
GND
V 2
O
IN2−
SHUTDOWN
TYPICAL APPLICATION CIRCUIT
320 kΩ
320 kΩ
V
8
1
R
F
DD
V
DD
Audio
Input
C
S
V /2
DD
R
I
IN1–
2
3
V 1
O
–
+
C
I
C
C
BYPASS
IN2–
C
B
Audio
Input
R
I
6
5
V 2
O
7
4
–
+
C
I
C
C
From Shutdown
Control Circuit
SHUTDOWN
Bias
Control
R
F
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICES
MSOP
SMALL OUTLINE(1)
(D)
MSOP(1)
(DGN)
TA
SYMBOLIZATION
–40°C to 85°C
TPA122D
TPA122DGN
TI AAE
(1) The D and DGN packages are available in left-ended tape and reel only (e.g., TPA122DR,
TPA122DGNR).
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
BYPASS
3
I
Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1 µF to 1 µF low ESR capacitor
for best performance.
GND
4
2
6
5
8
1
7
I
I
GND is the ground connection.
IN1-
IN1- is the inverting input for channel 1.
IN2- is the inverting input for channel 2.
Puts the device in a low quiescent current mode when held high
VDD is the supply voltage terminal.
IN2-
I
SHUTDOWN
VDD
I
I
VO1
O
O
VO1 is the audio output for channel 1.
VO2 is the audio output for channel 2.
VO2
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
6 V
VDD
VI
Supply voltage
Input voltage
–0.3 V to VDD + 0.3 V
Internally limited
–40°C to 150°C
–65°C to 150°C
260°C
Continuous total power dissipation
Operating junction temperature range
Storage temperature range
TJ
Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING POWER RATING
TA = 85°C
PACKAGE
POWER RATING
D
725 mW
2.14 W(1)
5.8 mW/°C
464 mW
1.37 W
377 mW
1.11 W
DGN
17.1 mW/°C
(1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report
(SLMA002), for more information on the PowerPAD package. The thermal data was measured on a
PCB layout based on the information in the section entitled Texas Instruments Recommended Board
for PowerPAD of that document.
2
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
RECOMMENDED OPERATING CONDITIONS
MIN
2.5
MAX UNIT
VDD
TA
Supply voltage
5.5
85
V
°C
V
Operating free-air temperature
High-level input voltage, (SHUTDOWN)
Low-level input voltage, (SHUTDOWN)
–40
VIH
VIL
0.80 × VDD
0.40 × VDD
V
DC ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
dB
VOO
PSRR
IDD
Output offset voltage
10
Power supply rejection ratio
Supply current
VDD = 3.2 V to 3.4 V
83
1.5
10
VDD = 2.5, SHUTDOWN = 0 V
VDD = 2.5, SHUTDOWN = VDD
3
mA
µA
IDD(SD)
ZI
Supply current in SHUTDOWN mode
Input impedance
50
> 1
MΩ
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 8 Ω
PARAMETER
TEST CONDITIONS
THD≤ 0.1%
MIN
TYP
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Phase margin
70(1)
2%
> 20
58°
68
mW
THD+N
BOM
PO = 70 mW, 20 Hz–20 kHz
G = 10, THD < 5%
Open loop
kHz
Supply ripple rejection
f = 1 kHz
dB
dB
Channel/channel output separation
Signal-to-noise ratio
f = 1 kHz
86
SNR
Vn
PO = 100 mW
100
9.5
dB
Noise output voltage
µV(rms)
(1) Measured at 1 kHz
DC ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 5.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
dB
VOO
Output offset voltage
10
PSRR
IDD
Power supply rejection ratio
Supply current
VDD = 4.9 V to 5.1 V
SHUTDOWN = 0 V
SHUTDOWN = VDD
VDD = 5.5 V, VI = VDD
VDD = 5.5 V, VI = 0 V
76
1.5
60
3
100
1
mA
µA
IDD(SD)
Supply current in SHUTDOWN mode
High-level input current (SHUTDOWN)
Low-level input current (SHUTDOWN)
Input impedance
|IIH
|
µA
|IIL|
ZI
1
µA
> 1
MΩ
3
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25°C, RL = 8 Ω
PARAMETER
TEST CONDITIONS
THD≤ 0.1%
MIN
TYP
70(1)
2%
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Phase margin
mW
THD+N
BOM
PO = 150 mW, 20 Hz–20 kHz
G = 10, THD < 5%
Open loop
> 20
56°
68
kHz
Supply ripple rejection ratio
Channel/channel output separation
Signal-to-noise ratio
f = 1 kHz
dB
dB
f = 1 kHz
86
SNR
Vn
PO = 150 mW
100
9.5
dB
Noise output voltage
µV(rms)
(1) Measured at 1 kHz
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 32 Ω
PARAMETER
TEST CONDITIONS
THD≤ 0.1%
MIN
TYP
40(1)
0.5%
> 20
58°
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Phase margin
mW
THD+N
BOM
PO = 30 mW, 20 Hz–20 kHz
G = 10, THD < 2%
Open loop
kHz
Supply ripple rejection
f = 1 kHz
68
dB
dB
Channel/channel output separation
Signal-to-noise ratio
f = 1 kHz
86
SNR
Vn
PO = 100 mW
100
9.5
dB
Noise output voltage
µV(rms)
(1) Measured at 1 kHz
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25°C, RL = 32 Ω
PARAMETER
TEST CONDITIONS
THD≤ 0.1%
MIN
TYP
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Phase margin
40(1)
0.4%
> 20
56°
mW
THD+N
BOM
PO = 60 mW, 20 Hz–20 kHz
G = 10, THD < 2%
Open loop
kHz
Supply ripple rejection
f = 1 kHz
68
dB
dB
Channel/channel output separation
Signal-to-noise ratio
f = 1 kHz
86
SNR
Vn
PO = 150 mW
100
9.5
dB
Noise output voltage
µV(rms)
(1) Measured at 1 kHz
4
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
1, 2, 4, 5, 7, 8, 10, 11, 13,
14, 16, 17, 34, 36
vs Frequency
THD+N
Vn
Total harmonic distortion plus noise
vs Output power
vs Frequency
3, 6, 9, 12, 15, 18
19, 20
Supply ripple rejection
Output noise voltage
Crosstalk
vs Frequency
21, 22
vs Frequency
23-26, 37, 38
27, 28
Mute attenuation
Open-loop gain and phase margin
Output power
vs Frequency
vs Frequency
29, 30
vs Load resistance
vs Frequency
31, 32
Phase
39-44
IDD
Supply current
vs Supply voltage
vs Voltage gain
vs Frequency
33
SNR
Signal-to-noise ratio
Closed-loop gain
Power dissipation/amplifier
35
39-44
vs Output power
45, 46
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
1
10
1
V
P
C
R
= 3.3 V
V
A
V
R
C
= 3.3 V
= −1 V/V
= 32 Ω
DD
DD
= 30 mW
= 1 µ F
= 32 Ω
O
B
L
L
= 1 µF
B
A
V
= −5 V/V
A
V
= −10 V/V
P
O
= 15 mW
0.1
0.1
P
O
= 10 mW
A
V
= −1 V/V
0.01
0.01
P
O
= 30 mW
0.001
0.001
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 1.
Figure 2.
5
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
FREQUENCY
10
1
10
V
P
R
C
= 5 V
= 60 mW
= 32 Ω
V
= 3.3 V
= 32 Ω
= −1 V/V
= 1 µF
DD
DD
R
A
O
L
L
V
= 1 µF
C
B
B
20 kHz
10 kHz
1
A
V
= −10 V/V
A
V
= −5 V/V
0.1
0.1
1 kHz
20 Hz
0.01
A
V
= −1 V/V
0.001
0.01
20
100
1k
10k 20k
1
10
50
P
O
− Output Power − mW
f − Frequency − Hz
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
OUTPUT POWER
10
1
10
V
R
= 5 V
= 32 Ω
= −1 V/V
= 1 µF
DD
V
= 5 V
= −1 V/V
= 32 Ω
= 1 µF
DD
L
A
V
A
V
R
C
L
C
B
B
20 kHz
10 kHz
1
P
O
= 30 mW
0.1
P
O
= 15 mW
0.1
1 kHz
0.01
20 Hz
P
O
= 60 mW
0.001
0.01
0.002
20
100
1k
10k 20k
0.01
0.1
0.2
f − Frequency − Hz
P
O
− Output Power − W
Figure 5.
Figure 6.
6
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
1
10
1
V
R
= 3.3 V
= 10 kΩ
= 100 µF
= 1 µF
V
R
L
A
V
C
B
= 3.3 V
= 10 kΩ
= −1 V/V
= 1 µF
DD
DD
L
P
O
C
B
A
V
= −5 V/V
0.1
0.1
P
O
= 45 µW
0.01
0.01
A
V
= −2 V/V
P = 90 µW
O
P
O
= 130 µW
0.001
0.001
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
FREQUENCY
10
1
10
1
V
R
= 3.3 V
= 10 kΩ
= −1 V/V
= 1 µF
DD
L
V
R
= 5 V
DD
= 10 kΩ
= 300 µW
= 1 µF
L
A
V
P
O
C
B
C
B
0.1
0.1
A
V
= −5 V/V
20 Hz
10 kHz
A
V
= −1 V/V
0.01
0.01
20 Hz
A
V
= −2 V/V
1 kHz
0.001
0.001
20
100
1k
10k 20k
5
10
100
200
P
O
− Output Power − µW
f − Frequency − Hz
Figure 9.
Figure 10.
7
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
OUTPUT POWER
10
1
10
1
V
R
= 5 V
DD
V
R
= 5 V
DD
= 10 kΩ
= −1 V/V
= 1 µF
L
= 10 kΩ
= −1 V/V
= 1 µ F
L
A
V
A
V
C
B
C
B
P
O
= 300 µW
0.1
0.1
P
O
= 200 µW
20 Hz
20 kHz
0.01
0.01
10 kHz
100
P
O
= 100 µW
1 kHz
0.001
0.001
20
100
1k
10k 20k
5
10
500
f − Frequency − Hz
P
O
− Output Power − µW
Figure 11.
Figure 12.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
2
1
10
1
V
R
A
V
= 3.3 V
= 8 Ω
= −1 V/V
DD
V
= 3.3 V
= 75 mW
= 8 Ω
DD
L
P
O
R
C
A
V
= −5 V/V
L
P
O
= 30 mW
= 1 µF
B
A
V
= −2 V/V
0.1
P
O
= 15 mW
0.1
A
V
= −1 V/V
0.01
0.01
P
O
= 75 mW
1k
0.001
0.001
20
100
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 13.
Figure 14.
8
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
FREQUENCY
2
1
10
V
R
A
V
= 3.3 V
= 8 Ω
= −1 V/V
DD
L
V
= 5 V
= 100 mW
= 8 Ω
A
= −2 V/V
DD
V
P
O
20 kHz
10 kHz
A
V
= −5 V/V
R
C
L
= 1 µF
B
1
0.1
A
V
= −1 V/V
1 kHz
0.1
0.01
20 Hz
0.01
0.001
10m
0.1
0.3
20
100
1k
10k 20k
f − Frequency − Hz
P
O
− Output Power − W
Figure 15.
Figure 16.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
OUTPUT POWER
10
1
10
V
R
A
V
= 5 V
= 8 Ω
= −1 V/V
DD
L
V
R
A
V
= 5 V
= 8 Ω
= −1 V/V
DD
L
20 kHz
P
O
= 30 mW
1
0.1
P
O
= 60 mW
10 kHz
1 kHz
0.1
0.01
20 Hz
P
O
= 10 mW
1k
0.001
0.01
20
100
10k 20k
10m
0.1
1
f − Frequency − Hz
P
O
− Output Power − W
Figure 17.
Figure 18.
9
TPA122
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SLOS211E–AUGUST 1998–REVISED JUNE 2004
SUPPLY RIPPLE REJECTION RATIO
SUPPLY RIPPLE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
0
−10
−20
−30
0
−10
−20
−30
V
R
= 3.3 V
= 8 Ω to 10 kΩ
V
R
= 5 V
= 8 Ω to 10 kΩ
DD
DD
L
L
C
B
= 0.1 µF
C = 0.1 µF
B
C
B
= 1 µF
C = 1 µF
B
−40
−50
−60
−40
−50
−60
C
B
= 2 µF
C = 2 µF
B
−70
−80
−70
−80
Bypass = 1.65 V
−90
−90
Bypass = 2.5 V
−100
−100
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 19.
Figure 20.
OUTPUT NOISE VOLTAGE
OUTPUT NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
20
10
20
10
V
DD
= 3.3 V
V
DD
= 5 V
BW = 10 Hz to 22 kHz
BW = 10 Hz to 22 kHz
A
= −1 V/V
= 8 Ω to 10 kΩ
R
A
= 8 Ω to 10 kΩ
= −1 V/V
V
L
R
L
V
1
1
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 21.
Figure 22.
10
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CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−60
−50
−55
−60
−65
P
= 25 mW
= 3.3 V
= 32 Ω
= 1 µF
= −1 V/V
O
P
V
R
C
= 100 mW
O
−65
−70
−75
V
DD
= 3.3 V
= 8 Ω
DD
R
C
A
V
L
L
B
= 1 µF
B
A
V
= −1 V/V
−80
−85
−90
−70
−75
−80
IN2 TO OUT1
IN2 TO OUT1
−95
−100
−105
−110
−85
−90
IN1 TO OUT2
IN1 TO OUT2
−95
−100
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 23.
Figure 24.
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−60
−65
−65
−75
−80
−50
−55
−60
−65
−70
V
P
C
R
= 5 V
= 25 mW
= 1 µF
= 32 Ω
= −1 V/V
V
= 5 V
= 100 mW
= 1 µF
= 8 Ω
= −1 V/V
DD
DD
P
O
O
C
R
A
V
B
L
B
L
A
V
IN2 TO OUT1
−85
−90
−95
−75
−80
−85
IN2 TO OUT1
−100
−105
−110
−90
−95
IN1 TO OUT2
IN1 TO OUT2
−100
20
100
1k
10k
20
100
1k
10k
20k
20k
f − Frequency − Hz
f − Frequency − Hz
Figure 25.
Figure 26.
11
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MUTE ATTENUATION
vs
MUTE ATTENUATION
vs
FREQUENCY
FREQUENCY
0
0
−10
−20
−30
−40
V
R
C
= 3.3 V
= 32 Ω
= 1 µF
V
C
R
= 5 V
= 1 µF
= 32 Ω
DD
DD
−10
−20
−30
L
B
L
B
−40
−50
−60
−50
−60
−70
−70
−80
−80
−90
−90
−100
−100
20
100
1k
10k 20k
20
100
1k
10k
20k
f − Frequency − Hz
f − Frequency − Hz
Figure 27.
Figure 28.
OPEN-LOOP GAIN AND PHASE MARGIN
vs
FREQUENCY
150°
100
80
60
40
20
V
= 3.3 V
= 25°C
DD
T
A
120°
90°
No Load
Phase
60°
30°
0°
Gain
0
−20
10
−30°
100
1k
10k
100k
10M
f − Frequency − Hz
Figure 29.
12
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
OPEN-LOOP GAIN AND PHASE MARGIN
vs
FREQUENCY
100
150°
120°
V
= 5 V
= 25°C
DD
T
A
No Load
80
60
40
20
Phase
90°
60°
30°
0°
Gain
0
−20
−30°
10M
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 30.
OUTPUT POWER
vs
LOAD RESISTANCE
OUTPUT POWER
vs
LOAD RESISTANCE
120
100
300
THD+N = 1 %
THD+N = 1 %
V
DD
= 3.3 V
V
DD
= 5 V
A
V
= −1 V/V
A
V
= −1 V/V
250
80
60
40
20
200
150
100
50
0
0
8
16
24
32
40
48
56
64
8
16
24
32
40
48
56
64
R
L
− Load Resistance − Ω
R
L
− Load Resistance − Ω
Figure 31.
Figure 32.
13
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
1
1.4
1.2
1
V = 1 V
I
A
V
= −1 V/V
R
= 10 kΩ
= 1 µF
L
C
B
0.1
0.8
0.6
0.4
0.2
0
0.01
0.001
2.5
3
3.5
4
4.5
5
5.5
20
100
1k
10k 20k
f − Frequency − Hz
V
DD
− Supply Voltage − V
Figure 33.
Figure 34.
SIGNAL-TO-NOISE RATIO
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
VOLTAGE GAIN
FREQUENCY
104
102
1
V
DD
= 5 V
V = 1 V
I
A
= −1 V/V
= 10 kΩ
= 1 µF
V
R
C
L
B
100
98
0.1
96
94
0.01
0.001
92
1
2
3
4
5
6
7
8
9
10
20
100
1k
10k 20k
A
V
− Voltage Gain − V/V
f − Frequency − Hz
Figure 35.
Figure 36.
14
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−60
−70
−60
−70
V
V
R
C
= 5 V
= 1 V
= 10 kΩ
= 1 µF
DD
V
V
R
C
= 3.3 V
= 1 V
= 10 kΩ
= 1 µF
DD
O
O
L
−80
−90
−80
−90
L
B
B
−100
−110
−120
−130
−140
−100
−110
−120
−130
−140
−150
IN2 to OUT1
IN2 to OUT1
IN1 to OUT2
IN1 to OUT2
100
−150
20
100
1k
10k 20k
20
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 37.
Figure 38.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
Phase
V
= 3.3 V
DD
100°
80°
R = 20 kΩ
R
R
I
= 20 kΩ
= 32 Ω
F
L
C = 1 µF
30
20
I
A
= −1 V/V
V
10
0
Gain
−10
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 39.
15
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
Phase
V
= 5 V
DD
100°
80°
R = 20 kΩ
R
R
I
= 20 kΩ
= 32 Ω
F
L
C = 1 µF
I
30
20
A
= −1 V/V
V
10
0
Gain
−10
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 40.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
Phase
V
= 3.3 V
DD
100°
80°
R = 20 kΩ
R
R
I
= 20 kΩ
= 8 Ω
F
L
C = 1 µF
I
60°
A
V
= −1 V/V
40
Gain
20
0
−20
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 41.
16
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
Phase
V
= 3.3 V
DD
100°
80°
R = 20 kΩ
R
R
I
= 20 kΩ
= 10 kΩ
F
L
C = 1 µF
30
20
I
A
= −1 V/V
V
10
0
Gain
−10
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 42.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
Phase
V
= 5 V
R = 20 kΩ
DD
I
R
R
= 20 kΩ
= 8 Ω
F
L
100°
80°
C = 1 µF
I
A
V
= −1 V/V
60°
40°
Gain
20
0
−20
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 43.
17
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
Phase
V
= 5 V
DD
R = 20 kΩ
I
100°
80°
R
F
R
L
= 20 kΩ
= 10 kΩ
C = 1 µF
I
30
20
A
= −1 V/V
V
10
0
Gain
10k
−10
10
100
1k
100k
1M
f − Frequency − Hz
Figure 44.
POWER DISSIPATION/AMPLIFIER
POWER DISSIPATION/AMPLIFIER
vs
vs
OUTPUT POWER
OUTPUT POWER
80
70
60
50
180
160
V
DD
= 3.3 V
V
DD
= 5 V
8 Ω
8 Ω
140
120
100
80
16 Ω
40
30
20
10
16 Ω
60
32 Ω
40
32 Ω
64 Ω
64 Ω
20
0
0
0
20 40 60 80 100 120 140
Load Power − mW
180 200
0
20 40 60 80 100 120 140
Load Power − mW
180 200
160
160
Figure 45.
Figure 46.
18
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
APPLICATION INFORMATION
GAIN SETTING RESISTORS, RF and RI
The gain for the TPA122 is set by resistors RF and RI according to Equation 1.
R
F
Gain + * ǒ Ǔ
R
I
(1)
Given that the TPA122 is an MOS amplifier, the input impedance is high. Consequently, input leakage currents
are not generally a concern, although noise in the circuit increases as the value of RF increases. In addition, a
certain range of RF values is required for proper start-up operation of the amplifier. Taken together, it is
recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ and
20 kΩ. The effective impedance is calculated in Equation 2.
R R
F
I
Effective Impedance +
R ) R
F
I
(2)
As an example, consider an input resistance of 20 kΩ and a feedback resistor of 20 kΩ. The gain of the amplifier
would be –1 and the effective impedance at the inverting terminal would be 10 kΩ, which is within the
recommended range.
For high-performance applications, metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due to a pole
formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small
compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a
low-pass filter network with the cutoff frequency defined in Equation 3.
1
f
+
c(lowpass)
2pR C
F
F
(3)
For example, if RF is 100 kΩ and CF is 5 pF, then fc(lowpass) is 318 kHz, which is well outside the audio range.
INPUT CAPACITOR CI
In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
determined in Equation 4.
1
f
+
c(highpass)
2pR C
I
I
(4)
The value of CI is important to consider, as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where RI is 20 kΩ and the specification calls for a flat bass response down to 20 Hz.
Equation 4 is reconfigured as Equation 5.
1
C +
I
2pR f
c(highpass)
I
(5)
In this example, CI is 0.4 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and
the feedback resistor (RF) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
that reduces useful headroom, especially in high-gain applications (> 10). For this reason a low-leakage tantalum
or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at VDD/2, which is likely higher
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
19
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
APPLICATION INFORMATION (continued)
POWER SUPPLY DECOUPLING, CS
The TPA122 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead, works best. For filtering
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power
amplifier is recommended.
MIDRAIL BYPASS CAPACITOR, CB
The midrail bypass capacitor, CB, serves several important functions. During start-up, CB determines the rate at
which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it can
not be heard). The second function is to reduce noise produced by the power supply caused by coupling into the
output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed
from a 160-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in
Equation 6 should be maintained.
1
1
ǒC 160 kΩǓ v ǒC RIǓ
B
I
(6)
As an example, consider a circuit where CB is 1 µF, CI is 1 µF, and RI is 20 kΩ. Inserting these values into
Equation 6 results in: 6.25 ≤ 50 which satisfies the rule. Bypass capacitor, CB, values of 0.1-µF to 1-µF ceramic
or tantalum low-ESR capacitors are recommended for the best THD and noise performance.
OUTPUT COUPLING CAPACITOR, CC
In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (CC) is required to
block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by
Equation 7.
1
f
+
c
2pR C
C
L
(7)
The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of CC are required to pass low frequencies into the load. Consider the
example where a CC of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 1 summarizes the frequency
response characteristics of each configuration.
Table 1. Common Load Impedances vs Low Frequency Output Characteristics
in SE Mode
RL
CC
LOWEST FREQUENCY
32 Ω
68 µF
68 µF
68 µF
73 Hz
0.23 Hz
0.05 Hz
10,000 Ω
47,000 Ω
As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for
example) is good.
The output coupling capacitor required in single-supply, SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:
20
TPA122
www.ti.com
SLOS211E–AUGUST 1998–REVISED JUNE 2004
1
1
1
ǒC 160 kΩǓ v ǒC R Ǔ Ơ
R C
L
C
B
I I
(8)
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves
like an ideal capacitor.
5-V VERSUS 3.3-V OPERATION
The TPA122 was designed for operation over a supply range of 2.5 V to 5.5 V. This data sheet provides full
specifications for 5-V and 3.3-V operation because these are considered to be the two most common standard
voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain
setting, or stability. The most important consideration is that of output power. Each amplifier in the TPA122 can
produce a maximum voltage swing of VDD – 1 V. This means, for 3.3-V operation, clipping starts to occur when
VO(PP) = 2.3 V, as opposed to VO(PP) = 4 V for 5-V operation. The reduced voltage swing subsequently reduces
maximum output power into the load before distortion begins to become significant.
21
www.ti.com
Thermal Pad Mechanical Data
DGN (S–PDSO–G8)
THERMAL INFORMATION
The DGN PowerPAD™ package incorporates an exposed thermal die pad that is designed to be attached directly
to an external heat sink. When the thermal die pad is soldered directly to the printed circuit board (PCB), the PCB
can be used as a heatsink. In addition, through the use of thermal vias, the thermal die pad can be attached directly
to a ground plane or special heat sink structure designed into the PCB. This design optimizes the heat transfer from
the integrated circuit (IC).
For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities, refer to
Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 and
Application Brief, PowerPAD Made Easy, Texas Instruments Literature No. SLMA004. Both documents are available
at www.ti.com. See Figure 1 for DGN package exposed thermal die pad dimensions.
8
1
Exposed Thermal
Die Pad
1,78
MAX
5
4
1,73
MAX
Bottom View
PPTD041
NOTE: All linear dimensions are in millimeters.
Figure 1. DGN Package Exposed Thermal Die Pad Dimensions
PowerPAD is a trademark of Texas Instruments.
1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Feb-2005
PACKAGING INFORMATION
Orderable Device
TPA122D
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TPA122DGN
MSOP-
Power
PAD
DGN
DGN
DGN
D
8
80
None
CU NIPDAU Level-1-220C-UNLIM
TPA122DGNR
ACTIVE
ACTIVE
MSOP-
Power
PAD
8
8
2500
None
CU NIPDAU Level-1-220C-UNLIM
TPA122DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPA122DR
ACTIVE
SOIC
8
0
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TPA122EVM
OBSOLETE
None
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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