TPA2008D2PWPRG4 [TI]
3-W STEREO CLASS-D AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL; 3 -W立体声D类音频功率放大器采用直流音量控制放大器
| 型号： | TPA2008D2PWPRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3-W STEREO CLASS-D AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL |
| 文件： | 总24页 (文件大小：644K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
3-W STEREO CLASS-D AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
FEATURES
DESCRIPTION
•
3 W Per Channel into 3-Ω Speakers
(THD+N = 10%)
The TPA2008D2 is a third generation 5-V class-D
amplifier from Texas Instruments. Improvements to
previous generation devices include: dc volume con-
trol, lower supply current, lower noise floor, higher
efficiency, smaller packaging, and fewer external
components. Most notably, a new filter-free class-D
modulation technique allows the TPA2008D2 to di-
rectly drive the speakers, without needing a low-pass
output filter consisting of two inductors and three
capacitors per channel. Eliminating this output filter
saves approximately 30% in system cost and 75% in
PCB area.
– < 0.045% THD at 1.5 W, 1 kHz, 3-Ω Load
•
•
DC Volume Control With 2-dB Steps From
-38 dB to 20 dB
Filter Free Modulation Scheme Operates
Without a Large and Expensive LC Output
Filter
•
Extremely Efficient Third Generation 5-V
Class-D Technology
– Low Supply Current, 7 mA
– Low Shutdown Control, 1 µA
– Low Noise Floor, -80 dBV
The improvements and functionality make this device
ideal for LCD projectors, LCD monitors, powered
speakers, and other applications that demand more
battery life, reduced board space, and functionality
that surpasses currently available class-D devices.
– Maximum Efficiency into 3 Ω, 78%
– Maximum Efficiency into 8 Ω, 88%
– PSRR, -70 dB
A chip-level shutdown control limits total supply
current to 1 µA, making the device ideal for bat-
tery-powered applications. Protection circuitry in-
creases device reliability: thermal and short circuit.
Undervoltage shutdown saves battery power for more
essential devices when battery voltage drops to low
levels.
•
•
•
Integrated Depop Circuitry
Operating Temperature Range, -40°C to 85°C
Space-Saving, Surface Mount PowerPAD™
Package
APPLICATIONS
The TPA2008D2 is available in a 24-pin TSSOP
PowerPAD™package.
•
•
•
•
LCD Projectors
LCD Monitors
Powered Speakers
Battery Operated and Space Constrained
Systems
EFFICIENCY
vs
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
OUTPUT POWER
100
20
V
R
= 5 V
= 3 Ω
DD
8 Ω Speaker
10
90
L
4 Ω Speaker
Gain = 0 dB
80
3 Ω Speaker
70
f = 1 kHz
1
60
50
40
f = 20 kHz
0.1
0.01
30
V
= 5 V
20
DD
f = 20 Hz
No Filter
10
0
0
0.5
1
1.5
2
2.5
3
3.5
0.01
0.1
− Output Power − W
1
4
P
P
− Output Power − W
O
O
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2004, Texas Instruments Incorporated
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
TSSOP PowerPAD (PWP)(1)
Device
TPA2008D2PWP(1)
PWP(1)
Package Designator
(1) The PWP package is available taped and reeled. To order a taped
and reeled part, add the suffix R to the part number (e.g.,
TPA2008D2PWPR).
PWP PACKAGE
(TOP VIEW)
1
24
23
22
21
20
19
18
17
16
15
14
13
LINN
LINP
RINN
RINP
2
3
SHUTDOWN
PVDDL
LOUTP
PGNDL
PGNDL
LOUTN
PVDDL
COSC
BYPASS
PVDDR
ROUTP
PGNDR
PGNDR
ROUTN
PVDDR
NC
4
5
6
7
8
9
10
11
12
ROSC
AGND
VOLUME
VDD
2
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NO.
AGND
NAME
12
22
10
-
I
I
Analog ground
BYPASS
COSC
Tap to voltage divider for internal mid-supply bias generator used for internal analog reference.
A capacitor connected to this terminal sets the oscillation frequency in conjunction with ROSC. For
proper operation, connect a 220-pF capacitor from COSC to ground.
LINN
1
2
I
I
Negative differential audio input for left channel
Positive differential audio input for left channel
Negative audio output for left channel
Positive audio output for left channel
No connection
LINP
LOUTN
LOUTP
NC
8
O
O
I
5
15
PGNDL
PGNDR
PVDDL
PVDDR
RINN
6, 7
18, 19
4, 9
16, 21
24
-
Power ground for left channel H-bridge
Power ground for right channel H-bridge
Power supply for left channel H-bridge
Power supply for right channel H-bridge
Positive differential audio input for right channel
Negative differential audio input for right channel
-
I
I
I
RINP
23
ROSC
11
A resistor connected to the ROSC terminal sets the oscillation frequency in conjunction with COSC. For
proper operation, connect a 120-kΩ resistor from ROSC to ground.
ROUTN
17
20
3
O
O
I
Negative output for right channel
Positive output for right channel
ROUTP
SHUTDOWN
Places the amplifer in shutdown mode if a TTL logic low is placed on this terminal; normal operation if a
TTL logic high is placed on this terminal.
VDD
13
14
-
-
I
Analog power supply
VOLUME
Thermal Pad
DC volume control for setting the gain on the internal amplifiers. The dc voltage range is 0 to VDD.
-
Connect to analog ground and the power grounds must be soldered down in all applications to properly
secure device on the PCB.
3
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
FUNCTIONAL BLOCK DIAGRAM
VDD
AGND
PVDD
VDD
Gain
Adj.
Gate
RINN
RINP
ROUTN
Drive
PGND
PVDD
Gate
Drive
ROUTP
PGND
Gain
Adj.
Short
Circuit
SHUTDOWN
VOLUME
Protection
Startup
Protection
Logic
Volume
Control
Short
Circuit
Protection
Biases
and
References
Ramp
Generator
COSC
ROSC
VDD
Thermal
BYPASS
PVDD
Gain
Adj.
LINP
Gate
Drive
LOUTP
PGND
PVDD
Gain
Adj.
Gate
Drive
LINN
LOUTN
PGND
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
UNIT
VDD,PVDD
Supply voltage range
Input voltage range
-0.3 V to 6 V
VI (RINN, RINP, LINN,
LINP, VOLUME)
0 V to VDD
Continuous total power dissipation
Operating free-air temperature range
Operating junction temperature range
Storage temperature range
See Dissipation Rating Table
-40°C to 85°C
TA
TJ
-40°C to 150°C
-65°C to 85°C
Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
4
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
DISSIPATION RATINGS TABLE
PACKAGE
TA≤ 25°C
2.18 W
DERATING FACTOR
TA = 70°C
1.2 W
TA = 85°C
PWP
21.8 mW/°C
872 mW
RECOMMENDED OPERATING CONDITIONS
MIN
4.5
MAX
5.5
UNIT
VDD
Supply voltage
V
V
V
V
Volume terminal voltage
High-level input voltage
Low-level input voltage
PWM frequency
0
2
VDD
VIH
VIL
SHUTDOWN
SHUTDOWN
0.8
200
-40
300 kHz
TA
TJ
Operating free-air temperature
Operating junction temperature
85
°C
°C
125
ELECTRICAL CHARACTERISTICS
TA= 25°C, VDD = PVDD = 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
mV
dB
| VOS
|
Output offset voltage (measured differentially)
Power supply rejection ratio
High-level input current
VI = 0 V, AV = 20 dB, RL = 8Ω
VDD = PVDD = 4.5 V to 5.5 V
VDD = PVDD = 5.5 V, VI= VDD = PVDD
VDD = PVDD = 5.5 V, VI = 0 V
No filter (no load)
5
25
PSRR
-70
| IIH
| IIL
IDD
|
1
1
µA
|
Low-level input current
µA
Supply current
7
15
mA
A
IDD(max)
IDD(SD)
RMS supply current at max power
Supply current in shutdown mode
RL = 3 Ω, PO = 2.5 W/channel (stereo)
SHUTDOWN = 0 V
1.8
50 1000
nA
High side
Low side
450
600
600
VDD = 5 V, IO = 500 mA,
TJ= 25°C
rds(on)
Drain-source on-state resistance
mΩ
450
OPERATING CHARACTERISTICS
TA= 25°C, VDD = PVDD = 5 V, RL = 3 Ω, Gain = 0 dB (unless otherwise noted)
PARAMETER
TEST CONDITIONS
THD+N = 1%
THD+N = 10%
MIN
TYP
2.5
MAX UNITS
f = 1 kHz, RL = 3 Ω, Stereo
operation
PO
Output power
W
3
PO = 2.2 W, f = 20 Hz to 20 kHz
PO = 1.5 W, f = 1 kHz
<0.3%
0.045%
20
THD+N
Total harmonic distortion plus noise
BOM
SNR
Maximum output power bandwidth
Signal-to-noise ratio
THD = 5%
kHz
dB
°C
Maximum output at THD+N <0.5%
96
Thermal trip point
150
20
Thermal hysteresis
°C
Volume = 0 dB
Volume = 20 dB
42
20 Hz to 20 kHz, inputs ac
grounded
Vn
Integrated noise floor
µVrms
85
5
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
Table 1. TYPICAL DC VOLUME CONTROL
VOLTAGE ON VOLUME PIN
VOLTAGE ON VOLUME PIN
(V)
TYPICAL GAIN OF AMPLIFIER
(V)
(1)
(dB)
(INCREASING OR FIXED GAIN)
(DECREASING GAIN)
0-0.33
0.31-0
-38(2)
-37
-35
-33
-31
-29
-27
-25
-23
-21
-19
-17
-15
-13
-12
-10
-8
0.34-0.42
0.43-0.52
0.53-0.63
0.64-0.75
0.76-0.86
0.87-0.97
0.98-1.07
1.08-1.18
1.19-1.30
1.31-1.41
1.42-1.52
1.53-1.63
1.64-1.75
1.76-1.85
1.86-1.96
1.97-2.07
2.08-2.18
2.19-2.30
2.31-2.40
2.41-2.52
2.53-2.63
2.64-2.75
2.76-2.87
2.88-2.98
2.99-3.10
3.11-3.22
3.23-3.33
3.34-3.47
3.48-3.69
3.70-VDD
0.43-0.32
0.54-0.44
0.64-0.55
0.75-0.65
0.86-0.76
0.97-0.87
1.08-0.98
1.19-1.09
1.32-1.20
1.42-1.33
1.53-1.43
1.63-1.54
1.75-1.64
1.84-1.76
1.96-1.85
2.09-1.97
2.19-2.10
2.33-2.20
2.43-2.34
2.49-2.44
2.62-2.50
2.75-2.63
2.85-2.76
2.99-2.86
3.12-3.00
3.25-3.13
3.36-3.26
3.48-3.37
3.64-3.49
VDD-3.65
-6
-4
-2
0(2)
2
4
6
8
10
12
14
16
18
20(2)
(1) The typical part-to-part gain variation can be as large as ±2 dB (one gain step).
(2) Tested in production.
The volume control circuitry of the TPA2008D2 is internally referenced to the VDD and AGND terminals. Any
common-mode noise between the VOLUME terminal and these terminals will be sensed by the volume control
circuitry. If the noise exceeds the step size voltage, the gain will change. In order to minimize this effect, care
must be taken to ensure the signal driving the VOLUME terminal is referenced to the VDD and AGND terminals
of the TPA2008D2. See section titled, “Special Layout Considerations” for more details.
6
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
1, 2
3-5
6-8
9
Efficiency
THD+N Total harmonic distortion + noise
vs Output power
vs Frequency
vs Output power
vs Frequency
vs Frequency
vs Frequency
vs Gain setting
kSVR
Supply ripple rejection ratio
Crosstalk
10
CMRR Common-mode rejection ratio
Ri Input resistance
11
12
EFFICIENCY
vs
OUTPUT POWER
EFFICIENCY
vs
OUTPUT POWER
100
100
8-Ω Speaker
8-Ω Speaker
90
80
70
60
90
80
70
60
4-Ω Speaker
3-Ω Speaker
4-Ω Speaker
3-Ω Speaker
50
40
50
40
30
20
10
0
30
20
10
0
V
= 5 V
DD
No Filter
V
= 5 V
DD
Ferrite Bead Filter
0
0.5
1
1.5
2
2.5
3
3.5
0
0.5
1
1.5
2
2.5
3
3.5
P
O
− Output Power − W
P
O
− Output Power − W
Figure 1.
Figure 2.
7
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
1
1
V
DD
= 5 V
V
DD
= 5 V
R
L
= 4 Ω
R
L
= 3 Ω
Gain = 0 dB
Gain = 0 dB
P
O
= 2.2 W
P
O
= 2 W
0.1
0.1
P
O
= 250 mW
P
O
= 300 mW
P
O
= 1.2 W
1k
P
O
= 1 W
0.01
0.01
20
100
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
OUTPUT POWER
1
20
10
V
= 5 V
V
DD
= 5 V
DD
R = 8 Ω
R = 3 Ω
L
L
Gain = 0 dB
Gain = 0 dB
P
O
= 1 W
0.1
P
O
= 50 mW
1
f = 1 kHz
f = 20 kHz
0.01
P
O
= 500 mW
0.1
f = 20 Hz
0.001
0.01
20
100
1k
10k 20k
0.01
0.1
1
4
f − Frequency − Hz
P
O
− Output Power − W
Figure 5.
Figure 6.
8
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
OUTPUT POWER
10
10
V
DD
= 5 V
V
DD
= 5 V
R
L
= 4 Ω
R
L
= 8 Ω
Gain = 0 dB
Gain = 0 dB
1
1
f = 1 kHz
f = 1 kHz
f = 20 kHz
f = 20 Hz
0.1
0.1
f = 20 Hz
f = 20 kHz
0.1
0.01
0.01
0.01
1
3
0.01
0.1
1
2
P
O
− Output Power − W
P
O
− Output Power − W
Figure 7.
Figure 8.
SUPPLY RIPPLE REJECTION RATIO
CROSSTALK
vs
FREQUENCY
vs
FREQUENCY
−40
−45
−50
−55
−60
−65
−70
−75
−80
−30
−40
V
C
= 5 V
V
= 5 V
DD
DD
= 1 µF
Gain = 20 dB
= 1 µF
(BYPASS)
C
(BYPASS)
−50
−60
P
O
= 2 W,
R = 4 Ω
L
−70
R = 4 Ω
L
P
= 1 W,
O
−80
R = 8 Ω
R = 3 Ω
L
L
−90
R = 8 Ω
L
−100
−110
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
Figure 9.
Figure 10.
9
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
COMMON-MODE REJECTION RATIO
INPUT RESISTANCE
vs
vs
FREQUENCY
GAIN SETTING
−50
−55
−60
−65
−70
300
250
200
150
100
50
V
R
C
= 5 V
= 8 Ω
DD
L
= 1 µF
(BYPASS)
V
= 5 V
DD
BTL Load = 8Ω
C
= 1 µF
(BYPASS)
0
−40
−30
−20
−10
0
10
20
20
100
1k
10k 20k
f − Frequency − Hz
Gain Setting − dB
Figure 11.
Figure 12.
10
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION
APPLICATION CIRCUIT
TPA2008D2
1
2
24
LINN
RINN
RINP
RIN−
LIN−
LIN+
0.1 µF
0.1 µF
23
22
21
LINP
RIN+
0.1 µF
0.1 µF
3
System
Control
SHUTDOWN
PVDD
BYPASS
PVDD
4
1 µF
20
19
18
17
16
5
LOUTP
PGND
ROUT+
ROUTP
6
VDD
LOUT+
GND
PGND
PGND
GND
1 µF
7
PGND
8
1 µF
10 µF
ROUTN
ROUT−
VDD
LOUTN
PVDD
COSC
ROSC
9
PVDD
NC
LOUT−
10
11
15
14
VOLUME
VOLUME
VDD
220 pF
120 kΩ
12
13
AGND
VDD
1 µF
GND
Figure 13. TPA2008D2 In A Stereo Configuration With Differential Inputs
11
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
TRADITIONAL CLASS-D MODULATION SCHEME
The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output
where each output is 180 degrees out of phase and changes from ground to the supply voltage, VCC. Therefore,
the differential prefiltered output varies between positive and negative VCC, where filtered 50% duty cycle yields 0
V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in
Figure 14. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high,
resulting in a high I2R loss, thus causing a high supply current.
OUTP
OUTN
+5 V
Differential Voltage
0 V
Across Load
−5 V
Current
Figure 14. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an
Inductive Load With No Input
12
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
TPA2008D2 MODULATION SCHEME
The TPA2008D2 uses a modulation scheme that still has each output switching from 0 to the supply voltage.
However, OUTP and OUTN are now in phase with each other with no input. The duty cycle of OUTP is greater
than 50% and OUTN is less than 50% for positive output voltages. The duty cycle of OUTP is less than 50% and
OUTN is greater than 50% for negative output voltages. The voltage across the load sits at 0 V throughout most
of the switching period, greatly reducing the switching current, which reduces any I2R losses in the load.
OUTP
OUTN
Output = 0 V
Differential
+5 V
Voltage
0 V
Across
−5 V
Load
Current
OUTP
OUTN
Output > 0 V
Differential
Voltage
Across
Load
+5 V
0 V
−5 V
Current
Figure 15. The TPA2008D2 Output Voltage and Current Waveforms Into an Inductive Load
EFFICIENCY: LC FILTER REQUIRED WITH THE TRADITIONAL CLASS-D MODULATION SCHEME
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results
in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is
large for the traditional modulation scheme, because the ripple current is proportional to voltage multiplied by the
time at that voltage. The differential voltage swing is 2 × VDD, and the time at each voltage is half the period for
the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for
the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,
whereas an LC filter is almost purely reactive.
The TPA2008D2 modulation scheme has very little loss in the load without a filter because the pulses are very
short and the change in voltage is VDD instead of 2 × VDD. As the output power increases, the pulses widen,
making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for
most applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow
through the filter instead of the load. The filter has less resistance than the speaker, which results in less power
dissipation, therefore increasing efficiency.
13
TPA2008D2
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SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
EFFECTS OF APPLYING A SQUARE WAVE INTO A SPEAKER
Audio specialists have advised for years not to apply a square wave to speakers. If the amplitude of the
waveform is high enough and the frequency of the square wave is within the bandwidth of the speaker, the
square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching
frequency, however, does not significantly move the voice coil, as the cone movement is proportional to 1/f2 for
frequencies beyond the audio band.
Damage may occur if the voice coil cannot handle the additional heat generated from the high-frequency
switching current. The amount of power dissipated in the speaker may be estimated by first considering the
overall efficiency of the system. If the on-resistance (rds(on)) of the output transistors is considered to cause the
dominant loss in the system, then the maximum theoretical efficiency for the TPA2008D2 with an 4-Ω load is as
follows:
Efficiency (theoretical, %) + R ńǒRL ) r
Ǔ
100% + 4ń(4 ) 0.45) 100% + 89.9%
L
ds(on)
(1)
The maximum measured output power is approximately 2.5 W with a 5-V power supply. The total theoretical
power supplied (P(total)) for this worst-case condition would therefore be as follows:
P
+ P ńEfficiency + 2.5 W ń 0.899 + 2.781 W
(total)
O
(2)
The efficiency measured in the lab using a 4-Ω speaker was 80%. The power not accounted for as dissipated
across the rds(on) may be calculated by simply subtracting the theoretical power from the measured power:
Other losses
P
(measured)
P
(theoretical)
3.025 2.781
0.244 W
(total)
(total)
(3)
The quiescent supply current at 5 V is measured to be 7 mA. It can be assumed that the quiescent current
encapsulates all remaining losses in the device, i.e., biasing and switching losses. It may be assumed that any
remaining power is dissipated in the speaker and is calculated as follows:
P
0.244 W (5 V 7 mA)
0.209 W
(dis)
(4)
Note that these calculations are for the worst-case condition of 2.5 W delivered to the speaker. Since the
0.209 W is only 7.4% of the power delivered to the speaker, it may be concluded that the amount of power
actually dissipated in the speaker is relatively insignificant. Furthermore, this power dissipated is well within the
specifications of most loudspeaker drivers in a system, as the power rating is typically selected to handle the
power generated from a clipping waveform.
WHEN TO USE AN OUTPUT FILTER
Design the TPA2008D2 without the filter if the traces from amplifier to speaker are short (< 1 inch). Powered
speakers, where the speaker is in the same enclosure as the amplifier, is a typical application for class-D without
a filter.
Many applications require a ferrite bead filter. The ferrite filter reduces EMI around 1 MHz and higher (FCC and
CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high
impedance at high frequencies, but low impedance at low frequencies.
Use an LC output filter if there are low frequency (<1 MHz) EMI sensitive circuits and/or there are long wires from
the amplifier to the speaker.
14
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
15 µH
OUTP
C
2
L
1
C
1
0.22 µF
1 µF
15 µH
OUTN
C
3
L
2
0.22 µF
Figure 16. Typical LC Output Filter, Cutoff Frequency of 41 kHz, Speaker Impedance = 4Ω
33 µH
OUTP
C
2
L
1
C
1
0.1 µF
0.47 µF
33 µH
OUTN
C
3
L
2
0.1 µF
Figure 17. Typical LC Output Filter, Cutoff Frequency of 41 kHz, Speaker Impedance = 8 Ω
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 18. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3)
15
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
VOLUME CONTROL OPERATION
The VOLUME pin controls the volume of the TPA2008D2. It is controlled with a dc voltage, which should not
exceed VDD. Table 1 lists the voltage on the VOLUME pin and the corresponding gain.
The trip point, where the gain actually changes, is different depending on whether the voltage on the VOLUME
terminal is increasing or decreasing as a result of hysteresis about each trip point. The hysteresis ensures that
the gain control is monotonic and does not oscillate from one gain step to another. A pictorial representation of
the volume control can be found in Figure 19. The graph focuses on three gain steps with the trip points defined
in the first and second columns of Table 1. The dotted lines represent the hysteresis about each gain step.
Decreasing Voltage on
VOLUME Terminal
2
0
Increasing Voltage on
VOLUME Terminal
−2
2.44
2.53
2.41 2.50
Voltage on VOLUME Pin − V
Figure 19. DC Volume Control Operation
SPECIAL LAYOUT CONSIDERATIONS
The voltage on the VOLUME pin must closely track that of the supply voltage, VDD. As the output power is
increased, the noise on the power supply will increase. The noise seen by the PVDD pin must also be seen by the
VOLUME pin. It is for that reason that absolutely no capacitor should be placed on the VOLUME pin. Additional
steps should be taken to reduce the line capacitance on the VOLUME pin, such as reducing line length. Any
capacitance on the VOLUME pin will act as a filter, thus making the voltage seen by the VOLUME pin and VDD
different. If the difference is large enough, the amplifier will change gain steps.
A star point should be used for power, where the supply voltage for VDD, PVDD, and the volume circuitry can be
taken. This point is typically at the bulk decoupling capacitor. The trace connecting the star point to a
potentiometer or a DAC should be short. The trace connecting the potentiometer or DAC to the VOLUME pin
should be kept as short and straight as possible.
As with the VDD, a star ground should likewise be used. There should exist on the board a point where AGND
and PGND converge. This should be the only place where the two grounds are connected. The ground used for
the volume control should be AGND. If a potentiometer is to be used to control the volume of the device, it
should be connected to AGND. A DAC that has a ground reference should have a short trace to AGND from its
ground reference input.
For an example of proper board layout, please refer to the TPA2008D2 EVM User's Guide, document number
SLOU116.
16
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
SELECTION OF COSC AND ROSC
The switching frequency is determined using the values of the components connected to ROSC (pin 11) and
COSC (pin 10) and may be calculated with the following equation:
f
= 6.6 / (R
x C
)
OSC
OSC
OSC
(5)
The frequency may be varied from 200 kHz to 300 kHz by adjusting the values chosen for ROSC and COSC. The
recommended values are COSC = 220 pF, ROSC= 120 kΩ for a switching frequency of 250 kHz.
INPUT RESISTANCE
Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest
value to over five times that value. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB
or cutoff frequency also changes by over five times.
R
f
C
i
R
i
IN
Input
Signal
The -3-dB frequency can be calculated using equation Equation 6. See Figure 12. Note that due to process
variation, the input resistance, Ri, can change by up to 20%.
1
f
+
*3 dB
2p C R
i
i
(6)
INPUT CAPACITOR, Ci
In a typical application, an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, Ci and the input resistance of the amplifier (Ri) form a
high-pass filter with the corner frequency determined in equation Equation 7.
−3 dB
1
f
+
c
2pR C
i
i
f
c
(7)
The value of Ci is important, as it directly affects the bass (low frequency) performance of the circuit. Consider
the example where Ri is 50 kΩ and the specification calls for a flat bass response down to 30 Hz. Equation
Equation 5 is reconfigured as equation Equation 8.
1
C +
i
2pR f
c
i
(8)
In this example, Ci is 0.1 µF, so one would likely choose a value in the range of 0.1 µF to 1 µF. Figure 12 can be
used to determine the input impedance for a given gain and can serve to aid in the calculation of Ci.
17
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
A further consideration for this capacitor is the leakage path from the input source through the input network (Ci)
and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the
amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage
tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the
capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely
higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
Ci must be 10 times smaller than the bypass capacitor to reduce clicking and popping noise from power on/off
and entering and leaving shutdown. After sizing Ci for a given cutoff frequency, size the bypass capacitor to 10
times that of the input capacitor.
C ≤ C
/ 10
i
BYP
(9)
POWER SUPPLY DECOUPLING, CS
The TPA2008D2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. Optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD terminal works best. For
filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near
the audio power amplifier is recommended.
MIDRAIL BYPASS CAPACITOR, CBYP
The midrail bypass capacitor (CBYP) is the most critical capacitor and serves several important functions. During
start-up or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts up. The second
function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This
noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and
THD+N.
Bypass capacitor (CBYP) values of 0.47-µF to 1-µF ceramic or tantalum low-ESR capacitors are recommended for
the best THD and noise performance.
Increasing the bypass capacitor reduces clicking and popping noise from power on/off and entering and leaving
shutdown. To have minimal pop, CBYP should be 10 times larger than Ci.
C
BYP
≥ 10 × C
i
(10)
DIFFERENTIAL INPUT
The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To
use the TPA2008D2 EVM with a differential source, connect the positive lead of the audio source to the INP
input and the negative lead from the audio source to the INN input. To use the TPA2008D2 with a single-ended
source, ac ground either input through a capacitor and apply the audio signal to the remaining input. In a
single-ended input application, the unused input should be ac-grounded at the audio source instead of at the
device input for best noise performance.
SHUTDOWN MODES
The TPA2008D2 employs a shutdown mode of operation designed to reduce supply current (IDD) to the absolute
minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should
be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to
mute and the amplifier to enter a low-current state, IDD(SD) = 1 µA. SHUTDOWN should never be left
unconnected because the amplifier state would be unpredictable.
18
TPA2008D2
www.ti.com
SLOS413C–JULY 2003–REVISED MAY 2004
APPLICATION INFORMATION (continued)
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor
can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor
minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance
the more the real capacitor behaves like an ideal capacitor.
SHORT-CIRCUIT PROTECTION
The TPA2008D2 has short circuit protection circuitry on the outputs that prevents damage to the device during
output-to-output shorts, output-to-GND shorts, and output-to-VDD shorts. When a short-circuit is detected on the
outputs, the part immediately goes into shutdown. This is a latched fault and must be reset by cycling the voltage
on the SHUTDOWN pin to a logic low and back to the logic high, or by cycling the power off and then back on.
This clears the short-circuit flag and allows for normal operation if the short was removed. If the short was not
removed, the protection circuitry activates again.
LOW-SUPPLY VOLTAGE DETECTION
The TPA2008D2 incorporates circuitry designed to detect when the supply voltage is low. When the supply
voltage reaches 1.8 V or below, the TPA2008D2 goes into a state of shutdown. The current consumption drops
from millamperes to microamperes, leaving the remaining battery power for more essential devices such as
microprocessors. When the supply voltage level returns to normal, the device comes out of its shutdown state
and starts to draw current again. Note that even though the device is drawing several milliamperes of current, it
is not operationally functional until VDD≥ 4.5 V.
THERMAL PROTECTION
Thermal protection on the TPA2008D2 prevents damage to the device when the internal die temperature
exceeds 150°C. There is a ±15 degree tolerance on this trip point from device to device. Once the die
temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are
disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by
20°C. The device begins normal operation at this point with no external system interaction.
THERMAL CONSIDERATIONS: OUTPUT POWER AND MAXIMUM AMBIENT TEMPERATURE
To calculate the maximum ambient temperature, the following equation may be used:
T
Amax
= T – Θ P
J JA Dissipated
where: T = 125°C
J
Θ
= 45.87°C/W
JA
(11)
(The derating factor for the 24-pin PWP package is given in the dissipation rating table.)
To estimate the power dissipation, the following equation may be used:
P
= P
x ((1 / Efficiency) – 1)
Dissipated
O(average)
Efficiency = ~85% for an 8-Ω load
= ~80% for a 4-Ω load
= ~75% for a 3-Ω load
(12)
Example. What is the maximum ambient temperature for an application that requires the TPA2008D2 to drive 2
W into a 4-Ω speaker (stereo)?
PDissipated = 4 W x ((1 / 0.8) - 1) = 1 W
(PO = 2 W x 2)
TAmax = 125°C - (45.87°C/W x 1 W) = 79.13°C
19
PACKAGE OPTION ADDENDUM
www.ti.com
18-Apr-2006
PACKAGING INFORMATION
Orderable Device
TPA2008D2PWP
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
HTSSOP
PWP
24
24
24
24
60 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPA2008D2PWPG4
TPA2008D2PWPR
TPA2008D2PWPRG4
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
60 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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TI assumes no liability for applications assistance or customer product design. Customers are responsible
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www.ti.com/audio
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