TPA6139A2_16 [TI]
25mW Headphone Amplifier;
| 型号： | TPA6139A2_16 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 25mW Headphone Amplifier |
| 文件： | 总22页 (文件大小：825K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA6139A2
www.ti.com
SLOS700B –JANUARY 2011–REVISED JUNE 2012
DirectPath™ 25-mW Headphone Amplifier With
Programmable-Fixed Gain
Check for Samples: TPA6139A2
1
FEATURES
DESCRIPTION
The TPA6139A2PW is a 25mW Pop-Free stereo
23
•
DirectPath™
Head Phone driver designed to reduce component
count, board space and cost. It is ideal for single
supply electronics where size and cost are critical
design parameters.
–
–
–
Eliminates Pop/Clicks
Eliminates Output DC-Blocking Capacitors
3 V to 3.6 V Supply voltage
•
Low Noise and THD
The TPA6139A2 does not require a power supply
greater than 3.3V to generate its 25mW, nor does it
require a split rail power supply.
–
–
–
SNR > 105 dB at –1x Gain
Typical Vn < 15 μVms 20-20kHz at –1x Gain
Designed using TI’s patented DIRECTPATH™
technology which integrates a charge pump to
generate a negative supply rail that provides a clean,
pop-free ground biased output. The TPA6139A2 is
capable of driving 25mW into 32Ω and 2Vms into a
600Ω load. DIRECTPATH also allows the removal of
the costly output DC-blocking capacitors.
THD+N < 0.003% at 10kΩ Load and –1x
Gain
•
•
•
•
25 mW into 600 Ω Load
2 Vrms Output Voltage into 5kΩ Load
Single Ended Input and Output
Programmable Gain Select Reduces
Component Count
The device has fixed gain single ended inputs with a
gain select pin. Using a single resistor on this pin, the
designer can choose from 13 internal programmable
gain settings to match the line driver with the Codec
output level. It also reduces the component count and
board space.
–
13x Gain Values
•
•
•
Active Mute With More Than 80dB Attenuation
Short Circuit and Thermal Protection
±8kV HBM ESD Protected Outputs
Headphone outputs have ±8kV HBM ESD protection
enabling
a simple ESD protection circuit. The
APPLICATIONS
TPA6139A2 has built-in active mute control with more
that 80dB attenuation for pop-free mute on/off control.
•
•
•
•
PDP / LCD TV
Blu-ray Disc™, DVD Players
Mini/Micro Combo Systems
Soundcards
The TPA6139A2 is available in a 14-pin TSSOP and
a 16-pin QFN. For a pin compatible 2vrms line driver
see DRV612.
–
DAC
LEFT
+
Headphone
Programmable
Gain
-1x to -10x
TPA6139A2
SOC
DAC
–
RIGHT
+
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
DirectPath, DIRECTPATH are trademarks of Texas Instruments.
Blu-ray Disc is a trademark of Blu-ray Disc Association.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2012, Texas Instruments Incorporated
TPA6139A2
SLOS700B –JANUARY 2011–REVISED JUNE 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
GENERAL INFORMATION
PIN ASSIGNMENT
The TPA6139A2 is available in the:
•
•
14-pin TSSOP package (PW) or
16-pin QFN package (RGT)
PW PACKAGE
TSSOP
(TOP VIEW)
RGT PACKAGE
QFN
(TOP VIEW)
1
2
–IN_L
OUT_L
GND
–IN_R
14
OUT_R 13
GAIN 12
12
11
10
9
OUT_R
1
2
3
4
OUT_L
3
4
GAIN
GND
GND
GND
MUTE
VSS
11
GND
VDD
VDD 10
5
6
MUTE
CN
NC
9
8
CP
NC
7
PIN FUNCTIONS
PIN
FUNCTION(1) DESCRIPTION
NAME
PW NO.
RGT NO.
-IN_L
OUT_L
GND
MUTE
VSS
CN
1
2
16
I
O
P
Negative input, left channel
Output, left channel
1
3, 11
4
2, 3, 10
Ground
4
I
MUTE, active low
5
5
O
I/O
Change Pump negative supply voltage
6
6
Charge Pump flying capacitor negative connection
No internal connection
NC
7, 8
9
7. 14, 15
CP
8
9
I/O
P
Charge Pump flying capacitor positive connection
Supply voltage, connect to positive supply
VDD
GAIN
10
12
11
I
Gain set programming pin; connect a resistor to ground.
See Table 1 for recommended resistor values
OUT_R
-IN_R
13
14
12
13
O
I
Output, right channel
Negative input, right channel
(1) I = input, O = output, P = power
2
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SLOS700B –JANUARY 2011–REVISED JUNE 2012
SYSTEM BLOCK DIAGRAM
Current
Limit
Left
GAIN
Control
De Pop
Current
Limit
Right
Thermal
Limit
Power
Management
Charge Pump
ORDERING INFORMATION(1)
PACKAGE
TA
DESCRIPTION
14-pin TSSOP
16-pin QFN
–40°C to 85°C
–40°C to 85°C
TPA6139A2PW
TPA6139A2RGT
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
THERMAL INFORMATION
TPA6139A2
PW (14-Pin)
TPA6139A2
RGT (16-Pin)
THERMAL METRIC(1)
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
130
49
52
71
θJCtop
θJB
63
26
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3.6
62
3.0
26
ψJB
θJCbot
N/A
9.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
V
VDD to GND
–0.3 to 4
Input voltage, VI
VSS–0.3 to VDD+0.3
V
MUTE to GND
–0.3 to VDD+0.3
V
Maximum operating junction temperature range, TJ
Storage temperature
Lead temperature
–40 to 150
°C
°C
°C
kV
kV
–40 to 150
260
8
OUT_L, OUT_R
ESD Protection – HBM
All other pins
2
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range unless otherwise noted
MIN NOM
MAX
UNIT
V
VDD
RL
Supply voltage
DC supply voltage
3.0
3.3
5
3.6
kΩ
VIL
VIH
TA
Low-level input voltage
High-level input voltage
Free-air temperature
MUTE
MUTE
38
57
40
60
25
43
66
85
%PVDD
%PVDD
°C
–40
4
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SLOS700B –JANUARY 2011–REVISED JUNE 2012
ELECTRICAL CHARACTERISTICS
VDD = 3.3V, RLoad = 32Ω, TA = 25°C, Charge pump: CCP = 1.0 μF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
0.5
80
MAX
UNIT
mV
dB
V
|VOS
|
Output offset voltage
VDD = 3.3 V, input ac-coupled
1
PSRR
VOH
Power-supply rejection ratio
High-level output voltage
Low-level output voltage
PVDD, under voltage detection
70
VDD = 3.3 V
VDD = 3.3 V
3.1
VOL
–3.05
2.8
V
Vuvp_on
V
Vuvp_hysteresis PVDD, under voltage detection, hysteresis
200
350
mV
kHz
µA
µA
mA
mA
°C
Fcp
|IIH
Charge pump switching frequency
High-level input current, MUTE
Low-level input current, MUTE
Supply current, no load
|
VDD = 3.3 V, VIH = VDD
VDD = 3.3 V, VIL = 0 V
VDD, MUTE = 3.3 V
1
1
|IIL|
I (VDD)
25
25
Supply current, MUTED
VDD = 3.3 V, MUTE = GND
Tsd
Thermal shutdown
150
15
Thermal shutdown hysteresis
Output Power, outputs in phase
°C
PO
VO
THD+N = 1%, f = 1kHz, 32Ω load
THD+N = 1%, f = 1kHz, 32Ω load
THD+N = 1%, f = 1kHz, 600Ω load
25
mW
0.9
Output Voltage, outputs in phase
Total Harmonic distortion plus noise
Vrms
2.0
f = 1kHz, 32Ω load, Po= 25mW, -1x
gain
0.03%
THD+N
THD+N
Total Harmonic distortion plus noise
f = 1kHz, 10kΩload, Vo=2 Vrms, -1x
gain
0.005%
0.25
ΔAV
Gain matching
Between left and right channels
MUTE = GND
dB
Ω
ZO
Output impedance when muted
Input to output attenuation when muted
1
MUTE = GND
80
99
dB
A-weighted, AES17 filter, 1Vrms ref
32Ω load, -1x gain
SNR
Vn
Signal to noise ratio
Signal to noise ratio
dB
dB
A-weighted, AES17 filter, 2Vrms ref
600Ω load, -1x gain
105
Noise voltage
A-weighted, AES17 filter, Gain=-2x
12
4.5
8
µV
V/µs
MHz
dB
Slew rate
Gbw
Unity Gain bandwidth
Channel to channel
Crosstalk
Vincm_pos
Vincm_neg
Ilim
f = 1kHz, Rload = 32Ω, Po= 25mW
–85
+2.0
–2.0
60
Positive Common mode input voltage
Negative Common mode input voltage
Output current limit
V
V
mA
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PROGRAMMABLE GAIN SETTINGS
VDD = 3.3 V, Rload = 32 kΩ, TA = 25°C, Charge pump:= CCP 1 µF, CIN = 1.0 µF, 1 x gain select (unless otherwise noted)(1)
TPA6139A2
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
R_Tol
Gain programming resistor tolerance
2%
ΔAV
Gain matching
Between left and right channels
0.25
0.10
dB
dB
Gain step tolerance
Gain resistor 2% tolerance
249k or higher
82k0
–2.0
–1.0
–1.5
–2.3
–2.5
–3.0
–3.5
–4.0
–5.0
–5.6
–6.4
–8.3
–10.0
49k2
35k1
27k3
20k5
15k4
11k5
9k09
7k50
Gain steps
V/V
6k19
5k11
3k90
Gain resistor 2% tolerance
249k or higher
82k0
37
55
49k2
44
35k1
33
27k3
31
20k5
15k4
28
24
Input impedance
kΩ
11k5
22
9k09
18
7k50
17
6k19
15
5k11
12
3k90
10.0
(1) If pin 12, GAIN, is left floating an internal pull-up sets the gain to –2.0x
Gain setting is latched during power-up
6
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SLOS700B –JANUARY 2011–REVISED JUNE 2012
TYPICAL CHARACTERISTICS, LINE DRIVER
VDD = 3.3 V, TA = 25°C, RL = 2.5 kΩ, CPUMP = C(VSS) = 10 µF, Gain Step = –2V/V (unless otherwise noted)
THD+N vs OUTPUT VOLTAGE
THD+N vs OUTPUT VOLTAGE
3.3 V, 100 kΩ, 1 kHz
3.3 V, 600 Ω load, 1 kHz
10
5
10
5
In Phase
2
1
2
1
32R load
Out of Phase
0.5
0.5
600R load
0.2
0.1
0.2
0.1
0.05
0.05
0.02
0.01
0.02
0.01
0.005
0.005
0.002
0.001
0.002
0.001
1m
2m
5m
10m
20m
50m 100m
200m 300m
500m 700m
1
2
3
P
- Output Power - W
O
V
- Output Voltage - V
O
Figure 1.
Figure 2.
CHANNEL SEPARATION
3.3 V, 5 kΩ load, 2 Vrms, Blue L to R, Red R to L
FFT
+0
–10
+0
25 mW into 32R
-10
–20
–30
-20
-30
-40
–40
–50
–60
-50
-60
-70
–70
–80
–90
Left to Right
Right to Left
–100
–110
–120
–130
-80
-90
-100
20
50 100 200
500 1k 2k
f - Frequency - Hz
5k 10k 20k
0
5k
10k
f - Frequency - Hz
15k
20k
Figure 3.
Figure 4.
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TYPICAL CHARACTERISTICS, LINE DRIVER (continued)
VDD = 3.3 V, TA = 25°C, RL = 2.5 kΩ, CPUMP = C(VSS) = 10 µF, Gain Step = –2V/V (unless otherwise noted)
Gain
vs
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
FREQUENCY
22
20
10
5
2
1
18
16
0.5
14
12
10
8
0.2
0.1
-10x gain
-4x gain
0.05
0.02
0.01
6
4
-2x gain
0.005
2
0
0.002
0.001
-2
20
50 100 200 500 1k 2k
f - Frequency - Hz
5k 10k20k
20
100 200 1k 2k
f - Frequency - Hz
10k 20k
100k 200k
Figure 5.
Figure 6.
MUTE TO UN-MUTE
UN-MUTE TO MUTE
Figure 7.
Figure 8.
8
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SLOS700B –JANUARY 2011–REVISED JUNE 2012
APPLICATION INFORMATION
LINE DRIVER AMPLIFIERS
Single-supply line-driver amplifiers typically require dc-blocking capacitors. The top drawing in Figure 9 illustrates
the conventional line-driver amplifier connection to the load and output signal.
DC blocking capacitors are often large in value, and a mute circuit is needed during power up to minimize click
and pop. The output capacitor and mute circuit consume PCB area and increase cost of assembly, and can
reduce the fidelity of the audio output signal.
Conventional solution
9-12 V
VDD
+
Mute Circuit
Co
+
+
Output
VDD/2
OPAMP
-
GND
MUTE
3.3 V
DirectPath
TPA6139A2 Solution
VDD
-
Output
GND
TPA6139A2
VSS
MUTE
Figure 9. Conventional and DirectPath Line Driver
The DirectPath™ amplifier architecture operates from a single supply but makes use of an internal charge pump
to provide a negative voltage rail.
Combining the user-provided positive rail and the negative rail generated by the IC, the device operates in what
is effectively a split supply mode.
The output voltages are now centered at zero volts with the capability to swing to the positive rail or negative rail.
Combining this with the built-in click and pop reduction circuit, the DirectPath™ amplifier requires no output dc
blocking capacitors.
The bottom block diagram and waveform of Figure 9 illustrate the ground-referenced line-driver architecture. This
is the architecture of the TPA6139A2.
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COMPONENT SELECTION
Charge Pump
The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage.
The VSS capacitor must be at least equal to the charge pump capacitor in order to allow maximum charge
transfer. Low ESR capacitors are an ideal selection, and a value of 1μF is typical. Capacitor values that are
smaller than 1μF cannot be recommended as it limits the negative voltage swing in low impedance loads.
Decoupling Capacitors
The TPA6139A2 is a DirectPath™ amplifier that requires adequate power supply decoupling to ensure that the
noise and total harmonic distortion (THD) are low. A good low equivalent-series-resistance (ESR) ceramic
capacitor, typically 1μF, placed as close as possible to the device VDD leads works best. Placing this decoupling
capacitor close to the TPA6139A2 is important for the performance of the amplifier. For filtering lower frequency
noise signals, a 10-μF or greater capacitor placed near the audio power amplifier also helps, but it is not required
in most applications because of the high PSRR of this device.
Gain-Setting
The gain setting is programmed with the GAIN pin individually for line driver and headphone section. Gain setting
is latched when the MUTE pin is set high. Table 1 lists the gain settings. The default gain with the gain-set pin
left open is –2x.
Table 1. Gain Settings
Gain_set RESISTOR
GAIN
–2.0x
–1.0x
–1.5x
–2.3x
–2.5x
–3.0x
–3.5x
–4.0x
–5.0x
–5.6x
–6.4x
–8.3x
–10x
GAIN (dB)
6.0
INPUT RESISTANCE
No connect
82k0
37k
55k
44k
33k
31k
28k
24k
22k
18k
17k
15k
12k
10k
0.0
49k2
3.5
35k1
7.2
27k3
8.0
20k5
9.5
15k4
10.9
12.0
14.0
15.0
16.1
18.4
20.0
11k5
9k09
7k50
6k19
5k11
3k90
Internal Under Voltage Detection
The TPA6139A2 contains an internal precision band gap reference voltage and a comparator used to monitor the
supply voltage, VDD. The internal VDD monitor is set at 2.8V with 200mV hysteresis.
1.25V
Bandgap
AMP Enable
VDD
10
Comparator
Internal VDD
10
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Input-Blocking Capacitors
DC input-blocking capacitors are required to be added in series with the audio signal into the input pins of the
TPA6139A2. These capacitors block the dc portion of the audio source and allow the TPA6139A2 inputs to be
properly biased to provide maximum performance. The input blocking capacitors also limit the DC gain to 1,
limiting the DC-offset voltage at the output.
These capacitors form a high-pass filter with the input resistor, RIN. The cutoff frequency is calculated using
Equation 1. For this calculation, the capacitance used is the input-blocking capacitor and the resistance is the
input resistor chosen from Table 1. Then the frequency and/or capacitance can be determined when one of the
two values is given.
1
1
fc
+
C
+
or
IN
IN
2p R
C
2p fc
R
IN IN
IN IN
(1)
For a fixed cutoff frequency of 2Hz the size of the input capacitance is shown in the table below with the
capacitors rounded up to nearest E6 values. For 20Hz cutoff simply divide the capacitor values with 10; e.g., for
1x gain, 150nF is needed.
Table 2. Input Capacitor for Different Gain and Cutoff
Gain_set
RESISTOR
Gain
(dB)
INPUT
RESISTANCE
2 Hz
Cutoff
GAIN
249k
82k0
49k2
35k1
27k3
20k5
15k4
11k5
9k09
7k50
6k19
5k11
3k90
–2.0x
–1.0x
–1.5x
–2.3x
–2.5x
–3.0x
–3.5x
–4.0x
–5.0x
–5.6x
–6.4x
–8.3x
–10x
6.0
0.0
37k
55k
44k
33k
31k
28k
24k
22k
18k
17k
15k
12k
10k
2.2 µF
1.5 µF
2.2 µF
3.3 µF
3.3 µF
3.3 µF
3.3 µF
4.7 µF
4.7 µF
4.7 µF
6.8 µF
6.8 µF
10 µF
3.5
7.2
8.0
9.5
10.9
12.0
14.0
15.0
16.1
18.4
20.0
Pop-Free Power Up
Pop-free power up is ensured by keeping the MUTE low during power supply ramp up and down. The pin should
be kept low until the input AC-coupling capacitors are fully charged before asserting the MUTE pin high to pre-
charge the ac-coupling; and, pop-less power-up is achieved. Figure 10 illustrates the preferred sequence.
Supply
Supply ramp
MUTE
Time for ac-coupling
capasitors to charge
Figure 10. Power-Up Sequence
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CAPACITIVE LOAD
The TPA6139A2 has the ability to drive a high capacitive load up to 220 pF directly. Higher capacitive loads can
be accepted by adding a series resistor of 47 Ω or larger for the line driver output.
LAYOUT RECOMMENDATIONS
A proposed layout for the TPA6139A2 can be seen in the TPA6139A2EVM User's Guide (SLOU248), and the
Gerber files can be downloaded from http://focus.ti.com/docs/toolsw/folders/print/TPA6139A2evm.html. To
access this information, open the TPA6139A2 product folder and look in the Tools and Software folder.
Ground traces are recommended to be routed as a star ground to minimize hum interference. VDD, VSS
decoupling capacitors and the charge pump capacitors should be connected with short traces.
PIN COMPATIBLE WITH THE DRV612
The TPA6139A2 stereo Headphone amplifier is pin compatible with the DRV612 . A single PCB layout can
therefore be used with stuffing options for different board configurations.
APPLICATION CIRCUIT
U11
2
1
2
1
IN_LEFT
IN_RIGHT
C12 2.2 mF
C11 2.2 mF
1
2
3
4
5
6
7
14
13
12
11
10
9
-IN_L
-IN_R
OUT_R
GAIN
GND
VDD
OUT_LEFT
OUT_RIGHT
OUT_L
GND
MUTE
VSS
CN
1
2
R11
49 kW
MUTE
1
2
1
2
1 mF
1 mF
C15
C1
CP
GND
8
+3.3V
NC
NC
GND
2
1
C14 uF1
2
C21
1
2
1
IN_LEFT
IN_RIGHT
2.2 mF
2.2 mF
C22
U21
1
12
11
10
9
OUT_LEFT
OUT_RIGHT
OUT_L
OUT_R
GAIN
2
3
4
GND
GND
MUTE
TPA6139A2RGT
GND
VDD
GND
MUTE
GND
+3.3V
C25
R21
1 mF
49 kW
C23
1 mF
GND
GND
2
1
C24
1 mF
GND
Figure 11. Single Ended Input and Output, Gain Set to –1.5x
12
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Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s) :TPA6139A2
TPA6139A2
www.ti.com
SLOS700B –JANUARY 2011–REVISED JUNE 2012
REVISION HISTORY
NOTE: Page numbers in current version may differ from previous versions.
Changes from Original (January 2011) to Revision A
Page
•
•
•
Changed "2.5-mW" to "25-mW" in Title line and added revision A - May 2011 pub date to Header infomation ................. 1
Changed pin assignment figures to match package outline drawings ................................................................................. 2
Changed conditions statement from "RIN = 10 kΩ, Rfb = 20 kΩ" to "Step = –2V/V" for TYP CHARA, LINE DRIVER
section ................................................................................................................................................................................... 7
•
Changed conditions statement from "RIN = 10 kΩ, Rfb = 20 kΩ" to "Step = –2V/V" for TYP CHARA, LINE DRIVER
section ................................................................................................................................................................................... 8
Changes from Revision A (May 2011) to Revision B
Page
•
Changed the RGT package From: Preview To: Production ................................................................................................. 2
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Link(s) :TPA6139A2
PACKAGE OPTION ADDENDUM
www.ti.com
20-Jul-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPA6139A2PW
TPA6139A2PWR
TPA6139A2RGTR
TPA6139A2RGTT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
QFN
PW
PW
14
14
16
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
2000
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
RGT
RGT
Green (RoHS
& no Sb/Br)
QFN
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPA6139A2PWR
TPA6139A2RGTR
TPA6139A2RGTT
TSSOP
QFN
PW
RGT
RGT
14
16
16
2000
3000
250
330.0
330.0
180.0
12.4
12.4
12.4
6.9
3.3
3.3
5.6
3.3
3.3
1.6
1.1
1.1
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q2
Q2
QFN
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPA6139A2PWR
TPA6139A2RGTR
TPA6139A2RGTT
TSSOP
QFN
PW
RGT
RGT
14
16
16
2000
3000
250
367.0
367.0
210.0
367.0
367.0
185.0
35.0
35.0
35.0
QFN
Pack Materials-Page 2
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