TPA6211A1TDGNRQ1 [TI]
汽车类 3.1W 单声道模拟输入 AB 类音频放大器 | DGN | 8 | -40 to 105;
| 型号： | TPA6211A1TDGNRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类 3.1W 单声道模拟输入 AB 类音频放大器 | DGN | 8 | -40 to 105 放大器 光电二极管 商用集成电路 音频放大器 |
| 文件： | 总24页 (文件大小：754K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
3.1-W MONO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER
Check for Samples: TPA6211A1-Q1
1
FEATURES
APPLICATIONS
2
•
Qualified for Automotive Applications
Designed for Wireless or Cellular Handsets
and PDAs
•
•
•
Automotive Audio
Emergency Call
Driver Notifications
•
•
3.1 W Into 3Ω From a 5-V Supply at
THD = 10% (Typ)
DESCRIPTION
•
•
•
•
Low Supply Current: 4 mA Typ at 5 V
Shutdown Current: 0.01 μA Typ
Fast Startup With Minimal Pop
Only Three External Components
The TPA6211A1-Q1 is a 3.1-W mono fully-differential
amplifier designed to drive a speaker with at least
3-Ω impedance while consuming only 20 mm2 total
printed-circuit board (PCB) area in most applications.
The device operates from 2.5 V to 5.5 V, drawing
–
Improved PSRR (-80 dB) and Wide Supply
Voltage (2.5 V to 5.5 V) for Direct Battery
Operation
only
4 mA of quiescent supply current. The
TPA6211A1-Q1 is available in the space-saving 8-pin
MSOP (DGN) PowerPAD™ package.
–
–
Fully Differential Design Reduces RF
Rectification
-63 dB CMRR Eliminates Two Input
Coupling Capacitors
Features like –80 dB supply voltage rejection from
20 Hz to 2 kHz, improved RF rectification immunity,
small PCB area, and a fast startup with minimal pop
makes the TPA6211A1-Q1 ideal for emergency call
applications.
5 V DC
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
ORDERABLE PART
TA
PACKAGE
Tape and Reel
TOP-SIDE MARKING
6211Q
NUMBER
–40°C to 105°C
HTSSOP - DGN
TPA6211A1TDGNRQ1
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
4
IN-
I
I
Negative differential input
Positive differential input
IN+
VDD
VO+
GND
VO-
3
6
I
Power supply
5
O
I
Positive BTL output
7
High-current ground
Negative BTL output
Shutdown terminal (active low logic)
8
O
I
SHUTDOWN
BYPASS
1
2
Mid-supply voltage, adding a bypass capacitor improves PSRR
Connect to ground. Thermal pad must be soldered down in all applications to properly secure
device on the PCB.
Thermal Pad
-
-
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
–0.3 V to 6 V
VDD
VI
Supply voltage
Input voltage
–0.3 V to VDD + 0.3 V
See Package Dissipation Ratings
–40°C to 105°C
Continuous total power dissipation
Operating free-air temperature
Junction temperature
Storage temperature
TA
TJ
–40°C to 150°C
Tstg
–65°C to 150°C
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds
DGN
260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
T
A ≤ 25°C
DERATING
TA= 70°C
POWER RATING
TA= 85°C
POWER RATING
PACKAGE
POWER RATING
FACTOR(1)
DGN
2.13 W
17.1 mW/°C
1.36 W
1.11 W
(1) Derating factor based on High-k board layout.
2
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
RECOMMENDED OPERATION CONDITIONS
MIN
2.5
TYP
MAX UNIT
VDD
VIH
VIL
TA
Supply voltage
5.5
V
V
High-level input voltage
Low-level input voltage
Operating free-air temperature
SHUTDOWN
SHUTDOWN
1.55
0.5
V
–40
105
°C
ELECTRICAL CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
0.3
MAX
UNIT
Output offset voltage (measured
differentially)
VOS
VI = 0 V differential, Gain = 1 V/V, VDD = 5.5 V
-9
9
mV
PSRR
VIC
Power supply rejection ratio
Common mode input range
VDD = 2.5 V to 5.5 V
VDD = 2.5 V to 5.5 V
–85
–60
VDD-0.8
–40
dB
V
0.5
VDD = 5.5 V,
VDD = 2.5 V,
VIC = 0.5 V to 4.7 V
VIC = 0.5 V to 1.7 V
-63
-63
0.45
0.37
0.26
4.95
3.18
2.13
58
CMRR Common mode rejection ratio
dB
–40
VDD = 5.5 V
RL = 4 Ω,
Gain = 1 V/V,
Low-output swing
VIN+ = VDD
,
VIN- = 0 V or VDD = 3.6 V
V
VIN+ = 0 V,
VIN- = VDD
VDD = 2.5 V
0.4
VDD = 5.5 V
RL = 4 Ω,
Gain = 1 V/V,
High-output swing
VIN+ = VDD
,
VIN- = 0 V or VDD = 3.6 V
V
VIN- = VDD
VIN+ = 0 V
VDD = 2.5 V
2
| IIH
| IIL
IQ
|
High-level input current, shutdown
Low-level input current, shutdown
Quiescent current
VDD = 5.5 V,
VDD = 5.5 V,
VI = 5.8 V
100
100
5
μA
μA
|
VI = –0.3 V
3
VDD = 2.5 V to 5.5 V, no load
4
mA
V(SHUTDOWN) ≤ 0.5 V, VDD = 2.5 V to 5.5 V,
RL = 4Ω
I(SD)
Supply current
0.01
1
μA
38 kW
RI
40 kW
RI
42 kW
RI
Gain
RL = 4Ω
V/V
Resistance from shutdown to GND
100
kΩ
Copyright © 2011, Texas Instruments Incorporated
3
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
OPERATING CHARACTERISTICS
TA = 25°C, Gain = 1 V/V
PARAMETER
TEST CONDITIONS
MIN
TYP
2.45
MAX
UNIT
VDD = 5 V
THD + N= 1%, f = 1 kHz, RL = 3 Ω
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
1.22
0.49
2.22
1.1
PO
Output power
THD + N= 1%, f = 1 kHz, RL = 4 Ω
THD + N= 1%, f = 1 kHz, RL = 8 Ω
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
W
0.47
1.36
0.72
0.33
0.045%
0.05%
0.06%
0.03%
0.03%
0.04%
0.02%
0.02%
0.03%
-80
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
PO = 2 W
f = 1 kHz, RL = 3 Ω PO = 1 W
PO = 300 mW
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
PO = 1.8 W
Total harmonic distortion plus
noise
THD+N
f = 1 kHz, RL = 4 Ω PO = 0.7 W
PO = 300 mW
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
PO = 1 W
f = 1 kHz, RL = 8 Ω PO = 0.5 W
PO = 200 mW
VDD = 3.6 V
VDD = 2.5 V
f = 217 Hz
VDD = 3.6 V, Inputs ac-grounded with
kSVR
SNR
Vn
Supply ripple rejection ratio
Signal-to-noise ratio
dB
dB
Ci = 2 μF, V(RIPPLE) = 200 mVpp
f = 20 Hz to 20 kHz
-70
VDD = 5 V, PO = 2 W, RL = 4 Ω
105
No weighting
A weighting
f = 217 Hz
15
VDD = 3.6 V, f = 20 Hz to 20 kHz,
Inputs ac-grounded with Ci = 2 μF
Output voltage noise
μVRMS
12
CMRR Common mode rejection ratio
VDD = 3.6 V, VIC = 1 Vpp
-65
dB
kΩ
μs
ZI
Input impedance
38
40
44
VDD = 3.6 V, No CBYPASS
4
Start-up time from shutdown
VDD = 3.6 V, CBYPASS = 0.1 μF
27
ms
4
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Supply voltage
vs Load resistance
vs Output power
vs Output power
Figure 1
Figure 2
PO
PD
Output power
Power dissipation
Figure 3, Figure 4
Figure 5, Figure 6,Figure 7
Figure 8, Figure 9,Figure 10,
Figure 11, Figure 12
THD+N Total harmonic distortion + noise
vs Frequency
vs Common-mode input voltage
vs Frequency
Figure 13
KSVR
KSVR
Supply voltage rejection ratio
Supply voltage rejection ratio
GSM Power supply rejection
GSM Power supply rejection
Figure 14, Figure 15, Figure 16, Figure 17
vs Common-mode input voltage
vs Time
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
vs Frequency
vs Frequency
CMRR Common-mode rejection ratio
vs Common-mode input voltage
vs Frequency
Closed loop gain/phase
Open loop gain/phase
vs Frequency
vs Supply voltage
vs Shutdown voltage
vs Bypass capacitor
IDD
Supply current
Start-up time
OUTPUT POWER
vs
OUTPUT POWER
vs
SUPPLY VOLTAGE
LOAD RESISTANCE
3.5
3.5
f = 1 kHz
Gain = 1 V/V
f = 1 kHz
Gain = 1 V/V
V
DD
= 5 V, THD 10%
P
O
= 3 Ω, THD 10%
3
3
V
DD
= 5 V, THD 1%
P
O
= 4 Ω, THD 10%
2.5
2.5
2
P
= 3 Ω, THD 1%
O
V
DD
= 3.6 V, THD 10%
P
O
= 4 Ω, THD 1%
2
P
O
= 8 Ω, THD 10%
V
DD
= 3.6 V, THD 1%
P
O
= 8 Ω, THD 1%
1.5
1.5
1
V
DD
= 2.5 V, THD 10%
V
DD
= 2.5 V, THD 1%
1
0.5
0
0.5
0
3
8
13
18
23
28
2.5
3
3.5
4
4.5
5
V
DD
- Supply Voltage - V
R
L
- Load Resistance - Ω
Figure 1.
Figure 2.
Copyright © 2011, Texas Instruments Incorporated
5
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
POWER DISSIPATION
vs
POWER DISSIPATION
vs
OUTPUT POWER
OUTPUT POWER
1.4
1.2
0.8
V
DD
= 3.6 V
4 Ω
V
DD
= 5 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4 Ω
1
0.8
8 Ω
8 Ω
0.6
0.4
0.2
0
0
0.3
0.6
0.9
1.2
1.5
1.8
0
0.3
0.6
0.9
1.2
1.5
1.8
P
O
- Output Power - W
P
O
- Output Power - W
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
OUTPUT POWER
20
10
5
R
C
= 4 Ω
,
R
C
= 3 Ω
,
L
L
10
5
= 0 to 1 µF,
= 0 to 1 µF,
(BYPASS)
(BYPASS)
Gain = 1 V/V
Gain = 1 V/V
2
2
1
1
0.5
0.5
0.2
0.1
2.5 V
2.5 V
3.6 V
3.6 V
0.2
0.1
5 V
5 V
0.05
0.05
0.02
0.01
0.02
0.01
20m
50m 100m 200m 500m
1
2
3
10m 20m
50m 100m 200m 500m 1
2 3
P
O
- Output Power - W
P
O
- Output Power - W
Figure 5.
Figure 6.
6
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
FREQUENCY
20
10
5
V
DD
= 5 V,
R
C
= 8 Ω
,
L
10
5
R
C
= 3 Ω,
= 0 to 1 µF,
L
,
(BYPASS)
= 0 to 1 µF,
Gain = 1 V/V
(BYPASS)
Gain = 1 V/V,
C = 2 µF
2
1
I
2
1
0.5
1 W
2.5 V
0.5
0.2
0.1
3.6 V
0.2
0.1
2 W
5 V
0.05
0.05
0.02
0.01
0.02
0.01
0.005
20
50 100 200 500 1k 2k
f - Frequency - Hz
5k 10k 20k
10m 20m
50m 100m 200m 500m 1
2 3
P
O
- Output Power - W
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
5
10
V
R
C
= 3.6 V,
V
R
C
= 5 V,
= 4 Ω,
,
DD
DD
= 4 Ω,
L
,
5
2
L
= 0 to 1 µF,
= 0 to 1 µF,
(BYPASS)
(BYPASS)
2
1
Gain = 1 V/V,
C = 2 µF
Gain = 1 V/V,
C = 2 µF
1 W
I
I
1
0.5
2 W
0.1 W
0.5 W
0.5
0.2
0.1
1.8 W
1 W
0.2
0.1
0.05
0.02
0.01
0.05
0.005
0.02
0.01
0.002
0.001
0.005
20
50 100 200 500 1k 2k
f - Frequency - Hz
5k 10k 20k
20
50 100 200 500
1k 2k
5k 10k 20k
f - Frequency - Hz
Figure 9.
Figure 10.
Copyright © 2011, Texas Instruments Incorporated
7
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
5
10
5
V
R
C
= 2.5 V,
V
R
C
= 3.6 V,
DD
DD
= 4 Ω,
= 8 Ω,
L
,
L
,
= 0 to 1 µF,
= 0 to 1 µF,
(BYPASS)
(BYPASS)
2
1
2
1
Gain = 1 V/V,
C = 2 µF
Gain = 1 V/V,
C = 2 µF
I
I
0.5
0.5
0.25 W
0.4 W
0.6 W
0.2
0.2
0.1 W
0.28 W
0.1
0.1
0.05
0.05
0.02
0.01
0.02
0.01
0.005
0.005
0.002
0.001
0.002
0.001
20 50 100 200
500 1k 2k
5k 10k 20k
20 50 100 200
500 1k 2k
5k 10k 20k
f - Frequency - Hz
f - Frequency - Hz
Figure 11.
Figure 12.
TOTAL HARMONIC DISTORTION + NOISE
SUPPLY VOLTAGE REJECTION RATIO
vs
vs
COMMON MODE INPUT VOLTAGE
FREQUENCY
0.06
0.058
0.056
0.054
0.052
0.05
+0
R
C
= 4 Ω,
,
L
f = 1 kHz
-10
= 0.47 µF,
(BYPASS)
P
R
= 200 mW,
= 1 kHz
O
Gain = 1 V/V,
L
-20
-30
-40
-50
-60
-70
-80
C = 2 µF,
I
Inputs ac Grounded
V
= 2.5 V
= 3.6 V
DD
V
DD
= 5 V
0.048
0.046
0.044
0.042
0.04
V
= 3.6 V
DD
V
DD
= 2.5 V
V
DD
-90
V
DD
= 5 V
-100
20
50 100 200 500 1k 2k
f - Frequency - Hz
5k 10k 20k
0
1
2
3
4
5
V
IC
- Common Mode Input Voltage - V
Figure 13.
Figure 14.
8
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
SUPPLY VOLTAGE REJECTION RATIO
SUPPLY RIPPLE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
+0
+0
R
C
= 4 Ω,
R
C
= 4 Ω,
,
L
,
L
-10
-10
= 0.47 µF,
= 0.47 µF,
(BYPASS)
(BYPASS)
Gain = 5 V/V,
C = 2 µF,
I
-20
-30
-40
-50
-60
-70
-80
-20
-30
-40
-50
-60
-70
-80
C = 2 µF,
V
DD
= 2.5 V to 5 V
I
Inputs ac Grounded
Inputs Floating
V
DD
= 3.6 V
V
DD
= 2.5 V
V
DD
= 5 V
-90
-90
-100
-100
20
50 100 200 500 1k 2k
f - Frequency - Hz
Figure 15.
5k 10k 20k
20
50 100 200 500 1k 2k
f - Frequency - Hz
Figure 16.
5k 10k 20k
SUPPLY VOLTAGE REJECTION RATIO
SUPPLY VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
DC COMMON MODE INPUT
+0
0
R
L
= 4 Ω,
,
R
= 4 Ω,
,
L
C = 2 µF,
Gain = 1 V/V,
−10
I
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
C = 2 µF,
I
Gain = 1 V/V,
−20
−30
−40
−50
−60
−70
−80
V
DD
= 3.6 V
C
= 0.47 µF
(BYPASS)
V
DD
= 3.6 V,
f = 217 Hz,
Inputs ac Grounded
V
DD
= 2.5 V
V
DD
= 3.6 V
C
= 0.1 µF
(BYPASS)
No C
(BYPASS)
V
DD
= 5 V
C
= 1 µF
(BYPASS)
−90
C
= 0.47 µF
(BYPASS)
−100
20
50 100 200 500 1k 2k
f − Frequency − Hz
Figure 17.
5k 10k 20k
0
1
2
3
4
5
6
DC Common Mode Input − V
Figure 18.
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GSM POWER SUPPLY REJECTION
vs
TIME
V
DD
C1
Frequency
217 Hz
C1 − Duty
20%
C1 Pk−Pk
500 mV
R = 8 Ω
L
C = 2.2 µF
I
V
OUT
C
= 0.47 µF
(BYPASS)
2 ms/div
Ch1 100 mV/div
Ch4 10 mV/div
t − Time − ms
Figure 19.
GSM POWER SUPPLY REJECTION
vs
FREQUENCY
0
−50
−100
−150
V
Shown in Figure 19,
DD
L
I
R
= 8 Ω,
−100
−120
C = 2.2 µF,
Inputs Grounded
−140
−160
−180
C
= 0.47 µF
(BYPASS)
0
400
800
1200
1600
2000
f − Frequency − Hz
Figure 20.
10
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TPA6211A1-Q1
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SBOS555 –JUNE 2011
COMMON MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
COMMON-MODE INPUT VOLTAGE
0
+0
R
L
= 4 Ω,
,
R
= 4 Ω,
,
L
-10
V
= 200 mV V
,
IC
p-p
-10
Gain = 1 V/V,
dc Change in V
Gain = 1 V/V,
IC
-20
-30
-40
-50
-60
-70
-80
-20
-30
-40
-50
-60
-70
V
DD
= 2.5 V
V
DD
= 2.5 V
V
DD
= 5 V
V
DD
= 3.5 V
V
DD
= 5 V
-80
-90
-90
-100
20
50 100 200 500 1k 2k
f - Frequency - Hz
Figure 21.
5k 10k 20k
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
V
IC
- Common Mode Input Voltage - V
Figure 22.
CLOSED LOOP GAIN/PHASE
OPEN LOOP GAIN/PHASE
vs
vs
FREQUENCY
FREQUENCY
40
30
20
10
100
180
150
180
150
120
90
V
R
= 5 V,
= 8 Ω
DD
Phase
90
80
70
60
L
120
90
60
60
0
Gain
50
40
30
20
10
Gain
30
-10
30
-20
-30
-40
0
0
−30
−60
−90
-30
-60
Phase
0
-50
-60
-70
-80
-90
−10
−120
−150
−180
V
R
A
V
= 5 V
= 8 Ω
= 1
-120
DD
−20
−30
−40
L
-150
-180
100
1 k
10 k
100 k
1 M
1
10
100
1 k 10 k 100 k 1 M 10 M
f - Frequency - Hz
f − Frequency − Hz
Figure 23.
Figure 24.
Copyright © 2011, Texas Instruments Incorporated
11
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SHUTDOWN VOLTAGE
5
10
1
V
DD
= 5 V
T
= 125°C
= 25°C
A
4.5
V
DD
= 5 V
4
V
DD
= 3.6 V
T
3.5
A
0.1
V
DD
= 2.5 V
3
2.5
2
T
= -40°C
A
0.01
0.001
1.5
1
0.0001
0.00001
0.5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1
0
2
3
4
5
V
DD
- Supply Voltage - V
Voltage on SHUTDOWN Terminal - V
Figure 25.
Figure 26.
START-UP TIME
vs
BYPASS CAPACITOR
300
250
200
150
100
50
0
0
0.2
0.4
0.6
0.8
1
C
- Bypass Capacitor - µF
(Bypass)
Figure 27.
12
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
APPLICATION INFORMATION
mid-supply voltage affects both positive and
negative channels equally, thus canceling at the
differential output. Removing the bypass capacitor
slightly worsens power supply rejection ratio
(kSVR), but a slight decrease of kSVR may be
acceptable when an additional component can be
eliminated (See Figure 17).
Better RF-immunity: GSM handsets save power
by turning on and shutting off the RF transmitter at
a rate of 217 Hz. The transmitted signal is
picked-up on input and output traces. The fully
differential amplifier cancels the signal much
better than the typical audio amplifier.
FULLY DIFFERENTIAL AMPLIFIER
The TPA6211A1-Q1 is a fully differential amplifier
with differential inputs and outputs. The fully
differential amplifier consists of a differential amplifier
and a common- mode amplifier. The differential
amplifier ensures that the amplifier outputs
a
•
differential voltage that is equal to the differential
input times the gain. The common-mode feedback
ensures that the common-mode voltage at the output
is biased around VDD/2 regardless of the common-
mode voltage at the input.
Advantages of Fully Differential Amplifiers
APPLICATION SCHEMATICS
•
Input coupling capacitors not required: A fully
differential amplifier with good CMRR, like the
TPA6211A1-Q1, allows the inputs to be biased at
voltage other than mid-supply. For example, if a
DAC has a lower mid-supply voltage than that of
the TPA6211A1-Q1, the common-mode feedback
circuit compensates, and the outputs are still
biased at the mid-supply point of the
Figure 28 through Figure 31 show application
schematics for differential and single-ended inputs.
Typical values are shown in Table 1.
Table 1. Typical Component Values
COMPONENT
VALUE
40 kΩ
RI
TPA6211A1-Q1.
The
inputs
of
the
-
(1)
C(BYPASS)
0.22 μF
1 μF
TPA6211A1-Q1 can be biased from 0.5 V to VDD
0.8 V. If the inputs are biased outside of that
range, input coupling capacitors are required.
CS
CI
0.22 μF
•
Mid-supply bypass capacitor, C(BYPASS), not
required: The fully differential amplifier does not
require a bypass capacitor. Any shift in the
(1) C(BYPASS) is optional.
5 V DC
Figure 28. Typical Differential Input Application Schematic
Copyright © 2011, Texas Instruments Incorporated
13
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
5 V DC
C
C
Figure 29. Differential Input Application Schematic Optimized With Input Capacitors
5 V DC
C
C
Figure 30. Single-Ended Input Application Schematic
14
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
C
F
C
F
5 V DC
C
C
C
C
Figure 31. Differential Input Application Schematic With Input Bandpass Filter
Input Capacitor (CI)
Selecting Components
The TPA6211A1-Q1 does not require input coupling
capacitors when driven by a differential input source
biased from 0.5 V to VDD - 0.8 V. Use 1% tolerance
or better gain-setting resistors if not using input
coupling capacitors.
Resistors (RI)
The input resistor (RI) can be selected to set the gain
of the amplifier according to equation 1.
Gain = R /R
F
I
(1)
In the single-ended input application, an input
capacitor, CI, is required to allow the amplifier to bias
the input signal to the proper dc level. In this case, CI
and RI form a high-pass filter with the corner
frequency defined in Equation 2.
The internal feedback resistors (RF) are trimmed to
40 kΩ.
Resistor matching is very important in fully differential
amplifiers. The balance of the output on the reference
voltage depends on matched ratios of the resistors.
CMRR, PSRR, and the cancellation of the second
harmonic distortion diminishes if resistor mismatch
occurs. Therefore, 1%-tolerance resistors or better
are recommended to optimize performance.
1
f
+
c
2pR C
I
I
(2)
-3 dB
Bypass Capacitor (CBYPASS) and Start-Up Time
The internal voltage divider at the BYPASS pin of this
device sets
a
mid-supply voltage for internal
references and sets the output common mode
voltage to VDD/2. Adding a capacitor filters any noise
into this pin, increasing kSVR
.
C(BYPASS)also
determines the rise time of VO+ and VO- when the
device exits shutdown. The larger the capacitor, the
slower the rise time.
f
c
The value of CI is an important consideration. It
directly affects the bass (low frequency) performance
of the circuit. Consider the example where RI is 10
kΩ and the specification calls for a flat bass response
down to 100 Hz. Equation 2 is reconfigured as
Equation 3.
Copyright © 2011, Texas Instruments Incorporated
15
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
1
Substituting 100 Hz for fc(HPF) and solving for CI:
C +
I
2pR f
c
(3)
CI = 0.16 μF
In this example, CI is 0.16 μF, so the likely choice
ranges from 0.22 μF to 0.47 μF. Ceramic capacitors
are preferred because they are the best choice in
preventing leakage current. When polarized
capacitors are used, the positive side of the capacitor
faces the amplifier input in most applications. The
input dc level is held at VDD/2, typically higher than
the source dc level. It is important to confirm the
capacitor polarity in the application.
At this point, a first-order band-pass filter has been
created with the low-frequency cutoff set to 100 Hz
and the high-frequency cutoff set to 10 kHz.
The process can be taken a step further by creating a
second-order high-pass filter. This is accomplished by
placing a resistor (Ra) and capacitor (Ca) in the input
path. It is important to note that Ra must be at least
10 times smaller than RI; otherwise its value has a
noticeable effect on the gain, as Ra and RI are in
series.
Band-Pass Filter (Ra, Ca, and Ca)
It may be desirable to have signal filtering beyond the
one-pole high-pass filter formed by the combination of
CI and RI. A low-pass filter may be added by placing
a capacitor (CF) between the inputs and outputs,
forming a band-pass filter.
Step 3: Additional Low-Pass Filter
Ra must be at least 10x smaller than RI,
Set Ra = 1 kΩ
1
f
+
c(LPF)
Therefore,
2p R
C
a
a
(10)
(11)
An example of when this technique might be used
would be in an application where the desirable
pass-band range is between 100 Hz and 10 kHz, with
a gain of 4 V/V. The following equations illustrate how
the proper values of CF and CI can be determined.
1
C
+
a
2p 1kΩ f
c(LPF)
Substituting 10 kHz for fc(LPF) and solving for Ca:
Ca = 160 pF
Step 1: Low-Pass Filter
1
f
+
c(LPF)
2pR C
F F
Figure 32 is a bode plot for the band-pass filter in the
previous example. Figure 31 shows how to configure
the TPA6211A1-Q1 as a band-pass filter.
where R is the internal 40 kW resistor
F
(4)
(5)
1
f
+
AV
c(LPF)
2p 40 kW C
F
12 dB
9 dB
Therefore,
1
C
+
F
2p 40 kW f
c(LPF)
(6)
−20 dB/dec
+20 dB/dec
−40 dB/dec
Substituting 10 kHz for fc(LPF) and solving for CF:
CF = 398 pF
f
= 100 Hz
f
= 10 kHz
c(LPF)
c(HPF)
f
Step 2: High-Pass Filter
Figure 32. Bode Plot
Decoupling Capacitor (CS)
1
f
+
c(HPF)
2pR C
I I
where R is the input resistor
I
The TPA6211A1-Q1 is a high-performance CMOS
audio amplifier that requires adequate power supply
decoupling to ensure the output total harmonic
distortion (THD) is as low as possible. Power-supply
decoupling also prevents oscillations for long lead
lengths between the amplifier and the speaker. For
higher frequency transients, spikes, or digital hash on
the line, a good low equivalent-series-resistance
(ESR) ceramic capacitor, typically 0.1 μF to 1 μF,
placed as close as possible to the device VDD lead
(7)
Since the application in this case requires a gain of
4 V/V, RI must be set to 10 kΩ.
Substituting RI into equation 6.
1
f
+
c(HPF)
Therefore,
2p 10 kW C
(8)
(9)
1
C
+
I
2p 10 kW f
c(HPF)
16
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
works best. For filtering lower frequency noise
signals, a 10-μF or greater capacitor placed near the
audio power amplifier also helps, but is not required
in most applications because of the high PSRR of this
device.
bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of 200
mW to 800 mW. This is a 6-dB improvement in sound
power—loudness that can be heard. In addition to
increased power, there are frequency-response
concerns.
Consider
the
single-supply
SE
configuration shown in Figure 34.
A
coupling
USING LOW-ESR CAPACITORS
capacitor (CC) is required to block the dc-offset
voltage from the load. This capacitor can be quite
large (approximately 33 μF to 1000 μF) so it tends to
be expensive, heavy, occupy valuable PCB area, and
Low-ESR capacitors are recommended throughout
this applications section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in
series with an ideal capacitor. The voltage drop
across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent
value of this resistance the more the real capacitor
behaves like an ideal capacitor.
have
the
additional
drawback
of
limiting
low-frequency performance. This frequency-limiting
effect is due to the high-pass filter network created
with the speaker impedance and the coupling
capacitance. This is calculated with Equation 13.
1
f
+
DIFFERENTIAL OUTPUT VERSUS
SINGLE-ENDED OUTPUT
c
2pR C
L C
(13)
Figure 33 shows a Class-AB audio power amplifier
For example, a 68-μF capacitor with an 8-Ω speaker
would attenuate low frequencies below 293 Hz. The
BTL configuration cancels the dc offsets, which
eliminates the need for the blocking capacitors.
Low-frequency performance is then limited only by
the input network and speaker response. Cost and
PCB space are also minimized by eliminating the
bulky coupling capacitor.
(APA) in
a fully differential configuration. The
TPA6211A1-Q1 amplifier has differential outputs
driving both ends of the load. One of several potential
benefits to this configuration is power to the load. The
differential drive to the speaker means that as one
side is slewing up, the other side is slewing down,
and vice versa. This in effect doubles the voltage
swing on the load as compared to
a
V
DD
ground-referenced load. Plugging 2 × VO(PP) into the
power equation, where voltage is squared, yields 4×
the output power from the same supply rail and load
impedance Equation 12.
V
O(PP)
C
C
V
V
O(PP)
R
L
O(PP)
Ǹ
2 2
V
+
(rms)
2
V
-3 dB
(rms)
Power +
R
(12)
V
DD
V
O(PP)
f
c
Figure 34. Single-Ended Output and Frequency
Response
2x V
O(PP)
R
L
V
DD
Increasing power to the load does carry a penalty of
increased internal power dissipation. The increased
dissipation is understandable considering that the
BTL configuration produces 4× the output power of
the SE configuration.
-V
O(PP)
Figure 33. Differential Output Configuration
In a typical wireless handset operating at 3.6 V,
Copyright © 2011, Texas Instruments Incorporated
17
TPA6211A1-Q1
SBOS555 –JUNE 2011
www.ti.com
FULLY DIFFERENTIAL AMPLIFIER
EFFICIENCY AND THERMAL INFORMATION
V
O
Class-AB amplifiers are inefficient, primarily because
of voltage drop across the output-stage transistors.
The two components of this internal voltage drop are
the headroom or dc voltage drop that varies inversely
to output power, and the sinewave nature of the
output. The total voltage drop can be calculated by
subtracting the RMS value of the output voltage from
VDD. The internal voltage drop multiplied by the
average value of the supply current, IDD(avg),
determines the internal power dissipation of the
amplifier.
V
(LRMS)
I
DD
I
DD(avg)
Figure 35. Voltage and Current Waveforms for
BTL Amplifiers
An easy-to-use equation to calculate efficiency starts
out as being equal to the ratio of power from the
power supply to the power delivered to the load. To
accurately calculate the RMS and average values of
power in the load and in the amplifier, the current and
voltage waveform shapes must first be understood
(see Figure 35).
Although the voltages and currents for SE and BTL
are sinusoidal in the load, currents from the supply
are different between SE and BTL configurations. In
an SE application the current waveform is
a
half-wave rectified shape, whereas in BTL it is a
full-wave rectified waveform. This means RMS
conversion factors are different. Keep in mind that for
most of the waveform both the push and pull
transistors are not on at the same time, which
supports the fact that each amplifier in the BTL
device only draws current from the supply for half the
waveform. The following equations are the basis for
calculating amplifier efficiency.
P
L
Efficiency of a BTL amplifier +
P
SUP
Where:
2
2
V rms
L
V
V
P
2R
P
P
+
, andV
+
, therefore, P
+
L
LRMS
L
Ǹ
R
2
L
L
p
2V
V
p
V
P
1
p
P
1
p
P
+
+ *
sin(t) dt
[cos(t)]
0
ŕ
P
+ V
I
avg
and
I
avg +
and
p R
SUP
DD DD
DD
R
R
L
L
0
L
Therefore,
2 V
V
DD
P
P
+
SUP
p R
L
substituting PL and PSUP into equation 6,
2
V
P
PL = Power delivered to load
2 R
p V
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the power supply
VDD = Power supply voltage
L
P
Efficiency of a BTL amplifier +
+
4 V
2 V
V
DD
DD
P
p R
L
Where:
V
+ Ǹ2 P R
L
ηBTL = Efficiency of a BTL amplifier
P
L
(14)
18
Copyright © 2011, Texas Instruments Incorporated
TPA6211A1-Q1
www.ti.com
SBOS555 –JUNE 2011
Therefore,
p Ǹ2 P R
L
L
h
+
BTL
4 V
DD
(15)
Table 2. Efficiency and Maximum Ambient Temperature vs Output Power
Output Power
(W)
Efficiency
(%)
Internal Dissipation
(W)
Power From Supply
(W)
Max Ambient Temperature
(°C)
5-V, 3-Ω Systems
0.5
1
27.2
38.4
60.2
67.7
1.34
1.60
1.62
1.48
1.84
2.60
4.07
4.58
76
75
82
2.45
3.1
5-V, 4-Ω BTL Systems
0.5
1
31.4
44.4
62.8
74.3
1.09
1.25
1.18
0.97
1.59
2.25
3.18
3.77
2
2.8
5-V, 8-Ω Systems
0.5
1
44.4
62.8
73.3
81.9
0.625
0.592
0.496
0.375
1.13
1.60
1.86
2.08
1.36
1.7
Table 2 employs Equation 15 to calculate efficiencies
for four different output power levels. Note that the
efficiency of the amplifier is quite low for lower power
levels and rises sharply as power to the load is
increased resulting in a nearly flat internal power
dissipation over the normal operating range. Note that
the internal dissipation at full output power is less
than in the half power range. Calculating the
efficiency for a specific system is the key to proper
power supply design. For a 2.8-W audio system with
4-Ω loads and a 5-V supply, the maximum draw on
the power supply is almost 3.8 W.
The maximum ambient temperature depends on the
heat sinking ability of the PCB system. The derating
factor for the 3 mm ×3 mm DRB package is shown in
the dissipation rating table. Converting this to θJA:
1
1
θ
+
+
+ 45.9°CńW
JA
0.0218
Derating Factor
(17)
Given θJA, the maximum allowable junction
temperature, and the maximum internal dissipation,
the maximum ambient temperature can be calculated
with Equation 18. The maximum recommended
junction temperature for the TPA6211A1-Q1 is
150°C.
A final point to remember about Class-AB amplifiers
is how to manipulate the terms in the efficiency
equation to the utmost advantage when possible.
Note that in Equation 15, VDD is in the denominator.
This indicates that as VDD goes down, efficiency goes
up.
T
Max + T Max * θ
P
A
J
JA Dmax
(
)
+ 150 * 45.9 1.27 + 91.7°C
(18)
Equation 18 shows that the maximum ambient
temperature is 91.7°C (package limited to 85°C
ambient) at maximum power dissipation with a 5-V
supply.
A simple formula for calculating the maximum power
dissipated, PDmax, may be used for a differential
output application:
Table 2 shows that for most applications no airflow is
required to keep junction temperatures in the
specified range. The TPA6211A1-Q1 is designed with
thermal protection that turns the device off when the
junction temperature surpasses 150°C to prevent
damage to the IC. In addition, using speakers with an
impedance higher than 4-Ω dramatically increases
the thermal performance by reducing the output
current.
2
2V
DD
P
+
Dmax
2
p R
L
(16)
PDmax for a 5-V, 4-Ω system is 1.27 W.
Copyright © 2011, Texas Instruments Incorporated
19
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jul-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPA6211A1TDGNRQ1
ACTIVE
MSOP-
PowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPA6211A1-Q1 :
Catalog: TPA6211A1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jun-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPA6211A1TDGNRQ1
MSOP-
Power
PAD
DGN
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jun-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
DGN
SPQ
Length (mm) Width (mm) Height (mm)
358.0 335.0 35.0
TPA6211A1TDGNRQ1 MSOP-PowerPAD
8
2500
Pack Materials-Page 2
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