TPIC2701_12 [TI]

7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY;
TPIC2701_12
型号: TPIC2701_12
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY

文件: 总15页 (文件大小:246K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
TPIC2701  
N PACKAGE  
(TOP VIEW)  
Seven 0.5-A Independent Output Channels  
Integrated Clamp Diode With Each Output  
Low r . . . 0.5 Typical  
DS(on)  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
DRAIN1  
DRAIN2  
DRAIN3  
DRAIN4  
DRAIN5  
DRAIN6  
DRAIN7  
CLAMP  
GATE1  
GATE2  
GATE3  
GATE4  
GATE5  
GATE6  
GATE7  
SOURCE  
Output Voltage . . . 60 V  
Pulsed Current . . . 3 A Per Channel  
Avalanche Energy . . . 22 mJ  
description  
The TPIC2701 is a monolithic power DMOS  
transistor array that consists of seven indepen-  
dent N-channel enhancement-mode DMOS  
transistors connected in a common-source  
configuration with open drains. The TPIC2701 is  
pin-for-pin functionally compatible with the Texas  
Instruments ULN2001A through ULN2004A.  
TPIC2701M  
J PACKAGE  
(TOP VIEW)  
The TPIC2701 is characterized for operation over  
a temperature range of 0°C to 125°C.The  
TPIC2701M is characterized for operation over  
the full military temperature range of 55°C to  
125°C.  
GATE1  
GATE2  
GATE3  
NC  
DRAIN1  
DRAIN2  
DRAIN3  
NC  
1
24  
23  
22  
21  
20  
2
3
4
NC  
NC  
5
GATE4  
GATE5  
NC  
6
19 DRAIN4  
logic diagram  
7
18  
17  
16  
15  
14  
13  
DRAIN5  
NC  
9
8
CLAMP  
DRAIN1  
9
GATE6  
GATE7  
SOURCE  
SOURCE  
DRAIN6  
DRAIN7  
CLAMP  
SOURCE  
1
16  
GATE1  
10  
11  
12  
2
3
15  
14  
GATE2  
GATE3  
DRAIN2  
DRAIN3  
NC – No internal connection  
Refer to the mechanical data for the JW package.  
4
13  
GATE4  
DRAIN4  
5
6
12  
11  
GATE5  
GATE6  
DRAIN5  
DRAIN6  
7
10  
GATE7  
DRAIN7  
8
SOURCE  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
absolute maximum ratings over operating case temperature range (unless otherwise noted)  
Drain-source voltage, V  
Gate-source voltage, V  
Clamp-drain voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V  
DS  
GS  
CD  
Continuous source-drain diode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A  
Pulsed drain current, each output, I (see Note 1 and Figure 17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A  
D
Pulsed clamp current, I (see Note 1 and Figure 18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A  
CL  
Continuous drain current, each output, all outputs on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A  
Single-pulse avalanche energy, E (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 mJ  
AS  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Operating virtual junction temperature range, T :TPIC2701 . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 150°C  
J
TPIC2701M . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 150°C  
Operating case temperature range, T TPIC2701 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 125°C  
C:  
TPIC2701M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C  
Storage temperature range, T  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N Package . . . . . . . . . . . . . . . . . . . . . 260°C  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J Package . . . . . . . . . . . . . . . . . . . . . 300°C  
NOTE 1: Pulse duration = 10 ms, duty cycle = 6%.  
DISSIPATION RATING TABLE  
T
25°C  
DERATING FACTOR  
T
= 70°C  
T
= 85°C  
T = 125°C  
A
A
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING POWER RATING POWER RATING  
A
J
2660 mW  
21.3 mW/°C  
11.0 mW/°C  
1701 mW  
905 mW  
1382 mW  
740 mW  
530 mW  
300 mW  
N
1400 mW  
electrical characteristics, T = 25°C (unless otherwise noted)  
C
TPIC2701  
TYP  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
60  
MAX  
V
V
Drain-source breakdown voltage  
Gate-source threshold voltage  
I
I
I
= 1 µA,  
= 1 mA,  
= 0.5 A,  
V
V
V
= 0  
= V  
V
V
(BR)DS  
D
D
D
GS  
DS  
GS  
1.2  
1.75  
0.25  
2.4  
0.4  
TGS  
GS  
= 15 V,  
V
Drain-source on-state voltage  
Zero-gate-voltage drain current  
V
DS(on)  
See Notes 2 and 3  
T
T
= 25°C  
0.05  
0.5  
1
C
I
V
V
= 48 V,  
= 20 V,  
V
= 0  
µA  
DSS  
DS  
GS  
= 125°C  
10  
C
Forward gate current, drain short circuited to  
source  
I
I
V
= 0  
= 0  
10  
10  
100  
100  
nA  
nA  
GSSF  
GS  
DS  
DS  
Reverse gate current, drain short circuited to  
source  
V
V
= 20 V, V  
GSSR  
GS  
= 15 V,  
See Notes 2 and 3 and  
Figures 5 and 6  
I = 0.5 A,  
D
T
T
= 25°C  
0.5  
0.8  
0.8  
1.3  
GS  
C
r
Forward drain-source on-state resistance  
DS(on)  
= 125°C  
C
V
= 15 V,  
I = 0.5 A,  
D
DS  
See Notes 2 and 3  
g
Forward transconductance  
0.5  
0.8  
S
fs  
C
C
Short-circuit input capacitance, common source  
Short-circuit output capacitance, common source  
105  
65  
iss  
oss  
V
DS  
= 25 V,  
V
GS  
= 0,  
f = 300 kHz  
pF  
Short-circuit reverse transfer capacitance,  
common source  
C
15  
rss  
NOTES: 2. Technique should limit T – T to 10°C maximum.  
J
C
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts with a single output  
transistor conducting.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
electrical characteristics over case temperature operating range (unless otherwise noted)  
(see Note 4)  
TPIC2701M  
PARAMETER  
TEST CONDITIONS  
T
C
UNIT  
MIN  
TYP  
MAX  
I
I
I
= 1 µA,  
= 1 mA,  
= 1 mA,  
V
V
V
= 0  
= 0  
= V  
25°C  
Full range  
Full range  
25°C  
D
D
D
GS  
GS  
DS  
V
V
V
Drain-to-source breakdown voltage  
Gate-to-source input threshold voltage  
Drain-to-source on-state voltage  
60  
V
V
V
(BR)DS  
1.2  
1.75  
0.25  
2.4  
0.45  
0.65  
1
TGS  
GS  
I
D
= 0.5 A,  
V
GS  
V
GS  
V
DS  
DS  
= 15 V  
= 0  
DS(on)  
Full range  
25°C  
0.05  
10  
I
I
I
Zero-gate-voltage drain current  
V
V
V
= 48 V,  
= 20 V,  
µA  
DSS  
DS  
GS  
GS  
Full range  
25°C  
10  
100  
10  
nA  
µA  
nA  
µA  
Forward gate current, drain short-circuited to  
source  
= 0  
GSSF  
GSSR  
Full range  
25°C  
10  
100  
10  
Reverse gate current, drain short-circuited to  
source  
= 20 V, V  
= 0  
Full range  
25°C  
0.5  
0.9  
1.3  
r
Forward drain-source on-state resistance  
V
V
= 15 V,  
= 15 V,  
I
I
= 0.5 A  
DS(on)  
GS  
D
Full range  
25°C  
g
Forward transconductance  
= 0.5 A  
0.8  
105  
65  
S
fs  
DS  
D
C
C
Short-circuit input capacitance, common source  
Short-circuit output capacitance, common source  
iss  
V
= 25 V,  
V
= 0,  
GS  
oss  
DS  
Full range  
pF  
f = 300 kHz  
Short-circuit reverse transfer capacitance,  
common source  
C
15  
rss  
Full range is 55°C to 125°C.  
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal  
effects must be taken into account separately.  
source-drain diode characteristics, T = 25°C  
C
TPIC2701  
TYP  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
MAX  
V
t
Forward On voltage  
I
I
= 0.5 A,  
= 0.5 A,  
V
V
= 0  
0.9  
1.4  
V
SD  
S
GS  
Reverse-recovery time  
Total source-drain diode charge  
165  
ns  
nC  
= 0,  
V
= 48 V,  
rr(SD)  
S
GS  
DS  
See Figure 1  
di/dt = 25 A/µs,  
Q
250  
RR  
source-to-drain diode characteristics over operating case temperature range (unless otherwise  
noted) (see Note 4)  
TPIC2701M  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
0.9  
MAX  
V
t
Forward On voltage  
I
I
= 0.5 A,  
= 0.5 A,  
V
V
= 0  
1.4  
V
SD  
S
GS  
Reverse recovery time  
165  
250  
ns  
nC  
= 0,  
V
DS  
= 48 V,  
rr  
S
GS  
di/dt = 25 A/µs,  
T = 25°C, See Figure 1  
C
Q
Total source-to-drain diode charge  
RR  
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal  
effects must be taken into account separately.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
clamp diode characteristics, T = 25°C  
C
TPIC2701  
PARAMETER  
TEST CONDITIONS  
= 0.5 A  
UNIT  
MIN  
TYP  
MAX  
V
V
Forward on-voltage  
I
I
1
1.5  
V
V
F
F
Breakdown voltage  
= 1 µA  
60  
BR  
R
I
t
Reverse leakage current  
Reverse-recovery time  
Total source-drain diode charge  
V
= 48 V  
R
0.05  
90  
1
µA  
ns  
nC  
R
I
V
= 0.1 A,  
= 48 V, See Figure 1  
di/dt = 25 A/µs,  
rr(CD)  
F
CD  
Q
100  
RR  
clamp diode characteristics over operating case temperature range (unless otherwise noted)  
(see Note 4)  
TPIC2701M  
PARAMETER  
Forward voltage  
TEST CONDITIONS  
UNIT  
V
MIN  
TYP  
MAX  
V
V
I
I
I
= 0.5 A  
= 1 µA,  
= 1 mA  
1
1.5  
F
F
T
T
= 25°C  
= 25°C  
R
R
C
Breakdown voltage  
60  
V
(BR)  
0.05  
1
C
I
t
Reverse leakage current  
V
= 48 V  
R
µA  
R
10  
Reverse recovery time, source-to-drain  
Total source-to-drain diode charge  
90  
ns  
I
V
= 0.1 A,  
di/dt = 25 A/µs,  
T = 25°C  
C
rr(SD)  
F
= 48 V, See Figure 1  
CD  
Q
100  
nC  
RR  
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal  
effects must be taken into account separately.  
resistive-load switching characteristics, T = 25°C  
C
TPIC2701  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
10  
MAX  
t
t
t
t
Turn-on delay time  
d(on)  
Turn-off delay time  
Rise time  
30  
d(off)  
V
t
= 25 V,  
R
= 100 ,  
t
en  
= 10 ns,  
DD  
= 10 ns,  
L
ns  
See Figure 2  
15  
dis  
r
f
Fall time  
5
Q
Q
Q
Total gate charge  
Gate-source charge  
Gate-drain charge  
2.8  
1.6  
1.2  
3.6  
2
g
V
= 48 V,  
I
D
= 0.25 A,  
V
GS  
= 10 V,  
DS  
See Figure 3  
nC  
gs  
gd  
1.6  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
resistive-load switching characteristics over operating case temperature range (unless otherwise  
noted) (see Note 4)  
TPIC2701M  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
10  
MAX  
t
t
t
t
Turn-on delay time  
d(on)  
Turn-off delay time  
Rise time  
30  
d(off)  
V
t
= 25 V,  
R
= 100 ,  
t
en  
= 10 ns,  
DD  
= 10 ns,  
L
ns  
See Figure 2  
15  
dis  
r
f
Fall time  
5
Q
Q
Q
Total gate charge  
Gate-to-source charge  
2.8  
1.6  
g
V
= 48 V,  
I
D
= 0.25 A,  
V
GS  
= 10 V,  
DS  
See Figure 3  
nC  
gs  
gd  
Gate-to-drain charge  
1.2  
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal  
effects must be taken into account separately.  
thermal resistance  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
90  
UNIT  
N package with all outputs at equal power  
J package with all outputs at equal power  
R
Junction-to-ambient thermal resistance  
°C/W  
θJA  
66  
PARAMETER MEASUREMENT INFORMATION  
0.5 A  
I /I  
F S  
Q
= Shaded Area  
RR  
di/dt = 25 A/µs  
0
25% of I  
RM  
I
RM  
(see Note A)  
t
rr  
NOTE A: I  
RM  
= maximum recovery current  
Figure 1. Reverse-Recovery-Current Waveforms of Source-Drain and Clamp Diodes  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
PARAMETER MEASUREMENT INFORMATION  
25 V  
t
en  
t
dis  
90%  
10%  
R
L
15 V  
90%  
V
V
DS  
GS  
Pulse Generator  
0
t
V
GS  
DUT  
R
50 Ω  
d(off)  
gen  
t
d(on)  
V
DD  
90%  
50 Ω  
V
DS  
10%  
V
DS(on)  
t
f
t
r
VOLTAGE WAVEFORM  
TEST CIRCUIT  
Figure 2. Resistive Switching  
Current  
Regulator  
Q
g
Same Type  
as DUT  
10 V  
12-V  
Battery  
0.2 µF  
50 kΩ  
Q
gd  
0.3 µF  
V
GS  
V
DD  
= 48 V  
Gate Voltage  
Time  
DUT  
I
G
= 100 µA  
0
Q
= Q – Q  
g gd  
gs  
I
Current-  
I Current-  
D
Sampling Resistor  
G
WAVEFORM  
Sampling Resistor  
TEST CIRCUIT  
Figure 3. Gate Charge Test Circuit and Waveform  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
PARAMETER MEASUREMENT INFORMATION  
25 V  
t
av  
t
w
4 mH  
15 V  
0
V
GS  
V
DS  
Pulse Generator  
(see Note A)  
I
D
I
AS  
V
GS  
(see Note B)  
I
D
DUT  
0
R
50 Ω  
gen  
V
= 60 V Min  
(BR)DSX  
50 Ω  
V
DS  
0
VOLTAGE AND CURRENT WAVEFORMS  
TEST CIRCUIT  
NOTES: A. The pulse generator has the following characteristics: t 10 ns, t 10 ns, Z = 50 .  
r
f
O
B. Input pulse duration (t ) is increased until peak current I  
= 2.5 A.  
w
AS  
I
V
t
av  
AS  
(BR)DSX  
2
Energy test level is defined as E  
22 mJ min.  
AS  
Figure 4. Single-Pulse Avalanche Energy Test Circuit and Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
TYPICAL CHARACTERISTICS  
STATIC DRAIN-SOURCE ON-STATE RESISTANCE  
STATIC DRAIN-SOURCE ON-STATE RESISTANCE  
vs  
vs  
FREE-AIR TEMPERATURE  
DRAIN CURRENT  
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
I
D
= 0.5 A  
T = 25°C  
A
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
V
GS  
= 10 V  
V
GS  
= 6 V  
V
= 15 V  
= 20 V  
GS  
V
GS  
= 15 V  
V
GS  
0.2  
0.1  
0
0
0.5  
1
1.5  
2
2.5  
– 50 – 25  
0
25  
50  
75  
100 125  
I
D
– Drain Current – A  
T
A
– Free-Air Temperature – °C  
Figure 5  
Figure 6  
DRAIN-TO-SOURCE CURRENT  
vs  
DISTRIBUTION OF  
FORWARD TRANSCONDUCTANCE  
DRAIN-TO-SOURCE VOLTAGE  
15  
10  
5
5
T
= 25°C  
= 0.5 A  
A
T
= 25°C  
A
4.5  
I
V
D
= 15 V  
DS  
4
3.5  
3
V
V
= 5 V  
GS  
= 4.5 V  
GS  
2.5  
2
V
GS  
= 4 V  
1.5  
V
V
= 3.5 V  
= 3 V  
GS  
1
0.5  
0
GS  
V
= 2.5 V  
GS  
0
0.76  
0.775  
0.79  
0.805  
0.82  
0
2
4
6
8
10 12 14 16 18 20  
g
fs  
– Forward Transconductance – S  
V
DS  
– Drain-to-Source Voltage – V  
Figure 7  
Figure 8  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
TYPICAL CHARACTERISTICS  
GATE-SOURCE VOLTAGE  
GATE-SOURCE THRESHOLD VOLTAGE  
vs  
vs  
GATE CHARGE  
FREE-AIR TEMPERATURE  
2.5  
20  
18  
16  
14  
12  
10  
8
I
T
= 0.25 A  
= 25°C  
D
A
I
= 10 mA  
D
2
I
D
= 1 mA  
1.5  
V
V
= 20 V  
DS  
1
0.5  
0
6
V
DS  
= 30 V  
4
2
0
= 48 V  
DS  
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7  
Q – Gate Charge – nC  
3
– 50 – 25  
0
25  
50  
75  
100 125  
T
A
– Free-Air Temperature – °C  
Figure 9  
Figure 10  
SOURCE-TO-DRAIN DIODE CURRENT  
vs  
SOURCE-TO-DRAIN DIODE CURRENT  
vs  
SOURCE-TO-DRAIN DIODE VOLTAGE  
SOURCE-TO-DRAIN DIODE VOLTAGE  
1
3
T
A
= 25°C  
0.7  
2.5  
T
A
= 125°C  
0.4  
0.2  
2
T
A
= 25°C  
1.5  
0.1  
0.07  
1
0.5  
0
0.04  
0.02  
0.01  
0
0.2 0.4 0.6 0.8  
1
1.2 1.4 1.6 1.8  
2
0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9  
V
SD  
– Source-to-Drain Diode Voltage – V  
V
SD  
– Source-to-Drain Diode Voltage – V  
Figure 11  
Figure 12  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
TYPICAL CHARACTERISTICS  
CLAMP-DIODE CURRENT  
vs  
CLAMP-DIODE REVERSE RECOVERY TIME  
vs  
CLAMP-DIODE VOLTAGE  
REVERSE di/dt  
3
140  
130  
120  
110  
100  
90  
I
V
T
= 0.1 A  
F
T
A
= 25°C  
= 48 V  
= 25°C  
R
2.5  
A
2
1.5  
80  
70  
1
0.5  
0
60  
50  
40  
30  
0
0.2 0.4 0.6 0.8  
1
1.2 1.4 1.6 1.8  
2
10  
20  
30  
40 50 60 70 80 100  
Clamp-Diode Voltage – V  
Reverse di/dt – As  
Figure 13  
Figure 14  
REVERSE di/dt  
vs  
FORWARD CURRENT  
1000  
T
A
= 25°C  
600  
400  
200  
V
CD  
= 20 V  
100  
60  
40  
V
CD  
= 40 V  
20  
10  
6
4
2
1
0.01  
0.1  
1
10  
I
F
– Forward Current – A  
NOTE A: V  
CD  
= V  
– V  
clamp drain  
Figure 15  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
TYPICAL CHARACTERISTICS  
40  
35  
16  
R
= 2.5 Ω  
= 10 µA  
= 25°C  
L
I
T
G
14  
12  
10  
8
A
V
= 37.5 V  
DS  
30  
25  
20  
Gate-Source  
Voltage  
V
= 25 V  
DS  
V
DS  
= 37.5 V  
15  
10  
6
4
V
= 25 V  
DS  
V
= 12.5 V  
DS  
2
5
Drain-Source Voltage  
0
0
100  
200  
300  
400  
500  
600  
700  
800  
900  
t – Time – µs  
Figure 16. Resistive Switching Waveforms  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
THERMAL INFORMATION  
MAXIMUM DRAIN CURRENT  
MAXIMUM CLAMP-DIODE CURRENT  
vs  
vs  
DUTY CYCLE  
DUTY CYCLE  
3
2.8  
2.6  
2.4  
2.2  
2
3
2.8  
2.6  
2.4  
2.2  
2
N = 1  
T
= 25°C  
T = 25°C  
A
A
N = Number of Outputs  
Conducting Simultaneously  
See Note A  
N = Number of Outputs  
Conducting Simultaneously  
See Note A  
N = 2  
N = 3  
N = 1  
1.8  
1.6  
1.4  
1.2  
1
1.8  
1.6  
1.4  
1.2  
1
N = 2  
N = 4  
N = 5  
N = 3  
N = 4  
N = 7  
0.8  
0.6  
0.4  
0.2  
N = 5  
0.8  
0.6  
0.4  
N = 7  
0
10 20 30 40 50 60 70 80 90 100  
Duty Cycle – %  
0
10 20 30 40 50 60 70 80 90 100  
Duty Cycle – %  
Figure 17  
Figure 18  
t
c
t
w
NOTE A: For Figures 17 and 18, d = t /t = 10 ms / t , where t and t are defined by the following:  
w c  
c
w
c
PEAK AVALANCHE CURRENT  
vs  
MAXIMUM DRAIN CURRENT  
vs  
TIME DURATION OF AVALANCHE  
DRAIN-SOURCE VOLTAGE  
10  
6
5
4
4
1 ms  
r
Limit  
DS(on)  
2
T
A
= 25°C  
1
0.6  
0.4  
3
2
Thermal Limit  
0.2  
0.1  
0.06  
0.04  
DC  
T
A
= 125°C  
0.02  
0.01  
T
= 25°C  
A
1
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
V
DS  
– Drain-To-Source Voltage – V  
t
av  
– Time Duration of Avalanche – ms  
Figure 19  
Figure 20  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
MECHANICAL INFORMATION  
CERAMIC DUAL-IN-LINE PACKAGE  
JW (R-GDIP-T24)  
1.290 (32,80)  
1.235 (31,30)  
13  
24  
0.560 (14,20)  
0.515 (13,10)  
1
12  
0.070 (1,78) MAX  
0.100 (2,54)  
0.060 (1,52)  
0.070 (1,78)  
0.020 (0,51)  
0.225 (5,70)  
0.150 (3,80)  
0.610 (15,50)  
0.590 (14,99)  
Seating Plane  
0.020 (0,51)  
0.016 (0,41)  
0.160 (4,06)  
0.125 (3,17)  
0.100 (2,54)  
0°15°  
0.012 (0,30)  
0.008 (0,20)  
4040111/B 04/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a ceramic lid using glass frit.  
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only  
E. Falls within MIL-STD-1835 GDIP5-T24  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPIC2701  
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY  
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996  
MECHANICAL INFORMATION  
N (R-PDIP-T**)  
PLASTIC DUAL-IN-LINE PACKAGE  
16 PIN SHOWN  
PINS **  
DIM  
14  
16  
18  
20  
0.775  
(19,69)  
0.775  
(19,69)  
0.920  
(23.37)  
0.975  
(24,77)  
A MAX  
A MIN  
A
16  
9
0.745  
(18,92)  
0.745  
(18,92)  
0.850  
(21.59)  
0.940  
(23,88)  
0.260 (6,60)  
0.240 (6,10)  
1
8
0.070 (1,78) MAX  
0.020 (0,51) MIN  
0.310 (7,87)  
0.290 (7,37)  
0.035 (0,89) MAX  
0.200 (5,08) MAX  
Seating Plane  
0.125 (3,18) MIN  
0.100 (2,54)  
0°15°  
0.021 (0,53)  
0.015 (0,38)  
0.010 (0,25)  
M
0.010 (0,25) NOM  
14/18 PIN ONLY  
4040049/C 08/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)  
14  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

相关型号:

TPIC2801

OCTAL INTELLIGENT-POWER SWITCH WITH SERIAL INPUT
TI

TPIC2801AKV

1.4A SIPO BASED PRPHL DRVR, PZFM15
TI

TPIC2801KV

OCTAL INTELLIGENT-POWER SWITCH WITH SERIAL INPUT
TI

TPIC2801KV-00

1A 8 CHANNEL, SIPO BASED PRPHL DRVR, PZFM15
TI

TPIC2802

OCTAL INTELLIGENT-POWER SWITCH WITH SERIAL INPUT
TI

TPIC2802KV

Octal Peripheral Driver
ETC

TPIC2810

8-BIT LED DRIVER WITH I2C INTERFACE
TI

TPIC2810D

暂无描述
TI

TPIC2810DG4

配备 I2C 接口的 8 位 LED 驱动器 | D | 16
TI

TPIC2810DR

暂无描述
TI

TPIC2810DRG4

配备 I2C 接口的 8 位 LED 驱动器 | D | 16
TI

TPIC3302

3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
TI