TPIC2810DG4 [TI]
配备 I2C 接口的 8 位 LED 驱动器 | D | 16;
| 型号： | TPIC2810DG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 配备 I2C 接口的 8 位 LED 驱动器 | D | 16 驱动 驱动器 |
| 文件： | 总18页 (文件大小：258K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
D PACKAGE
(TOP VIEW)
D
D
D
D
D
Low r
. . . 5 Ω Typical
DS(on)
Eight Power DMOS Transistor Outputs of
100-mA Continuous Current
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
GND
SCL
CC
210-mA Current Limit Capability
Drain Output ESD Protection . . . 3000 V
Output Clamp Voltage . . . 40 V
SDA
DRAIN0
DRAIN1
DRAIN2
DRAIN3
A2
DRAIN7
DRAIN6
DRAIN5
DRAIN4
A1
description
G
A0
The TPIC2810 device is a monolithic, medium-
voltage, low-current, 8-bit shift register design to
drive low-side switched resistive loads such as
LEDs. The device is not recommended for
switching inductive loads.
This device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data
2
transfers through the shift register via an I C bus interface. Data is transferred into the data shift register only
2
after the group ID and device address have been verified. The subaddress directs the I C bus interface to read
or write data to the device or transfer data to the output. When output enable (G) is held high, all drain outputs
are off. When G is held low, data from the output storage register is transparent to the output buffers. When data
in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs
have sink-current capability.
The TPIC2810 device has an internal power-up clear to initialize all registers to an off state when power is
applied to the device. It also has a thermal sensor to monitor the die temperature and shut the drain outputs
off, if an over current condition occurs.
Outputs are low-side, open-drain DMOS transistors with output ratings of 40 V and 100 mA continuous
sink-current capability. Each output provides a 210-mA maximum current limit at T = 25°C. The current limit
C
decreases as the junction temperature increases for additional device protection. The device also provides up
to 3000 V of ESD protection on output terminals and 2000 V of ESD protection on input terminals when tested
using the human-body model.
The TPIC2810 device is characterized for operation over the operating case temperature range of –40°C to
125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPIC2810
2
8-BIT LED DRIVER WITH I C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
functional block diagram
G
GND
V
CC
DISABLE
DRAIN0
Data Shift
Register
A0
A1
D0
D1
D2
D3
D4
D5
D6
D7
Serial Data In
Serial Data Out
Serial Clock
11H
Data In
DRAIN1
DRAIN2
DRAIN3
Data Out
Clock
A2
SCL
SDA
CLR
CLEAR
DRAIN4
DRAIN5
44H
22H
Power-Up
Clear
CLEAR
CLR
DRAIN6
DRAIN7
CLEAR
Thermal
Shutdown
DISABLE
CLR
CLEAR
2
See the TPIC2810 subaddress and I C protocol definition section of this data sheet for definition of the 11H,
22H, and 44H control signals.
2
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
Terminal Functions
TERMINAL
NAME NO.
A0
I/O
DESCRIPTION
9
10
7
I
I
I
Address input 0
Address input 1
Address input 2
A1
A2
DRAIN0
DRAIN1
DRAIN2
DRAIN3
DRAIN4
DRAIN5
DRAIN6
DRAIN7
G
3
4
5
6
O
FET drain outputs. The DRAIN terminals are low-side switches for resistive loads.
11
12
13
14
8
I
O
I
Output enable. Active low input enables output FETs when low and disables output FETs when high.
GND
16
15
2
Ground
SCL
Serial clock
SDA
I/O Open drain, bidirectional serial data terminal
Supply voltage input
V
CC
1
I
schematic of inputs and outputs
Equivalent of Each Input
Typical of All Drain Outputs
V
CC
Drain
42 V
Input
GND
7 V
6.5 V
GND
RC Filter is Not Present On A0, A1, and A2 Inputs
3
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
absolute maximum ratings over the recommended operating case temperature range (unless
otherwise noted)†
Logic supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Logic input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
I
Power DMOS drain-to-source voltage, V
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V
DS
Continuous source-to-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 mA
Pulsed source-to-drain diode anode current (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420 mA
Pulsed drain current, each output, all outputs on, I , T = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . 210 mA
D
C
Peak drain current, single output, I , T = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 mA
DM
C
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 150°C
J
Operating case temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. Each power DMOS source is internally connected to GND.
3. Pulse duration ≤ 100 µs and duty cycle ≤ 2%.
DISSIPATION RATING TABLE
= 25°C DERATING FACTOR
T
C
T = 125°C
C
POWER RATING
PACKAGE
POWER RATING
ABOVE T = 25°C
C
D
1087 mW
8.7 mW/°C
217 mW
recommended operating conditions
MIN
MAX
UNIT
V
Logic supply voltage, V
CC
3.0
5.5
High-level input voltage, V
IH
0.7V
CC
V
Low-level input voltage, V
0.3V
CC
V
IL
Pulse drain output current, T = 25°C, V
= 5 V, all outputs on (see Notes 3 and 4 and Figure 8)
CC
210
125
mA
°C
C
Operating case temperature, T
–40
C
NOTES: 3. Pulse duration ≤ 100 µs and duty cycle ≤ 2%.
4. Technique must limit T – T to 10°C maximum.
J
C
4
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
electrical characteristics, V
= 5 V, T = 25°C (unless otherwise noted)
CC
C
PARAMETER
TEST CONDITIONS
MIN
3
TYP
MAX
UNIT
V
V
V
Logic supply voltage
5.5
CC
Drain-to-source breakdown voltage
I
I
= 1 mA
40
V
(BR)DSX
D
Source-to-drain diode forward
voltage
V
V
= 100 mA
0.85
1.2
V
SD
F
Power-up clear voltage
High-level input current
Low-level input current
Digital input hysteresis
V
V
V
rising no load,
See Note 5
V = V
2.84
1
V
µA
µA
V
PUC
CC
I
I
= 5.5 V,
= 5.5 V,
IH
CC
CC
I
CC
V = 0
I
–1
IL
V
HYS
1.1
0.62
0.7
All outputs off
All outputs on
1
1
I
Logic supply current
V
= 5.5 V
mA
mA
CC
CC
f
= 100 kHz,
C = 30 pF,
L
See Figure 3
SCL
I
Logic supply current at frequency
0.74
13
1
CC(FRQ)
All outputs off,
I
I
Low level output current; SDA
Leakage current; SDA
V
= 0.4 V
mA
OL
OL
V = V
I
–1
1
µA
L
CC
= 0.5 V,
I
N
= I ,
D
V
T
DS(on)
= 85°C,
I
N
Nominal current
75
mA
See Notes 4, 6, 7
C
V
= 30 V
0.3
0.3
0.6
0.6
DS
DS
I
Off-state drain current
V
CC
= 5.5 V
µA
DSX
V
= 30 V, T = 125°C
C
T
T
Thermal shutdown set points
Thermal shutdown hysteresis
160
10
°C
°C
TSD
20
8.0
5.1
30
10.8
6.9
HYS
I
I
I
= 100 mA, V
= 3 V
D
D
D
CC
CC
CC
= 100 mA, V
= 100 mA, V
= 4.5 V
= 3.0 V,
Static drain-source on-state
resistance
See Notes 4 and 6
and Figures 4 and 5
r
Ω
13.0
8.0
18.2
11.2
DS(on)
T
= 125°C
C
I
T
= 100 mA, V
= 4.5 V,
D
CC
= 125°C
C
NOTES: 4. Technique must limit T – T to 10°C maximum
J
C
2
5. The power-up clear resets the I C interface and clears all outputs.
6. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
7. Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a
voltage of 0.5 V at T = 85°C.
C
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
switching characteristics, V
= 5 V, T = 25°C, C = 100 pF (unless otherwise noted)
C L
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
1.15
0.64
1.05
0.89
MAX
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output from G
Propagation delay time, high-to-low-level output from G
Rise time, drain output
PLH
C
I
= 30 pF,
= 75 mA,
See Figures 1, 2, and 6
L
D
µs
µs
PHL
r(OUT)
f(OUT)
Fall time, drain output
100
400
2
kHz
f
Serial clock frequency
(SCL)
(BUF)
MHz
SCL = 100 kHz
SCL = 400 kHz
4.7
1.3
t
Bus free time between stop and start condition
µs
t
t
Tolerable spike width on bus
50
ns
ns
(SP)
SCL low to data out valid (acknowledge)
120
pd(ACK)
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
4.7
1.3
250
4.0
600
200
250
100
10
µs
t
t
t
t
SCL low time
LOW
ns
µs
SCL high time
HIGH
ns
SDA → SCL setup time
Start condition setup time
ns
su(DAT)
su(STA)
4.7
600
300
4
µs
ns
µs
600
140
50
t
t
t
Stop condition setup time
SDA → SCL hold time
Start condition hold time
su(STO)
h(DAT)
h(STA)
ns
ns
µs
ns
ns
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
SCL = 100 kHz
SCL = 400 kHz
SCL = 2 MHz
4
600
160
1000
300
70
t
t
t
t
Rise time of SCL signal
Fall time of SCL signal
Rise time of SDA signal
Fall time of SDA signal
ns
ns
ns
ns
r(SCL)
f(SCL)
r(SDA)
f(SDA)
300
300
70
1000
300
70
300
300
140
6
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
thermal resistance
PARAMETER
Junction-to-ambient thermal resistance
TEST CONDITIONS
MIN
MAX
UNIT
R
All 8 outputs with equal power
115
°C/W
θJA
PARAMETER MEASUREMENT INFORMATION
15 V
5 V
5 V
I
D
R = 2 kΩ
1
V
CC
R
= 200 Ω
L
2
15
8
DUT
SDA
SCL
G
Word
Generator
(See Note A)
Output
3–6, 11–14
DRAIN
C
= 30 pF
L
A0 A1 A2 GND
10 16
(See Note B)
9
7
Test Circuit
Acknowledge
Occurs Here
5 V
SCL
0 V
5 V
SDA
G
D0, 2, 4, 6 = On D1, 3, 5, 7 = Off
0 V
5 V
0 V
15 V
D0, 2, 4, 6
D1, 3, 5, 7
0 V
15 V
0 V
Voltage Waveforms
NOTES: A. The word generator has the following characteristics: t ≤ 30 ns, t ≤ 30 ns, pulsed repetition rate (PRR) = 400 kHz, Z = 50 Ω.
r
f
O
B.
C includes probe and jig capacitance.
L
Figure 1. Resistive-Load Test Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PARAMETER MEASUREMENT INFORMATION
15 V
5 V
5 V
I
D
R = 2 kΩ
1
V
CC
R
= 200 Ω
L
2
DUT
SDA
SCL
G
Word
Generator
15
Output
(See Note A)
8
3–6, 11–14
DRAIN
C
= 30 pF
L
A0 A1 A2 GND
10 16
(See Note B)
9
7
Test Circuit
SDA
5 V
G
50%
50%
0 V
t
PHL
t
t
(SP)
pd(ACK)
t
PLH
15 V
90% 90%
SCL
DRAIN
10%
10%
0 .5 V
t
t
r
f
t
t
su(STO)
t
r(SDA)
t
(BUF)
f(SDA)
SDA
SCL
t
LOW
t
t
su(STA)
f(SCL)
t
r(SCL)
t
t
h(STA)
HIGH
t
su(DAT)
t
h(DAT)
Repeated
Start
Stop Start
NOTES: A. The word generator has the following characteristics: t ≤ 30 ns, t ≤ 30 ns, pulsed repetition rate (PRR) = 400 kHz, Z = 50 Ω.
r
f
O
B.
C includes probe and jig capacitance.
L
Figure 2. Test Circuit, Switching Times and Voltage Waveforms
8
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
TYPICAL CHARACTERISTICS
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
= 5 V
CC
= –40°C to 125°C
T
C
100k
1M
f – Frequency – Hz
10M
Figure 3. Supply Current vs Frequency
16
14
12
10
8
V
= 5 V
CC
T
= 125°C
C
T
C
= 25°C
6
T
C
= –40°C
4
2
0
0.05 0.07 0.09 0.11 0.13 0.15 0.17 0.19 0.21
I
– On-State Drain Current – A
D(on)
Figure 4. Static Drain-Source On-State Resistance vs
On-State Drain Current
9
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
TYPICAL CHARACTERISTICS
14
12
10
8
I
= 100 mA
D
T
C
= 125°C
6
T
C
= 25°C
T
C
= –40°C
4
2
0
2.7
3.3
3.9
4.5
5.1
5.7
6.3
6.9
V
CC
– Logic Supply Voltage – V
Figure 5. Static Drain-Source On-State Resistance vs
Logic Supply Voltage
1.4
1.2
t
PLH
t
r
1.0
0.8
0.6
0.4
0.2
0.0
t
f
t
PHL
I
D
= 75 mA
–40 –20
0
20
40
60
80
100 120
T
C
– Case Temperature – °C
Figure 6. Switching Time vs Case Temperature
10
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
TYPICAL CHARACTERISTICS
0.25
0.20
0.15
0.10
0.05
0.00
V
= 5 V
CC
T
= 25°C
C
T
C
= 100°C
T
C
= 125°C
1
2
3
4
5
6
7
8
N – Number of Outputs Conducting Simultaneously
Figure 7. Maximum Continuous Drain Current Of Each Output vs
Number Of Outputs Conducting Simultaneously
0.25
10%
0.20
20%
50%
0.15
80%
0.10
0.05
V
= 5 V
CC
= 25°C
T
C
d = t /t
= 1 ms/t
4
w period
period
0.00
1
2
3
5
6
7
8
N – Number of Outputs Conducting Simultaneously
Figure 8. Maximum Peak Drain Current Of Each Output vs
Number Of Outputs Conducting Simultaneously
11
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
THERMAL INFORMATION
†
D PACKAGE
10
DC Conditions
d = 0.5
1
d = 0.2
d = 0.1
0.1
d = 0.05
d = 0.02
d = 0.01
0.01
0.001
Single Pulse
t
c
t
w
I
D
0
0.0001
0.0001
0.001
0.01
0.1
– Pulse Duration – s
1
10
t
w
†
Device mounted on FR4 printed-circuit board with no heat sink
NOTES: (t) = r(t) R
Z
θA θJA
t
w
= pulse duration
t
c
= cycle time
d = duty cycle = t /t
w c
Figure 9. Normalized Junction-to-Ambient Thermal Resistance vs Pulse Duration
12
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
2
TPIC2810 subaddress and I C protocol definition
subaddress definition:
Summary:
HEX
Value
R/W
Bit
Function
11H
11H
22H
44H
1
0
0
0
Read data from the input register
Write data to the data shift register, do not transfer to output register
Command to transfer data from the data shift register to the output storage register
Write data to the data shift register and transfer it to the output storage register immediately (extra
load 22H command not needed)
Other
x
No action on undefined subaddresses
All other undefined subaddress values are not acknowledged.
register definition:
2
D
D
The data shift register receives serial data from the I C interface.
The data shift register receives data from the input interface and holds it until it is transferred to the output
storage register.
D
The output storage register controls whether the FET is on or off.
2
TPIC2810 I C input interface protocol definition
Slave Address and R/W
Subaddress
S7 S6 S5 S4 S3 S2 S1 S0
Data
S
G3 G2 G1 G0 A2 A1 A0 RW
A
A
D7 D6 D5 D4 D3 D2 D1 D0
A
P
S
Start Condition
G
Group ID: Defined as 1100
A(0:2)
RW
Device Address Selectable Via Input Terminals
Read/Write Select Bit
A
Acknowledge
Subaddress
Data
P
Defined Per Subaddress Table
Data to Be Loaded Into the Shift and Output Registers
Stop Condition
13
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TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
Case 1: Read/Write serial data, but do not load output register
2
This case loads the data shift register with data via the I C interface. Data is not transferred to the output storage
register.
write operation:
Slave Address and R/W = 0
Subaddress 11H
Data to Slave
S
G3 G2 G1 G0 A2 A1 A0 RW
A
S7 S6 S5 S4 S3 S2 S1 S0
A
D7 D6 D5 D4 D3 D2 D1 D0
A
P
G[3:0]:
A[2:0]:
RW:
Fixed at 1100
Selectable Via Input Terminals
0 = Write Shift Register
Subaddress: 11H (0001 0001)
Data: Output Data to the TPIC2810 Device
Acknowledge: Occurs After Valid Address Byte, After the Subaddress Byte, and After the Data Byte
read operation:
Slave Address and R/W = 0
Subaddress 11H
S
G3 G2 G1 G0 A2 A1 A0 RW
A
S7 S6 S5 S4 S3 S2 S1 S0
A
Slave Address and R/W = 1
Data From Slave
D7 D6 D5 D4 D3 D2 D1 D0 NA
S
G3 G2 G1 G0 A2 A1 A0 RW
A
P
G[3:0]:
A[2:0]:
RW:
Fixed at 1100
Selectable Via Input Terminals
1 = Read Shift Register (Note the Slave Address RW Bit = 0)
Subaddress: 11H (0001 0001)
Data: Input Data From the TPIC2810 Device
Acknowledge: Occurs After Valid Address Byte and After the Subaddress Byte
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
Case 2: Transfer serial data to output storage register
This case transfers data from the data shift register to the output storage register. The transfer must occur during
the subaddress acknowledge bit and the data byte is ignored.
Slave Address and R/W = 0
Subaddress 22H
S
G3 G2 G1 G0 A2 A1 A0 RW
A
S7 S6 S5 S4 S3 S2 S1 S0
A
P
G[3:0]:
A[2:0]:
RW:
Fixed at 1100
Selectable Via Input Terminals
0 = Write Shift Register
Subaddress: 22H (0010 0010)
Data: Output Data to the TPIC2810 Device
Acknowledge: Occurs After Valid Address Byte and After the Subaddress Byte
Case 3: Read serial data and load output storage register
2
This case loads the data shift register with data via the I C interface and transfers the data to output storage
register, if R/W = 0. The transfer occurs during the acknowledge bit following the data byte. Data byte and
transfer to the output register is ignored if R/W = 1.
Slave Address and R/W = 0
Subaddress 44H
Data to Slave
S
G3 G2 G1 G0 A2 A1 A0 RW
A
S7 S6 S5 S4 S3 S2 S1 S0
A
D7 D6 D5 D4 D3 D2 D1 D0
A
P
G[3:0]:
A[2:0]:
RW:
Fixed at 1100
Selectable Via Input Terminals
0 = Write Shift Register
Subaddress: 44H (0100 0100)
Data: Output Data to the TPIC2810 Device
Acknowledge: Occurs After Valid Address Byte, After the Subaddress Byte and After the Data Byte
Case 4: Undefined subaddress values
Slave Address and R/W = x
Subaddress Undefined
Don’t Care
S
G3 G2 G1 G0 A2 A1 A0 RW
A
S7 S6 S5 S4 S3 S2 S1 S0 NA
P
G[3:0]:
A[2:0]:
RW:
Fixed at 1100
Selectable Via Input Terminals
Don’t Care
Subaddress: All Bit Combinations Except 11H, 22H, and 44H
Data: Don’t Care; Data Is Ignored
Acknowledge: Occurs After Valid Address Byte, But Is Not Issued After an Undefined Subaddress Byte or After the Data Byte
Following an Undefined Subaddress Byte
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
2
I C bus operation
2
TheI Cbusisacommunicationslinkbetweenacontrollerandaseriesofslaveterminals. Thelinkisestablished
using a two-wire bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock
is sourced from the controller in all cases where the serial data signal is bidirectional for data communication
between the controller and the slave terminals. Each device has an open drain output to transmit data on the
serial data line. An external pullup resistor must be placed on the serial data signal to provide the high level
portion of the data transmission.
Data transmission is initiated with a start bit from the controller as shown in Figure 10. Both the SCL and SDA
signals must remain in a logic high state when the controller is not communicating with the slave devices. A start
condition is recognized by the slave devices when the SDA line transitions from high to low during the high
portion of the SCL signal. Upon reception of a start bit, the TPIC2810 device receives serial data on the SDA
input and check for valid address and control information. If the appropriate group and address bits are set for
the device, then the device issues an acknowledge pulse and prepares the receive subaddress data. The group
ID for the TPIC2810 device is hard coded to be 1100. The slave address bits are set to correspond to the A(0:2)
inputs for the device. Up to eight TPIC2810 devices can be placed on the bus. Subaddress data is decoded and
2
responded to as per the TPIC2810 subaddress and I C protocol definition section of this data sheet. Data
transmission is complete by either the reception of a stop condition or the reception of the data word sent to
the device. A stop condition is recognized as a low-to-high transition of the SDA input during the high portion
of the SCL signal. All other transitions of the SDA line must occur during the low portion of the SCL signal.
An acknowledge is issued by the TPIC2810 device after the reception of valid address, subaddress and data
2
words as per the TPIC2810B subaddress and I C protocol definition section of this document. Reference
Figure 10. The device acknowledges each byte of data that it receives from the controller.
. . .
SDA
. . .
SCL
1
2
3
4
5
6
7
8
9
Acknowledge
Start Condition
Stop Condition
Figure 10. Start/Stop/Acknowledge Protocol
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPIC2810
8-BIT LED DRIVER WITH I C INTERFACE
2
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.069 (1,75) MAX
0.004 (0,10)
0.004 (0,10)
PINS **
8
14
16
DIM
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/E 09/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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