TPS1HB08-Q1 [TI]
具有可调节电流限制的 40V、8mΩ、汽车类单通道智能高侧开关;型号: | TPS1HB08-Q1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有可调节电流限制的 40V、8mΩ、汽车类单通道智能高侧开关 开关 |
文件: | 总50页 (文件大小:1478K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
TPS1HB08-Q1 40V、8mΩ 单通道智能高侧开关
1 特性
3 说明
1
•
符合面向汽车应用的 AEC-Q100 标准
TPS1HB08-Q1 器件是一款适用于 12V 汽车系统的智
能高侧开关。该器件集成了强大的保护和诊断 功能 ,
以确保即使在汽车系统中发生短路等有害事件时也能提
供输出端口保护。该器件通过可靠的电流限制来防止故
障,根据器件型号不同,电流限制在 6.4A 至 70A 范
围内可调或可设置为 94A。凭借较高的电流限制范
围,该器件可用于需要大瞬态电流的负载,而低电流限
制范围可为不需要高峰值电流的负载提供更好的保护。
该器件能够可靠地驱动各种负载分布。
–
–
–
–
温度等级 1:–40°C 至 125°C
器件 HBM ESD 分类等级 2
器件 CDM ESD 分类等级 C4B
可承受 40V 负载突降
•
提供功能安全
可帮助创建功能安全系统设计的文档
–
•
•
单通道智能高侧开关,具有8mΩ RON (TJ = 25°C)
可通过可调电流限制提高系统级可靠性
–
–
电流限制设定点范围为 6.4A 至 70A
版本 F:94A 固定 ILIM
TPS1HB08-Q1 还能够提供可改进负载诊断的高精度模
拟电流检测。通过向系统 MCU 报告负载电流和器件温
度,该器件可实现预测性维护和负载诊断,从而延长系
统寿命。
•
强大的集成输出保护:
–
–
–
集成热保护
接地短路和电池短路保护
TPS1HB08-Q1 采用 HTSSOP 封装,可减小 PCB 尺
寸。
反向电池事件保护包括 FET 通过反向电流自动
开启
器件信息(1)
–
–
–
在失电和接地失效时自动关闭
集成输出钳位对电感负载进行消磁
可配置故障处理
器件型号
封装
封装尺寸(标称值)
TPS1HB08-Q1
HTSSOP (16)
5.0mm × 4.40mm
•
•
可对模拟检测输出进行配置,以精确测量:
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
–
–
负载电流
器件温度
简化原理图
通过 SNS 引脚或 FLT 引脚提供故障指示
开路负载和电池短路检测
VBAT
–
DIA_EN
VBB
Bulbs
SEL1
2 应用
•
•
•
•
•
•
•
•
汽车显示模块
SNS
Relays/Motors
µC
ILIM
65W 汽车前照灯
ADAS 模块
VOUT
Power Module:
Cameras, Sensors
LATCH
EN
座椅舒适模块
General Resistive,
Capacitive, Inductive Loads
变速器控制单元
HVAC 控制模块
车身控制模块
GND
白炽灯和 LED 照明
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLVSE16
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
目录
9.2 Functional Block Diagram ....................................... 18
9.3 Feature Description................................................. 18
9.4 Device Functional Modes........................................ 30
10 Application and Implementation........................ 32
10.1 Application Information.......................................... 32
10.2 Typical Application ............................................... 35
10.3 Typical Application ................................................ 38
11 Power Supply Recommendations ..................... 39
12 Layout................................................................... 40
12.1 Layout Guidelines ................................................. 40
12.2 Layout Example .................................................... 40
13 器件和文档支持 ..................................................... 41
13.1 文档支持 ............................................................... 41
13.2 接收文档更新通知 ................................................. 41
13.3 支持资源................................................................ 41
13.4 商标....................................................................... 41
13.5 静电放电警告......................................................... 41
13.6 Glossary................................................................ 41
14 机械、封装和可订购信息....................................... 41
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
6.1 Recommended Connections for Unused Pins.......... 4
Specifications......................................................... 5
7.1 Absolute Maximum Ratings ...................................... 5
7.2 ESD Ratings.............................................................. 5
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 SNS Timing Characteristics ...................................... 8
7.7 Switching Characteristics.......................................... 9
7.8 Typical Characteristics............................................ 10
Parameter Measurement Information ................ 15
Detailed Description ............................................ 17
9.1 Overview ................................................................. 17
7
8
9
4 修订历史记录
Changes from Revision B (December 2019) to Revision C
Page
•
Deleted tablenote from the Device Comparison Table to remove product preview from Versions A and B.......................... 3
Changes from Revision A (December 2019) to Revision B
Page
•
向特性 部分添加了提供功能安全的链接.................................................................................................................................. 1
Changes from Original (May 2019) to Revision A
Page
•
将“预告信息”更改为“生产数据”................................................................................................................................................ 1
2
Copyright © 2019–2020, Texas Instruments Incorporated
TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
5 Device Comparison Table
Table 1. Device Options
Device
Part Number
Current Limit
Current Limit Range
Overcurrent Behavior
Version
A
B
F
TPS1HB08A-Q1
TPS1HB08B-Q1
TPS1HB08F-Q1
Resistor Programmable
Resistor Programmable
Internally Set
6.4 A to 32 A
14 A to 70 A
94 A
Disable switch immediately
Disable switch immediately
Disable switch immediately
6 Pin Configuration and Functions
PWP Package
16-Pin HTSSOP
Top View
Pin Functions
PIN
I/O
DESCRIPTION
Version
A/B
NAME
Version F
GND
SNS
LATCH
EN
1
1
—
O
I
Device ground
Sense output
2
2
3
3
Sets fault handling behavior (latched or auto-retry)
Control input, active high
4
4
I
ILIM
5
-
-
5
O
O
O
I
Connect resistor to set current-limit threshold
Open drain output with pulldown to signal fault.
Channel output
FLT
VOUT
NC
6 - 11
6 - 11
12 - 13, 15 12 - 13, 15
No Connect, leave floating
Diagnostics select. No functionality on device version F; connect to IC GND
through RPROT resistor
SEL1
DIA_EN
VBB
14
16
14
16
I
I
I
Diagnostic enable, active high
Exposed
pad
Exposed
pad
Power supply input
Copyright © 2019–2020, Texas Instruments Incorporated
3
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
6.1 Recommended Connections for Unused Pins
The TPS1HB08-Q1 is designed to provide an enhanced set of diagnostic and protection features. However, if the
system design only allows for a limited number of I/O connections, some pins may be considered as optional.
Table 2. Connections for Optional Pins
PIN NAME
CONNECTION IF NOT USED
Ground through 1-kΩ resistor Analog sense is not available.
With LATCH unused, the device will auto-retry after a fault. If latched
IMPACT IF NOT USED
SNS
Float or ground through
RPROT resistor
behavior is desired, but the system describes limited I/O, it is possible to
use one microcontroller output to control the latch function of several high-
side channels.
LATCH
If the ILIM pin is left floating, the device will be set to the default internal
current-limit threshold. This is considered a fault state for the device.
ILIM (Version A/B)
FLT (Version F)
Float
Float
If the FLT pin is unused, the system cannot read faults from the output.
SEL1 selects the TJ sensing feature. With SEL1 unused, only current
sensing and open load detection are available. If unused, must be
grounded through a resistor to engage FET turn-on during reverse battery.
Ground through RPROT
resistor
SEL1
Float or ground through
RPROT resistor
With DIA_EN unused, the analog sense, open-load, and short-to-battery
diagnostics are not available.
DIA_EN
4
Copyright © 2019–2020, Texas Instruments Incorporated
TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
36
UNIT
V
Maximum continuous supply voltage, VBB
Load dump voltage, VLD
ISO16750-2:2010(E)
40
V
Reverse battery voltage, VRev, t ≤ 3 minutes
Enable pin voltage, VEN
–18
–1
–1
–1
–1
–1
V
7
7
V
LATCH pin voltage, VLATCH
V
Diagnostic Enable pin voltage, VDIA_EN
Sense pin voltage, VSNS
7
V
18
V
Select pin voltage, VSEL`
7
V
Reverse ground current, IGND
Energy dissipation during turnoff, ETOFF
Energy dissipation during turnoff, ETOFF
Maximum junction temperature, TJ
Storage temperature, Tstg
VBB < 0 V
–50
95(2)
56(2)
150
150
mA
mJ
mJ
°C
°C
Single pulse, LOUT = 5 mH, TJ,start = 125°C
Repetitive pulse, LOUT = 5 mH, TJ,start = 125°C
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2) For further details, see the section regarding switch-off of an inductive load.
7.2 ESD Ratings
VALUE
UNIT
All pins except VBB and
VOUT
±2000
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
Electrostatic
discharge
V(ESD)
V
VBB and VOUT
All pins
±4000
±750
(1) AEC-Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specifications.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
6
MAX
18
UNIT
(1)
VBB
Nominal supply voltage
V
V
V
V
V
V
V
VBB
Extended supply voltage(2)
3
28
VEN
Enable voltage
–1
–1
–1
–1
–1
5.5
5.5
5.5
5.5
7
VLATCH
VDIA_EN
VSEL1
VSNS
LATCH voltage
Diagnostic Enable voltage
Select voltage
Sense voltage
(1) All operating voltage conditions are measured with respect to device GND
(2) Device will function within extended operating range, however some parametric values might not apply
7.4 Thermal Information
TPS1HB08-Q1
(1) (2)
THERMAL METRIC
PWP (HTSSOP)
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
32.6
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.
Copyright © 2019–2020, Texas Instruments Incorporated
5
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
Thermal Information (continued)
TPS1HB08-Q1
(1) (2)
THERMAL METRIC
PWP (HTSSOP)
UNIT
16 PINS
25.3
9.2
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.3
ψJB
9.3
RθJC(bot)
1.0
7.5 Electrical Characteristics
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT VOLTAGE AND CURRENT
VDSCLAMP VDS clamp voltage
40
58
46
76
V
V
VBBCLAMP
VBB clamp voltage
VBB undervoltage lockout
falling
VUVLOF
Measured with respect to the GND pin of the device
Measured with respect to the GND pin of the device
2.0
2.2
3
3
V
V
VBB undervoltage lockout
rising
VUVLOR
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.1
0.5
µA
Standby current (total
device leakage including
MOSFET)
ISB
VBB = 13.5 V, TJ = 85°C,
VEN = VDIA_EN = 0 V, VOUT = 0 V
µA
A
ILNOM
Continuous load current
TAMB = 70°C
11
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.01
0.5
3
µA
IOUT(standby) Output leakage current
VBB = 13.5 V, TJ = 125°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
µA
VBB = 13.5 V, ISNS = 0 mA
VEN = 0 V, VDIA_EN = 5 V, VOUT = 0V
Current consumption in
diagnostic mode
IDIA
3
6
mA
VBB = 13.5 V
VEN = VDIA_EN = 5 V, IOUT = 0 A
IQ
Quiescent current
3
6
mA
ms
tSTBY
Standby mode delay time VEN = VDIA_EN = 0 V to standby
12
17
22
RON CHARACTERISTICS
TJ = 25°C, 6 V ≤ VBB ≤ 28 V
TJ = 150°C, 6 V ≤ VBB ≤ 28 V
TJ = 25°C, 3 V ≤ VBB ≤ 6 V
TJ = 25°C, -18 V ≤ VBB ≤ -8 V
TJ = 105°C, -18 V ≤ VBB ≤ -8 V
8
8
mΩ
mΩ
mΩ
mΩ
mΩ
On-resistance
(Includes MOSFET and
package)
RON
16
12
On-resistance during
reverse polarity
RON(REV)
16
CURRENT SENSE CHARACTERISTICS
Current sense ratio
IOUT / ISNS
KSNS
IOUT = 1 A
5000
6
Copyright © 2019–2020, Texas Instruments Incorporated
TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
Electrical Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
–5
TYP
MAX
5.3
UNIT
mA
%
2.000
IOUT = 10 A
IOUT = 3 A
0.6
0.2
mA
%
–5
5.3
mA
%
IOUT = 1 A
–5
5.3
0.06043
0.0206
0.0106
0.0046
mA
%
Current sense current
and accuracy
VEN = VDIA_EN = 5 V,
VSEL1 = 0 V
ISNSI
IOUT = 300 mA
IOUT = 100 mA
IOUT = 50 mA
IOUT = 20m A
-4.6
-13.6
-28.3
-56
6.2
mA
%
15.1
30.3
57.3
mA
%
mA
%
TJ SENSE CHARACTERISTICS
TJ = -40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
TJ = 150°C
0.01
0.72
1.25
1.61
1.80
0.12
0.85
0.38
0.98
1.79
2.31
2.70
mA
mA
Temperature sense
current
Device Version A/B
VDIA_EN = 5 V, VSEL1 = 5
V
ISNST
1.52
mA
1.96
mA
2.25
mA
dISNST/dT
Coefficient
0.0112
mA/°C
SNS CHARACTERISTICS
ISNSFH
ISNS fault high-level
ISNS leakage
VDIA_EN = 5 V, VSEL1 = 0 V
VDIA_EN = 0 V
4
4.5
5.3
1
mA
µA
ISNSleak
CURRENT LIMIT CHARACTERISTICS
RILIM = GND, open, or
out of range
42
A
Device Version A, TJ =
-40°C to 150°C
RILIM = 5 kΩ
27.2
4.7
32
36.8
8.1
A
A
RILIM = 25 kΩ
6.4
RILIM = GND, open, or
out of range
104
A
ICL
Current limit threshold
Device Version B, TJ =
-40°C to 150°C
RILIM = 5 kΩ
47.1
9.9
80
70
14
84.2
17.8
105
A
A
A
A
RILIM = 25 kΩ
TJ = -40°C to 60°C
TJ = 150°C
94
Device Version F
68
77
86.1
Version A
Version B
120
245
160
350
208 A * kΩ
KCL
Current Limit Ratio
437.5 A * kΩ
FAULT CHARACTERISTICS
Open-load (OL) detection
VOL
VFLT
tOL1
tOL2
tOL3
VEN = 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IFLT = 1 mA
2
3
4
1
V
V
voltage
FLT low output voltage
(Version F only)
VEN = 5 V to 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 4 V
OL and STB indication-
time from EN falling
300
2
500
20
700
50
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 4 V
OL and STB indication-
time from DIA_EN rising
VEN = 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 0 V to 4 V
OL and STB indication-
time from VOUT rising
2
20
50
Copyright © 2019–2020, Texas Instruments Incorporated
7
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
Electrical Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TABS
THYS
Thermal shutdown
150
°C
Thermal shutdown
hysteresis
20
25
30
50
3
°C
VDIA_EN = 5 V
Time between switch shutdown and ISNS settling at
ISNSFH
Fault shutdown
indication-time
tFAULT
µs
Time from fault shutdown until switch re-enable
(thermal shutdown or current limit).
tRETRY
Retry time
1
2
ms
EN PIN CHARACTERISTICS
VIL, EN
VIH, EN
VIHYS, EN
REN
Input voltage low-level
No GND network diode
No GND network diode
0.8
2
V
V
Input voltage high-level
Input voltage hysteresis
Internal pulldown resistor
Input current low-level
Input current high-level
2.0
0.5
350
1
mV
MΩ
µA
µA
IIL, EN
VEN = 0.8 V
VEN = 5 V
0.8
5.0
IIH, EN
DIA_EN PIN CHARACTERISTICS
VIL, DIA_EN Input voltage low-level
VIH, DIA_EN Input voltage high-level
No GND network diode
No GND network diode
0.8
2
V
V
2.0
0.5
VIHYS,
DIA_EN
Input voltage hysteresis
350
mV
RDIA_EN
Internal pulldown resistor
Input current low-level
Input current high-level
1
0.8
5.0
MΩ
µA
µA
IIL, DIA_EN
IIH, DIA_EN
VDIA_EN = 0.8 V
VDIA_EN = 5 V
SEL1 PIN CHARACTERISTICS
VIL, SEL1
VIH, SEL1
Input voltage low-level
Input voltage high-level
No GND network diode
No GND network diode
0.8
2
V
V
2.0
0.5
VIHYS, SEL1 Input voltage hysteresis
350
1
mV
MΩ
µA
µA
RSEL1
Internal pulldown resistor
Input current low-level
Input current high-level
IIL, SEL1
IIH, SEL1
VSEL1 = 0.8 V
VSEL1 = 5 V
0.8
5
LATCH PIN CHARACTERISTICS
VIL, LATCH Input voltage low-level
No GND network diode
No GND network diode
0.8
2
V
V
VIH, LATCH Input voltage high-level
2.0
0.5
VIHYS,
LATCH
Input voltage hysteresis
350
mV
RLATCH
Internal pulldown resistor
Input current low-level
Input current high-level
1
0.8
5.0
MΩ
µA
µA
IIL, LATCH
IIH, LATCH
VLATCH = 0.8 V
VLATCH = 5 V
7.6 SNS Timing Characteristics
VBB = 6 V to 18 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SNS TIMING - CURRENT SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
tSNSION1
tSNSION2
Settling time from rising edge of DIA_EN
40
µs
µs
VEN = VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from rising edge of EN and
DIA_EN
200
8
Copyright © 2019–2020, Texas Instruments Incorporated
TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
SNS Timing Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VEN = 0 V to 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
tSNSION3
tSNSIOFF1
tSETTLEH
tSETTLEL
Settling time from rising edge of EN
165
µs
VEN = 5 V, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from falling edge of DIA_EN
Settling time from rising edge of load step
Settling time from falling edge of load step
20
20
20
µs
µs
µs
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 1 A to 5 A
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A
SNS TIMING - TEMPERATURE SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
tSNSTON1
tSNSTON2
tSNSTOFF
Settling time from rising edge of DIA_EN
40
70
20
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
Settling time from rising edge of DIA_EN
Settling time from falling edge of DIA_EN
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
SNS TIMING - MULTIPLEXER
VEN = 5 V, VDIA_EN = 5 V
VSEL1 = 5 V to 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from temperature sense to
current sense
60
60
µs
µs
tMUX
VEN = 5 V, VDIA_EN = 5 V
VSEL1 = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from current sense to
temperature sense
7.7 Switching Characteristics
VBB = 13.5 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
rising to 10% VOUT rising
tDR
Turnon delay time (from Active)
20
60
60
100
100
0.7
µs
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
falling to 90% VOUT Falling
tDF
Turnoff delay time
VOUT rising slew rate
VOUT falling slew rate
Turnon time (active)
Turnoff time
20
0.1
0.1
39
µs
V/µs
V/µs
µs
VBB = 13.5 V, 20% to 80% of VOUT
,
SRR
SRF
tON
0.4
0.4
94
RL = 2.6 Ω
VBB = 13.5 V, 80% to 20% of VOUT
,
0.7
RL = 2.6 Ω
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
rising to 80% VOUT rising
235
235
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
falling to 20% VOUT falling
tOFF
39
94
µs
200-µs enable pulse, VS = 13.5 V,
RL = 2.6 Ω
PWM accuracy - average load
current
ΔPWM
–25
–85
0
25
85
%
tON - tOFF
EON
Turnon and turnoff matching
200-µs enable pulse
0
µs
Switching energy losses during
turnon
VBB = 13.5 V, RL = 2.6 Ω
0.8
mJ
Switching energy losses during
turnoff
EOFF
VBB = 13.5 V, RL = 2.6 Ω
0.8
mJ
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7.8 Typical Characteristics
30
27
24
21
18
15
12
9
6
5.5
5
6 V
8 V
13.5 V
18 V
4.5
4
3.5
3
2.5
2
1.5
1
6
3
0.5
0
0.0001
0
0.001
0.01
0.1
Time (s)
0.5
2 3 5 10 20
100
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (èC)
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
图 1. Transient Thermal Impedance
图 2. Standby Current (ISB) vs Temperature
0.55
0.5
4.35
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
4.3
4.25
4.2
0.45
0.4
4.15
4.1
0.35
0.3
4.05
4
0.25
0.2
3.95
3.9
0.15
0.1
3.85
3.8
3.75
3.7
0.05
0
3.65
3.6
-40 -20
-0.05
-40
-20
0
20
40
60
80
100 120 140
0
20
40
60
80 100 120 140 160
Temeprature (èC)
Temperature (èC)
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
IOUT = 0 A
VEN = 5 V
VSEL1 = 0 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
图 3. Output Leakage Current (IOUT(standby)) vs Temperature
图 4. Quiescent Current (IQ) vs Temperature
13
16
15
14
13
12
11
10
9
6 V
8 V
13.5 V
18 V
25èC
-40èC
85èC
125èC
150èC
12.5
12
11.5
11
10.5
10
9.5
9
8.5
8
8
7.5
7
7
6
6.5
6
5
5.5
4
-40 -20
0
20
40
60
80 100 120 140 160
2.5
5
7.5 10 12.5 15 17.5 20 22.5 25 27.5 30
VBB (V)
Temeprature (èC)
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
RSNS = 1 kΩ
RSNS = 1 kΩ
VBB = 13.5 V
图 5. On Resistance (RON) vs Temperature
图 6. On Resistance (RON) vs VBB
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Typical Characteristics (接下页)
70
60
55
50
45
40
35
30
65
60
55
50
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
45
40
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temeprature (èC)
Temperature (èC)
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
图 7. Turn-on Delay Time (tDR) vs Temperature
图 8. Turn-off Delay Time (tDF) vs Temperature
0.5
0.45
0.4
0.5
6 V
8 V
13.5 V
18 V
0.45
0.4
0.35
0.3
0.35
0.3
0.25
0.2
0.25
0.2
0.15
6 V
0.15
0.1
0.1
8 V
13.5 V
0.05
18 V
0.05
0
0
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
图 9. VOUT Slew Rate Rising (SRR) vs Temperature
图 10. VOUT Slew Rate Falling (SRF) vs Temperature
120
120
6 V
8 V
13.5 V
6 V
8 V
13.5 V
18 V
110
110
18 V
100
100
90
80
70
60
50
90
80
70
60
50
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
图 11. Turn-on Time (tON) vs Temperature
图 12. Turn-off Time (tOFF) vs Temperature
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Typical Characteristics (接下页)
20
15
10
5
0.16
0.15
0.14
0.13
0.12
0.11
0.1
-40èC
25èC
85èC
125èC
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0
-5
-10
6 V
8 V
-15
13.5 V
18 V
-20
-40
-20
0
20
40
60
80
100 120 140
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
Temperature (èC)
ILOAD (A)
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 0 V to 5 V
and 5 V to 0 V
VDIAG_EN = 0 V
VSEL1 = 0 V
VEN = 5 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
VBB = 13.5 V
VBB = 13.5 V
图 13. Turn-on and Turn-off Matching (tON - tOFF) vs
图 14. Current Sense Output Current (ISNSI ) vs Load Current
Temperature
(IOUT) Across Temperature
0.16
2.2
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
0.15
0.14
0.13
0.12
0.11
0.1
2
1.8
1.6
1.4
1.2
1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0.8
0.6
0.4
0.2
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
-40 -20
0
20
40
60
80 100 120 140 160
ILOAD (A)
Temperature (èC)
VSEL1 = 0 V
VEN = 5 V
TA = 25°C
VDIAG_EN = 5 V
VSEL1 = 5 V
VEN = 0 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
RSNS = 1 kΩ
图 15. Current Sense Output Current (ISNSI) vs Load Current
图 16. Temperature Sense Output Current (ISNST) vs
(IOUT) Across VBB
Temperature
5
1.64
6 V
8 V
6 V
8 V
13.5 V
18 V
13.5 V
18 V
4.9
1.59
4.8
1.54
4.7
4.6
4.5
1.49
1.44
1.39
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VSEL1 = 0 V
VEN = 0 V
VDIAG_EN = 5 V
VEN = 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
RSNS = 500 Ω
VOUT Floating
ROUT = 1 kΩ
图 17. Fault High Output Current (ISNSFH) vs Temperature
图 18. VIL vs Temperature
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Typical Characteristics (接下页)
2
1.95
1.9
400
390
380
370
360
350
340
330
320
310
300
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
1.85
1.8
1.75
1.7
1.65
1.6
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 0 V to 3.3 V
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 0 V to 3.3 V
and 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
ROUT = 1 kΩ
图 20. VIHYS vs Temperature
图 19. VIH vs Temperature
1.4
6.9
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
1.35
1.3
6.6
6.3
6
1.25
1.2
5.7
5.4
5.1
4.8
4.5
4.2
3.9
1.15
1.1
1.05
1
0.95
0.9
0.85
0.8
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 0.8 V
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 5 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
ROUT = 1 kΩ
图 21. IIL vs Temperature
图 22. IIH vs Temperature
ROUT1 = 2.6 Ω
RSNS = 1 kΩ
VDIA_EN = 5 V
ROUT1 = 2.6 Ω
RSNS = 1 kΩ
VDIA_EN = 5 V
VSEL = 0 V
VSEL = 0 V
图 23. Turn-on Time (tON
)
图 24. Turn-off Time (tOFF)
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Typical Characteristics (接下页)
ROUT1 = 2.6 Ω
RSNS = 1 kΩ
VSEL = 0 V
VBB = 13.5 V
TA = 25°C
IOUT1 = 5 A
IOUT1 = 1 A to 5 A
VBB = 13.5 V
VEN = 0 V to 5 V
图 25. ISNS Settling time (tSNSION1) on Load Step
图 26. SNS Output Current Measurement Enable on
DIAG_EN PWM
LOUT = 5 µH to
GND
VEN = 0 V to 5 V
RSNS = 1 kΩ
VSEL = 0 V
TA = 25°C
VBB = 13.5 V
TA = 25°C
LOUT = 5 mH
VDIAG_EN = 5 V
图 27. Device Version F Short Circuit Event
图 28. 5 mH Inductive Load Demagnetization
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8 Parameter Measurement Information
IBB
VBB
DIA_EN
IDIA_EN
ISNS
SNS
ILATCH
LATCH
EN
SEL1
ISEL1
IEN
IILIM
ILIM
VOUT
IOUT
GND
图 29. Parameter Definitions
(1)
VEN
50%
50%
90%
90%
tDR
tDF
VOUT
10%
10%
tON
tOFF
Rise and fall time of VEN is 100 ns.
图 30. Switching Characteristics Definitions
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Parameter Measurement Information (接下页)
VEN
VDIA_EN
IOUT
ISNS
tSNSION1
tSNSION2
tSNSION3
tSNSIOFF1
VEN
VDIA_EN
IOUT
ISNS
tSETTLEH
tSETTLEL
VEN
VDIA_EN
TJ
ISNS
tSNSTON1
tSNSTON2
tSNSTOFF
NOTES: Rise and fall times of control signals are 100 ns. Control signals include: EN, DIA_EN, SEL1
SEL1 pin must be set to the appropriate value.
图 31. SNS Timing Characteristics Definitions
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9 Detailed Description
9.1 Overview
The TPS1HB08-Q1 device is a single-channel smart high-side switch intended for use with 12-V automotive
batteries. Many protection and diagnostic features are integrated in the device.
Diagnostics features include the analog SNS output that is capable of providing a signal that is proportional to
load current or device temperature. The high-accuracy load current sense allows for diagnostics of complex
loads. Version F of the device includes an open drain FLT pin that indicates device fault states.
This device includes protection through thermal shutdown, current limiting, transient withstand, and reverse
battery operation. For more details on the protection features, refer to the Feature Description and Application
Information sections of the document.
The TPS1HB08-Q1 is one device in a family of TI high side switches. For each device, the part number indicates
elements of the device behavior. 图 32 gives an example of the device nomenclature.
图 32. Naming Convention
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9.2 Functional Block Diagram
The functional block diagram shown is for device versions A/B. For version F, the ILIM pin will be replaced by
open drain output FLT .
VBB
VBB to GND
Clamp
Internal Power
Supply
VBB to VOUT
Clamp
GND
EN
VOUT
Gate Driver
Power FET
LATCH
ILIM
Current Limit
Thermal
Shutdown
Open-load /
Short-to-Bat
Detection
DIA_EN
SEL1
Fault
Indication
SNS
SNS Mux
Current Sense
Temperature
Sense
9.3 Feature Description
9.3.1 Protection Mechanisms
The TPS1HB08-Q1 is designed to operate in the automotive environment. The protection mechanisms allow the
device to be robust against many system-level events such as load dump, reverse battery, short-to-ground, and
more.
There are two protection features which, if triggered, will cause the switch to automatically disable:
•
•
Thermal Shutdown
Current Limit
When any of these protections are triggered, the device will enter the FAULT state. In the FAULT state, the fault
indication will be available on the SNS pin (see the Diagnostic Mechanisms section of the data sheet for more
details). For version F of the device, the fault will also be indicated on the FLT pin.
The switch is no longer held off and the fault indication is reset when all of the below conditions are met:
•
•
•
LATCH pin is low
tRETRY has expired
All faults are cleared (thermal shutdown, current limit)
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Feature Description (接下页)
9.3.1.1 Thermal Shutdown
The TPS1HB08-Q1 includes a temperature sensor on the power FET and also within the controller portion of the
device. There are two cases that the device will consider to be a thermal shutdown fault:
•
•
TJ,FET > TABS
(TJ,FET – TJ,controller) > TREL
After the fault is detected, the switch will turn off. If TJ,FET passes TABS, the fault is cleared when the switch
temperature decreases by the hysteresis value, THYS. If instead the TREL threshold is exceeded, the fault is
cleared after TRETRY passes.
9.3.1.2 Current Limit
When IOUT reaches the current limit threshold, ICL, the channel will switch off immediately. The ICL value will vary
with slew rate and a fast current increase that occurs during a powered-on short circuit can temporarily go above
the specified ICL value. When the switch is in the FAULT state it will output an output current ISNSFH on the SNS
pin and on version F of the device, the fault will also be indicated on the corresponding FLT pin.
During a short circuit event, the device will hit the ICL value that is listed in the Electrical Characteristics table (for
the given device version and RILIM) and then turn the output off to protect the device. The device will register a
short circuit event when the output current exceeds ICL, however the measured maximum current may exceed
the ICL value due to the TPS1HB08-Q1 deglitch filter and turn-off time. This deglitch time is defined at 3 µs so
therefore use the test setup described in TPS1HB08-Q1 AEC-Q100-012 Short Circuit Reliability and take 3 µs
before the peak value as the ICL. The device is guaranteed to protect itself during a short circuit event over the
nominal supple voltage range (as defined in the Electrical Characteristics table) at 125°C.
On version F of the device, the current limit set point of the device is flat from -40°C to 60°C, and then will
linearly decrease until 150°C. This decrease of the current limit is designed to protect the part in even hot
temperatures where a short-circuit event causes more damage.
9.3.1.2.1 Current Limit Foldback
Version B and F of the TPS1HB08-Q1 implement a current limit foldback feature that is designed to protect the
device in the case of a long-term fault condition. If the device undergoes fault shutdown events (either of thermal
shutdown or current limit) seven consecutive times, the current limit will be reduced to half of the original value.
The device will revert back to the original current limit threshold if either of the following occurs:
•
•
The device goes to standby mode.
The switch turns on and turns off without any fault occurring.
Version A do not implement the current limit foldback due to the lower current limit causing less harm during
repetitive long-term faults.
9.3.1.2.2 Programmable Current Limit
All versions except F of the TPS1HB08-Q1 include an adjustable current limit. Some applications (for example,
incandescent bulbs) will require a high current limit while other applications can benefit from a lower current limit
threshold. In general, wherever possible a lower current limit is recommended due to allowing system
advantages through:
•
•
•
Reduced size and cost in current carrying components such as PCB traces and module connectors
Less disturbance at the power supply (VBB pin) during a short circuit event
Improved protection of the downstream load
To set the current limit threshold, connect a resistor from ILIM to VBB. The current limit threshold is determined by
Equation 1 (RILIM in kΩ):
ICL = KCL / RILIM
(1)
The RILIM range is between 5 kΩ and 25 kΩ. An RILIM resistor is required, however in the fault case where the pin
is floating, grounded, or outside of this range the current limit will default to an internal level that is defined in the
Specifications section of this document. If RILIM is out of this range, the device cannot guarantee complete short-
circuit protection.
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Feature Description (接下页)
注
Capacitance on the ILIM pin can cause ILIM to go out of range during short circuit events.
For accurate current limiting, place RILIM near to the device with short traces to ensure <5
pF capacitance to GND on the ILIM pin.
For device version F, there is no ILIM pin and the current limit is not adjustable. In this case, the device will
current limit at the internal threshold ICL as defined in the Electrical Characteristics section.
9.3.1.2.3 Undervoltage Lockout (UVLO)
The device monitors the supply voltage VBB to prevent unpredicted behaviors in the event that the supply voltage
is too low. When the supply voltage falls down to VUVLOF, the output stage is shut down automatically. When the
supply rises up to VUVLOR, the device turns back on.
During an initial ramp of VBB from 0 V at a ramp rate slower than 1 V/ms, VEN pin will have to be held low until
VBB is above UVLO threshold (with respect to board ground) and the supply voltage to the device has reliably
reached above the UVLO condition. For best operation, ensure that VBB has risen above UVLO before setting the
VEN pin to high.
9.3.1.2.4 VBB During Short-to-Ground
When VOUT is shorted to ground, the module power supply (VBB) can have a transient decrease. This is caused
by the sudden increase in current flowing through the wiring harness cables. To achieve ideal system behavior, it
is recommended that the module maintain VBB > 3 V (above the maximum VUVLOF) during VOUT short-to-ground.
This is typically accomplished by placing bulk capacitance on the power supply node.
9.3.1.3 Voltage Transients
The TPS1HB08-Q1 device contains two types of voltage clamps which protect the FET against system-level
voltage transients. The two different clamps are shown in 图 33.
The clamp from VBB to GND is primarily used to protect the controller from positive transients on the supply line
(for example, ISO7637-2). The clamp from VBB to VOUT is primarily used to limit the voltage across the FET when
switching off an inductive load. If the voltage potential from VBB to GND exceeds the VBB clamp level, the clamp
will allow current to flow through the device from VBB to GND (Path 2). If the voltage potential from VBB to VOUT
exceeds the clamping voltage, the power FET will allow current to flow from VBB to VOUT (Path 3). Additional
capacitance from VBB to GND can increase the reliability of the system during ISO 7637 pulse 2 A testing.
Ri
Positive Supply Transient
(e.g. ISO7637 pulse 2a/3b)
(1)
VBB
VDS
Clamp
(3)
(2)
Controller
VBB
Clamp
VOUT
Load
GND
图 33. Current Path During Supply Voltage Transient
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Feature Description (接下页)
9.3.1.3.1 Load Dump
The TPS1HB08-Q1 device is tested according to ISO 16750-2:2010(E) suppressed load dump pulse. The device
supports up to 40-V load dump transient and will maintain normal operation during the load dump pulse. If the
switch is enabled, it will stay enabled and if the switch is disabled, it will stay disabled.
9.3.1.3.2 Driving Inductive Loads
When switching off an inductive load, the inductor may impose a negative voltage on the output of the switch.
The TPS1HB08-Q1 includes a voltage clamp to limit voltage across the FET. The maximum acceptable load
inductance is a function of the device robustness. With a 5 mH load, the device can withstand one pulse of 95
mJ inductive dissipation at 125°C and can withstand 56 mJ of one million inductive repetitive pulses with a 10 Hz
repetitive pulse. If the application parameters exceed this device limit, it is necessary to use a protection device
like a freewheeling diode to dissipate the energy stored in the inductor.
For more information on driving inductive loads, refer to TI's How To Drive Inductive, Capacitive, and Lighting
Loads With Smart High Side Switches application report.
9.3.1.4 Reverse Battery
In the reverse battery condition, the switch will automatically be enabled regardless of the state of EN to prevent
excess power dissipation inside the MOSFET body diode. In many applications (for example, resistive loads), the
full load current may be present during reverse battery. In order to activate the automatic switch on feature, all
NC pins must be grounded to IC ground.
There are two options for blocking reverse current in the system. The first option is to place a blocking device
(FET or diode) in series with the battery supply, blocking all current paths. The second option is to place a
blocking diode in series with the GND node of the high-side switch. This method will protect the controller portion
of the switch (path 2), but it will not prevent current from flowing through the load (path 3). The diode used for the
second option may be shared amongst multiple high-side switches.
Path 1 shown in 图 34 is blocked inside of the device.
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Feature Description (接下页)
Reverse blocking
FET or diode
Option 1
BAT
VBB
0V
µC
VDD
(3)
VOUT
(2)
Controller
GPIO
GPIO
VBB
Clamp
Load
RPROT
(1)
GND
Option 2
图 34. Current Path During Reverse Battery
For more information on reverse battery protection, refer to TI's Reverse Battery Protection for High Side
Switches application note.
9.3.1.5 Fault Event – Timing Diagrams - Version A and B
注
All timing diagrams assume that the SEL1 pin is low.
The LATCH, DIA_EN, and EN pins are controlled by the user. The timing diagrams
represent a possible use-case.
图 35 shows the immediate current limit switch off behavior. The diagram also illustrates the retry behavior. As
shown, the switch will remain latched off until the LATCH pin is low.
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Feature Description (接下页)
µC resets
the latch
LATCH
DIA_EN
ISNSFH
Current
Sense
Current
Sense
High-z
High-z
High-z
High-z
SNS
VOUT
EN
ICL
tRETRY
IOUT
t
Switch follows EN. Normal
operation.
Load reaches limit.
Switch is Disabled.
图 35. Current Limit – Version A and B - Latched Behavior
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Feature Description (接下页)
图 36 shows the immediate current limit switch off behavior. In this example, LATCH is tied to GND; hence, the
switch will retry after the fault is cleared and tRETRY has expired.
DIA_EN
ISNSFH
Current
Sense
Current
Sense
High-z
High-z
High-z
High-z
SNS
VOUT
EN
ICL
tRETRY
IOUT
t
Switch follows EN. Normal
operation.
Load reaches limit.
Switch is Disabled.
图 36. Current Limit - Version A and B - LATCH = 0
When the switch retries after a shutdown event, the SNS fault indication will remain until VOUT has risen to VBB
–
1.8 V. Once VOUT has risen, the SNS fault indication is reset and current sensing is available. If there is a short-
to-ground and VOUT is not able to rise, the SNS fault indication will remain indefinitely. 图 37 illustrates auto-retry
behavior and provides a zoomed-in view of the fault indication during retry.
注
图 37 assumes that tRETRY has expired by the time that TJ reaches the hysteresis
threshold.
LATCH = 0 V and DIA_EN = 5 V
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Feature Description (接下页)
ISNSFH
ISNSFH
ISNSFH
ISNSFH
SNS
VOUT
EN
TABS
THYS
TJ
t
ISNSFH
ISNSI
SNS
VOUT
EN
VBB t 1.8 V
TABS
THYS
TJ
t
图 37. Fault Indication During Retry
9.3.1.6 Fault Event – Timing Diagrams - Version F
TPS1HB08-Q1 device version F will follow the same timing and fault diagrams as described in Fault Event –
Timing Diagrams - Version A and B, with the only difference being the behavior of the FLT pin. For each
diagram, if version F is used, it will indicate fault in the same cases as the SNS pin. In every diagram, when the
SNS pin outputs ISNSFH, the FLT pin will go to an open drain state to indicate fault as well.
9.3.2 Diagnostic Mechanisms
9.3.2.1 VOUT Short-to-Battery and Open-Load
The TPS1HB08-Q1 is capable of detecting short-to-battery and open-load events regardless of whether the
switch is turned on or off, however the two conditions use different methods.
9.3.2.1.1 Detection With Switch Enabled
When the switch is enabled, the VOUT short-to-battery and open-load conditions can be detected by the current
sense feature. In both cases, the load current will be measured through the SNS pin as below the expected
value.
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Feature Description (接下页)
9.3.2.1.2 Detection With Switch Disabled
While the switch is disabled, if DIA_EN is high, an internal comparator will detect the condition of VOUT. If the
load is disconnected (open load condition) or there is a short to battery the VOUT voltage will be higher than the
open load threshold (VOL,off) and a fault is indicated on the SNS pin and the FLT pin on version F. An internal
pull-up of 1 MΩ is in series with an internal MOSFET switch, so no external component is required if a
completely open load must be detected. However, if there is significant leakage or other current draw even when
the load is disconnected, a lower value pull-up resistor and switch can be added externally to set the VOUT
voltage above the VOL,off during open load conditions.
This figure assumes that the device ground and the load ground are at the same potential. In a real system, there
may be a ground shift voltage of 1 V to 2 V.
图 38. Short to Battery and Open Load Detection
The detection circuitry is only enabled when DIA_EN = HIGH and EN = LOW. If VOUT > VOL, the SNS pin will go
to the fault level, but if VOUT < VOL there will be no fault indication. The fault indication will only occur if the SEL1
pin is low.
While the switch is disabled and DIA_EN is high, the fault indication mechanisms will continuously represent the
present status. For example, if VOUT decreases from greater than VOL to less than VOL, the fault indication is
reset. Additionally, the fault indication is reset upon the falling edge of DIA_EN or the rising edge of EN.
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Feature Description (接下页)
DIA_EN
ISNSFH
High-z
High-z
SNS
tOL2
Enabled
VOUT depends on external conditions
VOL
VOUT
EN
t
Switch is disabled and DIA_EN goes
high.
The condition is determined by the
internal comparator.
The open-load fault is
indicated.
Device standby
图 39. Open Load
9.3.2.2 SNS Output
The SNS output may be used to sense the load current if the SEL1 pin is low and there is no fault or device
temperature if the SEL1 pin is high and there is no fault. The sense circuit will provide a current that is
proportional to the selected parameter. This current will be sourced into an external resistor to create a voltage
that is proportional to the selected parameter. This voltage may be measured by an ADC or comparator. In
addition, the SNS pin can be used to measure the FET temperature.
To ensure accurate sensing measurement, the sensing resistor should be connected to the same ground
potential as the μC ADC.
表 3. Analog Sense Transfer Function
PARAMETER
Load current
TRANSFER FUNCTION
ISNSI = IOUT / KSNS = IOUT / 5000
ISNST = (TJ – 25°C) × dISNST / dT + 0.85
Device temperature
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The SNS output will also be used to indicate system faults. ISNS will go to the predefined level, ISNSFH, when there
is a fault. ISNSFH, dISNST/dT, and KSNS are defined in the Specifications section.
Device version F does not have the capability to measure device temperature, so can only measure load current.
9.3.2.2.1 RSNS Value
The following factors should be considered when selecting the RSNS value:
•
•
•
•
Current sense ratio (KSNS)
Largest and smallest diagnosable load current required for application operation
Full-scale voltage of the ADC
Resolution of the ADC
For an example of selecting RISNS value, reference RILIM Calculation in the applications section of this datasheet.
9.3.2.2.1.1 High Accuracy Load Current Sense
In many automotive modules, it is required that the high-side switch provide diagnostic information about the
downstream load. With more complex loads, high accuracy sensing is required. A few examples follow:
•
LED lighting: In many architectures, the body control module (BCM) must be compatible with both
incandescent bulbs and also LED modules. The bulb may be relatively simple to diagnose. However, the LED
module will consume less current and also can include multiple LED strings in parallel. The same BCM is
used in both cases, so the high-side switch can accurately diagnose both load types.
•
Solenoid protection: Often solenoids are precisely controlled by low-side switches. However, in a fault
event, the low-side switch cannot disconnect the solenoid from the power supply. A high-side switch can be
used to continuously monitor several solenoids. If the system current becomes higher than expected, the
high-side switch can disable the module.
9.3.2.2.1.2 SNS Output Filter
To achieve the most accurate current sense value, it is recommended to filter the SNS output. There are two
methods of filtering:
•
Low-Pass RC filter between the SNS pin and the ADC input. This filter is illustrated in 图 43 with typical
values for the resistor and capacitor. The designer should select a CSNS capacitor value based on system
requirements. A larger value will provide improved filtering but a smaller value will allow for faster transient
response.
•
The ADC and microcontroller can also be used for filtering. It is recommended that the ADC collects several
measurements of the SNS output. The median value of this data set should be considered as the most
accurate result. By performing this median calculation, the microcontroller can filter out any noise or outlier
data.
9.3.2.3 Fault Indication and SNS Mux
The following faults will be communicated through the SNS output:
•
Switch shutdown, due to:
–
–
Thermal Shutdown
Current limit
•
Open-Load and VOUT shorted-to-battery
Open-load and Short-to-battery are not indicated while the switch is enabled, although these conditions can still
be detected through the sense current. Hence, if there is a fault indication while the channel is enabled, then it
must be either due to an overcurrent or overtemperature event.
The SNS pin will only indicate the fault if the SEL1 pins is low. When the SEL1 pin is high and the device is set
to measure temperature, the pin will be measuring the channel FET temperature.
For device version F, the FLT pin will pull low when the device is in any of these fault states.
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表 4. Device Version A/B SNS Mux
INPUTS
OUTPUTS
SNS
DIA_EN
SEL1
FAULT DETECT(1)
0
1
1
1
1
X
0
1
0
1
X
0
0
1
1
High-z
Output current
Device temperature
ISNSFH
Device temperature
For device version F, the SEL1 pin has no functionality so the device cannot output a temperature sense current.
In this case, SEL1 should be connected to ground through an RPROT resistor and the SNS behavior will follow the
table below.
表 5. Device Version F SNS Mux
INPUTS
OUTPUTS
DIA_EN
SEL1
FAULT DETECT(1)
SNS
High-z
FLT(2)
High-z
0
1
1
X
X
X
X
0
1
Output current
ISNSFH
High-z
Open-drain
9.3.2.4 Resistor Sharing
Multiple high-side devices may use the same SNS resistor as shown in 图 40. This reduces the total number of
passive components in the system and the number of ADC terminals that are required of the microcontroller.
Microcontroller
GPIO
GPIO
GPIO
DIA_EN
DIA_EN
DIA_EN
DIA_EN
Switch 1
Switch 2
Switch 3
Switch 4
SNS
SNS
SNS
SNS
GPIO
ADC
RPROT
CSNS
RSNS
图 40. Sharing RSNS Among Multiple Devices
(1) Fault Detect encompasses multiple conditions:
(a) Switch shutdown and waiting for retry
(b) Open Load and Short To Battery
(1) Fault Detect encompasses multiple conditions:
(a) Switch shutdown and waiting for retry
(b) Open Load / Short To Battery
(2) Version F Only
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9.3.2.5 High-Frequency, Low Duty-Cycle Current Sensing
Some applications will operate with a high-frequency, low duty-cycle PWM or require fast settling of the SNS
output. For example, a 250 Hz, 5% duty cycle PWM will have an on-time of only 200 µs that must be
accommodated. The micro-controller ADC may sample the SNS signal after the defined settling time tSNSION3
.
图 41. Current Sensing in Low-Duty Cycle Applications
9.4 Device Functional Modes
During typical operation, the TPS1HB08-Q1 can operate in a number of states that are described below and
shown as a state diagram in 图 42.
9.4.1 Off
Off state occurs when the device is not powered.
9.4.2 Standby
Standby state is a low-power mode used to reduce power consumption to the lowest level. Diagnostic
capabilities are not available in Standby mode.
9.4.3 Diagnostic
Diagnostic state may be used to perform diagnostics while the switch is disabled.
9.4.4 Standby Delay
The Standby Delay state is entered when EN and DIA_EN are low. After tSTBY, if the EN and DIA_EN pins are
still low, the device will go to Standby State.
9.4.5 Active
In Active state, the switch is enabled. The diagnostic functions may be turned on or off during Active state.
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Device Functional Modes (接下页)
9.4.6 Fault
The Fault state is entered if a fault shutdown occurs (thermal shutdown or current limit). After all faults are
cleared, the LATCH pin is low, and the retry timer has expired, the device will transition out of Fault state. If the
EN pin is high, the switch will re-enable. If the EN pin is low, the switch will remain off.
VBB < UVLO
OFF
ANY STATE
VBB > UVLO
EN = Low
DIA_EN = Low
t > tSTBY
STANDBY
EN = Low
DIA_EN = High
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
DIAGNOSTIC
STANDBY DELAY
EN = Low
DIA_EN = High
EN = Low
DIA_EN = High
EN = High
DIA_EN = X
ACTIVE
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
!OT_ABS & !OT_REL & !ILIM
& LATCH = Low & tRETRY
expired
OT_ABS || OT_REL ||
ILIM
FAULT
图 42. State Diagram
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10 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
图 43 shows the schematic of a typical application for version A or B of the TPS1HB08-Q1. It includes all
standard external components. This section of the datasheet discusses the considerations in implementing
commonly required application functionality. Version F of the device will replace the ILIM pin with the open drain
FLT pin. In this case, the FLT pin must be connected to a 5 V rail through a 10 kΩ pull up resistor.
CVBB1 CVBB2
VBB
DIA_EN
SEL1
+
RPROT
BAT
œ
RPROT
GND
RGND
DGND
(1)
EN
RPROT
Microcontroller
(1)
LATCH
RPROT
VBB
Optional
CGND
Load
VOUT
RILIM
COUT
ILIM
SNS
Legend
ADC
RPROT
Chassis GND
Module GND
Device GND
RSNS
CSNS
(1) With the ground protection network, the
device ground will be offset relative to the
microcontroller ground.
With the ground protection network, the device ground will be offset relative to the microcontroller ground.
图 43. System Diagram
表 6. Recommended External Components
COMPONENT
RPROT
RSNS
TYPICAL VALUE
15 kΩ
PURPOSE
Protect microcontroller and device I/O pins
1 kΩ
Translate the sense current into sense voltage
Low-pass filter for the ADC input
CSNS
100 pF - 10 nF
4.7 kΩ
RGND
Stabilize GND potential during turn-off of inductive load
Protects device during reverse battery
Set current limit threshold
DGND
BAS21 Diode
5 kΩ - 25 kΩ
RILIM
Filtering of voltage transients (for example, ESD, ISO7637-2) and improved
emissions
CVBB1
4.7 nF to Device GND
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Application Information (接下页)
表 6. Recommended External Components (接下页)
COMPONENT
CVBB2
TYPICAL VALUE
220 nF to Module GND Stabilize the input supply and filter out low frequency noise.
220 nF Filtering of voltage transients (for example, ESD, ISO7637-2)
PURPOSE
COUT
10.1.1 Ground Protection Network
As discussed in the Reverse Battery section, DGND may be used to prevent excessive reverse current from
flowing into the device during a reverse battery event. Additionally, RGND is placed in parallel with DGND if the
switch is used to drive an inductive load. The ground protection network (DGND and RGND) may be shared
amongst multiple high-side switches.
A minimum value for RGND may be calculated by using the absolute maximum rating for IGND. During the reverse
battery condition, IGND = VBB / RGND
:
RGND ≥ VBB / IGND
•
•
Set VBB = –13.5 V
Set IGND = –50 mA (absolute maximum rating)
RGND ≥ –13.5 V / –50 mA = 270 Ω
(2)
In this example, it is found that RGND must be at least 270 Ω. It is also necessary to consider the power
dissipation in RGND during the reverse battery event:
PRGND = VBB2 / RGND
(3)
PRGND = (13.5 V)2 / 270 Ω = 0.675 W
In practice, RGND may not be rated for such a high power. In this case, a larger resistor value should be selected.
10.1.2 Interface With Microcontroller
The ground protection network will cause the device ground to be at a higher potential than the module ground
(and microcontroller ground). This offset will impact the interface between the device and the microcontroller.
Logic pin voltage will be offset by the forward voltage of the diode. For input pins (for example, EN), the designer
must consider the VIH specification of the switch and the VOH specification of the microcontroller. For a system
that does not include DGND, it is required that VOH > VIH. For a system that does include DGND, it is required that
VOH > (VIH + VF). VF is the forward voltage of DGND
.
The sense resistor, RSNS, should be terminated to the microcontroller ground. In this case, the ADC can
accurately measure the SNS signal even if there is an offset between the microcontroller ground and the device
ground.
10.1.3 I/O Protection
RPROT is used to protect the microcontroller I/O pins during system-level voltage transients such as ISO pulses or
reverse battery. The SNS pin voltage can exceed the ADC input pin maximum voltage if the fault or saturation
current causes a high enough voltage drop across the sense resistor. If that can occur in the design (for
example, by switching to a high value RSNS to improve ADC input level), then an appropriate external clamp has
to be designed to prevent a high voltage at the SNS output and the ADC input.
10.1.4 Inverse Current
Inverse current occurs when 0 V < VBB < VOUT. In this case, current may flow from VOUT to VBB. Inverse current
cannot be caused by a purely resistive load. However, a capacitive or inductive load can cause inverse current.
For example, if there is a significant amount of load capacitance and the VBB node has a transient droop, VOUT
may be greater than VBB
.
The TPS1HB08-Q1 will not detect inverse current. When the switch is enabled, inverse current will pass through
the switch. When the switch is disabled, inverse current may pass through the MOSFET body diode. The device
will continue operating in the normal manner during an inverse current event.
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10.1.5 Loss of GND
The ground connection may be lost either on the device level or on the module level. If the ground connection is
lost, the switch will be disabled. If the switch was already disabled when the ground connection was lost, the
switch will remain disabled. When the ground is reconnected, normal operation will resume.
10.1.6 Automotive Standards
The TPS1HB08-Q1 is designed to be protected against all relevant automotive standards to ensure reliable
operations when connected to a 12-V automotive battery.
10.1.6.1 ISO7637-2
The TPS1HB08-Q1 is tested according to the ISO7637-2:2011 (E) standard. The test pulses are applied both
with the switch enabled and disabled. The test setup includes only the DUT and minimal external components:
CVBB, COUT, DGND, and RGND
.
Status II is defined in ISO 7637-1 Function Performance Status Classification (FPSC) as: “The function does not
perform as designed during the test but returns automatically to normal operation after the test”. See 表 7 for
ISO7637-2:2011 (E) expected results.
表 7. ISO7637-2:2011 (E) Results
TEST PULSE SEVERITY LEVEL WITH
STATUS II FUNCTIONAL PERFORMANCE
MINIMUM NUMBER
OF PULSES OR TEST
TIME
BURST CYCLE / PULSE REPETITION TIME
TEST
PULSE
LEVEL
US
MIN
0.5 s
0.20
MAX
--
1
2a(1)
2b
III
III
IV
IV
IV
–112 V
+55 V
+10 V
–220 V
+150 V
500 pulses
500 pulses
10 pulses
1 hour
5 s
0.5 s
90 ms
90 ms
5 s
3a
100 ms
100 ms
3b
1 hour
(1) 1 µF capacitance on CVBB is required for passing level 3 ISO7637 pulse 2 A.
10.1.6.2 TPS1HB08-Q1 AEC-Q100-012 Short Circuit Reliability
The TPS1HB08-Q1 is tested according to the AEC-Q100-012 Short Circuit Reliability standard. This test is
performed to demonstrate the robustness of the device against VOUT short-to-ground events. Test conditions and
test procedures are summarized in . For further details, refer to the AEC-Q100-012 standard document.
Test conditions:
•
•
•
•
LATCH = 0 V
10 units from 3 separate lots for a total of 30 units.
Lsupply = 5 μH, Rsupply = 10 mΩ
VBB = 14 V
Test procedure:
•
•
•
Parametric data is collected on each unit pre-stress
Each unit is enabled into a short-circuit with the required short circuit cycles or duration as specified
Functional testing is performed on each unit post-stress to verify that the part still operates as expected
The cold repetitive test is run at 85ºC which is the worst case condition for the device to sustain a short circuit.
The cold repetitive test refers to the device being given time to cool down between pulses, rather than being run
at a cold temperature. The load short circuit is the worst case situation, since the energy stored in the cable
inductance can cause additional harm. The fast response of the device ensures current limiting occurs quickly
and at a current close to the load short condition. In addition, the hot repetitive test is performed as well.
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表 8. AEC-Q100-012 Test Results
DEVICE
VERSION
NO. OF CYCLES /
NO. OF
UNITS
NO. OF
FAILS
TEST
LOCATION OF SHORT
DURATION
Cold Repetitive - Long
Pulse
Load Short Circuit, Lshort = 5 μH, Rshort
50 mΩ, TA = -40ºC
=
=
=
<
=
F
F
F
F
F
100 k cycles
30
30
30
30
30
0
0
0
0
0
Cold Repetitive - Long
Pulse - Load Short(1)
Load Short Circuit, Lshort = 5 μH, Rshort
200 mΩ, TA = 85ºC
100 k cycles
100 k cycles
100 k cycles
100 hours
Cold Repetitive - Long
Pulse - Load Short(1)
Load Short Circuit, Lshort = 5 μH, Rshort
200 mΩ, TA = -40ºC
Cold Repetitive - Long
Pulse - Terminal Short
Load Short Circuit, Lshort < 1 μH, Rshort
20 mΩ, TA = 85ºC
Load Short Circuit, Lshort = 5 μH, Rshort
100 mΩ, TA = 25ºC
Hot Repetitive - Long Pulse
(1) For Cold Repetitive short, 200 mΩ Rshort is used so that the device is at a higher junction temperature before the short circuit event,
increasing the harshness of the test.
10.1.7 Thermal Information
When outputting current, the TPS1HB08-Q1 will heat up due to the power dissipation. The transient thermal
impedance curve can be used to determine the device temperature during a pulse of a given length. This ZθJA
value corresponds to a JEDEC standard 2s2p thermal test PCB with thermal vias.
35
30
25
20
15
10
5
0
0.0001
0.0010.002 0.005 0.01 0.02 0.05 0.1 0.20.3 0.5
Time (s)
1
2
3 4 567 10 20 30 50 100 200
500 1000
Ther
图 44. TPS1HB08-Q1 Transient Thermal Impedance
10.2 Typical Application
This application example demonstrates how the TPS1HB08-Q1 device can be used to power resistive heater
loads in automotive seats. In this example, we consider a heater load that is powered by the device. This is just
one example of the many applications where this device can fit.
版权 © 2019–2020, Texas Instruments Incorporated
35
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
Typical Application (接下页)
图 45. Block Diagram for Powering Heater Load
10.2.1 Design Requirements
For this design example, use the input parameters shown in 表 9.
表 9. Design Parameters
DESIGN PARAMETER
VBB
EXAMPLE VALUE
13.5 V
Load - Heater
Load Current Sense
ILIM
130 W max
100 mA to 20 A
12 A
Ambient temperature
RθJA
70°C
32.6°C/W (depending on PCB)
A
Device Version
10.2.2 Detailed Design Procedure
10.2.2.1 Thermal Considerations
The 130 W heater load will cause a DC current in the channel under maximum load power condition of around
9.6 A. Therefore, this current at 13.5 V will assume worst case heating.
Power dissipation in the switch is calculated in 公式 4. RON is assumed to be 16 mΩ because this is the
maximum specification at high temperature. In practice, RON will almost always be lower.
36
版权 © 2019–2020, Texas Instruments Incorporated
TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
PFET = I2 × RON
PFET = (9.6 A)2 × 16 mΩ = 1.47 W
(4)
(5)
This means that the maximum FET power dissipation is 1.47 W. The junction temperature of the device can be
calculated using 公式 6 and the RθJA value from the Specifications section.
TJ = TA + RθJA × PFET
(6)
TJ = 70°C + 32.6°C/W × 1.47 W = 117.9°C
The maximum junction temperature rating for the TPS1HB08-Q1 is TJ = 150°C. Based on the above example
calculation, the device temperature will stay below the maximum rating even at this high level of current.
10.2.2.2 RILIM Calculation
In this application, the TPS1HB08-Q1 must allow for the maximum DC current with margin but minimize the
energy in the switch during a fault condition by minimizing the current limit. For this application, the best ILIM set
point is approximately 12 A. 公式 7 allows you to calculate the RILIM value that is placed from the ILIM pins to VBB
.
RILIM is calculated in kΩ.
RILIM = KCL / ICL
(7)
(8)
Because this device is version A, the KCL value in the Specifications section is 160 A × kΩ.
RILIM = 160 (A × kΩ) / 12 A = 13.3 kΩ
For a ILIM of 12 A, the RILIM value should be set at around 13.3 kΩ
10.2.2.3 Diagnostics
If the resistive heating load is disconnected (heater malfunction), an alert is desired. Open-load detection can be
performed in the switch-enabled state with the current sense feature of the TPS1HB08-Q1 device. Under open
load condition, the current in the SNS pin will be the fault current and the can be detected from the sense voltage
measurement.
10.2.2.3.1 Selecting the RISNS Value
表 10 shows the requirements for the load current sense in this application. The KSNS value is specified for the
device and can be found in the Specifications section.
表 10. RSNS Calculation Parameters
PARAMETER
EXAMPLE VALUE
Current Sense Ratio (KSNS
)
5000
20 A
Largest diagnosable load current
Smallest diagnosable load current
Full-scale ADC voltage
100 mA
5 V
ADC resolution
10 bit
The load current measurement requirements of 20 A ensures that even in the event of a overcurrent surpassing
the set current limit, the MCU can register and react by shutting down the TPS1HB08-Q1, while the low level of
100 mA allows for accurate measurement of low load currents.
The RSNS resistor value should be selected such that the largest diagnosable load current puts VSNS at about
95% of the ADC full-scale. With this design, any ADC value above 95% can be considered a fault. Additionally,
the RSNS resistor value should ensure that the smallest diagnosable load current does not cause VSNS to fall
below 1 LSB of the ADC. With the given example values, a 1.2-kΩ sense resistor satisfies both requirements
shown in 表 11.
表 11. VSNS Calculation
LOAD (A)
SENSE RATIO
5000
ISNS (mA)
RSNS (Ω)
1200
VSNS (V)
0.024
% of 5-V ADC
0.5%
0.1
20
0.02
4
5000
1200
4.800
96.0%
版权 © 2019–2020, Texas Instruments Incorporated
37
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
10.3 Typical Application
This application example demonstrates how the TPS1HB08-Q1 device can be used to power bulb loads in
automotive headlights. In this example, we consider a 65 W bulb that is powered by the device. This is just one
example of the many applications where this device can fit.
12 V Battery/
Cap Bank
Temperature
Chamber
DIA_EN
VBB
65 mꢀ
~2m 18 AWG
SEL1
BULB LOAD
VOUT
SNS
ILIM
µC
LATCH
EN
GND
10mꢀ
~2m 8 AWG
图 46. Block Diagram for Driving Bulb Load
10.3.1 Design Requirements
For this design example, use the input parameters shown in 表 12.
表 12. Design Parameters
DESIGN PARAMETER
VBB
EXAMPLE VALUE
16 V
65 W W max
94 A
Load - Bulb
Fixed ILIM
Ambient temperature
Bulb Temperature in Chamber
25°C
-40°C
Cable Impedance from Device to
Bulb
65 mΩ
Device Version
F
10.3.2 Detailed Design Procedure
The typical bulb test setup is where the device is at 25°C and the bulb is in a temperature chamber at -40°C. The
bulb needs to be kept at -40°C so that the impedance is very low and the inrush current will be the highest. The
impedance of the cables is important because it will change the inrush current of the bulb as well. The F version
of the TPS1HB08-Q1 has a very high fixed current limit so that the inrush current of the bulb can be passed
without limitation.
38
版权 © 2019–2020, Texas Instruments Incorporated
TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
10.3.3 Application Curves
图 47. TPS1HB08-Q1 Version F 65W Bulb Turn On
11 Power Supply Recommendations
The TPS1HB08-Q1 device is designed to operate in a 12-V automotive system. The nominal supply voltage
range is 6 V to 18 V as measured at the VBB pin with respect to the GND pin of the device. In this range the
device meets full parametric specifications as listed in the Electrical Characteristics table. The device is also
designed to withstand voltage transients beyond this range. When operating outside of the nominal voltage range
but within the operating voltage range, the device will exhibit normal functional behavior. However, parametric
specifications may not be specified outside the nominal supply voltage range.
表 13. Operating Voltage Range
VBB Voltage Range
Note
Transients such as cold crank and start-stop, functional operation
are specified but some parametric specifications may not apply. The
device is completely short-circuit protected up to 125°C
3 V to 6 V
Nominal supply voltage, all parametric specifications apply. The
device is completely short-circuit protected up to 125°C
6 V to 18 V
Transients such as jump-start and load-dump, functional operation
specified but some parametric specifications may not apply
18 V to 40 V
版权 © 2019–2020, Texas Instruments Incorporated
39
TPS1HB08-Q1
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
www.ti.com.cn
12 Layout
12.1 Layout Guidelines
To achieve optimal thermal performance, connect the exposed pad to a large copper pour. On the top PCB layer,
the pour may extend beyond the package dimensions as shown in the example below. In addition to this, it is
recommended to also have a VBB plane either on one of the internal PCB layers or on the bottom layer.
Vias should connect this plane to the top VBB pour.
Ensure that all external components are placed close to the pins. Device current limiting performance can be
harmed if the RILIM is far from the pins and extra parasitics are introduced.
12.2 Layout Example
The layout example is for device versions A/B.For device version F, the ILIM pin will be replaced by the FLT pin.
图 48. 16-PWP Layout Example
40
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TPS1HB08-Q1
www.ti.com.cn
ZHCSJP9C –MAY 2019–REVISED JANUARY 2020
13 器件和文档支持
13.1 文档支持
13.1.1 相关文档
请参阅如下相关文档:
•
•
•
•
TI《如何利用智能高侧开关驱动电感、电容和照明负载》
TI《智能电源开关的短路可靠性测试》
TI《适用于高侧开关的反向电池保护》
TI《智能电源开关的可调电流限制》
13.2 接收文档更新通知
要接收文档更新通知,请导航至 ti.com.cn 上的器件产品文件夹。单击右上角的通知我进行注册,即可每周接收产
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
13.3 支持资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
版权 © 2019–2020, Texas Instruments Incorporated
41
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS1HB08AQPWPRQ1
TPS1HB08BQPWPRQ1
TPS1HB08FQPWPRQ1
ACTIVE
HTSSOP
HTSSOP
HTSSOP
PWP
16
16
16
3000
3000
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
Level-3-260C-168HRS
Level-3-260C-168HRS
-40 to 125
-40 to 125
-40 to 125
1HB08A
ACTIVE
ACTIVE
PWP
RoHS-Exempt
& Green
NIPDAU
NIPDAU
1HB08B
1HB08F
PWP
RoHS-Exempt
& Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
25-May-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS1HB08AQPWPRQ1 HTSSOP PWP
TPS1HB08BQPWPRQ1 HTSSOP PWP
TPS1HB08FQPWPRQ1 HTSSOP PWP
16
16
16
3000
3000
3000
330.0
330.0
330.0
12.4
12.4
12.4
6.9
6.9
6.9
5.6
5.6
5.6
1.6
1.6
1.6
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-May-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS1HB08AQPWPRQ1
TPS1HB08BQPWPRQ1
TPS1HB08FQPWPRQ1
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
16
16
16
3000
3000
3000
350.0
350.0
367.0
350.0
350.0
367.0
43.0
43.0
38.0
Pack Materials-Page 2
PACKAGE OUTLINE
PWP0016M
PowerPADTM TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE
6.6
6.2
C
TYP
A
PIN 1 INDEX
AREA
0.1 C
SEATING
PLANE
14X 0.65
16
1
2X
5.1
4.9
4.55
NOTE 3
8
9
0.30
16X
4.5
4.3
B
0.19
0.1
C A B
SEE DETAIL A
(0.15) TYP
2X 0.6 MAX
NOTE 5
THERMAL
PAD
2X 0.31 MAX
NOTE 5
8
9
0.25
1.2 MAX
GAGE PLANE
3.37
2.48
17
0.15
0.05
0.75
0.50
0 -8
A
20
DETAIL A
TYPICAL
0.45
2X
16
1
0.25
NOTE 5
0.32
0.16
2X
NOTE 5
2X (0.13)
2.78
2.20
4223886/B 09/2019
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
PWP0016M
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(3.4)
NOTE 9
SOLDER MASK
DEFINED PAD
(2.78)
16X (1.5)
METAL COVERED
BY SOLDER MASK
SYMM
16
16X (0.45)
1
(1.2) TYP
(R0.05) TYP
SYMM
(3.37)
17
(5)
NOTE 9
(0.6)
14X (0.65)
(
0.2) TYP
VIA
9
8
(1.2) TYP
SEE DETAILS
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
SOLDER MASK DETAILS
4223886/B 09/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
10. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged
or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0016M
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(2.78)
BASED ON
0.125 THICK
STENCIL
16X (1.5)
METAL COVERED
BY SOLDER MASK
1
16
16X (0.45)
(R0.05) TYP
SYMM
(3.37)
17
BASED ON
0.125 THICK
STENCIL
14X (0.65)
8
9
SYMM
(5.8)
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
3.11 X 3.77
2.78 X 3.37 (SHOWN)
2.54 X 3.08
0.125
0.15
0.175
2.35 X 2.85
4223886/B 09/2019
NOTES: (continued)
11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
12. Board assembly site may have different recommendations for stencil design.
www.ti.com
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Copyright © 2023,德州仪器 (TI) 公司
相关型号:
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TI
TPS1HB35-Q1
TPS1HB35-Q1 40-V, 35-mΩ Single-Channel Smart High-Side SwitchWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TI
TPS1HB35-Q1_V01
TPS1HB35-Q1 40-V, 35-mΩ Single-Channel Smart High-Side SwitchWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TI
TPS1HB35AQPWPRQ1
TPS1HB35-Q1 40-V, 35-mΩ Single-Channel Smart High-Side SwitchWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TI
TPS1HB35BQPWPRQ1
TPS1HB35-Q1 40-V, 35-mΩ Single-Channel Smart High-Side SwitchWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TI
TPS1HB35CQPWPRQ1
TPS1HB35-Q1 40-V, 35-mΩ Single-Channel Smart High-Side SwitchWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TI
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