TPS2015DR [TI]
低电平有效的 1A 负载、4-5.5V、80mΩ USB 电源开关 | D | 8 | 0 to 125;
| 型号： | TPS2015DR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 低电平有效的 1A 负载、4-5.5V、80mΩ USB 电源开关 | D | 8 | 0 to 125 开关 驱动 电源开关 光电二极管 外围驱动器 驱动程序和接口 |
| 文件： | 总22页 (文件大小：430K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
D OR P PACKAGE
(TOP VIEW)
95-mΩ Maximum (5-V Input) High-Side
MOSFET Switch
Short-Circuit Protection and Thermal
Protection
GND
IN
OUT
OUT
OUT
OC
1
2
3
4
8
7
6
5
Logic Overcurrent Output
4-V to 7-V Operating Range
IN
EN
Enable Input Compatible With 3-V and 5-V
Logic
Controlled Rise and Fall Times Limit
Current Surges and Minimize EMI
Undervoltage Lockout Ensures That Switch
is Off at Start-Up
10-µA Maximum Standby Current
Available in Space-Saving 8-Pin SOIC and
8-Pin PDIP
0°C to 125°C Operating Junction
Temperature Range
12-kV Output, 6-kV Input Electrostatic-
Discharge Protection
description
The TPS2014 and TPS2015 power distribution switches are intended for applications where heavy capacitive
loads and short circuits are likely to be encountered. The high-side switch is a 95-mΩ n-channel MOSFET. The
switch is controlled by a logic enable that is compatible with 3-V and 5-V logic. Gate drive is provided by an
internal charge pump designed to control the power switch rise times and fall times to minimize current surges
during switching. The charge pump requires no external components and allows operation from supplies as low
as 4 V.
When the output load exceeds the current-limit threshold or a short is present, the TPS20xx limits the output
current to a safe level by switching into a constant-current mode, and the overcurrent logic output is set to low.
Continuous heavy overloads and short circuits will increase the power dissipation in the switch and cause the
junction temperature to rise. A thermal protection circuit is implemented, which shuts the switch off to prevent
damage when the junction temperature exceeds its thermal limit. An undervoltage lockout is provided to ensure
the switch is in the off state at start-up.
The TPS2014 and TPS2015 differ only in short-circuit current limits. The TPS2014 is designed to limit at 1.2 A
load and the TPS2015 limits at 2 A (see the available options table). The TPS20xx is available in 8-pin
small-outline integrated circuit (SOIC) and 8-pin PDIP packages, and operates over a junction temperature
range of 0°C to 125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
RECOMMENDED MAXIMUM
CONTINUOUS LOAD CURRENT
TYPICAL SHORT-CIRCUIT
CHIP FORM
(Y)
T
A
SOIC
PDIP
(P)
CURRENT LIMIT AT 25°C
†
(D)
0.6 A
1 A
1.2 A
2 A
TPS2014D
TPS2015D
TPS2014P
TPS2015P
TPS2014Y
TPS2015Y
0°C TO 85°C
†
The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2014DR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
functional block diagram
Power Switch
†
CS
IN
OUT
OC
Charge
Pump
Current
Limit
EN
Driver
UVLO
Thermal
Sense
GND
†
Current Sense
TPS20xxY chip information
This chip, when properly assembled, displays characteristics similar to those of the TPS20xx. Ultrasonic
bonding may be used on the doped aluminium bonding pads. The chip may be mounted with conductive epoxy
or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(1)
(8)
(1)
(2)
(3)
(8)
(7)
GND
IN
OUT
OUT
OUT
(6)
(5)
TPS20xxY
IN
(2)
(4)
EN
OC
91
(3)
CHIP THICKNESS: 15 TYPICAl
BONDING PADS: 4 × 4 MINIMUM
max = 150°C
(7)
(6)
T
J
(5)
(4)
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
74
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
Terminal Functions
TERMINAL
NAME NO.
I/O
DESCRIPTION
EN
4
1
I
I
Enable input. Logic low at EN turns the power switch on.
GND
IN
Ground
2, 3
5
I
Input voltage
OC
OUT
O
O
OC is asserted active low during a fault condition.
Power switch output
6–8
detailed description
power switch
The power switch is an n-channel MOSFET with a maximum on-state resistance of 95 mΩ (V
configured as a high-side switch.
= 5 V),
I(IN)
charge pump
An internal 100-kHz charge pump supplies power to the driver circuit and provides the necessary voltage to pull
the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 4 V and
requires very little supply current.
driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range instead of the
microsecond or nanosecond range for a standard FET.
enable (EN)
A logic high on EN turns off the power switch and the bias for the charge pump, driver, and other circuitry to
reduce the supply current to less than 10 µA. A logic zero input restores bias to the drive and control circuits
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.
overcurrent (OC)
OC is an open-drain logic output that is asserted (active low) when an overload or short circuit is encountered.
The output remains asserted until the overload or short-circuit condition is removed.
current sense
A sense FET monitors the current supplied to the load. The sense FET provides a much more efficient way to
measure current than conventional resistance methods. When an overload or short circuit is encountered, the
current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives
the power FET into its linear region, which switches the output into a constant current mode and simply holds
the current constant while varying the voltage on the load.
thermal sense
An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to
approximately to 180°C. Hysteresis is built into the thermal sense circuit. After the device has cooled
approximately 20°C, the switch turns back on. The switch continues to cycle off and on until the fault is removed.
undervoltage lockout
An internal voltage sense monitors the input voltage. When the input voltage is below 3.2 V nominal, a control
signal turns off the power switch.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range, V (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
I
Output voltage range, V (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
+ 0.3 V
O
I(IN)
Input voltage range, V at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
I
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 125°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to GND.
DISSIPATION RATING TABLE
DERATING FACTOR
T
≤ 25°C
T
A
= 70°C
T = 125°C
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
P
D
1175 mW
9.4 mW/°C
5.8 mW/°C
752 mW
464 mW
235 mW
145 mW
725 mW
recommended operating conditions
MIN
4
MAX
5.5
5.5
0.6
1
UNIT
V
Input voltage, V
I
Input voltage, V at EN
I
0
V
TPS2014
TPS2015
0
Continuous output current, I
A
O
0
Operating virtual junction temperature, T
0
125
°C
J
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, EN = 0 V (unless otherwise noted)
O
power switch
†
PARAMETER
TEST CONDITIONS
MIN
TYP
75
MAX
95
UNIT
V = 5.5 V,
I
T = 25°C
J
V = 5 V,
T = 25°C
80
95
I
J
r
On-state resistance
mΩ
on
V = 4.5V,
I
T = 25°C
J
90
110
110
1
V = 4 V,
I
T = 25°C
J
96
EN = V ,
T = 25°C
J
0.001
I
I
t
t
Leakage current, output
Rise time, output
µA
ms
ms
lkg
EN = V ,
0°C ≤ T ≤ 125°C
10
I
J
V = 5.5 V,
I
T = 25°C
J
C
C
C
C
= 1 µF
= 1 µF
= 1 µF
= 1 µF
4
3.8
3.9
3.5
L
L
L
L
r
f
V = 4 V,
I
T = 25°C
J
V = 5.5 V,
I
T = 25°C
J
Fall time, output
V = 4 V,
I
T = 25°C
J
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, EN = 0 V (unless otherwise noted) (continued)
O
enable input (EN)
PARAMETER
TEST CONDITIONS
4 V ≤ V ≤ 5.5 V
MIN
MAX
UNIT
V
V
V
High-level input voltage
Low-level input voltage
Input current
2
IH
I
4 V ≤ V ≤ 5.5 V
0.8
0.5
20
V
IL
I
I
t
t
EN = 0 V or EN = V
–0.5
µA
I
I
Propagation (delay) time, low to high output
Propagation (delay) time, high to low output
C
C
= 1 µF
= 1 µF
PLH
PHL
L
L
ms
40
current limit
†
PARAMETER
TEST CONDITIONS
MIN
0.66
1.1
TYP
1.2
2
MAX
1.8
3
UNIT
TPS2014
TPS2015
I
Short-circuit output current
T = 25°C, V = 5.5 V
A
OS
J
I
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
supply current
PARAMETER
TEST CONDITIONS
T = 25°C
MIN
TYP
MAX
10
UNIT
0.015
J
I
I
Supply current, low-level output
Supply current, high-level output
µA
EN = V
DDL
I
0°C ≤ T ≤ 125°C
10
J
T = 25°C
J
73
100
100
EN = 0 V
µA
DDH
0°C ≤ T ≤ 125°C
J
undervoltage lockout
PARAMETER
MIN
TYP
MAX
UNIT
V
IL
Low-level input voltage
2
3.2
4
V
OC
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
5
UNIT
I
Short-circuit output current
Low-level output voltage
0°C ≤ T ≤ 125°C
OS
J
mA
V
OL
0.3
0°C ≤ T ≤ 125°C
J
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, EN = 0 V (unless otherwise noted)
O
power switch
TPS2014Y, TPS2015Y
†
PARAMETER
TEST CONDITIONS
T = 25°C
UNIT
MIN
TYP
75
MAX
V = 5.5 V,
I
J
V = 5 V,
T = 25°C
80
I
J
r
On-state resistance
mΩ
on
V = 4.5V,
I
T = 25°C
J
90
V = 4 V,
I
T = 25°C
J
96
EN = V ,
T = 25°C
0.001
10
I
J
I
t
t
Leakage current, output
Rise time, output
µA
ms
ms
lkg
EN = V ,
0°C ≤ T ≤ 125°C
J
I
V = 5.5 V,
I
T = 25°C
J
C
C
C
C
= 1 µF
= 1 µF
= 1 µF
= 1 µF
4
L
L
L
L
r
f
V = 4 V,
I
T = 25°C
J
3.8
3.9
3.5
V = 5.5 V,
I
T = 25°C
J
Fall time, output
V = 4 V,
I
T = 25°C
J
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
enable input (EN)
TPS2014Y, TPS2015Y
PARAMETER
TEST CONDITIONS
4 V ≤ V ≤ 5.5 V
UNIT
MIN
TYP
2
MAX
V
V
High-level input voltage
Low-level input voltage
Input current
V
V
IH
I
4 V ≤ V ≤ 5.5 V
0.8
0.5
20
IL
I
I
t
t
EN = 0 V or EN = V
µA
I
I
Propagation (delay) time, low to high output
Propagation (delay) time, high to low output
C
C
= 1 µF
= 1 µF
PLH
PHL
L
L
ms
40
current limit
TPS2014Y, TPS2015Y
†
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
1.2
2
MAX
TPS2014
TPS2015
I
Short-circuit output current
T = 25°C, V = 5.5 V
A
OS
J
I
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
supply current
TPS2014Y, TPS2015Y
PARAMETER
TEST CONDITIONS
T = 25°C
UNIT
µA
MIN
TYP
0.015
10
MAX
J
I
I
Supply current, low-level output
Supply current, high-level output
EN = V
DDL
I
0°C ≤ T ≤ 125°C
J
T = 25°C
J
73
EN = 0 V
µA
DDH
0°C ≤ T ≤ 125°C
100
J
undervoltage lockout
TPS2014Y, TPS2015Y
PARAMETER
UNIT
MIN
TYP
MAX
V
IL
Low-level input voltage
3.2
V
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, EN = 0 V (unless otherwise noted) (continued)
O
OC
TPS2014Y, TPS2015Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
5
MAX
I
Short-circuit output current
Low-level output voltage
0°C ≤ T ≤ 125°C
OS
J
mA
V
OL
0.3
0°C ≤ T ≤ 125°C
J
PARAMETER MEASUREMENT INFORMATION
Table of Timing Diagrams
FIGURE
Propagation Delay and Rise Time With 1-µF Load, V
= 5 V
1
2
3
4
5
6
7
8
I(IN)
= 5 V
Propagation Delay and Fall Time With 1-µF Load, V
I(IN)
TPS2014 Short-Circuit Current. Short is Applied to Enabled Device, V
TPS2015 Short-Circuit Current. Short is Applied to Enabled Device, V
= 5 V
= 5 V
I(IN)
I(IN)
TPS2014 Threshold Current, V
TPS2015 Threshold Current, V
= 5 V
= 5 V
I(IN)
I(IN)
TPS2014 (Enabled) into Short Circuit, V
= 5 V
= 5 V
I(IN)
I(IN)
TPS2015 (Enabled) into Short Circuit, V
6
4
2
0
6
4
2
0
–2
9
10
0
1
2
3
4
5
6
7
8
t – Time – ms
Figure 1. Propagation Delay and Rise Time With 1-µF Load, V
= 5 V
I(IN)
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
PARAMETER MEASUREMENT INFORMATION
6
4
2
0
6
4
2
0
–2
45 50
0
5
10 15 20 25 30 35 40
t – Time – ms
Figure 2. Propagation Delay and Fall Time With 1-µF Load, V
= 5 V
I(IN)
10
5
0
–5
–10
2
1
0
–1
–2
0
20
2
4
6
8
10 12 14 16 18
t – Time – ms
Figure 3. TPS2014 Short-Circuit Current. Short is Applied to Enabled Device, V
= 5 V
I(IN)
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
PARAMETER MEASUREMENT INFORMATION
10
5
0
–5
–10
3
2
1
0
–1
–2
0
20
2
4
6
8
10 12 14 16 18
t – Time – ms
Figure 4. TPS2015 Short-Circuit Current. Short is Applied to Enabled Device, V
= 5 V
I(IN)
6
4
2
0
4
3
–2
2
1
0
–1
0
20
2
4
6
8
10 12 14 16 18
t – Time – ms
Figure 5. TPS2014 Threshold Current, V
= 5 V
I(IN)
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
PARAMETER MEASUREMENT INFORMATION
10
5
4
4
3
2
1
0
–5
0
–1
0
200
20 40 60 80 100 120 140 160 180
t – Time – ms
Figure 6. TPS2015 Threshold Current, V
= 5 V
I(IN)
6
5
4
3
2
1
0
–1
–2
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
t – Time – ms
Figure 7. TPS2014 (Enabled) into Short Circuit, V
= 5 V
I(IN)
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
PARAMETER MEASUREMENT INFORMATION
12
10
8
6
4
2
0
–2
–4
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
t – Time – ms
Figure 8. TPS2015 (Enabled) into Short Circuit, V
= 5 V
I(IN)
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
9
Turn-On Delay Time vs Input Voltage
Turn-Off Delay Time vs Input Voltage
10
Rise Time vs Output Current
11
Fall Time vs Output Current
12
Supply Current, Output Enabled vs Junction Temperature
Supply Current, Output Enabled vs Junction Temperature
Supply Current, Output Enabled vs Input Voltage
Supply Current, Output Enabled vs Input Voltage
On-State Resistance vs Junction Temperature
On-State Resistance vs Input Voltage
13
14
15
16
17
18
Input Voltage to Output Voltage vs Input Voltage
Short-Circuit Output Current vs Input Voltage
Threshold Trip Current vs Input Voltage
19
20
21
Short-Circuit Output Current vs Junction Temperature
UVLO Trip Voltage vs Junction Temperature
22
23
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
TYPICAL CHARACTERISTICS
TURN-OFF DELAY TIME
vs
TURN-ON DELAY TIME
vs
INPUT VOLTAGE
INPUT VOLTAGE
5
4.75
4.5
20
18.4
16.8
15.2
T
C
= 25°C
= 1 µF
T
C
= 25°C
= 1 µF
J
L
J
L
4.25
4
3.75
3.4
13.6
12
4
4.25
4.5
4.75
5
5.25
5.5
4
4.25
4.5
4.75
5
5.25
5.5
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 9
Figure 10
FALL TIME
vs
OUTPUT CURRENT
RISE TIME
vs
OUTPUT CURRENT
3.2
3
2.7
T
C
= 25°C
= 1 µF
J
L
I
T
C
= 25°C
= 1 µF
J
L
I
V = 5 V
2.6
2.5
V = 5 V
2.8
2.4
2.3
2.6
2.4
2.2
2.1
2
2.2
0.2
0.4
0.4
0.8
1
1.2
1.4
0.2
0.4
0.6
0.8
1
1.2
1.4
I
O
– Output Current – A
I
O
– Output Current – A
Figure 11
Figure 12
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
TYPICAL CHARACTERISTICS
SUPPLY CURRENT, OUTPUT DISABLED
SUPPLY CURRENT, OUTPUT ENABLED
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
7
90
85
I
= 0 A
O
6.5
5.5 V
V = 5.5 V
I
6
5.5
5
80
75
70
65
60
55
50
V = 5 V
I
5 V
V = 4.5 V
I
4.5
4
4.5 V
4 V
V = 4 V
I
3.5
3
–50 –25
0
25
50
75
100
125
–50 –25
0
25
50
75
100
125
T – Junction Temperature – °C
J
T
J
– Junction Temperature – °C
Figure 13
Figure 14
SUPPLY CURRENT, OUTPUT DISABLED
SUPPLY CURRENT, OUTPUT ENABLED
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
6.8
6.4
90
85
6
5.6
5.2
4.8
4.4
4
80
75
70
T
= 125°C
J
125°C
T
J
= 25°C
65
60
55
–40°C
3.6
4
4.25
4.5
4.75
5
5.25
5.5
4
4.25
4.5
4.75
5
5.25
5.5
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 15
Figure 16
13
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TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
TYPICAL CHARACTERISTICS
ON-STATE RESISTANCE
vs
ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
INPUT VOLTAGE
130
120
100
95
90
85
80
75
70
T
J
= 25°C
110
100
90
V = 4 V
I
V = 5.5 V
80
I
70
60
50
–50 –25
0
25
50
75
100
125
4
4.3
4.5
4.8
5
5.3
5.5
T
J
– Junction Temperature – °C
V – Input Voltage – V
I
Figure 17
Figure 18
INPUT VOLTAGE TO OUTPUT VOLTAGE
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
0.24
2.15
2.05
I
O
= 1.5 A
0.2
0.16
0.12
0.08
0.04
0
1.95
1.85
TSP2015
I
I
= 1 A
O
1.75
1.65
= 600 mA
O
1.55
1.45
1.35
TSP2014
I
O
= 200 mA
4
4.25
4.5
4.75
5
5.25
5.5
4
4.25
4.5
4.75
5
5.25
5.5
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 19
Figure 20
14
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TPS2014, TPS2015
POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
TYPICAL CHARACTERISTICS
THRESHOLD TRIP CURRENT
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
INPUT VOLTAGE
JUNCTION TEMPERATURE
5
4.8
4.6
4.4
2.4
TPS2015
2.2
2
TPS2015
TPS2014
4.2
4
1.8
1.6
1.4
1.2
3.8
3.6
3.4
TPS2014
3.2
3
1
4
4.3
4.6
4.9
5.2
5.5
–50 –25
0
25
50
75
100
125
V – Input Voltage – V
I
T
J
– Junction Temperature – °C
Figure 21
Figure 22
UVLO TRIP VOLTAGE
vs
JUNCTION TEMPERATURE
4.3
4
3.7
3.4
3.1
2.8
2.5
2.2
–50 –25
0
25
50
75
100
125
T
J
– Junction Temperature – °C
Figure 23
15
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POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
APPLICATION INFORMATION
TPS2014
External Load
2
3
8
7
6
Power Supply
4 V – 5 V
IN
IN
OUT
+
OUT
OUT
22 µF
0.1 µF
0.1 µF
10 kΩ
5
OC
EN
Overcurrent Output
Load Enable
4
GND
1
Figure 24. Typical Application
power supply considerations
The TPS20xx has multiple inputs and outputs that must be connected in parallel to minimize voltage drop and
prevent unnecessary power dissipation.
A 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended. A high-value
electrolytic capacitor is also desirable when the output load is heavy or has large paralleled capacitors.
Bypassing the output with a 0.1-µF ceramic capacitor improves the immunity of the device to electrostatic
discharge (ESD).
overcurrent
A sense FET is employed to check for overcurrent conditions. Unlike sense resistors and polyfuses, sense FETs
do not increase series resistance to the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Shutdown only occurs when
the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before V
immediately switches into a constant-current output.
has been applied (see Figures 7 and 8). The TPS20xx senses the short and
I(IN)
Under the second condition, the short occurs while the device is enabled. At the instant the short occurs, very
high currents flow for a short time before the current-limit circuit can react (see Figures 3 and 4). After the
current-limit circuit has tripped, the device limits normally.
Under the third condition, the load has been gradually increased beyond the recommended operating current.
The current is permitted to rise until the current-limit threshold is reached (see Figures 5 and 6). The TPS20xx
is capable of delivering current up to the current-limit threshold without damage. When the threshold has been
reached, the device switches into its constant-current mode.
16
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POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
APPLICATION INFORMATION
power dissipation and junction temperature
The low on-resistance of the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistance of these packages is high compared to that of power packages; it is good
design practice to check power dissipation and junction temperature. The first step is to find r at the input
on
voltage and at the operating temperature. As an initial estimate, use the highest operating ambient temperature
of interest and read r from Figure 17. Next calculate the power dissipation using:
on
2
P
r
I
on
D
Finally, calculate the junction temperature:
T
P
R
T
J
D
JA
A
Where:
T = Ambient temperature
A
R
= Thermal resistance SOIC = 172°C/W, P = 106°C/W
θJA
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
thermal protection
Thermal protection is provided to prevent damage to the IC when heavy-overload or a short-circuit fault is
present for an extended period of time. The fault forces the TPS20xx into constant current mode, which causes
the voltage across the high-side switch to increase. Under short-circuit conditions, the voltage across the switch
is equal to the input voltage. The increased dissipation causes the junction temperature to rise to dangerously
high levels. The protection circuit senses the junction temperature of the switch and shuts it off. The switch
remains off until the junction temperature has dropped approximately 20°C. The switch continues to cycle in
this manner until the load fault or the input power is removed.
undervoltage lockout
An undervoltage lockout is provided to ensure that the power switch is in the off state at power up. Whenever
the input voltage falls below approximately 3.2 V, the power switch quickly turns off. This facilitates the design
of hot-insertion systems that may not have the ability to turn off the power switch before input power is removed.
Upon reapplication of the input voltage (if enabled), the power switch turns on with a controlled rise time to
reduce inrush current, EMI, and voltage overshoots.
For proper operation of the UVLO, the TPS20xx requires the voltage decay from 3 V to 2 V to take at least
200 µs. Capacitance is added to the input or output of the TPS20xx to increase this decay rate. Capacitance
is generally added to the output to lower inrush current due to input capacitance.
Universal Serial Bus (USB) applications
The USB specification provides for five different classes of devices based on their power sourcing and sinking
requirements. These classes of devices are: bus-powered hub, self-powered hub, lower power bus-powered
function, high power bus-powered function, and self-powered functions. The TPS20xx can provide power
distribution solutions for many of these devices.
17
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POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
APPLICATION INFORMATION
bus-powered and self-power hubs
Hubs provide data and power for downstream functions through output ports. Self-power hubs have internal
power supplies that furnish power to downstream functions. Each port is required to supply 500 mA continuous
to a downstream function. Each port must have overcurrent protection to meet the requlatory safety limit that
no single port can deliver more than 5 A. The self-power hub must also have a method to detect and report an
overcurrent condition to the USB host. The TPS20xx provides the required current-limiting function and has an
overcurrent logic output to inform the hub controller of the fault condition. The on-state resistance of the
TPS20xxislowenoughtomeetallUSBvoltageregulationrequirements. Theswitchalsoprovidesthecapability
to remove power from a faulted port.
Bus-powered hubs distribute power and data from an input port to downstream ports. Each output port is
required to supply 100 mA continuous. A bus-powered hub is not required to provide overcurrent protection
because it is provided by the upstream port. In order to power up in a low power state, the self-powered hub
must be able to switch power to its output ports. The TPS20xx can also provide this function.
TUSB2040
USB Port
Connector
USB
Controller
D1+
D1-
D+
D-
TPS2014
OC
5
4
OVERCURRENT
LOAD ENABLE
8
7
6
OUT
OUT
OUT
5 V
EN
+
120 µF
GND
0.1 µF
10 kΩ
Power Supply
3.3 V
SN75240
2
5 V
IN
IN
3
0.1 µF
GND
1
Figure 25. Typical USB Self-Powered Hub Application
low power bus-powered functions and high power bus-powered functions
Low-power and high-power bus-powered functions are powered by their input ports. If the load of the function
is more than the parallel combination of 44 Ω and 10 µF, it must implement inrush current limiting. The TPS20xx
provides this function with its controlled rise time during turn on.
18
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POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
APPLICATION INFORMATION
USB Port
Connector
Internal
Function
D+
D-
D+
D-
TPS2014
OC
5
4
8
7
6
5 V
OUT
OUT
OUT
5 V
EN
+
GND
22 µF
GND
0.1 µF
2
IN
IN
3
0.1 µF
GND
1
Figure 26. Typical USB Bus-Powered Function Application
ESD protection
All TPS20xx terminals incorporate ESD-protection circuitry designed to withstand a 6-kV human-body-model
discharge as defined in MIL-STD-883C. Additionally, the output is protected from discharges up to 12 kV.
19
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POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
PINS **
0.050 (1,27)
8
14
16
DIM
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
M
A MAX
14
8
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
7
A
0.010 (0,25)
0°–8°
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
4040047/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012
20
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POWER DISTRIBUTION SWITCHES
SLVS159B – DECEMBER 1996 – REVISED AUGUST 1997
MECHANICAL DATA
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°–15°
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
0.010 (0,25) NOM
4040082/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
21
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