TPS2044AD [TI]
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES; 电流限制的配电开关
| 型号： | TPS2044AD |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES |
| 文件： | 总32页 (文件大小：482K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TPS2042A, TPS2052A
TPS2041A, TPS2051A
80-mΩ High-Side MOSFET Switch
D PACKAGE
(TOP VIEW)
D PACKAGE
(TOP VIEW)
500 mA Continuous Current Per Channel
Independent Thermal and Short-Circuit
Protection With Overcurrent Logic Output
GND
IN
OC1
1
2
3
4
8
7
6
5
GND
IN
OUT
OUT
OUT
OC
1
2
3
4
8
7
6
5
OUT1
OUT2
OC2
Operating Range . . . 2.7 V to 5.5 V
CMOS- and TTL-Compatible Enable Inputs
2.5-ms Typical Rise Time
†
EN1
IN
†
†
EN2
EN
Undervoltage Lockout
TPS2043A, TPS2053A
D PACKAGE
TPS2044A, TPS2054A
D PACKAGE
10 µA Maximum Standby Supply Current
for Single and Dual (20 µA for Triple and
Quad)
(TOP VIEW)
(TOP VIEW)
GNDA
IN1
OC1
GNDA
IN1
OC1
1
2
3
4
5
6
7
8
16
15
14
13
12
1
2
3
4
5
6
7
8
16
15
14
13
12
OUT1
OUT2
OC2
OUT1
OUT2
OC2
Bidirectional Switch
†
†
EN1
EN1
Ambient Temperature Range, 0°C to 85°C
ESD Protection
†
†
EN2
EN2
GNDB
IN2
OC3
GNDB
IN2
OC3
UL Listed – File No. E169910
11 OUT3
10 NC
11 OUT3
10 OUT4
†
†
EN3
EN3
description
†
NC
9
NC
EN4
9
OC4
The TPS2041A through TPS2044A and
TPS2051AthroughTPS2054Apower-distribution
switches are intended for applications where
†
All enable inputs are active high for the TPS205xA series.
NC – No connect
heavy capacitive loads and short circuits are likely to be encountered. These devices incorporate 80-mΩ
N-channel MOSFET high-side power switches for power-distribution systems that require multiple power
switches in a single package. Each switch is controlled by an independent logic enable input. Gate drive is
provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize
current surges during switching. The charge pump requires no external components and allows operation from
supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, these devices limit the output
current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low.
When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the
junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from
a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch
remains off until valid input voltage is present. These power-distribution switches are designed to current limit
at 0.9 A.
GENERAL SWITCH CATALOG
80 mΩ, dual
80 mΩ, quad
33 mΩ, single
80 mΩ, single
80 mΩ, dual
260 mΩ
TPS201xA 0.2 A – 2 A
TPS2042
TPS2052
TPS2046
TPS2056
500 mA
500 mA
250 mA
250 mA
80 mΩ, triple
80 mΩ, quad
TPS202x
0.2 A – 2 A
TPS203x
0.2 A – 2 A
TPS2080
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
TPS2014
TPS2015
TPS2041
TPS2051
TPS2045
TPS2055
600 mA
1 A
500 mA
500 mA
250 mA
250 mA
TPS2100/1
TPS2081
TPS2082
TPS2090
TPS2091
TPS2092
IN1 500 mA
IN2 10 mA
TPS2043 500 mA
TPS2053 500 mA
TPS2047 250 mA
TPS2057 250 mA
IN1
IN2
TPS2085
500 mA
500 mA
500 mA
250 mA
TPS2044 500 mA
TPS2054 500 mA
TPS2048 250 mA
TPS2058 250 mA
OUT
TPS2086
TPS2087
TPS2095
TPS2102/3/4/5
IN1 500 mA
IN2 100 mA
1.3 Ω
TPS2096 250 mA
TPS2097 250 mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
AVAILABLE OPTIONS
RECOMMENDED
PACKAGED DEVICES
SOIC
TYPICAL SHORT-CIRCUIT
NUMBER OF
SWITCHES
MAXIMUM CONTINUOUS
LOAD CURRENT
(A)
CURRENT LIMIT AT 25°C
T
A
ENABLE
(A)
†
(D)
Active low
Active high
Active low
Active high
Active low
Active high
Active low
Active high
TPS2041AD
TPS2051AD
TPS2042AD
TPS2052AD
TPS2043AD
TPS2053AD
TPS2044AD
TPS2054AD
Single
Dual
0°C to 85°C
0.5
0.9
Triple
Quad
†
The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2041ADR)
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
functional block diagrams
TPS2041A
Power Switch
†
CS
IN
OUT
Charge
Pump
Current
Limit
‡
EN
Driver
OC
UVLO
Thermal
Sense
GND
†
Current sense
‡
Active high for TPS205xA series
TPS2042A
OC1
Thermal
Sense
GND
‡
EN1
Current
Limit
Driver
Charge
Pump
†
†
CS
OUT1
OUT2
UVLO
Power Switch
IN
CS
Charge
Pump
Current
Limit
Driver
OC2
‡
EN2
Thermal
Sense
†
‡
Current sense
Active high for TPS205xA series
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
functional block diagrams
TPS2043A
OC1
Thermal
GNDA
Sense
‡
EN1
Current
Limit
Driver
Charge
Pump
†
†
CS
OUT1
OUT2
UVLO
Power Switch
IN1
CS
Charge
Pump
Current
Limit
Driver
OC2
‡
EN2
Thermal
Sense
Power Switch
†
CS
IN2
OUT3
Charge
Pump
Current
Limit
‡
EN3
Driver
OC3
UVLO
Thermal
Sense
GNDB
†
‡
Current sense
Active high for TPS205xA series
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
functional block diagrams
TPS2044A
OC1
Thermal
Sense
GNDA
‡
EN1
Current
Driver
Limit
Charge
Pump
†
CS
OUT
1
UVLO
Power Switch
†
IN1
CS
OUT
2
Charge
Pump
Current
Limit
Driver
OC2
OC3
‡
EN2
Thermal
Sense
Thermal
Sense
GNDB
‡
EN3
Current
Limit
Driver
Charge
Pump
†
†
CS
OUT3
OUT4
UVLO
Power Switch
CS
IN2
Charge
Pump
Current
Limit
Driver
OC4
‡
EN4
Thermal
Sense
†
‡
Current sense
Active high for TPS205xA series
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
Terminal Functions
TPS2041A and TPS2051A
TERMINAL
NO.
I/O
DESCRIPTION
NAME
TPS2041A TPS2051A
EN
4
–
–
4
I
I
Enable input. Logic low turns on power switch.
EN
Enable input. Logic high turns on power switch.
Ground
GND
IN
1
1
I
2, 3
5
2, 3
5
I
Input voltage
OC
OUT
O
O
Overcurrent. Logic output active low
Power-switch output
6, 7, 8
6, 7, 8
TPS2042A and TPS2052A
TERMINAL
NO.
NAME
I/O
DESCRIPTION
TPS2042A TPS2052A
EN1
EN2
EN1
EN2
GND
IN
3
4
–
–
1
2
8
5
7
6
–
–
3
4
1
2
8
5
7
6
I
I
Enable input. Logic low turns on power switch, IN-OUT1.
Enable input. Logic low turns on power switch, IN-OUT2.
Enable input. Logic high turns on power switch, IN-OUT1.
Enable input. Logic high turns on power switch, IN-OUT2.
Ground
I
I
I
I
Input voltage
OC1
OC2
OUT1
OUT2
O
O
O
O
Overcurrent. Logic output active low, for power switch, IN-OUT1
Overcurrent. Logic output active low, for power switch, IN-OUT2
Power-switch output
Power-switch output
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
Terminal Functions (Continued)
TPS2043A and TPS2053A
TERMINAL
NO.
NAME
I/O
DESCRIPTION
TPS2043A TPS2053A
EN1
EN2
EN3
EN1
EN2
EN3
GNDA
GNDB
IN1
3
–
I
I
I
I
I
I
Enable input, logic low turns on power switch, IN1-OUT1.
Enable input, logic low turns on power switch, IN1-OUT2.
Enable input, logic low turns on power switch, IN2-OUT3.
Enable input, logic high turns on power switch, IN1-OUT1.
Enable input, logic high turns on power switch, IN1-OUT2.
Enable input, logic high turns on power switch, IN2-OUT3.
Ground for IN1 switch and circuitry.
4
–
7
–
–
3
–
4
–
1
7
1
5
5
Ground for IN2 switch and circuitry.
2
2
I
I
Input voltage
IN2
6
6
Input voltage
NC
8, 9, 10
16
13
12
15
14
11
8, 9, 10
16
13
12
15
14
11
No connection
OC1
OC2
OC3
OUT1
OUT2
OUT3
O
O
O
O
O
O
Overcurrent, logic output active low, IN1-OUT1
Overcurrent, logic output active low, IN1-OUT2
Overcurrent, logic output active low, IN2-OUT3
Power-switch output, IN1-OUT1
Power-switch output, IN1-OUT2
Power-switch output, IN2-OUT3
TPS2044A and TPS2054A
TERMINAL
NO.
NAME
I/O
DESCRIPTION
TPS2044A TPS2054A
EN1
3
4
–
–
I
I
I
I
I
I
I
I
Enable input. logic low turns on power switch, IN1-OUT1.
Enable input. Logic low turns on power switch, IN1-OUT2.
Enable input. Logic low turns on power switch, IN2-OUT3.
Enable input. Logic low turns on power switch, IN2-OUT4.
Enable input. Logic high turns on power switch, IN1-OUT1.
Enable input. Logic high turns on power switch, IN1-OUT2.
Enable input. Logic high turns on power switch, IN2-OUT3.
Enable input. Logic high turns on power switch, IN2-OUT4.
Ground for IN1 switch and circuitry.
EN2
EN3
7
–
EN4
8
–
EN1
–
3
EN2
–
4
EN3
–
7
EN4
–
8
GNDA
GNDB
IN1
1
1
5
5
Ground for IN2 switch and circuitry.
2
2
I
Input voltage
IN2
6
6
I
Input voltage
OC1
OC2
OC3
OC4
OUT1
OUT2
OUT3
OUT4
16
13
12
9
16
13
12
9
O
O
O
O
O
O
O
O
Overcurrent. Logic output active low, IN1-OUT1
Overcurrent. Logic output active low, IN1-OUT2
Overcurrent. Logic output active low, IN2-OUT3
Overcurrent. Logic output active low, IN2-OUT4
Power-switch output, IN1-OUT1
15
14
11
10
15
14
11
10
Power-switch output, IN1-OUT2
Power-switch output, IN2-OUT3
Power-switch output, IN2-OUT4
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
detailed description
power switch
The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (V
= 5 V).
I(IN)
Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when
disabled. The power switch supplies a minimum of 500 mA per switch.
charge pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.
driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.
enable (ENx, ENx)
Thelogicenabledisablesthepowerswitchandthebiasforthechargepump, driver, andothercircuitrytoreduce
the supply current. The supply current is reduced to less than 10 µA on the single and dual devices (20 µA on
†
the triple and quad devices) when a logic high is present on ENx (TPS204xA ) or a logic low is present on ENx
†
(TPS205xA ). A logic zero input on ENx or a logic high on ENx restores bias to the drive and control circuits
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.
overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
current sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant-current mode and holds the current constant
while varying the voltage on the load.
thermal sense
The TPS204xA and TPS205xA implement a dual-threshold thermal trip to allow fully independent operation of
the power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When
thedietemperaturerisestoapproximately140°C, theinternalthermalsensecircuitrycheckstodeterminewhich
power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting
operationoftheadjacentpowerswitch. Hysteresisisbuiltintothethermalsense, andafterthedevicehascooled
approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is
removed. The (OCx) open-drain output is asserted (active low) when overtemperature or overcurrent occurs.
undervoltage lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
†
Product series designations TPS204x and TPS205x refer to devices presented in this data sheet and not necessarily to other TI devices
numbered in this sequence.
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range, V
Output voltage range, V
Input voltage range, V
Continuous output current, I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
I(IN)
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
+ 0.3 V
O(OUT)
I(ENx)
I(IN)
or V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
I(ENx)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
O(OUT)
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 125°C
J
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C . . . . . . . . . . . . . . . . . . . . . 2 kV
Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 kV
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to GND.
DISSIPATION RATING TABLE
DERATING FACTOR
T
≤ 25°C
T
A
= 70°C
T = 85°C
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D–8
725 mW
5.9 mW/°C
9 mW/°C
464 mW
719 mW
377 mW
584 mW
D–16
1123 mW
recommended operating conditions
MIN
2.7
0
MAX
5.5
UNIT
V
Input voltage, V
Input voltage, V
I(IN)
or V
5.5
V
I(EN)
I(EN)
Continuous output current, I
(per switch)
Operating virtual junction temperature, T
0
500
125
mA
°C
O(OUT)
0
J
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, V
= 0 V, V
= V (unless otherwise noted)
O
I(EN)
I(EN)
I(IN)
power switch
TPS204xA
†
TPS205xA
PARAMETER
UNIT
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
V
= 5 V, T = 25°C,
= 0.5 A
I(IN)
I(IN)
I(IN)
I(IN)
I(IN)
I(IN)
I(IN)
J
80
100
80
100
I
O
Static drain-source on-state
resistance, 5-V operation
V
= 5 V,
= 0.5 A
T = 85°C,
J
90
100
90
120
135
125
145
160
90
100
90
120
135
125
145
160
I
O
V
= 5 V,
= 0.5 A
T = 125°C,
J
mΩ
I
O
r
DS(on)
V
= 3.3 V,
= 0.5 A
T = 25°C,
J
I
O
Static drain-source on-state
resistance, 3.3-V operation
V
= 3.3 V,
= 0.5 A
T = 85°C,
J
110
120
2.5
3
110
120
2.5
3
I
O
V
= 3.3 V,
= 0.5 A
T = 125°C,
J
I
O
V
C
= 5.5 V,
= 1 µF,
T = 25°C,
J
L
R =10 Ω
L
t
t
Rise time, output
Fall time, output
ms
ms
r
V
C
= 2.7 V,
= 1 µF,
T = 25°C,
J
L
I(IN)
R =10 Ω
L
V
C
= 5.5 V,
= 1 µF,
T = 25°C,
J
L
I(IN)
L
4.4
2.5
4.4
2.5
R =10 Ω
f
V
C
= 2.7 V,
= 1 µF,
T = 25°C,
J
I(IN)
R =10 Ω
L
L
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
enable input ENx or ENx
TPS204xA
MIN TYP
TPS205xA
MIN TYP
PARAMETER
TEST CONDITIONS
UNIT
MAX
MAX
V
V
High-level input voltage
Low-level input voltage
2.7 V ≤ V
4.5 V ≤ V
≤ 5.5 V
≤ 5.5 V
≤ 4.5 V
2
2
V
V
IH
I(IN)
I(IN)
I(IN)
0.8
0.4
0.5
0.8
0.4
IL
2.7 V≤ V
TPS204xA
TPS205xA
V
V
= 0 V or V
= V
I(IN)
= 0 V
–0.5
I(ENx)
I(ENx)
or V
I
I
Input current
µA
= V
–0.5
0.5
20
40
I(ENx)
I(IN)
I(ENx)
t
t
Turnon time
Turnoff time
C
C
= 100 µF, R =10 Ω
20
40
ms
on
L
L
L
= 100 µF, R =10 Ω
off
L
current limit
TPS204xA
MIN TYP
TPS205xA
MIN TYP
†
PARAMETER
UNIT
TEST CONDITIONS
MAX
MAX
V
= 5 V, OUT connected to GND,
I(IN)
Device enabled into short circuit
I
Short-circuit output current
0.7
1
1.3
0.7
1
1.3
A
OS
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, V
= 0 V, V
= V
(unless otherwise noted) (continued)
O
I(EN)
I(EN)
I(IN)
supply current (TPS2041A, TPS2051A)
TPS2041A
MIN TYP MAX
TPS2051A
MIN TYP MAX
PARAMETER
TEST CONDITIONS
T = 25°C
UNIT
0.025
1
J
V
V
= V
I(EN)
I(IN)
–40°C ≤ T ≤ 125°C
10
Supply current, low-level No Load
output
J
µA
µA
on OUT
T = 25°C
0.025
1
J
= 0 V
= 0 V
I(EN)
–40°C ≤ T ≤ 125°C
10
J
T = 25°C
J
85
110
V
V
I(EN)
–40°C ≤ T ≤ 125°C
100
Supply current,
high-level output
No Load
on OUT
J
T = 25°C
85
110
J
= V
= V
I(EN)
I(IN)
–40°C ≤ T ≤ 125°C
100
J
OUT
connected
to ground
V
V
–40°C ≤ T ≤ 125°C
100
0.3
I(EN)
I(IN)
J
Leakage current
µA
µA
= 0 V
= 0 V
–40°C ≤ T ≤ 125°C
100
0.3
I(EN)
J
V
V
IN = High
impedance
I(EN)
Reverse leakage current
T = 25°C
J
= V
I(EN)
I(IN)
supply current (TPS2042A, TPS2052A)
TPS2042A
TPS2052A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP MAX
MIN
TYP MAX
T = 25°C
J
0.025
1
V
V
= V
I(IN)
I(ENx)
–40°C ≤ T ≤ 125°C
10
Supply current, low-level No Load
J
µA
output
on OUT
T = 25°C
J
0.025
1
= 0 V
= 0 V
I(ENx)
–40°C ≤ T ≤ 125°C
10
J
T = 25°C
J
85
110
V
V
I(ENx)
–40°C ≤ T ≤ 125°C
100
Supply current,
high-level output
No Load
on OUT
J
µA
T = 25°C
J
85
110
= V
= V
I(ENx)
I(IN)
–40°C ≤ T ≤ 125°C
100
J
OUT
V
V
–40°C ≤ T ≤ 125°C
100
0.3
I(ENx)
I(IN)
J
Leakage current
µA
µA
connected
to ground
= 0 V
= 0 V
–40°C ≤ T ≤ 125°C
100
0.3
I(ENx)
J
V
V
IN = high
impedance
I(EN)
Reverse leakage current
T = 25°C
J
= V
I(EN)
I(IN)
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, V
= 0 V, V
= V
(unless otherwise noted) (continued)
O
I(EN)
I(EN)
I(IN)
supply current (TPS2043A, TPS2053A)
TPS2043A
MIN TYP MAX
TPS2053A
MIN TYP MAX
PARAMETER
TEST CONDITIONS
T = 25°C
UNIT
0.05
2
J
V
= V
I(ENx)
I(INx)
–40°C ≤ T ≤ 125°C
20
Supply current,
low-level output
No Load
on OUTx
J
µA
µA
T = 25°C
0.05
2
J
V
= 0 V
= 0 V
I(ENx)
–40°C ≤ T ≤ 125°C
20
J
T = 25°C
J
160
200
200
V
V
I(ENx)
–40°C ≤ T ≤ 125°C
Supply current,
high-level output
No Load
on OUTx
J
T = 25°C
J
160
200
200
= V
= V
I(ENx)
I(INx)
–40°C ≤ T ≤ 125°C
J
V
V
V
V
–40°C ≤ T ≤ 125°C
200
0.3
OUTx connected
to ground
I(ENx)
I(ENx)
I(ENx)
I(ENx)
I(INx)
J
Leakage current
µA
µA
= 0 V
= 0 V
–40°C ≤ T ≤ 125°C
200
0.3
J
Reverse leakage
current
IN = high
impedance
T = 25°C
J
= V
I(IN)
supply current (TPS2044A, TPS2054A)
TPS2044A
TPS2054A
MIN TYP MAX
PARA-
METER
TEST CONDITIONS
UNIT
MIN
TYP MAX
T = 25°C
J
0.05
2
V
V
= V
I(INx)
I(ENx)
–40°C ≤ T ≤ 125°C
20
Supply current,
low-level output
No Load
on OUTx
J
µA
T = 25°C
J
0.05
2
= 0 V
= 0 V
I(ENx)
–40°C ≤ T ≤ 125°C
20
J
T = 25°C
J
170
200
220
V
V
I(ENx)
–40°C ≤ T ≤ 125°C
Supply current,
high-level output
No Load
on OUTx
J
µA
T = 25°C
J
170
200
220
= V
= V
I(ENx)
I(INx)
–40°C ≤ T ≤ 125°C
J
V
V
V
V
–40°C ≤ T ≤ 125°C
200
0.3
OUTx connected
to ground
I(ENx)
I(INx)
J
Leakage current
µA
µA
= 0 V
= 0 V
–40°C ≤ T ≤ 125°C
200
0.3
I(ENx)
J
Reverse leakage
current
IN = high
impedance
I(EN)
I(EN)
T = 25°C
J
= V
I(IN)
undervoltage lockout
TPS204xA
TPS205xA
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP MAX
MIN
TYP MAX
Low-level input voltage
Hysteresis
2
2.5
2
2.5
V
T = 25°C
J
100
100
mV
overcurrent OC
TPS204xA
TPS205xA
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP MAX
MIN
TYP MAX
†
Sink current
V
= 5 V
10
0.5
1
10
0.5
1
mA
V
O
Output low voltage
I
O
= 5 V,
V
OL(OC)
= 3.3 V
†
Off-state current
V
O
= 5 V,
V
µA
O
†
Specified by design, not production tested.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
OUT
t
t
f
r
RL
CL
V
90%
10%
O(OUT)
90%
10%
TEST CIRCUIT
50%
90%
50%
50%
50%
V
V
I(EN)
I(EN)
t
t
off
t
t
on
off
on
90%
V
V
O(OUT)
O(OUT)
10%
10%
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
V
I(EN)
(5 V/div)
V
I(EN)
(5 V/div)
V
T
C
= 5 V
= 25°C
= 0.1 µF
= 10 Ω
V
T
C
= 5 V
= 25°C
= 0.1 µF
= 10 Ω
I(IN)
A
L
L
I(IN)
A
L
L
V
O(OUT)
(2 V/div)
V
O(OUT)
(2 V/div)
R
R
0
2
4
6
8
10 12 14 16 18 20
0
1
2
3
4
5
6
7
8
9
10
t – Time – ms
t – Time – ms
Figure 2. Turnon Delay and Rise Time
Figure 3. Turnoff Delay and Fall Time
with 0.1-µF Load
with 0.1-µF Load
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
V
I(EN)
(5 V/div)
V
I(EN)
(5 V/div)
V
= 5 V
I(IN)
= 25°C
V
T
C
= 5 V
I(IN)
= 25°C
T
A
V
A
O(OUT)
(2 V/div)
C
R
= 1 µF
= 10 Ω
V
L
L
O(OUT)
(2 V/div)
= 1 µF
= 10 Ω
L
L
R
0
2
4
6
8
10 12 14 16 18 20
0
1
2
3
4
5
6
7
8
9
10
t – Time – ms
t – Time – ms
Figure 4. Turnon Delay and Rise Time
Figure 5. Turnoff Delay and Fall Time
with 1-µF Load
with 1-µF Load
V
T
A
= 5 V
I(IN)
= 25°C
V
I(EN)
(5 V/div)
V
O(OUT)
(2 V/div)
V
T
A
= 5 V
I
I(IN)
= 25°C
I
O(OUT)
O(OUT)
(0.5 A/div)
(0.5 A/div)
0
1
2
3
4
5
6
7
8
9
10
0
10 20 30 40 50 60 70 80 90 100
t – Time – ms
t – Time – ms
Figure 6. TPS2051A, Short-Circuit Current,
Device Enabled into Short
Figure 7. TPS2051A, Threshold Trip Current
with Ramped Load on Enabled Device
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
V
V
I(EN)
O(OC)
470 µF
220 µF
(5 V/div)
(5 V/div)
100 µF
V
T
R
= 5 V
V
T
= 5 V
I(IN)
= 25°C
I(IN)
= 25°C
I
I
A
O(OUT)
A
O(OUT)
= 10 Ω
Ramp = 1 A/100 ms
L
(0.5 A/div)
(0.2 A/div)
0
20 40 60 80 100 120 140 160 180 200
t – Time – ms
0
2
4
6
8
10 12 14 16 18 20
t – Time – ms
Figure 8. OC Response With Ramped Load
on Enabled Device
Figure 9. Inrush Current with 100-µF, 220-µF
and 470-µF Load Capacitance
V
T
= 5 V
V
T
= 5 V
I(IN)
= 25°C
I(IN)
= 25°C
A
A
V
V
O(OC)
O(OC)
(5 V/div)
(5 V/div)
I
I
O(OUT)
O(OUT)
(0.5 A/div)
(1 A/div)
0
1000
2000
3000
4000
5000
0
200
400
600
800
1000
t – Time – µs
t – Time – µs
Figure 10. 4-Ω Load Connected to Enabled Device
Figure 11. 1-Ω Load Connected
to Enabled Device
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TYPICAL CHARACTERISTICS
TURNON DELAY TIME
vs
TURNOFF DELAY TIME
vs
INPUT VOLTAGE
INPUT VOLTAGE
3.5
3.2
2.9
2.6
12
10
C
R
T
= 1 µF
= 10 Ω
= 25°C
C
R
T
= 1 µF
= 10 Ω
= 25°C
L
L
A
L
L
A
8
6
4
2.3
2
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
3.5
4
4.5
5
5.5
6
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 12
Figure 13
RISE TIME
vs
INPUT VOLTAGE
FALL TIME
vs
INPUT VOLTAGE
3
2.2
2.1
2
C
R
T
= 1 µF
= 10 Ω
= 25°C
C
R
T
= 1 µF
= 10 Ω
= 25°C
L
L
A
L
L
A
2.7
2.4
1.9
1.8
1.7
2.1
1.8
1.6
1.5
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
3.5
4
4.5
5
5.5
6
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 14
Figure 15
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TYPICAL CHARACTERISTICS
SUPPLY CURRENT, OUTPUT ENABLED
SUPPLY CURRENT, OUTPUT DISABLED
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
100
90
80
70
60
160
140
120
100
80
V
= 5.5 V
I(IN)
V
= 5.5 V
I(IN)
V
= 5 V
I(IN)
V
= 5 V
I(IN)
V
I(IN)
= 4.5 V
V
= 4.5 V
I(IN)
V
I(IN)
= 3.3 V
V
= 2.7 V
I(IN)
60
V
= 2.7 V
I(IN)
40
V
I(IN)
= 3.3 V
50
40
20
0
–40
0
25
85
125
–40
0
25
85
125
T
J
– Junction Temperature – °C
T
J
– Junction Temperature – °C
Figure 16
Figure 17
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
INPUT-TO-OUTPUT VOLTAGE
vs
vs
JUNCTION TEMPERATURE
LOAD CURRENT
70
60
50
40
30
20
10
0
160
140
120
100
80
I
= 0.5 A
O
T
A
= 25°C
V
= 3.3 V
V
= 2.7 V
I(IN)
I(IN)
V
= 2.7 V
I(IN)
V
= 4.5 V
I(IN)
V
= 3 V
I(IN)
V
= 3.3 V
I(IN)
V
I(IN)
= 5 V
V
= 5 V
I(IN)
V
I(IN)
= 4.5 V
60
40
20
0
0
25
85
125
100
200
300
– Load Current – A
400
500
T
J
– Junction Temperature – °C
I
L
Figure 18
Figure 19
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
THRESHOLD TRIP CURRENT
vs
vs
JUNCTION TEMPERATURE
INPUT VOLTAGE
1.2
1.2
T
A
= 25°C
Load Ramp = 1 A/10 ms
V
I(IN)
= 5.5 V
1.1
1
V
I(IN)
= 5 V
1.16
1.12
V
I(IN)
= 4.5 V
V
= 3.3 V
I(IN)
0.9
0.8
0.7
0.6
V
I(IN)
= 2.7 V
1.08
1.04
1
–40
25
85
125
0
2.5
3
3.5
4
4.5
5
5.5
6
T
J
– Junction Temperature – °C
V – Input Voltage – V
I
Figure 20
Figure 21
UNDERVOLTAGE LOCKOUT
vs
JUNCTION TEMPERATURE
CURRENT-LIMIT RESPONSE
vs
PEAK CURRENT
2.35
2.3
250
V
T
A
= 5 V
I(IN)
= 25°C
Start Threshold
Stop Threshold
200
150
2.25
2.2
100
50
0
2.15
2.1
0
2.5
5
7.5
10
12.5
–40
0
25
85
125
T
J
– Junction Temperature – °C
Peak Current – A
Figure 22
Figure 23
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TPS2041A
2,3
Power Supply
2.7 V to 5.5 V
IN
6,7,8
Load
OUT
0.1 µF
0.1 µF
22 µF
5
4
OC
EN
GND
1
Figure 24. Typical Application (Example, TPS2041A)
power-supply considerations
A 0.01-µF to 0.1-µF ceramic bypass capacitor between INx and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing
the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit
transients.
overcurrent
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do
not increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs
only if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before V
short and immediately switch into a constant-current output.
has been applied (see Figure 6). The TPS204xA and TPS205xA sense the
I(IN)
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, very high currents may flow for a short time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshhold) the device switches into
constant-current mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 7). The TPS204xA and TPS205xA are capable of delivering current up to the current-limit
threshold without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.
OC response
The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
Connectingaheavycapacitiveloadtoanenableddevicecancausemomentaryfalseovercurrentreportingfrom
the inrush current flowing through the device, charging the downstream capacitor. The TPS204xA and
TPS205xA family of devices are designed to reduce false overcurrent reporting. An internal overcurrent
transient filter eliminates the need for external components to remove unwanted pulses. Using low-ESR
electrolytic capacitors on the output lowers the inrush current flow through the device during hot-plug events
by providing a low-impedance energy source, also reducing erroneous overcurrent reporting.
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TPS2041A
V+
GND
OUT
OUT
OUT
OC
IN
R
pullup
IN
EN
Figure 25. Typical Circuit for OC Pin (Example, TPS2041A)
power dissipation and junction temperature
The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to those of power packages; it
is good design practice to check power dissipation and junction temperature. Begin by determining the r
of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use
DS(on)
the highest operating ambient temperature of interest and read r
power dissipation per switch can be calcultaed by:
from Figure 18. Using this value, the
DS(on)
2
P
r
I
D
DS(on)
Depending on which device is being used, multiply this number by the number of switches being used. This step
will render the total power dissipation from the N-channel MOSFETs.
Finally, calculate the junction temperature:
T
P
R
T
J
D
JA
A
Where:
T = Ambient Temperature °C
A
θJA
R
= Thermal resistance SOIC = 172°C/W (for 8 pin), 111°C/W (for 16 pin)
P = Total power dissipation based on number of switches being used.
D
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
thermal protection
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The faults force the TPS204xA and TPS205xA into constant-current mode, which
causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across
the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high
levels. The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built
into the thermal sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back
on. The switch continues to cycle in this manner until the load fault or input power is removed.
The TPS204xA and TPS205xA implement a dual thermal trip to allow fully independent operation of the power
distribution switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die
temperature rises to approximately 140°C, the internal thermal sense circuitry checks which power switch is
in an overcurrent condition and turns that power switch off, thus isolating the fault without interrupting operation
of the adjacent power switch. Should the die temperature exceed the first thermal trip point of 140°C and reach
160°C, both switches turn off. The OC open-drain output is asserted (active low) when overtemperature or
overcurrent occurs.
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
undervoltage lockout (UVLO)
Anundervoltagelockoutensuresthatthepowerswitchisintheoffstateatpowerup. Whenevertheinputvoltage
falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if
the switch is enabled. Upon reinsertion, the power switch will be turned on, with a controlled rise time to reduce
EMI and voltage overshoots.
universal serial bus (USB) applications
The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
Hosts/self-powered hubs (SPH)
Bus-powered hubs (BPH)
Low-power, bus-powered functions
High-power, bus-powered functions
Self-powered functions
Self-powered and bus-powered hubs distribute data and power to downstream functions. The TPS204xA and
TPS205xA can provide power-distribution solutions for many of these classes of devices.
host/self-powered and bus-powered hubs
Hosts and self-powered hubs have a local power supply that powers the embedded functions and the
downstream ports (see Figures 26 and 27). This power supply must provide from 5.25 V to 4.75 V to the board
side of the downstream connection under full-load and no-load conditions. Hosts and SPHs are required to have
current-limit protection and must report overcurrent conditions to the USB controller. Typical SPHs are desktop
PCs, monitors, printers, and stand-alone hubs.
Power Supply
Downstream
USB Ports
3.3 V 5 V
TPS2041A
D+
D–
2, 3
0.1 µF
IN
7
V
BUS
OUT
0.1 µF
120 µF
GND
5
4
OC
EN
USB
Control
GND
Figure 26. Typical One-Port Solution
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
Downstream
USB Ports
D+
D–
Power Supply
3.3 V
5 V
V
BUS
+
TPS2044A
33 µF
GND
2
IN1
IN2
15
OUT1
6
D+
0.1 µF
D–
V
14
11
OUT2
OUT3
BUS
+
33 µF
GND
11
OC1
EN1
OC2
EN2
OC3
EN3
OC4
EN4
3
D+
D–
13
4
USB
Controller
V
BUS
+
12
7
33 µF
10
GND
OUT4
9
D+
8
D–
V
GNDA GNDB
BUS
+
33 µF
GND
1
5
Figure 27. Typical Four-Port USB Host/Self-Powered Hub
Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs
are required to power up with less than one unit load. The BPH usually has one embedded function, and power
is always available to the controller of the hub. If the embedded function and hub require more than 100 mA
on powerup, the power to the embedded function may need to be kept off until enumeration is completed. This
can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching
the embedded function is not necessary if the aggregate power draw for the function and controller is less than
one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
low-power bus-powered functions and high-power bus-powered functions
Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and
can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of
44 Ω and 10 µF at power up, the device must implement inrush current limiting (see Figure 28).
Power Supply
D+
3.3 V
TPS2041A
D–
2,3
V
IN
BUS
GND
6, 7, 8
10 µF
0.1 µF
Internal
Function
OUT
0.1 µF
10 µF
5
4
OC
EN
USB
Control
GND
1
Figure 28. High-Power Bus-Powered Function (Example, TPS2041A)
USB power-distribution requirements
USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
Hosts/self-powered hubs must:
–
–
Current-limit downstream ports
Report overcurrent conditions on USB V
BUS
Bus-powered hubs must:
–
–
–
Enable/disable power to downstream ports
Power up at <100 mA
Limit inrush current (<44 Ω and 10 µF)
Functions must:
–
–
Limit inrush currents
Power up at <100 mA
The feature set of the TPS204xA and TPS205xA allows them to meet each of these requirements. The
integrated current-limiting and overcurrent reporting is required by hosts and self-powered hubs. The logic-level
enable and controlled rise times meet the need of both input and output ports on bus-power hubs, as well as
the input ports for bus-power functions (see Figures 29 through 32).
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TUSB2040
Hub Controller
SN75240
BUSPWR
GANGED
Tie to TPS2041A EN Input
Downstream
Ports
Upstream
Port
A
B
C
D
DP1
DM1
D +
D –
DP0
DM0
D +
D –
Ferrite Beads
A
B
C
D
GND
5 V
GND
SN75240
DP2
DM2
TPS2041A
†
33 µF
5 V Power
Supply
OC
IN
EN
DP3
DM3
5 V
OUT
D +
D –
A
B
C
D
1 µF
Ferrite Beads
TPS76333
IN
SN75240
GND
DP4
DM4
0.1 µF
4.7 µF
V
3.3 V
GND
5 V
†
CC
4.7 µF
TPS2041A
PWRON1
EN
OC
IN
GND
33 µF
OVRCUR1
0.1 µF
0.1 µF
0.1 µF
OUT
D +
D –
TPS2041A
48-MHz
Crystal
PWRON2
EN
OC
IN
XTAL1
XTAL2
Ferrite Beads
OVRCUR2
GND
5 V
OUT
Tuning
Circuit
TPS2041A
PWRON3
EN
OC
IN
†
33 µF
OVRCUR3
OCSOFF
GND
OUT
D +
D –
TPS2041A
Ferrite Beads
PWRON4
EN
OC
IN
GND
5 V
OVRCUR4
0.1 µF
OUT
†
33 µF
†
USB rev 1.1 requires 120 µF per hub.
Figure 29. Hybrid Self/Bus-Powered Hub Implementation, TPS2041A
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TUSB2040
Hub Controller
SN75240
BUSPWR
GANGED
Tie to TPS2042A EN Input
Downstream
Ports
Upstream
Port
A
B
C
D
DP1
DM1
D +
D –
DP0
DM0
D +
D –
Ferrite Beads
A
B
C
D
GND
5 V
GND
SN75240
DP2
DM2
TPS2041A
†
33 µF
5 V Power
Supply
OC
IN
EN
DP3
DM3
5 V
OUT
D +
D –
A
B
C
D
1 µF
Ferrite Beads
TPS76333
IN
SN75240
GND
DP4
DM4
0.1 µF
4.7 µF
V
3.3 V
GND
5 V
†
CC
4.7 µF
TPS2042A
PWRON1
GND
EN1
OUT1
OUT2
33 µF
OC1
OVRCUR1
PWRON2
OVRCUR2
EN2
OC2
D +
D –
IN
48-MHz
Crystal
XTAL1
XTAL2
Ferrite Beads
0.1 µF
GND
5 V
TPS2042A
Tuning
Circuit
EN1
OC1
PWRON3
OUT1
OUT2
OVRCUR3
†
33 µF
PWRON4
EN2
OC2
OCSOFF
GND
OVRCUR4
IN
D +
D –
0.1 µF
Ferrite Beads
GND
5 V
†
33 µF
†
USB rev 1.1 requires 120 µF per hub.
Figure 30. Hybrid Self/Bus-Powered Hub Implementation, TPS2042A
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TUSB2040
Hub Controller
1/2 SN75240
BUSPWR
GANGED
Tie to TPS2043A EN Input
Downstream
Ports
Upstream
Port
A
B
C
D
DP1
DM1
D +
D –
DP0
DM0
D +
D –
Ferrite Beads
A
B
C
D
GND
5 V
GND
SN75240
DP2
DM2
TPS2041A
†
47 µF
5 V Power
Supply
OC
IN
EN
DP3
DM3
5 V
OUT
D +
D –
A
B
C
D
1 µF
Ferrite Beads
TPS76333
IN
1/2 SN75240
GND
DP4
DM4
0.1 µF
4.7 µF
V
3.3 V
GND
5 V
†
CC
4.7 µF
TPS2043A
PWRON1
GND
EN1
OC1
OUT1
OUT2
47 µF
OVRCUR1
PWRON2
OVRCUR2
EN2
OC2
D +
D –
IN1
48-MHz
Crystal
XTAL1
XTAL2
Ferrite Beads
0.1 µF
GND
5 V
Tuning
Circuit
EN3
OC3
PWRON3
OUT3
IN2
OVRCUR3
†
47 µF
OCSOFF
GND
0.1 µF
GNDA
GNDB
†
USB rev 1.1 requires 120 µF per hub.
Figure 31. Hybrid Self/Bus-Powered Hub Implementation, TPS2043A
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TUSB2040
Hub Controller
SN75240
BUSPWR
GANGED
Tie to TPS2041 EN Input
Downstream
Ports
Upstream
Port
A
B
C
D
DP1
DM1
D +
D –
DP0
DM0
D +
D –
Ferrite Beads
A
B
C
D
GND
5 V
GND
SN75240
DP2
DM2
TPS2041A
†
33 µF
5 V Power
Supply
OC
IN
EN
DP3
DM3
5 V
OUT
D +
D –
A
B
C
D
1 µF
Ferrite Beads
TPS76333
IN
SN75240
GND
DP4
DM4
0.1 µF
4.7 µF
V
3.3 V
GND
5 V
†
CC
4.7 µF
TPS2044A
PWRON1
GND
EN1
OC1
OUT1
OUT2
33 µF
OVRCUR1
PWRON2
OVRCUR2
EN2
OC2
D +
D –
IN1
48-MHz
Crystal
XTAL1
XTAL2
Ferrite Beads
0.1 µF
GND
5 V
Tuning
Circuit
EN3
OC3
PWRON3
OUT3
OUT4
OVRCUR3
†
33 µF
PWRON4
EN4
OC4
OCSOFF
GND
OVRCUR4
IN2
D +
D –
0.1 µF
Ferrite Beads
GNDA
GNDB
GND
5 V
†
33 µF
†
USB rev 1.1 requires 120 µF per hub.
Figure 32. Hybrid Self/Bus-Powered Hub Implementation, TPS2044A
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
generic hot-plug applications (see Figure 33)
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen
by the main power supply and the card being inserted. The most effective way to control these surges is to limit
and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS204xA and TPS205xA, these devices
can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature
of the TPS204xA and TPS205xA also ensures the switch will be off after the card has been removed, and the
switch will be off during the next insertion. The UVLO feature insures a soft start with a controlled rise time for
every insertion of the card or module.
PC Board
TPS2041A
Power
Supply
Block of
Circuitry
GND
IN
OUT
OUT
OUT
OC
2.7 V to 5.5 V
0.1 µF
1000 µF
Optimum
IN
EN
Overcurrent Response
Figure 33. Typical Hot-Plug Implementation (Example, TPS2041A)
By placing the TPS204xA and TPS205xA between the V input and the rest of the circuitry, the input power
CC
will reach these devices first after insertion. The typical rise time of the switch is approximately 2.5 ms, providing
a slow voltage ramp at the output of the device. This implementation controls system surge currents and
provides a hot-plugging mechanism for any device.
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
0.016 (0,40)
A
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2005
PACKAGING INFORMATION
Orderable Device
TPS2041AD
Status (1)
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
NRND
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2041ADG4
TPS2041ADR
TPS2041ADRG4
TPS2042AD
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2042ADG4
TPS2042ADR
TPS2042ADRG4
TPS2043AD
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
16
16
16
16
16
16
16
8
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2043ADG4
TPS2043ADR
TPS2043ADRG4
TPS2044AD
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2044ADR
TPS2044ADRG4
TPS2051AD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2051ADR
TPS2051ADRG4
TPS2052AD
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2052ADG4
TPS2052ADR
TPS2052ADRG4
TPS2053AD
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2053ADR
TPS2053ADRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2005
Orderable Device
TPS2054AD
Status (1)
NRND
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2054ADR
NRND
SOIC
SOIC
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2054ADRG4
NRND
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
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相关型号：
TPS2044DG4
0.7A, 2.7-5.5V Quad (2In/4Out) Hi-Side MOSFET, Fault Report, Act-Low Enable 16-SOIC -40 to 85
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