TPS2061_14 [TI]
CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES;
| 型号： | TPS2061_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES |
| 文件： | 总38页 (文件大小：1287K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES
Check for Samples: TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
1
FEATURES
APPLICATIONS
•
•
Heavy Capacitive Loads
Short-Circuit Protections
2
•
•
•
•
70-mΩ High-Side MOSFET
1-A Continuous Current
Thermal and Short-Circuit Protection
TPS2061/TPS2065
D AND DGN PACKAGE
(TOP VIEW)
TPS2062/TPS2066
D AND DGN PACKAGE
(TOP VIEW)
Accurate Current Limit
(1.1 A min, 1.9 A max)
OUT
OUT
OUT
OC
GND
GND
IN
OC1
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
IN
IN
OUT1
OUT2
OC2
†
•
•
•
•
•
•
•
•
•
•
Operating Range: 2.7 V to 5.5 V
0.6-ms Typical Rise Time
EN1
EN2
†
†
EN
TPS2063/TPS2067
D PACKAGE
(TOP VIEW)
Undervoltage Lockout
TPS2061/TPS2065
DBV PACKAGE
(TOP VIEW)
Deglitched Fault Report (OC)
No OC Glitch During Power Up
1-μA Maximum Standby Supply Current
Bidirectional Switch
OUT
GND
IN
1
2
16
15
OC1
OUT1
OUT2
IN1
†
EN1
GND
OC
14
3
4
†
†
13
12
11
OC2
EN2
GND
EN
5
OC3
OUT3
NC
6
7
IN2
†
EN3
10
9
Ambient Temperature Range: -40°C to 85°C
Built-in Soft-Start
8
NC
NC
†
All Enable Inputs Are Active High For TPS2065, TPS2066, and TPS2067
UL Listed - File No. E169910
DESCRIPTION
The TPS206x power-distribution switches are intended for applications where heavy capacitive loads and
short-circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches
for power-distribution systems that require multiple power switches in a single package. Each switch is controlled
by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch
rise times and fall times to minimize current surges during switching. The charge pump requires no external
components and allows operation from supplies as low as 2.7 V.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2009, Texas Instruments Incorporated
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
When the output load exceeds the current-limit threshold or a short is present, the device limits the output current
to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When
continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction
temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal
shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains
off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1.5 A
typically.
AVAILABLE OPTION AND ORDERING INFORMATION
RECOMMEND
ED
MAXIMUM
CONTINUOUS
LOAD
TYPICAL
SHORT-
CIRCUIT
CURRENT
LIMIT
PACKAGED
DEVICES
(1)
NUMBER OF
SWITCHES
TA
ENABLE
(2)
MSOP (DGN)
SOIC (D)
SOT23 (DBV)
CURRENT
AT 25°C
Active low
Active high
Active low
Active high
Active low
Active high
Active low
Active high
TPS2061DGN
TPS2061D
TPS2065D
TPS2062D
TPS2066D
TPS2063D
TPS2067D
-
-
-
-
-
-
-
Single
Dual
TPS2065DGN
TPS2062DGN
TPS2066DGN
-40°C to 85°C
1 A
1.5 A
-
-
-
-
Triple
Single
TPS2061DBV
TPS2065DBV
-
(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2062DR).
(2) The printed circuit board layout is important for control of temperature rise when operated at high ambient temperatures.
spacer
ORDERING INFORMATION
(1)
(1)
(2)
TA
SOIC(D)
STATUS
Active
Active
Active
Active
-
MSOP (DGN)
STATUS
Active
Active
Active
Active
-
SOT23 (DBV)
STATUS
TPS2061DG4
TPS2061DGNG4
-
-
-
-
-
TPS2062DG4
TPS2062DGNG4
-
TPS2065DG4
TPS2065DGNG4
-
-40°C to 85°C
TPS2066DG4
TPS2066DGNG4
-
-
-
-
-
TPS2061DBV
TPS2065DBV
Active
Active
-
-
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) The printed circuit board layout is important for control of temperature rise when operated at high ambient temperatures.
2
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
-0.3 V to 6 V
-0.3 V to 6 V
-0.3 V to 6 V
-0.3 V to 6 V
Internally limited
See Dissipation Rating Table
-40°C to 150°C
2 kV
(2)
Input voltage range, VI(IN)
Output voltage range, VO(OUT) (2), VO(OUTx)
Input voltage range, VI(EN), VI(EN), VI(ENx), VI(ENx)
Voltage range, VI(OC), VI(OCx)
Continuous output current, IO(OUT), IO(OUTx)
Continuous total power dissipation
Operating virtual junction temperature range, TJ
Human body model
Electrostatic discharge (ESD) protection
Charge device model (CDM)
500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.
DISSIPATING RATING TABLE
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
585.82 mW
1712.3 mW
898.47 mW
285 mW
D-8(1)
DGN-8(2)
D-16(1)
5.8582 mW/°C
17.123 mW/°C
8.9847 mW/°C
2.85 mW/°C
322.20 mW
941.78 mW
494.15 mW
155 mW
234.32 mW
684.33 mW
359.38 mW
114 mW
DBV-5(3)
704 mW
7.04 mW/°C
387 mW
281 mW
(1) Power ratings are based on the low-k board (1 signal, 1 layer).
(2) Power ratings are based on the high-k board (2 signal, 2 plane) with PowerPAD™ vias to the internal ground plane.
(3) Lower ratings are for low-k printed circuit board layout (single -sided). Higher ratings are for enhanced high-k layout, (2 signal, 2 plane)
with a 1mm2 copper pad on pin 2 and 2 vias to the ground plane.
RECOMMENDED OPERATING CONDITIONS
MIN
2.7
0
MAX
5.5
5.5
1
UNIT
V
Input voltage, VI(IN)
Input voltage, VI(EN), VI(EN), VI(ENx), VI(ENx)
Continuous output current, IO(OUT), IO(OUTx)
Operating virtual junction temperature, TJ
V
0
A
-40
125
°C
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
(1)
PARAMETER
POWER SWITCH
TEST CONDITIONS
MIN
TYP MAX
UNIT
Static drain-source on-state
resistance, 5-V operation
and 3.3-V operation
VI(IN) = 5 V or 3.3 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C
70
75
135
150
mΩ
mΩ
rDS(on)
Static drain-source on-state
resistance, 2.7-V
operation
VI(IN) = 2.7 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C
VI(IN) = 5.5 V
0.6
0.4
1.5
1
tr
tf
Rise time, output
Fall time, output
VI(IN) = 2.7 V
CL = 1 μF, RL = 5 Ω, TJ = 25°C
VI(IN) = 5.5 V
ms
0.05
0.05
0.5
0.5
VI(IN) = 2.7 V
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
MIN
2
TYP MAX
UNIT
ENABLE INPUT EN OR EN
VIH
VIL
II
High-level input voltage
2.7 V ≤ VI(IN) ≤ 5.5 V
2.7 V ≤ VI(IN) ≤ 5.5 V
V
Low-level input voltage
Input current
0.8
0.5
3
VI(ENx) = 0 V or 5.5 V, VI(ENx) = 0 V or 5.5 V
CL = 100 μF, RL = 5 Ω
-0.5
μA
ms
ton
toff
Turnon time
Turnoff time
CL = 100 μF, RL = 5 Ω
10
CURRENT LIMIT
TJ = 25°C
1.1
1.1
1.5
1.5
1.9
2.1
VI(IN) = 5 V, OUT connected to GND,
device enabled into short-circuit
IOS
Short-circuit output current
A
A
-40°C ≤ TJ ≤ 125°C
TPS2061, TPS2062,
TPS2065, TPS2066
1.6
1.6
2.3
2.4
2.7
3.0
IOC_TRIP
Overcurrent trip threshold
VI(IN) = 5 V, current ramp (≤ 100 A/s) on OUT
TPS2063, TPS2067
SUPPLY CURRENT (TPS2061, TPS2065)
TJ = 25°C
0.5
0.5
43
1
5
No load on OUT, VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
Supply current, low-level output
μA
μA
-40°C ≤ TJ ≤ 125°C
TJ = 25°C
60
70
No load on OUT, VI(ENx) = 0 V,
or VI(ENx) = 5.5 V
Supply current, high-level output
Leakage current
-40°C ≤ TJ ≤ 125°C
43
OUT connected to ground, VI(EN) = 5.5 V,
or VI(EN) = 0 V
-40°C ≤ TJ ≤ 125°C
1
0
μA
μA
Reverse leakage current
VI(OUTx) = 5.5 V, IN = ground
TJ = 25°C
SUPPLY CURRENT (TPS2062, TPS2066)
TJ = 25°C
0.5
0.5
50
1
5
No load on OUT, VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
Supply current, low-level output
μA
μA
-40°C ≤ TJ ≤ 125°C
TJ = 25°C
70
90
No load on OUT, VI(ENx) = 0 V,
or VI(ENx) = 5.5 V
Supply current, high-level output
Leakage current
-40°C ≤ TJ ≤ 125°C
50
OUT connected to ground, VI(/ENx) = 5.5 V,
or VI(ENx) = 0 V
-40°C ≤ TJ ≤ 125°C
1
μA
μA
Reverse leakage current
VI(OUTx) = 5.5 V, IN = ground
TJ = 25°C
0.2
SUPPLY CURRENT (TPS2063, TPS2067)
TJ = 25°C
0.5
0.5
65
2
10
Supply current, low-level output
No load on OUT, VI(ENx) = 0 V
No load on OUT, VI(ENx) = 5.5 V
μA
μA
-40°C ≤ TJ ≤ 125°C
TJ = 25°C
90
Supply current, high-level output
Leakage current
-40°C ≤ TJ ≤ 125°C
65
110
OUT connected to ground, VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
-40°C ≤ TJ ≤ 125°C
1
μA
μA
Reverse leakage current
UNDERVOLTAGE LOCKOUT
Low-level input voltage, IN
Hysteresis, IN
VI(OUTx) = 5.5 V, INx = ground
TJ = 25°C
0.2
2
4
2.5
V
TJ = 25°C
75
8
mV
OVERCURRENT OC1 and OC2
Output low voltage, VOL(OCx)
Off-state current
IO(OCx) = 5 mA
0.4
1
V
VO(OCx) = 5 V or 3.3 V
OCx assertion or deassertion
μA
ms
OC deglitch
15
THERMAL SHUTDOWN(2)
Thermal shutdown threshold
Recovery from thermal shutdown
Hysteresis
135
125
°C
°C
°C
10
(2) The thermal shutdown only reacts under overcurrent conditions.
4
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
DEVICE INFORMATION
Pin Functions (TPS2061 and TPS2065)
PINS
D or DGN Package
DBV Package
TPS2061 TPS2065
I/O
DESCRIPTION
NAME
EN
TPS2061
TPS2065
4
-
4
-
-
I
I
Enable input, logic low turns on power switch
Enable input, logic high turns on power switch
Ground
EN
-
1
4
1
4
2
5
3
1
GND
IN
2
5
3
1
2, 3
5
2,3
5
I
Input voltage
OC
O
O
Overcurrent, open-drain output, active-low
Power-switch output
OUT
6, 7, 8
6, 7, 8
Internally connected to GND; used to heat-sink the part
to the circuit board traces. Should be connected to GND
pin.
PowerPAD™
-
-
-
-
Functional Block Diagram
(See Note A)
CS
OUT
IN
Charge
Pump
Current
Limit
EN
Driver
(See Note B)
OC
UVLO
Deglitch
Thermal
Sense
GND
Note A: Current sense
Note B: Active low (EN) for TPS2061. Active high (EN) for TPS2065.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
Pin Functions (TPS2062 and TPS2066)
PINS
I/O
DESCRIPTION
NAME
NO.
TPS2062 TPS2066
EN1
EN2
EN1
EN2
GND
IN
3
4
-
-
I
I
I
I
Enable input, logic low turns on power switch IN-OUT1
Enable input, logic low turns on power switch IN-OUT2
Enable input, logic high turns on power switch IN-OUT1
Enable input, logic high turns on power switch IN-OUT2
Ground
-
3
4
1
2
8
5
7
6
-
1
2
8
5
7
6
I
Input voltage
OC1
OC2
OUT1
OUT2
O
O
O
O
Overcurrent, open-drain output, active low, IN-OUT1
Overcurrent, open-drain output, active low, IN-OUT2
Power-switch output, IN-OUT1
Power-switch output, IN-OUT2
Internally connected to GND; used to heat-sink the part to the circuit board traces.
Should be connected to GND pin.
PowerPAD™
-
-
Functional Block Diagram
OC1
Thermal
Deglitch
Sense
GND
EN1
(See Note B)
Current
Driver
Limit
Charge
Pump
(See Note A)
CS
CS
OUT1
OUT2
UVLO
(See Note A)
IN
Charge
Pump
Current
Limit
Driver
OC2
EN2
(See Note B)
Thermal
Sense
Deglitch
Note A: Current sense
Note B: Active low (ENx) for TPS2062. Active high (ENx) for TPS2066.
6
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
Pin Functions (TPS2063 and TPS2067)
PINS
I/O
DESCRIPTION
NAME
EN1
EN2
EN3
EN1
EN2
EN3
GND
IN1
TPS2063
TPS2067
3
–
I
I
I
I
I
I
Enable input, logic low turns on power switch IN1-OUT1
Enable input, logic low turns on power switch IN1-OUT2
Enable input, logic low turns on power switch IN2-OUT3
Enable input, logic high turns on power switch IN1-OUT1
Enable input, logic high turns on power switch IN1-OUT2
Enable input, logic high turns on power switch IN2-OUT3
Ground
4
7
–
–
–
3
–
4
–
7
1, 5
2
1, 5
2
I
I
Input voltage for OUT1 and OUT2
IN2
6
6
Input voltage for OUT3
NC
8, 9, 10
16
13
12
15
14
11
8, 9, 10
16
13
12
15
14
11
No connection
OC1
OC2
OC3
OUT1
OUT2
OUT3
O
O
O
O
O
O
Overcurrent, open-drain output, active low, IN1-OUT1
Overcurrent, open-drain output, active low, IN1-OUT2
Overcurrent, open-drain output, active low, IN2-OUT3
Power-switch output, IN1-OUT1
Power-switch output, IN1-OUT2
Power-switch output, IN2-OUT3
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
Functional Block Diagram
OC1
Thermal
Sense
GND
Deglitch
EN1
(See Note B)
Current
Driver
Limit
(See Note A)
CS
CS
OUT1
OUT2
UVLO
(See Note A)
IN1
Current
Limit
Driver
OC2
EN2
(See Note B)
Thermal
Sense
Deglitch
Charge
Pump
VCC
Selector
(See Note A)
IN2
CS
OUT3
OC3
Current
Limit
EN3
Driver
(See Note B)
UVLO
Deglitch
Thermal
Sense
GND
Note A: Current sense
Note B: Active low (ENx) for TPS2063; Active high (ENx) for TPS2067
8
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
PARAMETER MEASUREMENT INFORMATION
OUT
t
f
t
r
R
L
C
L
V
90%
10%
O(OUT)
90%
10%
TEST CIRCUIT
50%
90%
50%
50%
50%
V
V
I(EN)
I(EN)
t
off
t
off
t
on
t
on
90%
V
V
O(OUT)
O(OUT)
10%
10%
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
R
C
T
A
= 5 W,
= 1 mF
= 255C
L
L
V
V
I(EN)
I(EN)
5 V/div
5 V/div
R
C
T
= 5 W,
= 1 mF
= 255C
L
L
V
O(OUT)
2 V/div
V
A
O(OUT)
2 V/div
t − Time − 500 ms/div
t − Time − 500 ms/div
Figure 2. Turnon Delay and Rise Time With 1-μF
Figure 3. Turnoff Delay and Fall Time With 1-μF
Load
Load
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
R
L
= 5 W,
C = 100 mF
V
L
I(EN)
V
I(EN)
T
= 255C
5 V/div
A
5 V/div
R
= 5 W,
L
V
O(OUT)
C = 100 mF
L
2 V/div
T
A
= 255C
V
O(OUT)
2 V/div
t − Time − 500 ms/div
t − Time − 500 ms/div
Figure 4. Turnon Delay and Rise Time With 100-μF Figure 5. Turnoff Delay and Fall Time With 100-μF
Load
Load
V
= 5 V
= 5 W,
= 255C
IN
R
T
L
V
I(EN)
V
I(EN)
A
5 V/div
5 V/div
220 mF
470 mF
I
O(OUT)
I
O(OUT)
100 mF
500 mA/div
500 mA/div
t − Time − 500 ms/div
t − Time − 1 ms/div
Figure 6. Short-Circuit Current,
Device Enabled Into Short
Figure 7. Inrush Current With Different
Load Capacitance
10
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
PARAMETER MEASUREMENT INFORMATION (continued)
V
O(OC)
V
O(OC)
2 V/div
2 V/div
I
O(OUT)
I
O(OUT)
1 A/div
1 A/div
t − Time − 2 ms/div
t − Time − 2 ms/div
Figure 8. 2-Ω Load Connected to Enabled Device
Figure 9. 1-Ω Load Connected to Enabled Device
TYPICAL CHARACTERISTICS
TURNON TIME
vs
TURNOFF TIME
vs
INPUT VOLTAGE
INPUT VOLTAGE
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
2
C = 100 mF,
C = 100 mF,
L
L
L
R
T
= 5 W,
= 255C
R
T
= 5 W,
= 255C
L
A
A
1.9
1.8
1.7
1.6
1.5
0.1
0
2
3
4
5
6
2
3
4
5
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 10.
Figure 11.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
11
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
TYPICAL CHARACTERISTICS (continued)
RISE TIME
vs
FALL TIME
vs
INPUT VOLTAGE
INPUT VOLTAGE
0.25
0.2
0.6
0.5
0.4
C
R
T
= 1 mF,
= 5 W,
= 255C
C
R
T
= 1 mF,
= 5 W,
= 255C
L
L
L
L
A
A
0.15
0.1
0.3
0.2
0.05
0
0.1
0
2
3
4
5
6
2
3
4
5
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 12.
Figure 13.
TPS2061, TPS2065
TPS2062, TPS2066
SUPPLY CURRENT, OUTPUT ENABLED
SUPPLY CURRENT, OUTPUT ENABLED
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
60
50
40
30
20
70
60
50
40
30
20
10
0
V = 5.5 V
I
V = 5.5 V
I
V = 5 V
I
V = 5 V
I
V = 3.3 V
I
V = 2.7 V
I
V = 2.7 V
I
V = 3.3 V
I
10
0
−50
0
50
100
150
−50
0
50
100
150
T − Junction Temperature − 5C
J
T − Junction Temperature − 5C
J
Figure 14.
Figure 15.
12
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS (continued)
TPS2063, TPS2067
SUPPLY CURRENT, OUTPUT ENABLED
vs
TPS2061, TPS2065
SUPPLY CURRENT, OUTPUT DISABLED
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
90
80
70
60
50
40
30
20
0.5
0.45
0.4
V = 5.5 V
I
V = 5.5 V
I
V = 5 V
I
0.35
0.3
V = 5 V
I
V = 3.3 V
I
V = 3.3 V
I
V = 2.7 V
I
0.25
0.2
V = 2.7 V
I
0.15
0.1
10
0
0.05
0
−50
0
50
100
150
−50
0
50
100
150
T − Junction Temperature − 5C
J
T − Junction Temperature − 5C
J
Figure 16.
Figure 17.
TPS2062, TPS2066
TPS2063, TPS2067
SUPPLY CURRENT, OUTPUT DISABLED
SUPPLY CURRENT, OUTPUT DISABLED
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
0.5
0.45
0.4
0.5
V = 5.5 V
I
V = 5.5 V
0.45
I
V = 5 V
V = 5 V
I
I
0.4
0.35
0.3
0.35
0.3
V = 3.3 V
I
V = 3.3 V
I
V = 2.7 V
I
V = 2.7 V
I
0.25
0.2
0.25
0.2
0.15
0.1
0.15
0.1
0.05
0.05
0
−50
0
−50
0
50
100
150
0
50
100
150
T − Junction Temperature − 5C
J
T − Junction Temperature − 5C
J
Figure 18.
Figure 19.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
13
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
TYPICAL CHARACTERISTICS (continued)
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
120
1.56
1.54
1.52
1.5
V = 2.7 V
I
I
O
= 0.5 A
Out1 = 5 V
100
80
60
40
20
0
V = 3.3 V
I
Out1 = 3.3 V
Out1 = 2.7 V
1.48
1.46
1.44
1.42
1.4
V = 5 V
I
V = 5.5 V
I
1.38
1.36
1.34
−50
0
50
100
150
−50
0
50
100
150
T − Junction Temperature − 5C
J
T − Junction Temperature − 5C
J
Figure 20.
Figure 21.
THRESHOLD TRIP CURRENT
UNDERVOLTAGE LOCKOUT
vs
vs
INPUT VOLTAGE
JUNCTION TEMPERATURE
2.3
2.5
2.3
2.1
1.9
1.7
1.5
UVLO Rising
T
= 255C
A
Load Ramp = 1A/10 ms
2.26
2.22
2.18
UVLO Falling
2.14
2.1
−50
0
50
100
150
2.5
3
3.5
4
4.5
5
5.5
6
T − Junction Temperature − 5C
J
V − Input Voltage − V
I
Figure 22.
Figure 23.
14
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS (continued)
CURRENT-LIMIT RESPONSE
vs
PEAK CURRENT
200
150
100
V = 5 V,
T
A
I
= 255C
50
0
0
2.5
5
7.5
10
12.5
Peak Current − A
Figure 24.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
APPLICATION INFORMATION
POWER-SUPPLY CONSIDERATIONS
TPS2062
2
Power Supply
2.7 V to 5.5 V
IN
7
6
Load
Load
OUT1
0.1 µF
0.1 µF
0.1 µF
22 µF
22 µF
8
OC1
EN1
OC2
3
5
OUT2
4
EN2
GND
1
Figure 25. Typical Application
A 0.01-μF to 0.1-μF ceramic bypass capacitor between IN and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the
output with a 0.01-μF to 0.1-μF ceramic capacitor improves the immunity of the device to short-circuit transients.
OVERCURRENT
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not
increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only
if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before VI(IN) has been applied (see Figure 15). The TPS206x senses the short and
immediately switches into a constant-current output.
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, high currents may flow for a short period of time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into constant-current
mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 18). The TPS206x is capable of delivering current up to the current-limit threshold without
damaging the device. Once the threshold has been reached, the device switches into its constant-current mode.
OC RESPONSE
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown condition
is encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent or
overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause a
momentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit.
The TPS206x is designed to eliminate false overcurrent reporting. The internal overcurrent deglitch eliminates
the need for external components to remove unwanted pulses. OCx is not deglitched when the switch is turned
off due to an overtemperature shutdown.
16
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
V+
R
pullup
TPS2062
GND
OC1
OUT1
OUT2
OC2
IN
EN1
EN2
Figure 26. Typical Circuit for the OC Pin
POWER DISSIPATION AND JUNCTION TEMPERATURE
The low on-resistance on the N-channel MOSFET allows the small surface-mount packages to pass large
currents. The thermal resistances of these packages are high compared to those of power packages; it is good
design practice to check power dissipation and junction temperature. Begin by determining the rDS(on) of the
N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the
highest operating ambient temperature of interest and read rDS(on) from Figure 20. Using this value, the power
dissipation per switch can be calculated by:
•
PD = rDS(on)× I2
Multiply this number by the number of switches being used. This step renders the total power dissipation from
the N-channel MOSFETs.
The thermal resistance, RθJA = 1 / (DERATING FACTOR), where DERATING FACTOR is obtained from the
Dissipation Ratings Table. Thermal resistance is a strong function of the printed circuit board construction , and
the copper trace area connecting the integrated circuit.
Finally, calculate the junction temperature:
•
TJ = PD x RθJA + TA
Where:
•
•
•
TA= Ambient temperature °C
θJA = Thermal resistance
PD = Total power dissipation based on number of switches being used.
R
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
THERMAL PROTECTION
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The TPS206x implements a thermal sensing to monitor the operating junction
temperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperature
rises due to excessive power dissipation. Once the die temperature rises above a minimum of 135°C due to
overcurrent conditions, the internal thermal sense circuitry turns the power switch off, thus preventing the power
switch from damage. Hysteresis is built into the thermal sense circuit, and after the device has cooled
approximately 10°C, the switch turns back on. The switch continues to cycle in this manner until the load fault or
input power is removed. The OCx open-drain output is asserted (active low) when an overtemperature shutdown
or overcurrent occurs.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
17
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
UNDERVOLTAGE LOCKOUT (UVLO)
An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input
voltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO also keeps the switch from being turned on until the power supply has reached at least 2 V, even if the
switch is enabled. On reinsertion, the power switch is turned on, with a controlled rise time to reduce EMI and
voltage overshoots.
UNIVERSAL SERIAL BUS (USB) APPLICATIONS
The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
•
•
•
•
•
Hosts/self-powered hubs (SPH)
Bus-powered hubs (BPH)
Low-power, bus-powered functions
High-power, bus-powered functions
Self-powered functions
SPHs and BPHs distribute data and power to downstream functions. The TPS206x has higher current capability
than required by one USB port; so, it can be used on the host side and supplies power to multiple downstream
ports or functions.
HOST/SELF-POWERED AND BUS-POWERED HUBS
Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (see
Figure 27). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream
connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection
and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,
and stand-alone hubs.
18
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
Downstream
USB Ports
D+
D−
V
BUS
0.1 µF
33 µF
GND
Power Supply
3.3 V
5 V
D+
D−
TPS2062
2
8
IN
7
V
BUS
OUT1
0.1 µF
0.1 µF
33 µF
GND
OC1
EN1
OC2
EN2
3
5
USB
Controller
D+
D−
4
6
V
BUS
OUT2
0.1 µF
33 µF
GND
GND
1
D+
D−
V
BUS
0.1 µF
33 µF
GND
Figure 27. Typical Four-Port USB Host / Self-Powered Hub
BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required to
power up with less than one unit load. The BPH usually has one embedded function, and power is always
available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up,
the power to the embedded function may need to be kept off until enumeration is completed. This can be
accomplished by removing power or by shutting off the clock to the embedded function. Power switching the
embedded function is not necessary if the aggregate power draw for the function and controller is less than one
unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.
LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS
Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω
and 10 μF at power up, the device must implement inrush current limiting (see Figure 28). With TPS206x, the
internal functions could draw more than 500 mA, which fits the needs of some applications such as motor driving
circuits.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
19
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
Power Supply
D+
D−
3.3 V
TPS2062
2
8
IN
V
BUS
7
10 µF
0.1 µF
Internal
Function
OUT1
GND
0.1 µF
10 µF
OC1
EN1
OC2
EN2
3
5
USB
Control
6
4
OUT2
GND
Internal
Function
0.1 µF
10 µF
1
Figure 28. High-Power Bus-Powered Function
USB POWER-DISTRIBUTION REQUIREMENTS
USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
•
•
Hosts/SPHs must:
–
–
Current-limit downstream ports
Report overcurrent conditions on USB VBUS
BPHs must:
–
–
–
Enable/disable power to downstream ports
Power up at <100 mA
Limit inrush current (<44 Ω and 10 μF)
•
Functions must:
–
–
Limit inrush currents
Power up at <100 mA
The feature set of the TPS206x allows them to meet each of these requirements. The integrated current-limiting
and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable and controlled rise
times meet the need of both input and output ports on bus-powered hubs, as well as the input ports for
bus-powered functions (see Figure 29).
20
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
TUSB2040
Hub Controller
SN75240
BUSPWR
Tie to TPS2041 EN Input
Downstream
Ports
Upstream
Port
A
B
C
D
GANGED
DP1
DM1
D +
D −
DP0
DM0
D +
D −
Ferrite Beads
A
B
C
D
GND
5 V
†
GND
SN75240
DP2
DM2
TPS2041B
OC EN
IN OUT
1 µF
33 µF
5-V Power
Supply
DP3
DM3
5 V
D +
D −
A
B
C
D
Ferrite Beads
TPS76333
IN
SN75240
GND
DP4
DM4
0.1 µF
4.7 µF
V
CC
3.3 V
GND
5 V
†
4.7 µF
TPS2062
PWRON1
GND
EN1
OC1
OUT1
OUT2
33 µF
OVRCUR1
PWRON2
OVRCUR2
48-MHz
Crystal
EN2
OC2
XTAL1
XTAL2
D +
D −
IN
0.1 µF
Ferrite Beads
Tuning
Circuit
GND
5 V
†
OCSOFF
GND
33 µF
D +
D −
Ferrite Beads
GND
5 V
†
33 µF
†
USB rev 1.1 requires 120 µF per hub.
Figure 29. Hybrid Self / Bus-Powered Hub Implementation
GENERIC HOT-PLUG APPLICATIONS
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen by
the main power supply and the card being inserted. The most effective way to control these surges is to limit and
slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS206x, these devices can be used to
provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS206x
also ensures that the switch is off after the card has been removed, and that the switch is off during the next
insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card or
module.
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
21
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
PC Board
TPS2062
Power
Supply
Block of
Circuitry
OC1
GND
2.7 V to 5.5 V
IN
OUT1
OUT2
0.1 µF
EN1
EN2
1000 µF
Optimum
OC2
Block of
Circuitry
Overcurrent Response
Figure 30. Typical Hot-Plug Implementation
By placing the TPS206x between the VCC input and the rest of the circuitry, the input power reaches these
devices first after insertion. The typical rise time of the switch is approximately 1 ms, providing a slow voltage
ramp at the output of the device. This implementation controls system surge currents and provides a
hot-plugging mechanism for any device.
DETAILED DESCRIPTION
Power Switch
The power switch is an N-channel MOSFET with a low on-state resistance. Configured as a high-side switch, the
power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch supplies a
minimum current of 1 A.
Charge Pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
little supply current.
Driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall
times of the output voltage.
Enable (ENx or ENx)
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current. The supply current is reduced to less than 1 μA when a logic high is present on ENx, or when
a logic low is present on ENx. A logic zero input on ENx, or a logic high input on ENx restores bias to the drive
and control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS logic
levels.
Overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A
10-ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature shutdown
occurs, the OCx is asserted instantaneously.
22
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
Current Sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its
saturation region, which switches the output into a constant-current mode and holds the current constant while
varying the voltage on the load.
Thermal Sense
The TPS206x implements a thermal sensing to monitor the operating temperature of the power distribution
switch. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature rises
to approximately 140°C due to overcurrent conditions, the internal thermal sense circuitry turns off the switch,
thus preventing the device from damage. Hysteresis is built into the thermal sense, and after the device has
cooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until the
fault is removed. The open-drain false reporting output (OCx) is asserted (active low) when an overtemperature
shutdown or overcurrent occurs.
Undervoltage Lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
spacer
REVISION HISTORY
Changes from Original (December 2003) to Revision A
Page
•
•
Added devices to the data sheet- TPS2063, TPS2065, TPS2066, TPS2067 ...................................................................... 1
Added the General Switch Catalog ....................................................................................................................................... 1
Changes from Revision A (July 2004) to Revision B
Page
•
•
Changed Features Bullet From: UL Pending To: UL Listed - File No. E169910 .................................................................. 1
Changed Electrical Characteristics - CURRENT LIMIT information. .................................................................................... 4
Changes from Revision C (January 2006) to Revision D
Page
•
Changed ORDERING INFORMATION table ........................................................................................................................ 2
Changes from Revision D (Februaty 2007) to Revision E
Page
•
Changed General Switch Catalog information. ..................................................................................................................... 1
Changes from Revision E (September 2007) to Revision F
Page
•
•
•
•
Added the DBV-5 package. .................................................................................................................................................. 1
Added the DBV-5 package option. ....................................................................................................................................... 1
Added the DBV-5 package option to the Dissipation Ratings table. .................................................................................... 3
Changed Thermal Sense paragraph: From: Once the die temperature rises to approximately 140°C To: Once the
die temperature rises above a minimum of 135°C ............................................................................................................. 17
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
23
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
www.ti.com
Changes from Revision F (April 2008) to Revision G
Page
•
Changed DBV-5 to Product Preview. ................................................................................................................................... 1
Changes from Revision G (July 2008) to Revision H
Page
•
•
•
Deleted Product Preview from the DBV package ................................................................................................................. 1
Changed TPS2061DBV status From Preview to Active ....................................................................................................... 2
Changed TPS2065DBV status From Preview to Active ....................................................................................................... 2
Changes from Revision H (December 2008) to Revision I
Page
•
•
•
Changed the ESD statement ................................................................................................................................................ 2
Deleted temp range of 0°C to 70°C from the Available Option table. .................................................................................. 2
Added Note to the Available Options table - The printed circuit board layout is important for control of temperature
rise when operated at high ambient temperatures ............................................................................................................... 2
•
•
Deleted temp range of 0°C to 70°C from the Ordering Information table. ............................................................................ 2
Added Note to the Ordering Information table - The printed circuit board layout is important for control of
temperature rise when operated at high ambient temperatures ........................................................................................... 2
•
Changed the Abs Max Ratings table - Operating virtual junction temperature range From: -40°C to 125°C To: -40°C
to 150°C ................................................................................................................................................................................ 3
•
•
•
•
•
•
•
•
Deleted Storage temperature range, Tstg from the Abs Max Ratings table .......................................................................... 3
Deleted MIL-STD-883C reference from ESD in the Abs Max table ..................................................................................... 3
Added 3 table notes to the Dissipation Ratings table. .......................................................................................................... 3
Added Addition values for the DBV-5 option in the Dissipation Ratings table. .................................................................... 3
Deleted Note - Not tested in production, specified by design from rDS(on) in the Electrical Characteristics table. ................ 3
Deleted Note - Not tested in production, specified by design from tr in the Electrical Characteristics table. ....................... 3
Deleted Note - Not tested in production, specified by design from tf in the Electrical Characteristics table. ....................... 3
Added text to the POWER DISSIPATION section - The thermal resistance, RθJA ............................................................. 17
24
Submit Documentation Feedback
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067
PACKAGE OPTION ADDENDUM
www.ti.com
27-Oct-2009
PACKAGING INFORMATION
Orderable Device
TPS2061D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
5
5
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2061DBVR
TPS2061DBVT
TPS2061DG4
TPS2061DGN
SOT-23
SOT-23
SOIC
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
DGN
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2061DGNG4
TPS2061DGNR
ACTIVE
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
DGN
8
8
8
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2061DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2061DR
TPS2061DRG4
TPS2062D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
8
8
8
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2062DG4
TPS2062DGN
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
DGN
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2062DGNG4
TPS2062DGNR
ACTIVE
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
DGN
8
8
8
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2062DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2062DR
TPS2062DRG4
TPS2063D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2063DG4
TPS2063DR
TPS2063DRG4
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
27-Oct-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TPS2065D
TPS2065DBVR
TPS2065DBVT
TPS2065DG4
TPS2065DGN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOT-23
SOT-23
SOIC
D
8
5
5
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
DGN
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2065DGNG4
TPS2065DGNR
ACTIVE
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
DGN
8
8
8
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2065DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2065DR
TPS2065DRG4
TPS2066D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
8
8
8
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2066DG4
TPS2066DGN
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
DGN
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2066DGNG4
TPS2066DGNR
ACTIVE
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
DGN
8
8
8
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2066DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2066DR
ACTIVE
ACTIVE
SOIC
D
D
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2066DRG4
SOIC
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2066ID
TPS2066IDR
TPS2067D
PREVIEW
PREVIEW
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2067DG4
TPS2067DR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
27-Oct-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TPS2067DRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS2062 :
Automotive: TPS2062-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Oct-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS2061DBVR
TPS2061DBVT
TPS2061DGNR
SOT-23
SOT-23
DBV
DBV
DGN
5
5
8
3000
250
179.0
179.0
330.0
8.4
8.4
3.2
3.2
5.3
3.2
3.2
3.3
1.4
1.4
1.3
4.0
4.0
8.0
8.0
8.0
Q3
Q3
Q1
MSOP-
Power
PAD
2500
12.4
12.0
TPS2061DR
SOIC
D
8
8
2500
2500
330.0
330.0
12.4
12.4
6.4
5.3
5.2
3.3
2.1
1.3
8.0
8.0
12.0
12.0
Q1
Q1
TPS2062DGNR
MSOP-
Power
PAD
DGN
TPS2062DR
TPS2063DR
SOIC
SOIC
D
8
16
5
2500
2500
3000
250
330.0
330.0
179.0
179.0
330.0
12.4
16.4
8.4
6.4
6.5
3.2
3.2
5.3
5.2
10.3
3.2
2.1
2.1
1.4
1.4
1.3
8.0
8.0
4.0
4.0
8.0
12.0
16.0
8.0
Q1
Q1
Q3
Q3
Q1
D
TPS2065DBVR
TPS2065DBVT
TPS2065DGNR
SOT-23
SOT-23
DBV
DBV
DGN
5
8.4
3.2
8.0
MSOP-
Power
PAD
8
2500
12.4
3.3
12.0
TPS2065DR
SOIC
D
8
8
2500
2500
330.0
330.0
12.4
12.4
6.4
5.3
5.2
3.3
2.1
1.3
8.0
8.0
12.0
12.0
Q1
Q1
TPS2066DGNR
MSOP-
Power
PAD
DGN
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Oct-2009
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS2066DR
TPS2067DR
TPS2067DR
SOIC
SOIC
SOIC
D
D
D
8
2500
2500
2500
330.0
330.0
330.0
12.4
16.4
16.4
6.4
6.5
6.5
5.2
2.1
2.1
2.1
8.0
8.0
8.0
12.0
16.0
16.0
Q1
Q1
Q1
16
16
10.3
10.3
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS2061DBVR
TPS2061DBVT
TPS2061DGNR
TPS2061DR
SOT-23
SOT-23
DBV
DBV
DGN
D
5
5
3000
250
195.0
195.0
370.0
340.5
370.0
340.5
346.0
195.0
195.0
370.0
340.5
370.0
340.5
346.0
200.0
200.0
355.0
338.1
355.0
338.1
346.0
200.0
200.0
355.0
338.1
355.0
338.1
346.0
45.0
45.0
55.0
20.6
55.0
20.6
33.0
45.0
45.0
55.0
20.6
55.0
20.6
33.0
MSOP-PowerPAD
SOIC
8
2500
2500
2500
2500
2500
3000
250
8
TPS2062DGNR
TPS2062DR
MSOP-PowerPAD
SOIC
DGN
D
8
8
TPS2063DR
SOIC
D
16
5
TPS2065DBVR
TPS2065DBVT
TPS2065DGNR
TPS2065DR
SOT-23
DBV
DBV
DGN
D
SOT-23
5
MSOP-PowerPAD
SOIC
8
2500
2500
2500
2500
2500
8
TPS2066DGNR
TPS2066DR
MSOP-PowerPAD
SOIC
DGN
D
8
8
TPS2067DR
SOIC
D
16
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Oct-2009
Device
TPS2067DR
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
333.2 345.9 28.6
D
2500
Pack Materials-Page 3
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
Data Converters
DLP® Products
Automotive
www.ti.com/automotive
www.ti.com/communications
Communications and
Telecom
DSP
dsp.ti.com
Computers and
Peripherals
www.ti.com/computers
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Consumer Electronics
Energy
www.ti.com/consumer-apps
www.ti.com/energy
Logic
Industrial
www.ti.com/industrial
Power Mgmt
Microcontrollers
RFID
power.ti.com
Medical
www.ti.com/medical
microcontroller.ti.com
www.ti-rfid.com
Security
www.ti.com/security
Space, Avionics &
Defense
www.ti.com/space-avionics-defense
RF/IF and ZigBee® Solutions www.ti.com/lprf
Video and Imaging
Wireless
www.ti.com/video
www.ti.com/wireless-apps
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2010, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明