TPS2101 [TI]
VAUX POWER-DISTRIBUTION SWITCHES; VAUX配电开关
| 型号： | TPS2101 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | VAUX POWER-DISTRIBUTION SWITCHES |
| 文件： | 总17页 (文件大小：300K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
features
typical applications
Dual-Input, Single-Output MOSFET Switch
With No Reverse Current Flow (No Parasitic
Diodes)
Notebook and Desktop PCs
Palmtops and PDAs
IN1 . . . 250-mΩ, 500-mA N-Channel;
16-µA Max Supply Current
TPS2100
IN1
IN2 . . . 1.3-Ω, 10-mA P-Channel;
Controller
(CardBus,
1394,
PCI,
et al.)
1.5-µA Max Supply Current (V
Mode)
AUX
3.3 V V
CC
3.3 V
Advanced Switch Control Logic
IN2
3.3 V V
AUX
CMOS- and TTL-Compatible Enable Input
Controlled Rise, Fall, and Transition Times
2.7-V to 4 V Operating Range
EN
D3 or PME Status
Control Signal
Hold-Up
Capacitor
SOT-23-5 and SOIC-8 Package
–40°C to 70°C Ambient Temperature Range
Figure 1. Typical Dual-Input Single-Output
Application
2-kV Human-Body-Model, 750-V CDM,
200-V Machine-Model Electrostatic-
Discharge Protection
description
The TPS2100 and TPS2101 are dual-input, single-output power switches designed to provide uninterrupted
output voltage when transitioning between two independent power supplies. Both devices combine one
n-channel (250 mΩ) and one p-channel (1.3 Ω) MOSFET with a single output. The p-channel MOSFET (IN2)
is used with auxiliary power supplies that deliver lower current for standby modes. The n-channel MOSFET
(IN1) is used with a main power supply that delivers higher current required for normal operation. Low
on-resistance makes the n-channel the ideal path for higher main supply current when power-supply regulation
and system voltage drops are critical. When using the p-channel MOSFET, quiescent current is reduced to
0.75 µA to decrease the demand on the standby power supply. The MOSFETs in the TPS2100 and TPS2101
do not have the parasitic diodes, found in discrete MOSFETs, which allow the devices to prevent back-flow
current when the switch is off.
TPS2100
D PACKAGE
(TOP VIEW)
(TOP VIEW)
DBV PACKAGE
PCI Bus
V
3.3 V
AUX
IN2
GND
EN
OUT
OUT
NC
1
2
3
4
8
7
6
5
IN1
1
2
3
5
4
EN
GND
IN2
OUT
NC
IN1
VGA
TPS210x
D3-STAT
TPS2101
V
CC
D PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
PCI12xx / PCI14xx
CardBus Controller
IN2
GND
EN
OUT
OUT
NC
1
2
3
4
8
7
6
5
EN
GND
IN2
IN1
1
2
3
5
4
Figure 2. V
CardBus Implementation
AUX
OUT
NC
IN1
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
AVAILABLE OPTIONS
PACKAGED DEVICES
SOT-23-5 SOIC-8
T
J
DEVICE
ENABLE
†
(DBV)
(D)
†
†
TPS2100
TPS2101
EN
EN
TSP2100DBV
TPS2100D
TPS2101D
–40°C to 85°C
TPS2101DBV
Both packages are available left-end taped and reeled. Add an R suffix to the D device type
(e.g., TPS2101DR).
†
Add T (e.g., TPS2100DBVT) to indicate tape and reel at order quantity of 250 parts.
Add R (e.g., TPS2100DBVR) to indicate tape and reel at order quantity of 3000 parts.
TPS2100 functional block diagram
SW1
250 mΩ
IN1
OUT
Charge
Pump
Pullup
Circuit
Discharge
Circuit
V
CC
Driver
EN
Select
IN2
SW2
1.3 Ω
GND
Driver
TPS2101 functional block diagram
SW1
250 mΩ
IN1
OUT
Charge
Pump
Discharge
Circuit
V
CC
Driver
EN
Select
IN2
SW2
1.3 Ω
Pulldown
Circuit
GND
Driver
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
Function Tables
TPS2100
TPS2101
VIN1
0 V
VIN2
EN
XX
L
OUT
VIN1
0 V
VIN2
0 V
EN
XX
H
OUT
GND
GND
VIN1
VIN1
VIN2
VIN2
VIN2
0 V
3.3 V
3.3 V
0 V
GND
GND
VIN1
VIN1
VIN2
VIN2
VIN2
0 V
0 V
3.3 V
3.3 V
0 V
3.3 V
3.3 V
0 V
L
3.3 V
3.3 V
0 V
H
L
H
3.3 V
0 V
H
3.3 V
0 V
L
3.3 V
3.3 V
H
3.3 V
3.3 V
L
3.3 V
H
3.3 V
L
XX = don’t care
Terminal Functions
TERMINAL
NO.
DESCRIPTION
NAME
I/O
TPS2100
DBV
TPS2101
D
DBV
D
EN
EN
1
3
Active-high enable for IN1-OUT switch
Active-low enable for IN1-OUT switch
Ground
1
2
5
3
4
3
2
I
I
GND
IN1
2
5
3
4
2
5
5
I
Main Input voltage, NMOS drain (250 mΩ)
Auxilliary input voltage, PMOS drain (1.3 Ω)
Power switch output
IN2
1
1
I
OUT
NC
7, 8
4, 6
7, 8
4, 6
O
No connection
detailed description
power switches
n-channel MOSFET
The IN1-OUT n-channel MOSFET power switch has a typical on-resistance of 250 mΩ at 3.3-V input voltage,
and is configured as a high-side switch.
p-channel MOSFET
The IN2-OUT p-channel MOSFET power switch with typical on-resistance of 1.3 Ω at 3.3-V input voltage and
is configured as a high-side switch. When operating, the p-channel MOSFET quiescent current is reduced to
less than 1.5 µA.
charge pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.
driver
The driver controls the gate voltage of the IN1-OUT and IN2-OUT power switches. To limit large current surges
and reduce the associated electromagnetic interference (EMI) produced, the drivers incorporate circuitry that
controls the rise times and fall times of the output voltage.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
detailed description (continued)
enable
The logic enable will turn on the IN2-OUT power switch when a logic high is present on EN (TPS2100) or logic
low is present on EN (TPS2101). A logic low input on EN (TPS2100) or logic high on EN (TPS2101) restores
bias to the drive and control circuits and turns on the IN1-OUT power switch. The enable input is compatible
with both TTL and CMOS logic levels.
the V
application for CardBus controllers
AUX
The PC Card specification requires the support of V
sockets. Both are 3.3-V requirements; however the CardBus controller’s current demand from the V
to the CardBus controller as well as to the PC Card
AUX
supply
AUX
is limited to 10 µA, whereas the PC Card may consume as much as 200 mA. In either implementation, if support
of a wake-up event is required, the controller and the socket will transition from the 3.3-V V rail to the 3.3-V
CC
CC
V
railwhentheequipmentmovesintoalowpowermodesuchasD3. ThetransitionfromV toV
needs
AUX
AUX
to be seamless in order to maintain all memory and register information in the system. If V
the system will lose all register information when it transitions to the D3 state.
is not supported,
AUX
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Input voltage range, V
Input voltage range, V
(see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 5 V
(see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 5 V
I(IN1)
I(IN2)
Input voltage range, V at EN or EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 5 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 5 V
O
Continuous output current, I
Continuous output current, I
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA
O(IN1
O(IN2)
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge (ESD) protection: Human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V
Charged device model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . 750 V
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to GND.
DISSIPATION RATING TABLE
DERATING FACTOR
T
< 25°C
T
A
= 70°C
T = 85°C
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
DBV
D
309 mW
3.1 mW/°C
5.7 mW/°C
170 mW
313 mW
123 mW
227 mW
568 mW
recommended operating conditions
MIN MAX
UNIT
V
Input voltage, V
I(INx)
2.7
0
4
4
Input voltage, V at EN and EN
V
I
Continuous output current, I
Continuous output current, I
500
mA
mA
°C
O(IN1)
‡
100
O(IN2)
Operating virtual junction temperature, T
–40
85
J
‡
Thedevicecandeliverupto220mAatI
and greater voltage droop when switching between IN1 and IN2.
. However,operationatthehighercurrentlevelswillresultingreatervoltagedropacrossthedevice,
O(IN2)
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
electrical characteristics over recommended operating junction temperature range,
V
= V
= 3.3 V, I = rated current (unless otherwise noted)
I(IN1)
(IN2) O
power switch
TEST
CONDITIONS
PARAMETER
MIN
TYP
MAX
UNIT
†
T = 25°C
250
300
1.3
1.5
J
IN1-OUT
IN2-OUT
mΩ
T = 85°C
J
375
2.1
r
On-state resistance
DS(on)
T = 25°C
J
Ω
T = 85°C
J
†
Pulse-testing techniques maintain junction temperature close to ambient termperature; thermal effects must be taken into account separately.
enable input (EN and EN)
PARAMETER
High-level input voltage
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
V
V
2.7 V ≤ V
2.7 V ≤ V
TPS2100
TPS2101
≤ 4 V
≤ 4 V
2
IH
I(INx)
Low-level input voltage
0.8
0.5
0.5
V
IL
I(INx)
EN = 0 V or EN = V
–0.5
–0.5
µA
µA
I(INx)
I(INx)
I
I
Input current
EN = 0 V or EN = V
supply current
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
1.5
16
UNIT
T = 25°C
J
0.75
EN = H,
µA
IN2 selected
–40°C ≤ T ≤ 85°C
J
TPS2100
TPS2101
T = 25°C
J
10
0.75
10
EN = L,
µA
µA
µA
IN1 selected
–40°C ≤ T ≤ 85°C
J
I
I
Supply current
T = 25°C
J
EN = L,
IN2 selected
–40°C ≤ T ≤ 85°C
1.5
16
J
T = 25°C
J
EN = H,
IN1 selected
–40°C ≤ T ≤ 85°C
J
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
†
switching characteristics, T = 25°C, V
= V
= 3.3 V (unless otherwise noted)
I(IN2)
J
I(IN1)
†
PARAMETER
TEST CONDITIONS
MIN
TYP
830
840
640
5.5
70
MAX
UNIT
C
C
C
C
C
C
C
C
C
C
C
C
= 1 µF,
= 10 µF,
= 1 µF,
= 1 µF,
= 10 µF,
= 1 µF,
= 1 µF,
= 10 µF,
= 1 µF,
= 1 µF,
= 10 µF,
= 1 µF,
I
L
I
L
I
L
I
L
I
L
I
L
I
L
I
L
I
L
I
L
I
L
I
L
= 500 mA
L
L
L
L
L
L
L
L
L
L
L
L
IN1-OUT
V
= 0
= 0
= 0
= 0
= 500 mA
= 10 mA
= 10 mA
= 10 mA
= 1 mA
I(IN2)
I(IN1)
I(IN2)
I(IN1)
t
r
Output rise time
µs
IN2-OUT
IN1-OUT
IN2-OUT
V
V
V
5.5
8
= 500 mA
= 500 mA
= 10 mA
= 10 mA
= 10 mA
= 1 mA
93
23
t
f
Output fall time
µs
690
6900
6900
75
IN1-OUT
IN2-OUT
IN1-OUT
IN2-OUT
V
I(IN2)
V
I(IN1)
V
I(IN2)
V
I(IN1)
= 0
= 0
= 0
= 0
t
t
Propagationdelaytime, low-to-highoutput
Propagationdelaytime, high-to-lowoutput
C
C
= 10 µF,
= 10 µF,
I
= 10 mA
= 10 mA
µs
µs
PLH
L
L
L
L
2
3
I
PHL
370
†
All timing parameters refer to Figure 3.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
OUT
I
O
C
L
LOAD CIRCUIT
50%
50%
EN or EN
t
EN or EN
t
PHL
V
I
V
I
PLH
90%
V
O
GND
V
O
GND
10%
Propagation Delay Time, Low-to-High-Level Output
Propagation Delay Time, High-to–Low-Level Output
t
t
f
r
V
I
90%
V
O
10%
GND
Rise/Fall Time
50%
50%
EN or EN
EN or EN
t
off
t
V
I
on
V
I
90%
V
O
GND
V
O
GND
10%
Turn-off Transition Time
Turn-on Transition Time
WAVEFORMS
Figure 3. Test Circuit and Voltage Waveforms
†
Table of Timing Diagrams
FIGURE
Propagation Delay and Rise Time With 0.1-µF Load, IN1
4
5
Propagation Delay and Rise Time With 0.1-µF Load, IN2
Propagation Delay and Fall Time With 0.1-µF Load, IN1
Propagation Delay and Fall Time With 0.1-µF Load, IN2
Propagation Delay and Rise Time With 1-µF Load, IN1
Propagation Delay and Rise Time With 1-µF Load, IN2
Propagation Delay and Fall Time With 1-µF Load, IN1
6
7
8
9
10
Propagation Delay and Fall Time With 1-µF Load, IN2
11
†
Waveforms shown in Figures 4–11 refer to TPS2100 at T = 25°C
J
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
V
V
C
R
= 3.3 V
= 0 V
= 0.1 µF
I(IN1)
I(IN2)
L
L
= 330 Ω
EN
(2 V/div)
EN
(2 V/div)
V
V
C
R
= 0 V
= 3.3 V
= 0.1 µF
= 330 Ω
I(IN1)
I(IN2)
L
L
V
O
V
O
(2 V/div)
(2 V/div)
t – Time – 1 µs/div
t – Time – 250 µs/div
Figure 4. Propagation Delay and Rise Time
Figure 5. Propagation Delay and Fall Time
With 0.1-µF Load, IN1
With 0.1-µF Load, IN2
V
V
C
R
= 0 V
= 3.3 V
= 0.1 µF
= 330 Ω
I(IN1)
I(IN2)
L
L
V
V
C
R
= 3.3 V
= 0 V
= 0.1 µF
I(IN1)
I(IN2)
L
L
EN
(2 V/div)
EN
(2 V/div)
= 330 Ω
V
O
V
O
(2 V/div)
(2 V/div)
t – Time – 50 µs/div
t – Time – 5 µs/div
Figure 6. Propagation Delay and Fall Time
Figure 7. Propagation Delay and Fall Time
With 0.1-µF Load, IN1
With 0.1-µF Load, IN2
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
V
V
C
R
= 3.3 V
= 0 V
= 1 µF
I(IN1)
I(IN2)
L
L
= 330 Ω
EN
(2 V/div)
EN
(2 V/div)
V
V
C
R
= 0 V
= 3.3 V
= 1 µF
= 330 Ω
I(IN1)
I(IN2)
L
L
V
V
O
O
(2 V/div)
(2 V/div)
t – Time – 2.5 µs/div
t – Time – 250 µs/div
Figure 8. Propagation Delay and Rise Time
Figure 9. Propagation Delay and Rise Time
With 1-µF Load, IN1
With 1-µF Load, IN2
V
V
C
R
= 0 V
= 3.3 V
= 1 µF
= 330 Ω
I(IN1)
I(IN2)
L
L
V
V
C
R
= 3.3 V
= 0 V
= 1 µF
I(IN1)
I(IN2)
L
L
EN
(2 V/div)
EN
(2 V/div)
= 330 Ω
V
O
V
O
(2 V/div)
(2 V/div)
t – Time – 250 µs/div
t – Time – 10 µs/div
Figure 10. Propagation Delay and Fall Time
Figure 11. Propagation Delay and Fall Time
With 1-µF Load, IN1
With 1-µF Load, IN2
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
12
IN1 Switch Rise Time
IN2 Switch Fall Time
IN1 Switch Fall Time
IN2 Switch Fall Time
Output Voltage Droop
Inrush Current
vs Output Current
vs Output Current
13
vs Output Current
14
vs Output Current
15
vs Output Current When Output Is Switched From IN2 to IN1
vs Output Capacitance
16
17
IN1 Supply Current
IN1 Supply Current
IN2 Supply Current
IN2 Supply Current
IN1-OUT On-State Resistance
vs Junction Temperature (IN1 Enabled)
vs Junction Temperature (IN1 Disabled)
vs Junction Temperature (IN2 Enabled)
vs Junction Temperature (IN2 Disabled)
vs Junction Temperature
18
19
20
21
22
IN2-OUT On-State Resistance
vs Junction Temperature
23
IN1 SWTICH RISE TIME
IN2 SWTICH RISE TIME
vs
OUTPUT CURRENT
vs
OUTPUT CURRENT
900
850
800
750
700
1000
100
10
C
= 100 µF
L
V
V
= 3.3 V
= 0 V
= 25°C
I(IN1)
I(IN2)
T
J
C
= 47 µF
= 10 µF
L
C
= 100 µF
L
C
C
= 47 µF
L
L
C
= 10 µF
L
650
600
C
= 1 µF
L
1
C
= 1 µF
L
C
= 0.1 µF
L
C
= 0.1 µF
V
V
= 0 V
= 3.3 V
= 25°C
L
I(IN1)
I(IN2)
550
500
T
J
0.1
0.01
0.1
1
10
100
1000
0
1
2
3
4
5
6
7
8
9
10
I
O
– Output Current – mA
I
O
– Output Current – mA
Figure 12
Figure 13
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
TYPICAL CHARACTERISTICS
IN1 SWITCH FALL TIME
IN2 SWITCH FALL TIME
vs
OUTPUT CURRENT
vs
OUTPUT CURRENT
10000
1000
100
1000
100
V
V
T
= 3.3 V
= 0 V
= 25°C
I(IN1)
I(IN2)
J
C
= 100 µF
L
C
= 100 µF
L
C
= 47 µF
= 10 µF
L
L
C
= 10 µF
L
C
L
C
= 1 µF
L
10
1
C
= 0.1 µF
L
C
= 1 µF
10
1
V
V
= 0 V
I(IN1)
I(IN2)
C
= 0.1 µF
L
= 3.3 V
C
= 47 µF
L
T
J
= 25°C
0.1
0.01
0.01
0.1
1
10
100
1000
0.1
1
10
I
O
– Output Current – mA
I
O
– Output Current – mA
Figure 14
Figure 15
OUTPUT VOLTAGE DROOP
vs
OUTPUT CURRENT WHEN OUTPUT
IS SWITCHED FROM IN2 TO IN1
INRUSH CURRENT
vs
OUTPUT CAPACITANCE
1
0.8
0.6
1.6
1.4
1.2
1
V
V
T
= 3.3 V
= 3.3 V
= 25°C
I(IN1)
I(IN2)
J
V
= 3.3 V
= 0 V
= 6.6 Ω
C
= 0.1 µF
I(IN1)
V
I(IN2)
L
C
L
= 1 µF
L
R
L
J
T
= 25°C
C
= 10 µF
C
= 47 µF
0.8
0.6
L
C
= 100 µF
0.4
L
0.4
0.2
0
0.2
0
0.01
0.1
1
10
0
100
C
200
300
400
500
I
O
– Output Current – mA
– Output Capacitance – µF
o
Figure 16
Figure 17
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
TYPICAL CHARACTERISTICS
IN1 SUPPLY CURRENT
vs
JUNCTION TEMPERATURE (IN1 DISABLED)
IN1 SUPPLY CURRENT
vs
JUNCTION TEMPERATURE (IN1 ENABLED)
0.25
0.23
14
12
10
V
I(INx)
= 4 V
V
I(INx)
= 4 V
V
I(INx)
= 3.3 V
0.21
0.19
V
I(INx)
= 3.3 V
V
I(INx)
= 2.7 V
V
= 2.7 V
I(INx)
8
6
0.17
0.15
–40 –20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
T
J
Junction Temperature – °C
T
J
Junction Temperature – °C
Figure 18
Figure 19
IN2 SUPPLY CURRENT
vs
JUNCTION TEMPERATURE (IN2 ENABLED)
IN2 SUPPLY CURRENT
vs
JUNCTION TEMPERATURE (IN2 DISABLED)
0.75
0.7
0.6
0.56
0.52
0.48
V
I(INx)
= 4 V
0.65
0.6
V
I(INx)
= 4 V
V
I(INx)
= 3.3 V
V
I(INx)
= 3.3 V
V
I(INx)
= 2.7 V
0.55
0.5
0.44
0.4
V
= 2.7 V
40
I(INx)
–40 –20
0
20
40
60
80
100
–40 –20
0
20
60
80
100
T
J
Junction Temperature – °C
T
J
Junction Temperature – °C
Figure 20
Figure 21
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
TYPICAL CHARACTERISTICS
IN2-OUT ON-STATE RESISTANCE
IN1-OUT ON-STATE RESISTANCE
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
2
1.75
1.5
305
280
255
V
I(INx)
= 2.7 V
V
= 3.3 V
I(INx)
1.25
1
V
= 2.7 V
I(INx)
V
= 4 V
230
205
180
I(INx)
V
= 3.3 V
I(INx)
0.75
0.5
V
= 4 V
0
I(INx)
–40
–20
0
20
40
60
80
100
–40 –20
20
40
60
80
100
T
J
Junction Temperature – °C
T
J
Junction Temperature – °C
Figure 22
Figure 23
APPLICATION INFORMATION
TPS2100
CardBus or System Controller
3.3 V
EN
IN1
IN2
OUT
3.3 V V
CC
0.1 µF
xx µF
3.3 V V
AUX
0.1 µF
GND
0.1 µF
Figure 24. Typical Application
power supply considerations
A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device is recommended. The
output capacitor should be chosen based on the size of the load during the transition of the switch. A 47-µF
capacitor is recommended for 10-mA loads. Typical output capacitors (xx µF, shown in Figure 24) required for
a given load can be determined from Figure 16 which shows the output voltage droop when output is switched
from IN2 to IN1. The output voltage droop is insignificant when output is switched from IN1 to IN2. Additionally,
bypassing the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to
short-circuit transients.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
APPLICATION INFORMATION
power supply considerations (continued)
switch transition
Then-channelMOSFETonIN1usesacharge-pumptocreatethegate-drivevoltage, whichgivestheIN1switch
a rise time of approximately 1 ms. The p-channel MOSFET on IN2 has a simpler drive circuit that allows a rise
time of approximately 8 µs. Because the device has two switches and a single enable pin, these rise times are
seen as transition times, from IN1 to IN2, or IN2 to IN1, by the output. The controlled transition times help limit
the surge currents seen by the power supply during switching.
thermal protection
Thermal protection provided on the IN1 switch prevents damage to the IC when heavy-overload or short-circuit
faults are present for extended periods of time. The increased dissipation causes the junction temperature to
rise to dangerously high levels. The protection circuit senses the junction temperature of the switch and shuts
it off at approximately 125°C (T ). The switch remains off until the junction temperature has dropped. The switch
J
continues to cycle in this manner until the load fault or input power is removed.
undervoltage lockout
An undervoltage lockout function is provided to ensure that the power switch is in the off state at power-up.
Whenever the input voltage falls below approximately 2 V, the power switch quickly turns off. This function
facilitates the design of hot-insertion systems that may not have the capability to turn off the power switch before
input power is removed. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce
EMI and voltage overshoots.
power dissipation and junction temperature
The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to that of power packages; it is
good design practice to check power dissipation and junction temperature. First, find r at the input voltage,
on
and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and
read r from Figure 22 or Figure 23. Next calculate the power dissipation using:
on
2
P
r
I
on
D
Finally, calculate the junction temperature:
T
P
R
T
J
D
JA
A
Where:
T = Ambient temperature
A
R
= Thermal resistance
θJA
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation using the calculated value as the new estimate. Two or three iterations are generally
sufficient to obtain a reasonable answer.
ESD protection
All TPS2100 and TPS2101 terminals incorporate ESD-protection circuitry designed to withstand a 2-kV
human-body-model discharge as defined in MIL-STD-883C.
14
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TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
MECHANICAL DATA
DBV (R-PDSO-G5)
PLASTIC SMALL-OUTLINE
0,50
0,30
M
0,20
0,95
5
4
0,15 NOM
1,70
1,50
3,00
2,60
1
3
Gage Plane
3,00
2,80
0,25
0°–8°
0,55
0,35
Seating Plane
0,10
1,45
0,95
0,05 MIN
4073253-4/E 05/99
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-178
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2100, TPS2101
POWER-DISTRIBUTION SWITCHES
V
AUX
SLVS197C – JUNE 1999 – REVISED APRIL 2000
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.010 (0,25)
M
0.014 (0,35)
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
A
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright 2000, Texas Instruments Incorporated
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TPS2102DBVRG4
2.7-4V Dual In/Single Out MOSFET, 0.5A Main/0.1A Aux Input, Act-Low Enable, Comm. Temp. 5-SOT-23
TI
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