TPS22915CYFPR [TI]

具有输出放电功能的 5.5V、2A、39mΩ 负载开关 | YFP | 4 | -40 to 105;


型号：	TPS22915CYFPR
厂家：	TEXAS INSTRUMENTS
描述：	具有输出放电功能的 5.5V、2A、39mΩ 负载开关 \| YFP \| 4 \| -40 to 105 开关驱动接口集成电路
文件：	总32页 (文件大小：1266K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TPS22914B, TPS22914C, TPS22915B, TPS22915C

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SLVSCO0E – JUNE 2014 – REVISED OCTOBER 2020

TPS2291xx, 5.5-V, 2-A, 37-mΩ On-Resistance Load Switch

1 Features

3 Description

•

Integrated Single Channel Load Switch

Input Voltage Range: 1.05 V to 5.5 V

Low On-Resistance (R_ON

– R_ON= 37 mΩ (Typical) at V_IN= 5 V

– R_ON= 38 mΩ (Typical) at V_IN= 3.3 V

– R_ON= 43 mΩ (Typical) at V_IN= 1.8 V

2-A Maximum Continuous Switch Current

Low Quiescent Current

The TPS22914/15 is a small, low R_ON, single channel

load switch with controlled slew rate. The device

contains an N-channel MOSFET that can operate

over an input voltage range of 1.05 V to 5.5 V and can

support a maximum continuous current of 2 A. The

switch is controlled by an on and off input, which is

capable of interfacing directly with low-voltage control

signals.

)

•

The small size and low R_ONmakes the device ideal

for being used in space constrained, battery powered

applications. The wide input voltage range of the

switch makes it a versatile solution for many different

voltage rails. The controlled rise time of the device

greatly reduces inrush current caused by large bulk

load capacitances, thereby reducing or eliminating

power supply droop. The TPS22915 further reduces

the total solution size by integrating a 143-Ω pull-

down resistor for quick output discharge (QOD) when

the switch is turned off.

– 7.7 µA (Typical) at V_IN= 3.3 V

Low Control Input Threshold Enables Use of 1 V or

Higher GPIO

•

Controlled Slew Rate

– t_R(TPS22914B/15B) = 64 µs at V_IN= 3.3 V

– t_R(TPS22914C/15C) = 913 µs at V_IN= 3.3 V

Quick Output Discharge (TPS22915 only)

Ultra-Small Wafer-Chip-Scale Package

– 0.78 mm × 0.78 mm, 0.4-mm Pitch,

0.5-mm Height (YFP)

•

ESD Performance Tested per JESD 22

– 2-kV HBM and 1-kV CDM

The TPS22914/15 is available in a small, space-

saving 0.78 mm x 0.78 mm, 0.4-mm pitch, 0.5-mm

height 4-pin Wafer-Chip-Scale (WCSP) package

(YFP). The device is characterized for operation over

the free-air temperature range of –40°C to +105°C.

2 Applications

•

Smartphones, Mobile Phones

Ultrathin, Ultrabook^™/ Notebook PC

Tablet PC, Phablet

Wearable Technology

Solid State Drives

Device Information ⁽¹⁾

PART NUMBER

PACKAGE

BODY SIZE (NOM)

TPS22914B

TPS22914C

DSBGA (4)

0.74 mm x 0.74 mm

Digital Cameras

TPS22915B

TPS22915C

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

VIN

VOUT

GND

-40°C

25°C

85°C

Power Supply

C_IN

C_L

R_L

105°C

OFF

TPS22914/15

GND

Simplified Schematic

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D005

R_ONvs V_IN(I_OUT= –200 mA)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

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Table of Contents

1 Features............................................................................1

2 Applications.....................................................................1

3 Description.......................................................................1

4 Revision History.............................................................. 2

5 Device Comparison Table...............................................3

6 Pin Configuration and Functions...................................3

7 Specifications.................................................................. 4

7.1 Absolute Maximum Ratings........................................ 4

7.2 ESD Ratings............................................................... 4

7.3 Recommended Operating Conditions.........................4

7.4 Thermal Information....................................................4

7.5 Electrical Characteristics.............................................5

7.6 Switching Characteristics............................................8

7.7 Typical DC Characteristics..........................................9

7.8 Typical AC Characteristics (TPS22914B/15B)..........11

7.9 Typical AC Characteristics (TPS22914C/15C)......... 14

8 Parameter Measurement Information..........................16

9 Detailed Description......................................................17

9.1 Overview...................................................................17

9.2 Functional Block Diagram.........................................17

9.3 Feature Description...................................................17

9.4 Device Functional Modes..........................................18

10 Application and Implementation................................19

10.1 Application Information........................................... 19

10.2 Typical Application.................................................. 19

11 Power Supply Recommendations..............................21

12 Layout...........................................................................21

12.1 Layout Guidelines................................................... 21

12.2 Layout Example...................................................... 22

13 Device and Documentation Support..........................23

13.1 Documentation Support.......................................... 23

13.2 Related Links.......................................................... 23

13.3 Receiving Notification of Documentation Updates..23

13.4 Support Resources................................................. 23

13.5 Trademarks.............................................................23

13.6 Electrostatic Discharge Caution..............................23

13.7 Glossary..................................................................23

14 Mechanical, Packaging, and Orderable

Information.................................................................... 24

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision D (September 2016) to Revision E (October 2020)

Page

•

Updated the numbering format for tables, figures and cross-references throughout the document...................1

Updated the body size in the Device Information table...................................................................................... 1

Changes from Revision C (July 2015) to Revision D (September 2016)

Page

•

Changed "TPS22915B" only, to "TPS22915B/C only" in the Electrical Characteristics table ............................5

Changes from Revision B (September 2014) to Revision C (July 2015)

Page

•

Updated T_Aratings in datasheet from 85°C to 105°C.........................................................................................1

Changes from Revision A (June 2014) to Revision B (September 2014)

Page

•

Updated X-axis scales in th Typical Characteristics section. .............................................................................9

Changes from Revision * (June 2014) to Revision A (June 2014)

Page

•

Initial release of full version. .............................................................................................................................. 1

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5 Device Comparison Table

R_ONat 3.3V

DEVICE

t_Rat 3.3V

(TYPICAL)

QUICK OUTPUT

DISCHARGE

MAXIMUM OUTPUT

CURRENT

ENABLE

(TYPICAL)

TPS22914B

TPS22914C

TPS22915B

TPS22915C

38 mΩ

64 µs

913 µs

64 µs

2 A

Active High

Yes

913 µs

6 Pin Configuration and Functions

LASER MARKING VIEW

BUMP VIEW

Figure 6-1. YFP PACKAGE 4 PIN DSBGA TOP VIEW

Table 6-1. Pin Description

VIN

GND

VOUT

Table 6-2. Pin Functions

NAME

TYPE

DESCRIPTION

NO.

Switch output. Place ceramic bypass capacitor(s) between this pin

and GND. See the Detailed Description section for more information

VOUT

VIN

Switch input. Place ceramic bypass capacitor(s) between this pin and

GND. See the Detailed Description section for more information

GND

—

Device ground

Active high switch control input. Do not leave floating

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7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)^{(1) (2)}

MIN

–0.3

MAX

UNIT

V_IN

Input voltage

V_OUT

V_ON

I_MAX

I_PLS

T_J

Output voltage

ON voltage

Maximum continuous switch current

Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle

Maximum junction temperature

Storage temperature

2.5

125

150

°C

T_STG

–65

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) All voltage values are with respect to network ground terminal.

7.2 ESD Ratings

VALUE

±2000

±1000

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

Electrostatic

discharge

V_(ESD)

Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)

MIN

1.05

MAX

5.5

UNIT

V_IN

Input voltage

V_ON

ON voltage

5.5

V_IN

5.5

0.5

105

V_OUT

V_{IH, ON}

V_{IL, ON}

T_A

Output voltage

High-level input voltage, ON

Low-level input voltage, ON

Operating free-air temperature range⁽¹⁾

Input Capacitor

V_IN= 1.05 V to 5.5 V

–40

1⁽²⁾

°C

µF

C_IN

(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature

may have to be derated. Maximum ambient temperature [T_A(max)] is dependent on the maximum operating junction temperature [T

_J(MAX)], the maximum power dissipation of the device in the application [P_D(MAX)], and the junction-to-ambient thermal resistance of the

part/package in the application (θ_JA), as given by the following equation: T_A(MAX)= T_J(MAX)– (θ_JA× P_D(MAX)).

(2) Refer to the Detailed Description section.

7.4 Thermal Information

TPS2291x

THERMAL METRIC⁽¹⁾

YFP (DSBGA)

UNIT

4 PINS

193

2.3

R_θJA

Junction-to-ambient thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

Junction-to-top characterization parameter

ψ_JT

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7.4 Thermal Information (continued)

TPS2291x

THERMAL METRIC⁽¹⁾

YFP (DSBGA)

4 PINS

UNIT

ψ_JB

Junction-to-board characterization parameter

°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Electrical Characteristics

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature

–40°C ≤ T_A≤ +105°C. Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITION

T_A

MIN TYP MAX UNIT

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

7.7

7.6

7.7

8.4

7.4

6.7

7.7

7.6

7.7

8.4

7.4

6.7

10.8

12.1

9.6

V_IN= 5.5 V

V_IN= 5 V

11.9

9.6

V_IN= 3.3 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.05 V

V_IN= 5.5 V

V_IN= 5 V

Quiescent current

(TPS22914B/15B)

V_ON= 5 V, I_OUT= 0 A

µA

13.5

10.4

13.9

10.9

11.7

11.5

14.1

11.1

13.7

10.7

13.3

11.7

13.4

I_{Q, VIN}

V_IN= 3.3 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.05 V

Quiescent current

(TPS22914C/15C)

V_ON= 5 V, I_OUT= 0 A

µA

12.8

10.9

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7.5 Electrical Characteristics (continued)

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature

–40°C ≤ T_A≤ +105°C. Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITION

T_A

MIN TYP MAX UNIT

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

0.5

0.4

V_IN= 5.5 V

V_IN= 5.0 V

V_IN= 3.3 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.05 V

I_{SD, VIN}

Shutdown current

V_ON= 0 V, V_OUT= 0 V

µA

I_ON

ON pin input leakage

current

V_IN= 5.5 V, I_OUT= 0 A

0.1

µA

–40°C to +105°C

25°C

V_IN= 5.5 V, I_OUT= –200 mA

V_IN= 5 V, I_OUT= –200 mA

V_IN= 4.2 V, I_OUT= –200 mA

V_IN= 3.3 V, I_OUT= –200 mA

V_IN= 2.5 V, I_OUT= –200 mA

V_IN= 1.8 V, I_OUT= –200 mA

V_IN= 1.2 V, I_OUT= –200 mA

V_IN= 1.05 V, I_OUT= –200 mA

–40°C to +85°C

–40°C to +105°C

25°C

51 mΩ

–40°C to +85°C

–40°C to +105°C

25°C

51 mΩ

–40°C to +85°C

–40°C to +105°C

25°C

52 mΩ

–40°C to +85°C

–40°C to +105°C

25°C

52 mΩ

R_ON

On-resistance

–40°C to +85°C

–40°C to +105°C

25°C

53 mΩ

–40°C to +85°C

–40°C to +105°C

25°C

59 mΩ

–40°C to +85°C

–40°C to +105°C

25°C

73 mΩ

–40°C to +85°C

–40°C to +105°C

102 mΩ

107

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7.5 Electrical Characteristics (continued)

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature

–40°C ≤ T_A≤ +105°C. Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITION

T_A

MIN TYP MAX UNIT

V_IN= 5.5 V

V_IN= 5 V

102

100

V_IN= 3.3 V

V_IN= 2.5 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.05 V

V_HYS

ON pin hysteresis

25°C

(1)

R_PD

Output pull down resistor

V_IN= V_OUT= 3.3 V, V_ON= 0 V

–40°C to +105°C

143

200

(1) TPS22915B/C only.

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7.6 Switching Characteristics

Refer to the timing test circuit in Figure 8-1 (unless otherwise noted) for references to external components used for the test

condition in the switching characteristics table. Switching characteristics shown below are only valid for the power-up

sequence where VIN is already in steady state condition before the ON pin is asserted high.

TYP

PARAMETER

TEST CONDITION

UNIT

(TPS22914B/15B) (TPS22914C/15C)

V_IN= 5 V, V_ON= 5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

Delay time

R_L= 10 Ω, C_IN= 1 µF, C_OUT= 0.1 µF

104

1300

µs

1277

t_F

t_D

663

V_IN= 3.3 V, V_ON= 5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

Delay time

R_L= 10 Ω, C_IN= 1 µF, C_OUT= 0.1 µF

1077

µs

913

t_F

t_D

622

V_IN= 1.05 V, V_ON= 5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

Delay time

R_L= 10 Ω, C_IN= 1 µF, C_OUT= 0.1 µF

752

µs

409

t_F

t_D

547

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7.7 Typical DC Characteristics

-40°C

25°C

85°C

105°C

-40°C

25°C

85°C

105°C

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D001

D002

V_ON= 5 V

I_OUT= 0 A

V_ON= 5 V

I_OUT= 0 A

Figure 7-1. I_Qvs V_IN(TPS22914B/15B)

Figure 7-2. I_Qvs V_IN(TPS22914C/15C)

2.8

2.4

-40°C

25°C

85°C

105°C

1.6

1.2

0.8

0.4

VIN = 1.05V

VIN = 1.2V

VIN = 1.5V

VIN = 1.8V

VIN = 2.5V

VIN = 3.3V

VIN = 4.2V

VIN = 5V

VIN = 5.5V

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

-40 -25 -10

20 35 50 65 80 95 110 125

Junction Temperature (èC)

D003

D004

V_ON= 0 V

I_OUT= 0 A

V_ON= 5 V

I_OUT= –200 mA

Figure 7-3. I_SDvs V_IN

Figure 7-4. R_ONvs T_J

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-40°C

25°C

85°C

105°C

VIN = 1.05V

VIN = 1.2V

VIN = 1.5V

VIN = 1.8V

VIN = 2.5V

VIN = 3.3V

VIN = 4.2V

VIN = 5V

VIN = 5.5V

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

0.5

I_OUT(A)

1.5

D005

D006

V_ON= 5 V

I_OUT= –200 mA

V_ON= 5 V

T_A= 25°C

Figure 7-5. R_ONvs V_IN

Figure 7-6. R_ONvs I_OUT

0.95

0.9

-40°C

0.95

0.9

25°C

85°C

105°C

0.85

0.8

0.85

0.8

0.75

0.7

0.75

0.7

0.65

0.6

0.65

0.6

-40°C

25°C

85°C

105°C

0.55

0.5

0.55

0.5

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D007

D008

I_OUT= 0 A

Figure 7-8. V_IHvs V_IN

Figure 7-7. V_ILvs V_IN

170

160

150

140

130

120

110

100

190

185

180

175

170

165

160

155

150

145

140

-40°C

25°C

85°C

-40°C

25°C

85°C

105°C

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D009

D010

I_OUT= 0 A

V_IN= V_OUT

V_ON= 0 V

Figure 7-9. V_HYSvs V_IN

Figure 7-10. R_PDvs V_IN

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7.8 Typical AC Characteristics (TPS22914B/15B)

100

-40°C

25°C

85°C

105°C

-40°C

25°C

85°C

105°C

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D011

D012

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

Figure 7-11. t_Rvs V_IN

Figure 7-12. t_Dvs V_IN

4.5

3.5

2.5

1.5

-40°C

25°C

85°C

105°C

-40°C

25°C

85°C

105°C

0.5

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D013

D014

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

Figure 7-13. t_Fvs V_IN

Figure 7-14. t_OFFvs V_IN

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120

110

100

-40°C

25°C

85°C

105°C

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D015

V_IN= 5 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

Figure 7-15. t_ONvs V_IN

Figure 7-16. t_Rat V_IN= 5 V

V_IN= 5 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

V_IN= 3.3 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

Figure 7-17. t_Fat V_IN= 5 V

Figure 7-18. t_Rat V_IN= 3.3 V

V_IN= 3.3 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

V_IN= 1.05 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

Figure 7-19. t_Fat V_IN= 3.3V

Figure 7-20. t_Rat V_IN= 1.05V

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V_IN= 1.05 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

Figure 7-21. t_Fat V_IN= 1.05 V

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7.9 Typical AC Characteristics (TPS22914C/15C)

1500

1300

1100

900

750

700

650

600

550

500

450

700

-40°C

25°C

85°C

105°C

25°C

85°C

105°C

500

300

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D016

D017

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

Figure 7-22. t_Rvs V_IN

Figure 7-23. t_Dvs V_IN

4.5

3.5

2.5

1.5

-40°C

25°C

85°C

105°C

-40°C

25°C

85°C

105°C

0.5

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D018

D019

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

Figure 7-24. t_Fvs V_IN

Figure 7-25. t_OFFvs V_IN

1600

1400

1200

1000

800

-40°C

25°C

85°C

105°C

600

1.05 1.55 2.05 2.55 3.05 3.55 4.05 4.55 5.05 5.5

V_IN(V)

D020

V_IN= 5 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

Figure 7-26. t_ONvs V_IN

Figure 7-27. t_Rat V_IN= 5 V

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V_IN= 5 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

V_IN= 3.3 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

Figure 7-28. t_Fat V_IN= 5 V

Figure 7-29. t_Rat V_IN= 3.3 V

V_IN= 3.3 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

V_IN= 1.05 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

Figure 7-30. t_Fat V_IN= 3.3 V

Figure 7-31. t_Rat V_IN= 1.05 V

V_IN= 1.05 V

R_L= 10 Ω

C_IN= 1 µF

C_L= 0.1 µF

Figure 7-32. t_Fat V_IN= 1.05 V

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8 Parameter Measurement Information

VIN

VOUT

C_IN= 1 µF

C_L

R_L

(A)

GND

TPS22914/15

OFF

GND

A. Rise and fall times of the control signal is 100ns

Figure 8-1. Test Circuit

V_ON

50%

t_F

t_OFF

t_R

t_ON

90%

V_OUT

50%

10%

50%

10%

t_D

Figure 8-2. Timing Waveforms

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9 Detailed Description

9.1 Overview

The device is a 5.5-V, 2-A load switch in a 4-pin YFP package. To reduce voltage drop for low voltage and high

current rails, the device implements an ultra-low resistance N-channel MOSFET which reduces the drop out

voltage through the device.

The device has a controlled and fixed slew rate which helps reduce or eliminate power supply droop due to large

inrush currents. During shutdown, the device has very low leakage currents, thereby reducing unnecessary

leakages for downstream modules during standby. Integrated control logic, driver, charge pump, and output

discharge FET eliminates the need for any external components, which reduces solution size and bill of

materials (BOM) count.

9.2 Functional Block Diagram

9.3 Feature Description

9.3.1 On and Off Control

The ON pins control the state of the switch. Asserting ON high enables the switch. ON is active high and has a

low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard

GPIO logic threshold. It can be used with any microcontroller with 1 V or higher GPIO voltage. This pin cannot

be left floating and must be driven either high or low for proper functionality.

9.3.2 Input Capacitor (C_IN)

To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a

discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF

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ceramic capacitor, C_IN, placed close to the pins, is usually sufficient. Higher values of C_INcan be used to further

reduce the voltage drop during high-current application. When switching heavy loads, it is recommended to have

an input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.

9.3.3 Output Capacitor (C_L)

Due to the integrated body diode in the MOSFET, a C_INgreater than C_Lis highly recommended. A C_Lgreater

than C_INcan cause V_OUTto exceed V_INwhen the system supply is removed. This could result in current flow

through the body diode from VOUT to VIN. A C_INto C_Lratio of 10 to 1 is recommended for minimizing V_INdip

caused by inrush currents during startup.

9.4 Device Functional Modes

Table 9-1 describes the connection of the VOUT pin depending on the state of the ON pin.

Table 9-1. VOUT Connection

TPS22914

Open

TPS22915

GND

VIN

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10 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

10.1 Application Information

This section highlights some of the design considerations when implementing this device in various applications.

A PSPICE model for this device is also available in the product page of this device.

10.2 Typical Application

This typical application demonstrates how the TPS22914 and TPS22915 can be used to power downstream

modules.

VIN

VOUT

VIN

VOUT

C_L

C_IN

GND

TPS22914/15

Figure 10-1. Typical Application Schematic

10.2.1 Design Requirements

For this design example, use the input parameters shown in Table 10-1.

Table 10-1. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

V_IN

5 V

2 A

Load current

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10.2.2 Detailed Design Procedure

To begin the design process, the designer needs to know the following:

•

V_INvoltage

Load Current

10.2.2.1 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the R_ONof the device and the load current. The R

_ONof the device depends upon the VIN conditions of the device. Refer to the R_ONspecification of the device in

the Electrical Characteristics table of this datasheet. Once the R_ONof the device is determined based upon the

VIN conditions, use Equation 1 to calculate the VIN to VOUT voltage drop.

∆V = I_LOAD× R_ON

(1)

where

•

ΔV = voltage drop from VIN to VOUT

I_LOAD= load current

R_ON= On-resistance of the device for a specific V_IN

An appropriate I_LOADmust be chosen such that the I_MAXspecification of the device is not violated.

10.2.2.2 Inrush Current

To determine how much inrush current is caused by the C_Lcapacitor, use Equation 2.

dV_OUT

= C_L´

INRUSH

(2)

where

•

I_INRUSH= amount of inrush caused by C_L

C_L= capacitance on VOUT

dt = rise time in VOUT during the ramp up of VOUT when the device is enabled

dV_OUT= change in VOUT during the ramp up of VOUT when the device is enabled

An appropriate C_Lvalue must be placed on VOUT such that the I_MAXand I_PLSspecifications of the device are

not violated.

10.2.3 Application Curves

V_IN= 5 V

C_L= 47 µF

V_IN= 5 V

C_L= 47 µF

Figure 10-2. TPS22914B/15B Inrush Current

Figure 10-3. TPS22914C/15C Inrush Current

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11 Power Supply Recommendations

The device is designed to operate from a VIN range of 1.05 V to 5.5 V. This supply must be well regulated and

placed as close to the device terminal as possible with the recommended 1-µF bypass capacitor. If the supply is

located more than a few inches from the device terminals, additional bulk capacitance may be required in

addition to the ceramic bypass capacitors. If additional bulk capacitance is required, an electrolytic, tantalum, or

ceramic capacitor of 1 µF may be sufficient.

12 Layout

12.1 Layout Guidelines

1. VIN and VOUT traces must be as short and wide as possible to accommodate for high current.

2. The VIN pin must be bypassed to ground with low ESR ceramic bypass capacitors. The typical

recommended bypass capacitance is 1-μF ceramic with X5R or X7R dielectric. This capacitor must be placed

as close to the device pins as possible.

3. The VOUT pin must be bypassed to ground with low ESR ceramic bypass capacitors. The typical

recommended bypass capacitance is one-tenth of the VIN bypass capacitor of X5R or X7R dielectric rating.

This capacitor must be placed as close to the device pins as possible.

12.1.1 Thermal Considerations

For best performance, all traces must be as short as possible. To be most effective, the input and output

capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have

on normal and short-circuit operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic

electrical effects along with minimizing the case to ambient thermal impedance.

The maximum IC junction temperature must be restricted to 125°C under normal operating conditions. To

calculate the maximum allowable dissipation, P_D(max)for a given output current and ambient temperature, use

Equation 3.

T_J(MAX)- T_A

P_D(MAX)

q_JA

(3)

where

•

P_D(MAX)= maximum allowable power dissipation

T_J(MAX)= maximum allowable junction temperature (125°C for the TPS22914/15)

T_A= ambient temperature of the device

θ_JA= junction to air thermal impedance. Refer to the Thermal Information table. This parameter is highly

dependent upon board layout.

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12.2 Layout Example

To GPIO control

GND

V_OUTBypass

Capacitor

VIN

VOUT

V Bypass

Capacitor

VIA to Power Ground Plane

Figure 12-1. Recommended Board Layout

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13 Device and Documentation Support

13.1 Documentation Support

13.1.1 Related Documentation

For related documentation see the following:

•

Basics of Load Switches

Managing Inrush Current

Load Switch Thermal Considerations

Using the TPS22915BEVM-078 Single Channel Load Switch IC

Implementing Ship Mode Using the TPS22915B Load Switches

13.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 13-1. Related Links

TECHNICAL

DOCUMENTS

TOOLS &

SOFTWARE

SUPPORT &

COMMUNITY

PARTS

PRODUCT FOLDER

SAMPLE & BUY

TPS22914B

TPS22914C

TPS22915B

TPS22915C

Click here

13.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on

Subscribe to updates to register and receive a weekly digest of any product information that has changed. For

change details, review the revision history included in any revised document.

13.4 Support Resources

TI E2E^™support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

13.5 Trademarks

Ultrabook^™is a trademark of Intel.

TI E2E^™is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

13.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

13.7 Glossary

TI Glossary

This glossary lists and explains terms, acronyms, and definitions.

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14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE OPTION ADDENDUM

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10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS22914BYFPR

TPS22914BYFPT

TPS22914CYFPR

TPS22914CYFPT

TPS22915BYFPR

TPS22915BYFPT

TPS22915CYFPR

TPS22915CYFPT

ACTIVE

DSBGA

YFP

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

250 RoHS & Green

SNAGCU

Level-1-260C-UNLIM

-40 to 105

SNAGCU

3000 RoHS & Green SAC396 | SNAGCU

250 RoHS & Green SAC396 | SNAGCU

3000 RoHS & Green

250 RoHS & Green

SNAGCU

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

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10-Dec-2020

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

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6-May-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS22914BYFPR

TPS22914BYFPT

TPS22914CYFPR

TPS22914CYFPT

TPS22915BYFPR

TPS22915BYFPT

TPS22915CYFPR

TPS22915CYFPT

DSBGA

YFP

3000

250

180.0

178.0

180.0

178.0

180.0

178.0

180.0

8.4

9.2

8.4

9.2

8.4

9.2

8.4

0.85

0.64

0.59

0.64

0.59

0.64

0.59

0.64

4.0

8.0

250

3000

250

3000

250

3000

250

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

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6-May-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS22914BYFPR

TPS22914BYFPT

TPS22914CYFPR

TPS22914CYFPT

TPS22915BYFPR

TPS22915BYFPT

TPS22915CYFPR

TPS22915CYFPT

DSBGA

YFP

3000

250

182.0

220.0

182.0

220.0

182.0

220.0

182.0

220.0

182.0

220.0

182.0

220.0

182.0

20.0

35.0

20.0

35.0

20.0

35.0

20.0

250

3000

250

3000

250

3000

250

Pack Materials-Page 2

PACKAGE OUTLINE

YFP0004

DSBGA - 0.5 mm max height

DIE SIZE BALL GRID ARRAY

BALL A1

CORNER

0.5 MAX

SEATING PLANE

0.05 C

0.19

0.13

BALL TYP

0.4

TYP

D: Max = 0.778 mm, Min =0.718 mm

E: Max = 0.778 mm, Min =0.718 mm

SYMM

0.4

TYP

0.25

0.21

C A B

0.015

SYMM

4223507/A 01/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

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EXAMPLE BOARD LAYOUT

YFP0004

DSBGA - 0.5 mm max height

DIE SIZE BALL GRID ARRAY

(0.4) TYP

4X ( 0.23)

SYMM

(0.4) TYP

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:50X

0.05 MAX

0.05 MIN

METAL UNDER

SOLDER MASK

(

0.23)

METAL

EXPOSED

(

0.23)

EXPOSED

METAL

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL

NON-SOLDER MASK

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

NOT TO SCALE

4223507/A 01/2017

NOTES: (continued)

3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.

For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).

www.ti.com

EXAMPLE STENCIL DESIGN

YFP0004

DSBGA - 0.5 mm max height

DIE SIZE BALL GRID ARRAY

(0.4) TYP

(R0.05) TYP

4X ( 0.25)

SYMM

(0.4) TYP

METAL

TYP

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

SCALE:50X

4223507/A 01/2017

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

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TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TPS22915CYFPR [TI]

相关型号：

TPS22915CYFPT

TPS22916

TPS22916BL

TPS22916BLYFPR

TPS22916BYFPR

TPS22916BYFPT

TPS22916CLYFPR

TPS22916CLYFPT

TPS22916CNL

TPS22916CNLYFPR

TPS22916CNYFPR

TPS22916CNYFPT