TPS22975DSGR [TI]
具有可调节上升时间、可选输出放电和热关断功能的 5.7V、6A、16mΩ 负载开关 | DSG | 8 | -40 to 105;
| 型号： | TPS22975DSGR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节上升时间、可选输出放电和热关断功能的 5.7V、6A、16mΩ 负载开关 | DSG | 8 | -40 to 105 开关 驱动 光电二极管 接口集成电路 |
| 文件： | 总29页 (文件大小：2108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
TPS22975 5.7V、6A、导通电阻为 16mΩ 的负载开关
1 特性
3 说明
1
•
集成单通道负载开关
输入电压范围：0.6V 至 VBIAS
BIAS 电压范围：2.5V 至 5.7V
导通电阻 (RON
RON = 16m（VIN = 0.6V 到 5.7V，
VBIAS = 5.7V 时的典型值）
TPS22975 产品系列包含两个器件：TPS22975 和
TPS22975N。每个器件都是一款单通道负载开关，可
提供可配置的上升时间来尽量减小浪涌电流。此器件包
括一个 N 通道金属氧化物半导体场效应晶体管
(MOSFET)，可在 0.6 V 至 5.7V 的输入电压范围内运
行并可支持 6A 的最大持续电流。此开关由一个开/关
输入 (ON) 控制，此输入能够直接连接低电压控制信
号。TPS22975 包含一个可选 230Ω 片上负载电阻，
用于在此开关关断时进行快速输出放电。
•
•
•
V
)
–
•
•
6A 最大持续开关电流
低静态电流
–
37µA（VIN = VBIAS = 5V 时的典型值）
•
低控制输入阈值支持使用
1.2V、1.8V、2.5V、3.3V 逻辑器件
可配置的上升时间
TPS22975 采用小型，节省空间的 2mm × 2mm 8 引
脚 SON 封装 (DSG)，集成的散热焊盘允许该器件产生
较高的功率耗散。该器件在自然通风环境下的额定运行
温度范围为 –40°C 至 +105°C。
•
•
•
•
热关断
快速输出放电 (QOD)（可选）
带有散热焊盘的小外形尺寸无引线 (SON) 8 引脚封
装
器件信息(1)
器件型号
TPS22975
TPS22975N
封装
封装尺寸（标称值）
•
经测试，静电放电 (ESD) 性能符合 JESD 22 规范
WSON (8)
2.00mm x 2.00mm
–
2000V 人体模型 (HBM) 和 1000V 带电器件模
型 (CDM)
(1) 要了解所有可用封装，请参阅数据表末尾的可订购产品附录。
2 应用
•
•
•
•
•
•
•
Ultrabook™
笔记本电脑和上网本
平板电脑
消费类电子产品
机顶盒和家庭网关
电信系统
固态硬盘 (SSD)
导通电阻与输入电压间的关系
简化电路原理图
40
VIN
ON
VOUT
Power
Supply
-40 èC
25 èC
85 èC
105 èC
35
30
25
20
15
10
5
ON
C
C
IN
L
R
CT
L
OFF
CT
GND
Power
Supply
GND
VBIAS
TPS22975
Copyright © 2016, Texas Instruments Incorporated
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
D007
VBIAS = 5V，IVOUT = –200mA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSDD0
TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
目录
9.2 Functional Block Diagram ....................................... 14
9.3 Feature Description................................................. 15
9.4 Device Functional Modes........................................ 15
10 Application and Implementation........................ 16
10.1 Application Information.......................................... 16
10.2 Typical Application ................................................ 16
11 Power Supply Recommendations ..................... 18
12 Layout................................................................... 19
12.1 Layout Guidelines ................................................. 19
12.2 Layout Example .................................................... 19
12.3 Thermal Considerations........................................ 19
13 器件和文档支持 ..................................................... 20
13.1 器件支持................................................................ 20
13.2 相关文档................................................................ 20
13.3 接收文档更新通知 ................................................. 20
13.4 社区资源................................................................ 20
13.5 商标....................................................................... 20
13.6 静电放电警告......................................................... 20
13.7 Glossary................................................................ 20
14 机械、封装和可订购信息....................................... 20
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics—VBIAS = 5 V..................... 5
7.6 Electrical Characteristics—VBIAS = 2.5 V.................. 6
7.7 Switching Characteristics.......................................... 7
7.8 Typical DC Characteristics........................................ 8
7.9 Typical AC Characteristics...................................... 10
Parameter Measurement Information ................ 13
Detailed Description ............................................ 14
9.1 Overview ................................................................. 14
8
9
4 修订历史记录
Changes from Revision A (June 2016) to Revision B
Page
•
Updated VIH in Recommended Operating Conditions ............................................................................................................ 4
Changes from Original (May 2016) to Revision A
Page
•
器件状态，从产品预览改为量产数据 ...................................................................................................................................... 1
2
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
5 Device Comparison Table
RON AT VIN = VBIAS = 5 V
QUICK-OUTPUT
DISCHARGE
MAXIMUM OUTPUT
ENABLE
DEVICE
(TYPICAL)
CURRENT
TPS22975
16 mΩ
Yes
No
6 A
6 A
Active high
Active high
TPS22975N
16 mΩ
6 Pin Configuration and Functions
DSG Package
8-Pin (WSON)
Top View
DSG Package
8-Pin (WSON)
Bottom View
1
2
3
4
8
7
6
5
8
7
6
5
1
2
3
4
VIN
VIN
VOUT
VOUT
VOUT
CT
VIN
VOUT
CT
VIN
ON
ON
VBIAS
VBIAS
GND
GND
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
1
2
3
Switch input. Input bypass capacitor recommended for minimizing VIN dip. Must be connected to
Pin 1 and Pin 2. See the Application and Implementation section for more information
VIN
I
ON
VBIAS
GND
CT
I
I
Active high switch control input. Do not leave floating
Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5 V to
5.7 V. See the Application and Implementation section for more information
4
5
6
—
O
Device ground
Switch slew rate control. Can be left floating. See the Adjustable Rise Time section under
Feature Description for more information
7
8
VOUT
O
Switch output
Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See the Layout
Example section for layout guidelines
—
Thermal Pad
—
Copyright © 2016–2017, Texas Instruments Incorporated
3
TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
–0.3
MAX
UNIT
V
VIN
Input voltage
6
6
VOUT
VBIAS
VON
IMAX
IPLS
TJ
Output voltage
V
Bias voltage
6
V
On voltage
6
V
Maximum continuous switch current
Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle
Maximum junction temperature
Storage temperature
6
A
8
A
125
150
°C
°C
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
MAX
VBIAS
5.7
UNIT
VIN
Input voltage
Bias voltage
ON voltage
0.6
2.5
0
V
V
V
V
VBIAS
VON
VOUT
5.7
Output voltage
VIN
VBIAS = 2.5 V to 5 V, TA< 85°C
VBIAS = 2.5 V to 5 V, TA< 105°C
VBIAS = 5 V to 5.7 V, TA< 105°C
VBIAS = 2.5 V to 5.7 V
1.05
1.1
1.2
0
5.7
VIH
High-level input voltage, ON
5.7
V
5.7
VIL
CIN
TA
Low-level input voltage, ON
Input capacitor
0.5
V
1(1)
µF
°C
Operating free-air temperature(1)(2)
–40
105
(1) See the Application Information section.
(2) In applications where high power dissipation and-or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated and device lifetime may be affected. Maximum ambient temperature (TA(max)) is dependent on the maximum
operating junction temperature (TJ(max)), the maximum power dissipation of the device in the application (PD(max)), and the junction-to-
ambient thermal resistance of the part-package in the application (θJA), and can be approximated by the following equation: TA (max)
TJ(max) – (θJA × PD(max)).
=
4
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
7.4 Thermal Information
TPS22975
THERMAL METRIC(1)
DSG (WSON)
8 PINS
74.8
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
81
Junction-to-board thermal resistance
44.7
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3.9
ψJB
45.1
RθJC(bot)
16.4
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics—VBIAS = 5 V
Unless otherwise noted, the specifications in the following table applies where VBIAS = 5 V. Typical values are for TA = 25 °C.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT = 0 A,
VIN = VON = 5 V
IQ, VBIAS
VBIAS quiescent current
VBIAS shutdown current
–40°C to +105°C
37
45
µA
µA
ISD, VBIAS
VON = VOUT = 0 V
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +105°C
2.3
5
0.005
0.002
0.002
0.001
VIN = 5 V
10
1.5
3.5
1
VIN = 3.3 V
VIN = 1.8 V
VIN = 0.6 V
ISD, VIN
VIN off-state supply current
On-pin input leakage current
VON = VOUT = 0 V
µA
µA
2
0.5
1
ION
VON = 5.5 V
0.1
RESISTANCE CHARACTERISTICS
25°C
16
16
16
16
16
16
19
23
25
19
23
25
19
23
25
19
23
25
19
23
25
19
23
25
VIN = 5 V
–40°C to +85°C
–40°C to +105°C
25°C
VIN = 3.3 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.05 V
VIN = 0.6 V
–40°C to +85°C
–40°C to +105°C
25°C
–40°C to +85°C
–40°C to +105°C
25°C
RON
On-resistance
IOUT = –200 mA
mΩ
–40°C to +85°C
–40°C to +105°C
25°C
–40°C to +85°C
–40°C to +105°C
25°C
–40°C to +85°C
–40°C to +105°C
25°C
VON, HYS
On-pin hysteresis
VIN = 5 V
120
230
160
20
mV
Ω
(1)
RPD
Output pulldown resistance
Thermal shutdown
VIN = 5 V, VON = 0 V
Junction temperature rising
Junction temperature falling
–40°C to +105°C
300
TSD
°C
°C
TSD, HYS
Thermal shutdown hysteresis
(1) TPS22975 only
Copyright © 2016–2017, Texas Instruments Incorporated
5
TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
7.6 Electrical Characteristics—VBIAS = 2.5 V
Unless otherwise noted, the specifications in the following table applies where VBIAS = 2.5 V. Typical values are for TA = 25
°C.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT = 0 mA,
VIN = VON = 2.5 V
IQ, VBIAS
VBIAS quiescent current
VBIAS shutdown current
–40°C to +105°C
14
20
µA
µA
ISD, VBIAS
VON = VOUT = 0 V
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +105°C
1
1.3
2.6
1
0.005
0.002
0.002
0.001
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.6 V
2
ISD, VIN
VIN off-state supply current
On-pin input leakage current
VON = VOUT = 0 V
µA
µA
0.8
1.5
0.5
1
ION
VON = 5.5 V
0.1
RESISTANCE CHARACTERISTICS
25°C
20
18
18
17
17
26
32
34
23
29
31
22
28
30
22
27
29
21
26
27
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.6 V
–40°C to +85°C
–40°C to +105°C
25°C
–40°C to +85°C
–40°C to +105°C
25°C
RON
On-resistance
IOUT = –200 mA
–40°C to +85°C
–40°C to +105°C
25°C
mΩ
–40°C to +85°C
–40°C to +105°C
25°C
–40°C to +85°C
–40°C to +105°C
25°C
VON, HYS
On-pin hysteresis
VIN = 2.5 V
85
230
160
20
mV
Ω
(1)
RPD
Output pulldown resistance
Thermal shutdown
VIN = 2.5 V, VON = 0 V
Junction temperature rising
Junction temperature falling
–40°C to +105°C
330
TSD
°C
°C
TSD, HYS
Thermal shutdown hysteresis
(1) TPS22975 only
6
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
7.7 Switching Characteristics
PARAMETER
TEST CONDITION
MIN
TYP MAX UNIT
VIN = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
1450
2
1750
2
µs
µs
µs
µs
tF
tD
600
VIN = 0.6 V, VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
620
2
280
2
tF
tD
485
VIN = VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
2180
2
2150
2
tF
tD
1120
VIN = 0.6 V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
RL = 10 Ω, CL = 0.1 µF, CIN = 1 µF, CT = 1000 pF, VON = 5 V
1315
3
650
2
tF
tD
975
Copyright © 2016–2017, Texas Instruments Incorporated
7
TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
7.8 Typical DC Characteristics
60
70
60
50
40
30
20
10
-40 èC
25 èC
-40 èC
25 èC
85 èC
105 èC
85 èC
50
105 èC
40
30
20
10
2.5
3
3.5
4
4.5
5
5.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Bias Voltage (V)
Input Voltage (V)
D001
D002
VIN = VBIAS
VON = 5 V
VOUT = 0 V
VBIAS = 5 V
VON = 5 V
VOUT = 0 V
Figure 1. VBIAS Quiescent Current vs Bias Voltage
Figure 2. VBIAS Quiescent Current vs Input Voltage
2.5
2
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
105 èC
1.5
1
0.5
0
2.5
3
3.5
4
4.5
5
5.5
6
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Bias Voltage (V)
Input Voltage (V)
D003
D0014
VIN = VBIAS
VON = 0 V
VOUT = 0 V
VBIAS = 5 V
VON = 0 V
VOUT = 0 V
Figure 3. VBIAS Shutdown Current vs Bias Voltage
Figure 4. VIN Off-State Supply Current vs Input Voltage
30
25
20
15
10
5
30
VIN = 0.6 V
VIN = 3.3 V
VIN = 5 V
VIN = 0.6 V
VIN = 1.8 V
VIN = 2.5 V
25
20
15
10
5
0
0
-40
-10
20
50
80
110
-40
-10
20
50
80
110
Ambient Temperature (èC)
Ambient Temperature (èC)
D005
D006
VBIAS = 5 V
IOUT = –200 mA
VON = 5 V
VBIAS = 2.5 V
IOUT = –200 mA
VON = 5 V
Note: All three RON curves have the same
values; therefore, only one line is visible.
Figure 6. On-Resistance vs Ambient Temperature
Figure 5. On-Resistance vs Ambient Temperature
8
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
Typical DC Characteristics (continued)
40
40
35
30
25
20
15
10
5
-40 èC
-40 èC
25 èC
85 èC
105 èC
25 èC
85 èC
105 èC
35
30
25
20
15
10
5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0.5
1
1.5
2
2.5
Input Voltage (V)
Input Voltage (V)
D007
D0098
VBIAS = 5 V
IOUT = –200 mA
VON = 5 V
VBIAS = 2.5 V
IOUT = –200 mA
VON = 5 V
Figure 7. On-Resistance vs Input Voltage
Figure 8. On-Resistance vs Input Voltage
275
270
265
260
255
250
245
240
235
25
20
15
10
5
-40°C
VIN = 0.6 V
VIN = 1.2 V
VIN = 1.8 V
VIN = 2.5 V
25°C
85°C
105°C
0
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
3.5
4
4.5
5
5.5
6
Bias Voltage (V)
Bias Voltage (V)
D009
D001
TA = 25°C
IOUT = –200 mA
VON = 5 V
VIN = 2.5 V
VON = 0 V
Figure 9. On-Resistance vs Bias Voltage
Figure 10. Output Pull Down Resistance vs Bias Voltage
Copyright © 2016–2017, Texas Instruments Incorporated
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TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
7.9 Typical AC Characteristics
TA = 25°C, CT = 1000 pF, CIN = 1 µF, CL = 0.1 µF, RL = 10 Ω
900
700
500
300
1700
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
1500
105 èC
1300
1100
900
700
0.5
1
1.5
2
2.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D011
D012
VBIAS = 2.5 V
VBIAS = 5 V
Figure 11. Delay Time vs Input Voltage
Figure 12. Delay Time vs Input Voltage
2.5
2.3
2.1
1.9
1.7
1.5
2.5
2.3
2.1
1.9
1.7
1.5
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
105 èC
0.5
1
1.5
2
2.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D013
D014
VBIAS = 2.5 V
VBIAS = 5 V
Figure 13. Fall Time vs Input Voltage
Figure 14. Fall Time vs Input Voltage
3.3
3.2
3.1
3
2.4
2.3
2.2
2.1
2
-40 èC
-40 èC
25 èC
85 èC
105 èC
25 èC
85 èC
105 èC
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
1.9
1.8
1.7
1.6
0.5
1
1.5
2
2.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D015
D016
VBIAS = 2.5 V
VBIAS = 5 V
Figure 15. Turnoff Time vs Input Voltage
Figure 16. Turnoff Time vs Input Voltage
10
Copyright © 2016–2017, Texas Instruments Incorporated
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Typical AC Characteristics (continued)
TA = 25°C, CT = 1000 pF, CIN = 1 µF, CL = 0.1 µF, RL = 10 Ω
3000
2000
1600
1200
800
400
0
-40 èC
25 èC
-40 èC
25 èC
85 èC
105 èC
2500
85 èC
105 èC
2000
1500
1000
500
0
0.5
1
1.5
2
2.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D017
D018
VBIAS = 2.5 V
VBIAS = 5 V
Figure 17. Turnon Time vs Input Voltage
Figure 18. Turnon Time vs Input Voltage
3000
2500
2000
1500
1000
500
2500
2000
1500
1000
500
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
105 èC
0
0
0.5
1
1.5
2
2.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D019
D020
VBIAS = 2.5 V
VBIAS = 5 V
Figure 19. Rise Time vs Input Voltage
Figure 20. Rise Time vs Input Voltage
VIN = 0.6 V
VBIAS = 2.5 V
VIN = 0.6 V
VBIAS = 5 V
Figure 21. Turnon Response Time
Figure 22. Turnon Response Time
Copyright © 2016–2017, Texas Instruments Incorporated
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TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
Typical AC Characteristics (continued)
TA = 25°C, CT = 1000 pF, CIN = 1 µF, CL = 0.1 µF, RL = 10 Ω
VIN = 2.5 V
VBIAS = 2.5 V
VIN = 5 V
VBIAS = 5 V
Figure 23. Turnon Response Time
Figure 24. Turnon Response Time
VIN = 0.6 V
VBIAS = 2.5 V
VIN = 0.6 V
VBIAS = 5 V
Figure 25. Turnoff Response Time
Figure 26. Turnoff Response Time
VIN = 2.5 V
VBIAS = 2.5 V
VIN = 5 V
VBIAS = 5 V
Figure 27. Turnoff Response Time
Figure 28. Turnoff Response Time
12
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
8 Parameter Measurement Information
VIN
VOUT
Power
Supply
ON
C
ON
C
L
IN
R
CT
L
OFF
CT
GND
Power
Supply
GND
VBIAS
TPS22975
Copyright © 2016, Texas Instruments Incorporated
A. Rise and fall times of the control signal are 100 ns.
B. Turnoff times and fall times are dependent on the time constant at the load. For the TPS22975, the internal pull-down
resistance RPD is enabled when the switch is disabled. The time constant is (RPD || RL) × CL.
Figure 29. Test Circuit
VON
50%
50%
tF
tOFF
tR
tON
90%
90%
VOUT
VOUT
50%
10%
50%
10%
10%
tD
Figure 30. tON and tOFF Waveforms
Copyright © 2016–2017, Texas Instruments Incorporated
13
TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
9 Detailed Description
9.1 Overview
The TPS22975 device is a single-channel, 6-A load switch in an 8-pin SON package. To reduce the voltage drop
in high current rails, the device implements an N-channel MOSFET. The device has a configurable slew rate for
applications that require a specific rise-time.
The device prevents downstream circuits from pulling high standby current from the supply by limiting the
leakage current of the device when it is disabled. The integrated control logic, driver, power supply, and output
discharge FET eliminates the need for any external components, which reduces solution size and bill of materials
(BOM) count.
9.2 Functional Block Diagram
VIN
Charge
Pump
VBIAS
Control
Logic
ON
VOUT
CT
TPS22975 Only
GND
Copyright © 2016, Texas Instruments Incorporated
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Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
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ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
9.3 Feature Description
9.3.1 Adjustable Rise Time
A capacitor to GND on the CT pin sets the slew rate. The voltage on the CT pin can be as high as 15 V;
therefore, the minimum voltage rating for the CT capacitor must be 30 V for optimal performance. An
approximate formula for the relationship between CT and slew rate when VBIAS is set to 5 V is shown in
Equation 1. This equation accounts for 10% to 90% measurement on VOUT and does not apply for CT < 100 pF.
Use Table 1 to determine rise times for when CT = 0 pF.
SR = 0.43ìCT + 26
where
•
•
•
SR is the slew rate (in µs/V)
CT is the capacitance value on the CT pin (in pF)
The units for the constant 26 are µs/V. The units for the constant 0.43 are µs/(V × pF).
(1)
Rise time can be calculated by multiplying the input voltage by the slew rate. Table 1 contains rise time values
measured on a typical device. Rise times shown in Table 1 are only valid for the power-up sequence where VIN
and VBIAS are already in steady state condition before the ON pin is asserted high.
Table 1. Rise Time tR vs CT Capacitor
RISE TIME (µs) 10% - 90%, CL = 0.1 µF, CIN = 1 µF, RL = 10 Ω, VBIAS = 5 V(1)
CT (pF)
VIN = 5 V
140
VIN = 3.3 V
105
VIN = 1.8 V
75
VIN = 1.5 V
65
VIN = 1.2 V
60
VIN = 1.05 V
55
VIN = 0.6 V
40
0
220
520
360
215
185
160
140
95
470
970
660
385
330
275
240
155
1000
2200
4700
10000
1750
3875
7580
16980
1190
700
595
495
435
275
2615
1520
2950
6650
1290
2510
5635
1070
2075
4685
940
595
5110
1830
4110
1150
2595
11485
(1) Typical Values at 25°C with a 25-V X7R 10% Ceramic Capacitor on CT
9.3.2 Quick-Output Discharge (QOD) (Optional)
The TPS22975 includes an optional QOD feature. When the switch is disabled, an internal discharge resistance
is connected between VOUT and GND to remove the remaining charge from the output. This resistance has a
typical value of 230 Ω and prevents the output from floating while the switch is disabled. For best results, it is
recommended that the device gets disabled before VBIAS falls below the minimum recommended voltage.
9.3.3 Thermal Shutdown
Thermal shutdown protects the part from internally or externally generated excessive temperatures. When the
device temperature triggers TSD (typical 160°C), the switch is turned off. The switch automatically turns on again
if the temperature of the die drops 20 degrees below the TSD threshold.
9.4 Device Functional Modes
The Table 2 lists the VOUT pin states as determined by the ON pin.
Table 2. VOUT Connection
ON
L
TPS22975
GND
TPS22975N
Open
H
VIN
VIN
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TPS22975
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www.ti.com.cn
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 ON and OFF Control
The ON pin controls the state of the switch. ON is active high and has a 1.2-V ON-pin enable threshold, making
it capable of interfacing with low-voltage signals. The ON pin is compatible with standard GPIO logic thresholds.
It can be used with any microcontroller with 1.2 V or higher GPIO voltage. This pin cannot be left floating and
must be driven either high or low for proper functionality.
10.1.2 Input Capacitor (CIN) (Optional)
To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce
the voltage drop during high current applications. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor (CL) to avoid excessive voltage drop.
10.1.3 Output Capacitor (CL) (Optional)
Because of the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL
greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current
flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip
caused by inrush currents during startup; however, a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VIN dip upon
turn-on because of inrush currents. This can be mitigated by increasing the capacitance on the CT pin for a
longer rise time (see the Adjustable Rise Time section).
10.2 Typical Application
For optimal RON performance, it is recommended to have VIN ≤ VBIAS. The device is functional if VIN > VBIAS but it
exhibits RON greater than what is listed in the Electrical Characteristics—VBIAS = 5 V and Electrical
Characteristics—VBIAS = 2.5 V tables.
Figure 31 demonstrates how the TPS22975 can be used to power downstream modules.
VIN
ON
VOUT
Power
Supply
ON
C
C
IN
L
R
CT
L
OFF
CT
GND
Power
Supply
GND
VBIAS
TPS22975
Copyright © 2016, Texas Instruments Incorporated
Figure 31. Powering a Downstream Module
16
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
Typical Application (continued)
10.2.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
VIN
3.3 V
5 V
VBIAS
CL
22 µF
400 mA
Maximum Acceptable Inrush Current
10.2.2 Detailed Design Procedure
10.2.2.1 Inrush Current
When the switch is enabled, the output capacitors must be charged up from 0 V to the set value (3.3 V in this
example). This charge arrives in the form of inrush current. Inrush current can be calculated using Equation 2.
Inrush Current = CL × dVOUT/dt
Where:
•
•
•
CL is the output capacitance
dVOUT is the change in VOUT during the ramp up of the output voltage when device is enabled.
dt is the rise time in VOUT during the ramp up of the output voltage when the device is enabled.
(2)
The TPS22975 offers adjustable rise time for VOUT. This feature allows the user to control the inrush current
during turnon. The appropriate rise time can be calculated using the design requirements and the inrush current
equation as shown in Equation 3.
400 mA = 22 µF × 3.3 V/dt
(3)
The value of dt is given by Equation 4.
dt = 181.5 µs
(4)
To ensure an inrush current of less than 400 mA, choose a CT value that yields a rise time of more than 181.5
µs. See the oscilloscope captures in the Application Curves section for an example of how the CT capacitor can
be used to reduce inrush current.
10.2.3 Application Curves
VBIAS = 5 V
VIN = 3.3 V
CL = 22 µF
VBIAS = 5 V
VIN = 3.3 V
CL = 22 µF
Figure 32. Inrush Current with CT = 0 pF
Figure 33. Inrush Current with CT = 220 pF
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TPS22975
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www.ti.com.cn
11 Power Supply Recommendations
The supply to the device must be well regulated and placed as close to the device terminal as possible with the
recommended 1-μF bypass capacitor. If the supply is located more than a few inches from the device terminals,
additional bulk capacitance may be required in addition to the ceramic bypass capacitors. If additional bulk
capacitance is required, an electrolytic, tantalum or ceramic capacitor of 1 μF may be sufficient.
The TPS22975 operates regardless of power sequencing order. The order in which voltages are applied to VIN,
VBIAS, and ON does not damage the device as long as the voltages do not exceed the absolute maximum
operating conditions. If voltage is applied to ON before VIN, the slew rate of VOUT can not be controlled.
18
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22975
www.ti.com.cn
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
12 Layout
12.1 Layout Guidelines
For best performance, all traces must be as short as possible. To be most effective, the input and output
capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance. The CT trace must be as short as possible to
reduce parasitic capacitance.
12.2 Layout Example
VIA to GND
Pin 1
VIN
VIN
VOUT
VOUT
CT
(1)
GND
ON
VBIAS
GND
Figure 34. Layout Recommendation
12.3 Thermal Considerations
The maximum IC junction temperature must be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, PD(max) , for a given ambient temperature, use Equation 5 as a
guideline.
TJ(max) - TA
=
P
D(max)
θJA
where
•
•
•
•
PD(max) is the maximum allowable power dissipation
TJ(max) is the maximum allowable junction temperature (125°C for the TPS22975)
TA is the ambient temperature of the device
ΘJA is the junction to air thermal impedance. See the Thermal Information section. This parameter is highly
dependent upon board layout.
(5)
In Figure 34, notice that the thermal vias are located under the exposed thermal pad of the device. This allows
for thermal diffusion away from the device.
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19
TPS22975
ZHCSF80B –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
13 器件和文档支持
13.1 器件支持
13.1.1 开发支持
关于 TPS22975 PSpice 瞬态模型，请参见 SLVMBO6。
13.2 相关文档
请参阅如下相关文档：
•
•
《负载开关导通电阻基础知识》，SLVA771
用户指南《TPS22975 负载开关评估模块》，SLVUAR3
13.3 接收文档更新通知
如需接收文档更新通知，请访问 ti.com 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产品
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.4 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
13.5 商标
E2E is a trademark of Texas Instruments.
Ultrabook is a trademark of Intel.
All other trademarks are the property of their respective owners.
13.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据如有变更，恕不另行通知
和修订此文档。如欲获取此数据表的浏览器版本，请参阅左侧的导航。
20
版权 © 2016–2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
22-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS22975DSGR
TPS22975DSGT
TPS22975NDSGR
TPS22975NDSGT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
WSON
WSON
WSON
WSON
DSG
DSG
DSG
DSG
8
8
8
8
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 105
-40 to 105
-40 to 105
-40 to 105
13XH
13XH
14YH
14YH
Samples
Samples
Samples
Samples
NIPDAU
NIPDAU
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Nov-2022
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS22975DSGR
TPS22975DSGT
TPS22975NDSGR
TPS22975NDSGT
WSON
WSON
WSON
WSON
DSG
DSG
DSG
DSG
8
8
8
8
3000
250
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
2.3
2.3
2.3
2.3
2.3
2.3
2.3
2.3
1.15
1.15
1.15
1.15
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS22975DSGR
TPS22975DSGT
TPS22975NDSGR
TPS22975NDSGT
WSON
WSON
WSON
WSON
DSG
DSG
DSG
DSG
8
8
8
8
3000
250
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
3000
250
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DSG 8
2 x 2, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224783/A
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PACKAGE OUTLINE
DSG0008A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
B
A
0.32
0.18
PIN 1 INDEX AREA
2.1
1.9
0.4
0.2
ALTERNATIVE TERMINAL SHAPE
TYPICAL
0.8
0.7
C
SEATING PLANE
0.05
0.00
SIDE WALL
0.08 C
METAL THICKNESS
DIM A
OPTION 1
0.1
OPTION 2
0.2
EXPOSED
THERMAL PAD
(DIM A) TYP
0.9 0.1
5
4
6X 0.5
2X
1.5
9
1.6 0.1
8
1
0.32
0.18
PIN 1 ID
(45 X 0.25)
8X
0.4
0.2
8X
0.1
C A B
C
0.05
4218900/E 08/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
(
0.2) VIA
8X (0.5)
TYP
1
8
8X (0.25)
(0.55)
SYMM
9
(1.6)
6X (0.5)
5
4
SYMM
(1.9)
(R0.05) TYP
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218900/E 08/2022
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.5)
METAL
8
SYMM
1
8X (0.25)
(0.45)
SYMM
9
(0.7)
6X (0.5)
5
4
(R0.05) TYP
(0.9)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218900/E 08/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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