TPS2458_16 [TI]
12-V/3.3-V Hot Swap and ORing Controller with Load Current Monitor for AdvancedMC;
| 型号： | TPS2458_16 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 12-V/3.3-V Hot Swap and ORing Controller with Load Current Monitor for AdvancedMC |
| 文件： | 总28页 (文件大小：967K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
12-V/3.3-V Hot Swap and ORing Controller with Load Current Monitor for AdvancedMC™
1
FEATURES
DESCRIPTION
2
•
ATCA AdvancedMC™ Compliant
The TPS2458 AdvancedMC™ slot controller is fully
compliant with the AdvancedMC™ Standard and
provides the required accuracy to meet the demands
of an AdvancedMC™ (Advanced Mezzanine Card)
module.
•
•
Full Power Control for an AdvancedMC™
Module
Programmable 12-V Current Limit and Fast
Trip
The TPS2458 is an extremely flexible solution that
protects both the power supply and the load by
limiting the maximum current into the load, shutting
off in case of a fault. If a severe fault occurs the
current shuts off immediately.
•
•
•
•
•
•
•
Optional 12-V ORing Control for MicroTCA™
Internal 3.3-V Current Limit
Programmable Shunt Gain
Interlock Requires 3.3-V Output Prior to 12 V
12-V and 3-V Power Good and Fault Outputs
Load Current Monitor
Optional ORing support is inherent in the architecture
and can be used in MicroTCA™, or other applications
requiring ORing support.
32-Pin PQFN Package
The 3.3-V management channel is internal and
requires only one external resistor for load monitoring
and one external capacitor to set fault time. To
comply with the AdvancedMC™ requirements, the
12-V output is disabled unless the 3.3-V Power Good
signal is asserted. Load current monitors are provided
for both the 12 V and 3.3 V channels. Status outputs
include Power Good and Fault indicators for each
channel. The TPS2458 is in a 32-pin PQFN package.
APPLICATIONS
•
•
•
•
•
ATCA Carrier Boards
MicroTCA™Power Modules
AdvancedMC™ Slots
Systems Using 12 V and 3.3 V
Base Stations
TYPICAL APPLICATION
0.005 W HAT2165 BSC057N03
12 V
V
12 V
IN
422 W
AdvancedMCTM
3.3 V
15
14
13
12
8
9
16 IN12 SENP SET
28 EN12
SENM PASS BLK OUT12
OUT3 18
PG12
FLT12
4
6
26 EN3
11 OREN
17 IN3
3.3 V
PG3 21
FLT3 20
V
IN
TPS2458
23 VDD3
7
CT12
19 CT3
VINT
24 AGND
6810 W
3320 W
SUM12
5
1
SUM3 22
GND GND
GND GND GND GND GND
2
3
10 25 27 29 31
Optional ORing components for redundant systems
UDG-09030
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
AdvancedMC, MicroTCA are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
ORDERING INFORMATION
DEVICE
TEMPERATURE
PACKAGE
ORDERING CODE
MARKING
TPS2458
-40°C to 85°C
QFN32
TPS2458RHB
TPS2458
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
–0.3 to 30
–0.3 to 17
–0.3 to 5
–0.3 to 0.3
2
UNIT
PASS, BLK
IN12, OUT12, SENP, SENM, SET, EN12, FLTx, PGx, OREN
IN3, OUT3, EN3\, VDD, CTx, SUMx
AGND, GND
V
Human Body Model
ESD
kV
mA
Charged Device Model
0.5
FLTx, PGx
SUMx
5
5
VINT
–1 to 1
250
OUT3
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only. Functional operation of the device under any conditions beyond those indicated under recommended operating conditions is
neither implied nor guaranteed. Exposure to absolute maximum rated conditions for extended periods of time may affect device
reliability.
DISSIPATION RATINGS
PACKAGE
θJA – High-k (°C/W)
QFN32 - RHB
50
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
8.5
3
NOM
MAX
15
UNIT
VIN12
VIN3
12 V input supply
12
3.3
3.3
3.3 V input supply
4
V
VVDD3
IOUT3
ISUMx
3.3 V input supply
3
4
3.3 V output current
165
1000
1
mA
Summing pin current
100
10
µA
PASS pin board leakage current
VINT bypass capacitance
Operating junction temperature range
-1
1
250
125
nF
°C
TJ
-40
2
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
ENABLE INPUTS
Threshold voltage, falling edge
Hysteresis
1.2
20
5
1.3
50
8
1.4
80
15
15
5
V
mV
Pullup current
VEN =VOREN = 0 V
Input bias current
Input bias current
3.3 V Turn off time
12 V Turn off time
VEN12 = VOREN = 17 V
6
mA
mS
VEN3 = 5 V
1
EN3 deasserts to VVOUT3 < 1.0 V, COUT = 0 µF
10
EN12 deasserts to VVOUT12 < 1.0 V, COUT = 0 µF, CQGATE
= 35 nF
20
POWER GOOD OUTPUTS
Low voltage
Sinking 2 mA
0.14
0.25
1
V
Leakage current
VPG = 17 V
mA
Threshold voltage
PG12, falling VOUT12
PG3, falling VOUT3
PG12, measured at OUT12
PG3, measured at OUT3
PG3 falling
10.2
2.7
10.5
2.8
10.8
2.9
V
Hysteresis
130
50
mV
ms
Deglitch time
50
100
150
FAULT OUTPUTS
Low voltage
Sinking 2 mA
FLTx = 17 V
0.14
2.3
0.25
1
V
Leakage current
VINT
µA
Output voltage
0 V < IVINT < 50 mA
2
2.8
V
FAULT TIMER
Sourcing current
Sinking current
VVCTx = 0 V, during fault
VVCTx = 2 V
–7
7
–10
10
–13
13
mA
Upper threshold voltage
Lower threshold voltage
12-V SUMMING NODE
Input referred offset
1.3
0.33
1.35
0.35
1.4
V
0.37
10.8 V ≤ VSENM ≤ 13.2 V, VSENP = (VSENM + 50 mV),
measure VSET–VSENM
–1.5
0.66
1.5
mV
Summing threshold
Leakage current
VPASS = 15 V
0.675
50
0.69
1
V
VSET =(VSENM – 10 mV)
mA
12-V CURRENT LIMIT
Current limit threshold
RSUM = 6.8 kΩ, RSET = 422 Ω, increase ILOAD and
measure VSENP – VSENM when VPASS = 15 V
47.5
52.5
mV
Sink current in current limit
Fast trip threshold
IPASS measured at VSUM = 1 V and VPASS = 12 V
Measure VSENP – VSENM
20
80
40
120
300
mA
mV
ns
100
200
Fast turn-off delay
20 mV overdrive, CPASS = 0 pF, tp50-50
Timer start threshold
VPASS - VIN when timer starts, while VPASS falling due to
overcurrent
5
6
7
V
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
12-V UVLO
UVLO rising
IN12 rising
IN12 falling
8.1
8.5
0.5
8.9
V
UVLO hysteresis
12-V BLOCKING
Turn-on threshold
Turn-off threshold
Turn-off delay
0.44
0.59
Measure VSENP – VVOUT
5
10
–3
15
mV
0
Measure VSENP – VVOUT
–6
20-mV overdrive, CBLK = 0 pF, tP50-50
200
300
ns
12-V GATE DRIVERS (PASS, BLK)
Output voltage
VVIN12 = VVOUT12 = 10 V
21.5
20
0.5
6
23
30
1
24.5
40
V
mA
A
Sourcing current
Sinking current
VVIN12 = VVOUT12 = 10 V, VPASS= VBLK = 17 V
Fast turnoff, VPASS = VBLK = 14 V
4 V ≤ VPASS = VBLK ≤ 25 V
14
20
10
25
26
mA
kΩ
ms
V
Pulldown resistance
Fast turn-off duration
Safety gate pulldown
Disable delay
In OTSD ( at 150°C )
14
5
15
IRF3710, slew S or D 15 V in 1mS
EN12 pin to PASS and BLK, tP50-90
IN12 rising to PASS and BLK sourcing
1.25
1
ms
Startup time
0.25
3.3-V SUMMING NODE
Summing threshold
3.3-V CURRENT LIMIT
On-resistance
655
675
695
mV
IOUT3 = 150 mA
290
195
300
750
500
225
mΩ
mA
ns
Current limit
RSUM3 = 3.3 kΩ , VVOUT3 = 0 V
170
240
Fast trip threshold
Fast turn-off delay
3.3-V UVLO
400
IOUT3= 400 mA, tP50-50
1300
UVLO rising
IN3 rising
2.65
200
2.75
240
2.85
300
15
V
UVLO hysteresis
IN3 falling
mV
mA
Safety gate pulldown1
SUPPLY CURRENTS
Both channels enabled
Both channels disabled
THERMAL SHUTDOWN
Slew IN3x, OUT3x 5 V in 1 ms
IOUT3 = 0
3.1
2
4
mA
°C
2.8
Whole-chip shutdown
temperature
TJ rising, IOUT3 = 0
140
130
150
3.3-V channel shutdown
temperature
TJ rising, IOUT3 in current limit
Whole chip or 3.3-V channel
140
10
Hysteresis
4
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
TPS2458 FUNCTIONAL BLOCK DIAGRAMS
12-V Channel Circuitry
RSENSE
RSET
SENP
SET
SENM
PASS
BLK
OUT12
pgat\
100 mv
12dis
+
30 uA
30 uA
ogat
10 us
Q
Pump
IN12
10 us
Fault
Timer
Vcp
CT12
~25 v
Vcp
FLT12
EN12
PG3x\
+
SUM12
675 mV x (12xCL/1111)
RSUM
6810
PG12
10 mv
-3 mv
vpg
100 us
+
+
R
S
Q
Q
+
ogat
OUT
Out12
pgat\
OREN
3.3-V Channel Circuitry
0.1 W
IN3
OUT3
2.8 V
96 W
Q
Pump
VDD3
en
gat
30 mv
30 us
vcpx
~18 v
+
EN3
12dis
PG3
30 uA
Fault
Timer
vcpx
CT3
FLT3
30 us
Control
Logic
SUM3
+
RSUM
3320
Vthoc - [675 mv nominal]
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
Circuitry Common to Both Channels
por
en
VINT
IN12
OUT12
IN3
PREREG
Control
Logic
POR
2.2 V
OUT3
AGND
GND
GND
GND
GND
GND
GND
GND
6
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
DEVICE INFORMATION
TPS2458
(Top View)
32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
AGND
VDD3
SUM3
PG3
VINT
GND
1
2
3
4
5
6
7
8
GND
3-V
Inputs
PG12
SUM12
FLT12
CT12
BLK
12-V
Inputs
FLT3
CT3
TM
PowerPAD
OUT3
IN3
9
10 11 12 13 14 15 16
12-V Inputs
Figure 1.
TERMINAL FUNCTIONS
NAME
NO.
I/O
Analog ground. Ground pin for the analog circuitry insideBypass capacitor connection point for internal supply
the TPS2458.
AGND
24
—
12-V blocking transistor gate drive. Gate drive pin for the 12-V channel BLK FET. This pin sources 30 µA to
turn the FET on. An internal clam prevents this pin from rising more than 14.5 V above OUT12. Setting the
OREN pin high holds the BLK pin low.
BLK
8
7
O
12-V fault timing capacitor. A capacitor from CT12 to GND sets the time the channel can remain in current
limit before it shuts down and declares a fault. Current limit causes this pin to source 10 µA into the external
capacitor (CT ). When VCT12 reaches 1.35 V, the TPS2458 shuts the channel off by pulling the FET gate low
and declares an overcurrent fault by pulling the FLT12 pin low
CT12
I/O
3-V fault timing capacitor. A capacitor from CT3 to GND sets the time the channel can remain in current limit
before it shuts down and declares a fault. Current limit causes this pin to source 10 µA into the external
capacitor (CT ). When VCT3 reaches 1.35 V, the TPS2458 shuts the channel off by pulling the FET gate low
and declares an overcurrent fault by pulling the FLT3 pin low.
CT3
19
I/O
12-V enable. (active low). Pulling this pin high (or allowing it to float high) turns off the 12-V channel by pulling
both BLK and PASS low. An internal 200-kΩ resistor pulls this pin up to VINT when disconnected.
EN12
EN3
28
26
I
I
3-V enable. (active low) Pulling this pin high (or allowing it to float high) turns off the 3-V channel by pulling the
gate of the internal pass FET to GND. An internal 200-kΩ resistor pulls this pin up to VINT when
disconnected.
12-V fault output (active low) Open-drain output indicating that channel 12 has remained in current limit long
enough to time out the fault timer and shut the channel down. asserted when 12-V fault timer runs out
FLT12
FLT3
6
O
O
3-V fault output (active low) Open-drain output indicating that channel 3 has remained in current limit long
enough to time out the fault timer and shut the channel down. asserted when 3-V fault timer runs out
20
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
TERMINAL FUNCTIONS (continued)
2
3
10
GND
25
27
29
31
17
16
—
Ground connections.
IN3
I
I
3-V input. Supply pin for the 3-V channel internal pass FET.
12-V input. Supply pin for 12-V channel internal circuitry.
IN12
12-V blocking transistor enable. (active low). Pulling this pin low allows the 12-V channel ORing function to
operate normally. Pulling this pin high (or allowing it to float high) disables the 12-V ORing function by pulling
the BLK pin low. An internal 200-kΩ resistor pulls this pin up to VINT when disconnected.
OREN
11
I
OUT12
OUT3
9
I/O
I/O
12-V output. Senses the output voltage of the 12-V channel.
3-V output. Output of the 3-V channel internal pass FET.
18
12-V pass transistor gate drive. This pin sources 30 µA to turn the FET on. An internal clamp prevents this pin
from rising more than 14.5 V above IN12.
PASS
PG12
PG3
12
4
O
O
O
12-V power good output,asserts when VOUT12 > VPG12 ( active low) . Open-drain output indicating that channel
12 output voltage has dropped below the PG threshold, which nominally equals 10.5 V.
3-V power good output, asserts when VOUT3 > 2.8 V ( active low) . Open-drain output indicating that channel 3
output voltage has dropped below the PG threshold, which nominally equals 2.85 V.
21
SENM
SENP
13
15
I
I
12-V current limit sense. Senses the voltage on the low side of the 12-V channel current sense resistor.
12-V input sense. Senses the voltage on the high side of the 12-V channel current sense resistor.
12-V current limit set. A resistor connected from this pin to SENP sets the current limit level in conjunction with
the current sense resistor and the resistor connected to the SUM12 pin, as described in 12-V thresholds,
setting current limit and fast overcurrent trip section.
SET
14
5
I
12 V summing node. A resistor connected from this pin to ground forms part of the channel x current limit. As
the current delivered to the load increases, so does the voltage on this pin. When the voltage on this pin
reaches 675 mV, the current limit amplifier acts to prevent the current from further increasing.
SUM12
I/O
3 V summing node. A resistor connected from this pin to ground forms part of the channel x current limit. As
the current delivered to the load increases, so does the voltage on this pin. When the voltage on this pin
reaches 675 mV, the current limit amplifier acts to prevent the current from further increasing.
SUM3
VDD3
VINT
22
23
1
I/O
I
3-V charge pump input
Bypass capacitor connection point for internal supply. This pin connects to the internal 2.35-V rail. A 0.1-µF
capacitor must be connected from this pin to ground. Do not connect other external circuitry to this pin
except the address programming pins, as required.
I/O
8
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
TYPICAL CHARACTERISTICS
3-V INPUT CURRENT
vs
JUNCTION TEMPERATURE
12-V TURN OFF VOLTAGE THRESHOLD
vs
JUNCTION TEMPERATURE
0.26
0
0.25
0.24
-1
-2
-3
-4
-5
0.23
0.22
0.21
0.20
-50
0
50
100
150
-50
0
50
100
150
TJ – Junction Temperature – °C
TJ – Junction Temperature – °C
Figure 2.
Figure 3.
12-V INPUT CURRENT
vs
JUNCTION TEMPERATURE
12-V TURN ON THRESHOLD
vs
JUNCTION TEMPERATURE
2.4
2.3
2.2
2.1
2.0
12.0
11.5
11.0
10.5
10.0
9.5
V
= 12 V
IN
9.0
8.5
8.0
-50
0
50
100
150
-50
0
50
100
150
TJ – Junction Temperature – °C
TJ – Junction Temperature – °C
Figure 4.
Figure 5.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
TYPICAL CHARACTERISTICS (continued)
12-V INPUT CURRENT
vs
INPUT VOLTAGE
12-V CURRENT LIMIT THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
2.45
2.40
51.0
50.8
V
= 12 V
IN
2.35
2.30
50.6
50.4
2.25
2.20
50.2
50.0
2.15
2.10
10
11
12
13
14
-50
0
50
100
150
TJ – Junction Temperature – °C
VIN – Input Voltage – V
Figure 6.
Figure 7.
10
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
TYPICAL WAVEFORMS
Figure 8. OUT3 Startup Into 22-Ω, (150 mA), 150-µF Load
Figure 9. OUT3 Load Stepped from 165 mA to 240 mA
.
.
.
.
Figure 10. OUT3 Short Circuit Under Full Load, (165 mA),
Figure 11. OUT3 Short Circuit Under Full Load, (165 mA),
Zoom View
Wide View
.
.
.
.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
11
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
TYPICAL WAVEFORMS (continued)
Figure 12. OUT3 Startup Into Short Circuit
Figure 13. OUT12 Startup Into 500-Ω, 830-µF Load
.
.
.
.
Figure 14. OUT12 Startup Into 80-W, 830-µF Load
Figure 15. OUT12 Short Circuit Under Full Load, (6.7 A),
.
Wide View
.
.
.
12
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
TYPICAL WAVEFORMS (continued)
Figure 16. OUT12 Short Circuit Under Full Load, (6.7 A),
Figure 17. OUT12 Startup Into Short Circuit
Zoom View
.
.
.
.
Figure 18. OUT12 Overloaded While Supplying 6.7 A
.
.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
13
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
APPLICATION INFORMATION
The TPS2458 has been designed to simplify compliance with the PICMG-AMC.R2.0 and PICMG-MTCA.0
specifications. These specifications were developed by the PCI Industrial Computer Manufacturers Group
(PICMG). These two specifications are derivations of the PICMG-ATCA (Advanced Telecommunication
Computing Architecture) specification originally released in December, 2002.
PICMG-AMC Highlights
•
•
•
•
•
•
•
•
•
AMC – Advanced Mezzanine Cards
Designed to Plug into ATCA Carrier Boards
AdvancedMC™ Focuses on Low Cost
1 to 8 AdvancedMC™ per ATCA Carrier Board
3.3-V Management Power – Maximum Current Draw of 150 mA
12-V Payload Power – Converted to Required Voltages on AMC
Maximum 80 W Dissipation per AdvancedMC™
Hotswap and Current Limiting and must be Present on Carrier Board
For details, see www.picmg.org/
PICMG-MTCA Highlights
•
•
•
•
•
•
•
MTCA – MicroTelecommunications Computing Architecture
Architecture for Using AMCs without an ATCA Carrier Board
Up to 12 AMCs per System, plus Two MicroTCA Carrier Hub (MCH)s, plus Two Cooling Units (CU)s
Focuses on Low Cost – Commoditizes the Hardware
All Functions of ATCA Carrier Board must be Provided
MicroTCA is also known as MTCA, mTCA, µTCA or uTCA
For details, see www.picmg.org/
Introduction
The TPS2458 has a 12-V power path and a 3.3-V power path. The TPS2458 is in a 32-pin QFN package. The
following sections describe the main functions of the TPS2458 and provide guidance for designing systems using
this device.
Control Logic and Power-On Reset
The TPS2458 circuitry draws power from an internal bus fed by a preregulator. A capacitor attached to the VINT
pin provides decoupling and output filtering for this preregulator. It can draw power from either of two inputs
(IN12 or IN3) or from either of the two outputs (OUT12 or OUT3). This feature allows the internal circuitry to
function regardless of which channels receive power, or from what source. The two external FET drive pins
(PASS, and BLK) are held low during startup to ensure that the 12-V channel remains off. The internal 3.3-V
channel is also held off. When the voltage on the internal VINT rail exceeds approximately 1 V, the power-on
reset circuit initializes the TPS2458.
14
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
Enable Functions
The TPS2458 provides three external enable pins for the AdvancedMC™ slot. Pulling the EN3 low turns on the
3-V channel. Pulling the EN12 pin low turns on the 12-V channel. If the EN12 pin goes high, the TPS2458 pulls
the PASS and BLK pins to ground. Pulling the OREN pin low turns on the reverse blocking logic in the 12-V
channel. If the OREN pin goes high, then the BLK pin remains low. Each of the three enable pins has an internal
200-kΩ pull-up resistor to VINT.
Power Good (PG) Outputs
The TPS2458 provides two active-low open-drain outputs that reflect the status of the two output voltage rails.
The power good output for each channel pulls low whenever the voltage on its OUT pin exceeds the PG
threshold. The 3.3-V channel has a nominal threshold of 2.85 V and the 12-V channel has a nominal threshold of
10.5 V.
Fault (FLT) Outputs
The TPS2458 provides two active-low open-drain fault outputs, one for each channel. A fault output pulls low
when the channel has remained in current limit long enough to run out the fault timer. A channel experiencing a
fault condition automatically shuts down. To clear the fault and re-enable the channel, turn the channel off and
back on using the appropriate ENx pin.
Current Limit and Fast Trip Thresholds
Both channels monitor current by sensing the voltage across a resistor. The 3.3-V channel uses an internal
sense resistor with a nominal value of 290 mΩ. The 12-V channel uses an external sense resistor that typically
lies in the range of 4 mΩ to 10 mΩ. Each channel features two distinct thresholds: a current limit threshold and a
fast trip threshold.
The current limit threshold sets the regulation point of a feedback loop. If the current flowing through the channel
exceeds the current limit threshold, then this feedback loop reduces the gate-to-source voltage imposed on the
pass FET. This causes the current flowing through the channel to settle to the value determined by the current
limit threshold. For example, when a module first powers up, it draws an inrush current to charge its load
capacitance. The current limit feedback loop ensures that this inrush current does not exceed the current limit
threshold.
The current limit feedback loop has a finite response time. Serious faults such as shorted loads require a faster
response in order to prevent damage to the pass FETs or voltage sags on the supply rails. A comparator
monitors the current flowing through the sense resistor, and if it ever exceeds the fast trip threshold it
immediately shuts off the channel. Then it will immediately attempt a normal turn on which allows the current limit
feedback loop time to respond. The fast trip threshold is normally set 2 to 5 times higher than the current limit.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
3.3-V Current Limiting
The 3.3-V management power channel includes an internal pass FET and current sense resistor. The
on-resistance of the management channel — including pass FET, sense resistor, metallization resistance, and
bond wires — typically equals 290 mΩ and never exceeds 500 mΩ. The AdvancedMC™ specification allows a
total of 1 Ω between the power source and the load. The TPS2458 never consumes more than half of this
budget.
3.3-V Fast Trip Function
The 3.3-V fast trip function protects the channel against short-circuit events. If the current through the channel
exceeds a nominal value of 300 mA, then the TPS2458 immediately disables the internal pass transistor and
then allows it to slowly turn back on into current limiting.
3.3-V Current Limit Function
The 3.3-V current limit function internally limits the current to comply with the AdvancedMC™ and MicroTCA™
specifications. External resistor RSUM3 allows the user to adjust the current limit threshold. The nominal current
limit threshold ILIMIT is shown in Equation 1.
650V
I
=
LIMIT
R
SUM3
(1)
A 3320-Ω resistor gives a nominal current limit of ILIMIT = 195 mA which complies with AdvancedMC™ and
MicroTCA™ specifications. This resistance corresponds to an EIA 1% value. Alternatively, a 3.3-kΩ resistor also
suffices. Whenever the 3.3-V channel enters current limit, its fault timer begins to operate (see Fault Timer
Programming section).
3.3-V Over-Temperature Shutdown
The 3.3-V over-temperature shutdown trips if the 3.3-V channel remains in current limit so long that the die
temperature exceeds approximately 140 °C. When this occurs, the chip turns off until the it cools by
approximately 10 °C. This feature prevents a prolonged fault on one 3.3-V channel from disabling the other 3.3-V
channel, or disabling the 12-V channel.
16
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
12-V Fast Trip and Current Limiting
Figure 19 shows a simplified block diagram of the circuitry associated with the fast trip and current limit circuitry
in the 12-V channel, which requires an external N-channel pass FET and three external resistors. These resistors
allow the user to independently set the fast trip threshold and the current limit threshold, as described below.
12-V Fast Trip Function
The 12-V fast trip function is designed to protect the channel against short-circuit events. If the voltage across
RSENSE exceeds a nominal threshold of 100 mV, the device will immediately disable the pass transistor and
declare a fault condition. The nominal fast trip threshold is shown in Equation 2.
100mV
I
=
FT
R
S
(2)
12-V Current Limit Function
The 12-V current limit function regulates the PASS pin voltage to prevent the current through the channel from
exceeding ILIMIT. The current limit circuitry includes two amplifiers, A1 and A2, as shown in Figure 19. Amplifier A1
forces the voltage across external resistor RSET to equal the voltage across external resistor RSENSE. The current
that flows through RSET also flows through external resistor RSUM, generating a voltage on the 12SUM pin is
shown in Equation 3.
æ
ç
è
ö
÷
ø
R
´R
SUM
SENSE
V
=
´I
SENSE
12SUM
R
SET
(3)
Amplifier A2 senses the voltage on the 12SUM pin. As long as this voltage is less than the reference voltage on
its positive input (nominally 0.675 V), the amplifier sources current to PASS. When the voltage on the 12SUM pin
exceeds the reference voltage, amplifier A2 begins to sink current from the PASS pin. The gate-to-source voltage
of pass FET MPASS drops until the voltages on the two inputs of amplifier A2 balance. The current flowing
through the channel then nominally is shown in Equation 4.
æ
ç
è
ö
÷
ø
R
SET
I
=
´ 0.675V
LIMIT
R
´R
SENSE
SUM
(4)
The recommended value of RSUM is 6810 Ω. This resistor should never equal less than 675 Ω to prevent
excessive currents from flowing through the internal circuitry. Using the recommended values of RSENSE = 5 m
and RSUM = 6810 Ω gives Equation 5.
0.0198 A
æ
ç
è
ö
÷
ø
ILIMIT
=
´ RSET
W
(5)
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
17
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
A system capable of powering an 80-W AdvancedMC™ module consumes a maximum of 8.25 A according to
MicroTCA™ specifications. The above equation suggests RSET = 417 Ω. The nearest 1% EIA value equals 422
Ω. The selection of RSET for MicroTCA™ power modules is described in the Redundant vs. Non-redundant Inrush
Current Limiting section.
RSENSE
IN12
RSET
Fast Trip
Comparator
SET
SENP
PASS
SENM
+
100 mV
30 mA
A1
675 mV
+
A2
SUM12
RSUM
Figure 19. 12-V Channel Threshold Circuitry
Fault Timer Programming
The fault timer of the two channels in a TPS2458 use identical internal circuitry. Each channel requires an
external capacitor CT connected between the CTx pin and ground. When a channel goes into current limit, the
TPS2458 injects 10 µA into the external capacitor. If the channel remains in current limit long enough for the
voltage on the CTx pin to reach 1.35 V, then the TPS2458 shuts the channel down and pulls the FLTx pin low to
declare a fault. If the channel does not remain in current limit long enough to trip the timer, then the CTx
capacitor is discharged through an internal 200-Ω pulldown resistor. The nominal fault time tF is shown in
Equation 6.
1.35V
t
=
´ C
T
F
10mA
(6)
The user should select capacitors that provide the shortest fault times sufficient to allow down-stream loads and
bulk capacitors to charge. Shorter fault times reduce the stresses imposed on the pass FETs under fault
conditions. This consideration may allow the use of smaller and less expensive FETs for the 12-V channels.
18
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
Multiswap Operation in Redundant Systems
TheTPS2458 features an additional mode of operation called Multiswap redundancy. This technique does not
require a microcontroller, making it simpler and faster than the redundancy schemes described in the
MicroTCA™standard. Multiswap is especially attractive for AdvancedMC™ applications that require redundancy
but need not comply with the MicroTCA™ power module standard.
In order to implement Multiswap redundancy, connect the SUM pins of the redundant channels together and tie a
single RSUM resistor from this node to ground. The current limit thresholds now apply to the sum of the currents
delivered by the redundant supplies. When implementing Multiswap redundancy on 12-V channels, all of the
channels must use the same values of resistors for RSENSE and RSET
.
Figure 20 compares the redundancy technique advocated by the MicroTCA™ specification with Multiswap
redundancy. MicroTCA™ redundancy independently limits the current delivered by each power source. The
current drawn by the load cannot exceed the sum of the current limits of the individual power sources. Multiswap
redundancy limits the current drawn by the load to a fixed value regardless of the number of operational power
sources. Removing or inserting power sources within a Multiswap system does not affect the current limit seen
by the load.
TM
MicroTCA Redundancy
Multiswap Redundancy
Power Source 1
Power Source 2
Power Source 1
Power Source 2
TPS2458
TPS2458
TPS2458
TPS2458
SUM12
SUM3
SUM12
SUM3
SUM12
SUM3
SUM12
SUM3
m C
m C
Backplane
Figure 20. MicroTCA Redundancy vs. Multiswap Redundancy
Backplane
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
19
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
12-V Inrush Slew Rate Control
Although it is possible to slow the gate slew rate it is very unlikely that would be necessary since the TPS2458
limits inrush current at turn on. The limit level is programmed by the user.
As normally configured, the turn-on slew rate of the 12-V channel output voltage VOUT is shown in Equation 7.
DV
I
SFC
OUT
@
Dt
C
g
(7)
where Isrc equals the current sourced by the PASS pin (nominally 30 µA) and Cg equals the effective gate
capacitance. For purposes of this computation, the effective gate capacitance approximately equals the reverse
transfer capacitance, Crss. To reduce the slew rate, increase Cg by connecting additional capacitance from PASS
to ground. Place a resistor of at least 1000 Ω in series with the additional capacitance to prevent it from
interfering with the fast turn off of the FET.
RSENSE
IN12
To Load
C
R > 1k W
PASS
Figure 21. RC Slew Rate Control
12-V ORing Operation for Redundant Systems
The 12-V channels use external pass FETs to provide reverse blocking. The TPS2458 pulls the BLK pin high
when the input-to-output differential voltage VIN12–OUT12 exceeds a nominal value of 10 mV, and it pulls the
pin low when this differential falls below a nominal value of –3 mV. These thresholds provide a nominal 13 mV of
hysteresis to help prevent false triggering (Figure 21).
The source of the blocking FET connects to the source of the pass FET, and the drain of the blocking FET
connects to the load. This orients the body diode of the blocking FET such that it conducts forward current and
blocks reverse current. The body diode of the blocking FET does not normally conduct current because the FET
turns on when the voltage differential across it exceeds 10 mV.
25 V
Gnd
V
OR
Figure 22. ORing Thresholds
20
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
TPS2458
www.ti.com ............................................................................................................................................................................................ SLUS916–FEBRUARY 2009
Layout Considerations
TPS2458 applications require layout attention to ensure proper performance and minimize susceptibility to
transients and noise. In general, all runs should be as short as possible but the list below deserves first
consideration.
1. Decoupling capacitors on IN12 and IN3 should have minimal length to the pin and to GND.
2. SENM and SENP runs must be short and run side by side to maximize common mode rejection. Kelvin
connections should be used at the points of contact with RSENSE. (Figure 23).
3. SET runs need to be short on both sides of RSET
4. These runs should be as short as possible and sized to carry at least 20 A, more if possible.
a. Runs on both side of RSENSE
.
.
b. Runs from the drains and sources of the external FETs.
5. Runs from the BLK FETs to OUT12 should be as short as possible.
6. Runs connecting to IN3 and OUT3 should be sized for 1 A or more.
7. Connections to GND and SUM pins should be minimized after the runs above have been placed.
8. The device will dissipate low average power so soldering the powerpad to the board is not a requirement.
However, doing so will improve thermal performance and reduce susceptibility to noise.
LOAD CURRENT
PATH
LOAD CURRENT
PATH
SENSE
RESISTOR
R SET
RSET
14 13
15 14 13
15
TPS2458
TPS2458
(a)
*ADDITIONAL DETAILS OMITTED FOR CLARITY.
(b)
Figure 23. Recommended RSENSE Layout
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
21
Product Folder Link(s): TPS2458
TPS2458
SLUS916–FEBRUARY 2009............................................................................................................................................................................................ www.ti.com
Transient Protection
TPS2458 devices in deployed systems are not likely to have long, inductive feeds or long load wires. However, it
is always advised that an analysis be performed to determine the need for transient protection. When the
TPS2458 interrupts current flow any inductance on the input will tend to cause a positive voltage spike on the
input and any inductance on the output will tend to cause a negative voltage spike on the output. The following
equations allow the designer to make a reasonably accurate prediction of the voltage spike due to interruptions in
current.
L
V
= V
+ I
´
SPIKE
NOM LOAD
C
(8)
where
•
•
•
•
VNOM is the nominal voltage at terminal being analyzed
L is the combined inductance of feed to RTN lines.
C is the capacitance at point of disconnect.
ILOAD is the current through terminal at TDISCONNECT
æ
ö
æ
ç
è
ö
÷
ø
4´length
æ
ç
è
ö
÷
ø
LSTRAIGHTWIRE @ 0.2´length´ ln
- 0.75
ç
÷
ç
÷
diameter
è
ø
•
This equation can be used to calculate the capacitance required to limit the voltage spike to a desired level
above the nominal voltage.
2
LI
C =
2
)
V
(
- V
NOM
SPIKE
(9)
22
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS2458
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Feb-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TPS2458RHBR
TPS2458RHBT
QFN
QFN
RHB
RHB
32
32
3000
250
330.0
180.0
12.4
12.4
5.3
5.3
5.3
5.3
1.5
1.5
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Feb-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS2458RHBR
TPS2458RHBT
QFN
QFN
RHB
RHB
32
32
3000
250
346.0
190.5
346.0
212.7
29.0
31.8
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
Data Converters
DLP® Products
DSP
Clocks and Timers
Interface
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Logic
Power Mgmt
Microcontrollers
RFID
Telephony
Video & Imaging
Wireless
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2009, Texas Instruments Incorporated
相关型号：
TPS2459
12-V/3.3-V Hot Swap and ORing Controller with I2C™ and Load Current Monitor for AdvancedMC™
TI
TPS2459RHB
12-V/3.3-V Hot Swap and ORing Controller with I2C™ and Load Current Monitor for AdvancedMC™
TI
©2020 ICPDF网 联系我们和版权申明