TPS2553DRVR [TI]
PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES; 精密可调电流限制的配电开关
| 型号： | TPS2553DRVR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES |
| 文件： | 总26页 (文件大小：1608K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2552
TPS2553, TPS2552-1, TPS2553-1
www.ti.com........................................................................................................................................ SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008
PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
1
FEATURES
DESCRIPTION
2
•
•
•
•
•
±6% Current-Limit Accuracy at 1.3 A
Meets USB Current-Limiting Requirements
Backwards Compatible with TPS2550/51
Adjustable Current Limit, 75 mA–1300 mA (typ)
The
TPS2552/53
and
TPS2552-1/53-1
power-distribution switches are intended for
applications where precision current limiting is
required or heavy capacitive loads and short circuits
Constant-Current (TPS2552/53) and Latch-off
(TPS2552-1/53-1) Versions
are
encountered.
These
devices
offer
a
programmable current-limit threshold between 75 mA
and 1.3 A (typ) via an external resistor. Current-limit
accuracy as tight as +/-6% can be achieved at the
higher current-limit settings. The power-switch rise
and fall times are controlled to minimize current
surges during turn on/off.
•
•
•
•
•
•
•
Fast Overcurrent Response - 2-µS (typ)
85-mΩ High-Side MOSFET (DBV Package)
Reverse Input-Output Voltage Protection
Operating Range: 2.5 V to 6.5 V
1-µA Maximum Standby Supply Current
Built-in Soft-Start
TPS2552/53 devices limit the output current to a safe
level by switching into a constant-current mode when
the output load exceeds the current-limit threshold.
TPS2552-1/53-1 devices provide circuit breaker
functionality by latching off the power switch during
overcurrent or reverse-voltage situations. An internal
reverse-voltage detection comparator disables the
power-switch in the event that the output voltage is
driven higher than the input to protect devices on the
input side of the switch. The FAULT logic output
asserts low during overcurrent and reverse-voltage
conditions.
15 kV ESD Protection per IEC 61000-4-2 (with
External Capacitance)
APPLICATIONS
•
•
•
•
•
USB Ports/Hubs
Digital TV
Set-Top Boxes
Mobile Phones
VOIP Phones
TPS2552/53
TIPS2552/TPS2553
DRV PACKAGE
(TOP VIEW)
TIPS2552/TPS2553
DBV PACKAGE
(TOP VIEW)
5V USB
USB Data
0.1 mF
USB
Port
Input
RFAULT
100 kW
IN
OUT
6
6
1
2
3
1
2
3
OUT
ILIM
IN IN
GND GND
EN
OUT
ILIM
FAULT
PAD
120 mF
5
4
5
4
ILIM
EN
FAULT
RILIM
Fault Signal
Control Signal
FAULT
EN
USB requirement only*
20 kW
GND
EN = Active Low for the TPS2552
EN = Active High for the TPS2553
Add -1 to part number for lach-off version
*USB requirement that downstream
facing ports are bypassed with at least
120 mF per hub
Power Pad
Figure 1. Typical Application as USB Power Switch
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
TPS2552
TPS2553, TPS2552-1, TPS2553-1
SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields.
These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to
MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than
maximum-rated voltages to these high-impedance circuits. During storage or handling the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic
voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication
Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
AVAILABLE OPTIONS AND ORDERING INFORMATION
AMBIENT
RECOMMENDED MAXIMUM
(3)
SON
SOT23(3)
(DBV)
CURRENT-LIMIT
PROTECTION
DEVICE(1)
ENABLE
TEMPERATURE
CONTINUOUS LOAD
CURRENT
(DRV)
(2)
TPS2552
TPS2553
Active low
TPS2552DRV
TPS2552DBV
TPS2553DBV
TPS2552DBV-1
TPS2553DBV-1
Constant-Current
Latch-Off
Active high TPS2553DRV
Active low TPS2552DRV-1
Active high TPS2553DRV-1
–40°C to 85°C
1.2 A
TPS2552-1
TPS2553-1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Maximum ambient temperature is a function of device junction temperature and system level considerations, such as power dissipation
and board layout. See dissipation rating table and recommended operating conditions for specific information related to these devices.
(3) Add an R suffix to the device type for tape and reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
(2)
VALUE
–0.3 to 7
UNIT
V
Voltage range on IN, OUT, EN or EN, ILIM, FAULT
Voltage range from IN to OUT
–7 to 7
V
IO
Continuous output current
Internally Limited
See the Dissipation Rating
Table
Continuous total power dissipation
Continuous FAULT sink current
ILIM source current
25
mA
mA
kV
V
1
2
HBM
ESD
CDM
500
TJ
Maximum junction temperature
Storage temperature
–40 to 150
–65 to 150
°C
°C
Tstg
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltages are referenced to GND unless otherwise noted.
DISSIPATION RATING TABLE
THERMAL
RESISTANCE
THERMAL
RESISTANCE
T
A ≤ 25°C
DERATING
FACTOR ABOVE
TA = 25°C
TA = 70°C
POWER
RATING
TA = 85°C
POWER
RATING
BOARD PACKAGE
POWER
RATING
θJA
θJC
Low-K(1)
High-K(2)
Low-K(1)
High-K(2)
DBV
DBV
DRV
DRV
350°C/W
160°C/W
140°C/W
75°C/W
55°C/W
55°C/W
20°C/W
20°C/W
285 mW
625 mW
715 mW
1330 mW
2.85 mW/°C
6.25 mW/°C
7.1 mW/°C
13.3 mW/°C
155 mW
340 mW
395 mW
730 mW
114 mW
250 mW
285 mW
530 mW
(1) The JEDEC low-K (1s) board used to derive this data was a 3in × 3in, two-layer board with 2-ounce copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
www.ti.com........................................................................................................................................ SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008
RECOMMENDED OPERATING CONDITIONS
MIN
2.5
0
MAX
6.5
UNIT
VIN
Input voltage, IN
Enable voltage
V
VEN
V/EN
VIH
TPS2552/52-1
TPS2553/53-1
6.5
V
V
0
6.5
High-level input voltage on EN or EN
Low-level input voltage on EN or EN
Continuous output current, OUT
1.1
VIL
0.66
1.2
232
10
IOUT
RILIM
IO
0
19.1
0
A
Current-limit threshold resistor range (nominal 1%) from ILIM to GND
Continuous FAULT sink current
kΩ
mA
µF
Input de-coupling capacitance, IN to GND
0.1
Operating virtual junction
DRV and DBV
TJ
–40
125
°C
temperature
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range, 2.5 V ≤ VIN ≤ 6.5 V, 19.1 kΩ ≤ RILIM ≤ 232 kΩ, V/EN = 0 V, or VEN
VIN, RFAULT = 10 kΩ (unless otherwise noted)
=
PARAMETER
POWER SWITCH
TEST CONDITIONS(1)
MIN
TYP MAX UNIT
DBV package, TJ = 25 °C
DBV package, –40 °C ≤TJ ≤125 °C
Static drain-source on-state resistance DRV package, TJ = 25 °C
DRV package, –40 °C ≤TJ ≤105 °C
85
95
135
115
140
150
1.5
rDS(on)
100
mΩ
DRV package, –40 °C ≤TJ ≤125 °C
VIN = 6.5 V
1.1
0.7
tr
tf
Rise time, output
Fall time, output
VIN = 2.5 V
VIN = 6.5 V
VIN = 2.5 V
1.0
CL = 1 µF, RL = 100 Ω,
(see Figure 2)
ms
0.2
0.2
0.5
0.5
ENABLE INPUT EN OR EN
Enable pin turn on/off threshold
Input current
0.66
–0.5
1.1
0.5
3
V
IEN
ton
toff
VEN = 0 V or 6.5 V, V/EN = 0 V or 6.5 V
µA
ms
ms
Turnon time
Turnoff time
CL = 1 µF, RL = 100 Ω, (see Figure 2)
3
CURRENT LIMIT
TJ = 25 °C
1215 1295 1375
1200 1295 1375
RILIM
20 kΩ
=
–40 °C ≤TJ ≤125 °C
TJ = 25 °C
490
475
110
50
520
520
130
75
550
565
150
100
Current-limit threshold (Maximum DC output current IOUT delivered to load) &
Short-circuit current, OUT connected to GND
RILIM =
49.9 kΩ
IOS
mA
–40 °C ≤TJ ≤125 °C
RILIM = 210 kΩ
ILIM shorted to IN
tIOS
Response time to short circuit
VIN = 5.0 V (see Figure 3)
2
µs
REVERSE-VOLTAGE PROTECTION
Reverse-voltage comparator trip point
(VOUT – VIN
95
3
135
5
190
7
mV
ms
)
Time from reverse-voltage condition
to MOSFET turn off
VIN = 5.0 V
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating junction temperature range, 2.5 V ≤ VIN ≤ 6.5 V, 19.1 kΩ ≤ RILIM ≤ 232 kΩ, V/EN = 0 V, or VEN
VIN, RFAULT = 10 kΩ (unless otherwise noted)
=
PARAMETER
SUPPLY CURRENT
TEST CONDITIONS(1)
MIN
TYP MAX UNIT
IIN_off
IIN_on
IREV
Supply current, low-level output
Supply current, high-level output
Reverse leakage current
VIN = 6.5 V, No load on OUT, VEN = 6.5 V or VEN = 0 V
0.1
120
100
0.01
1
140
120
1
µA
RILIM = 20 kΩ
VIN = 6.5 V, No load on OUT
µA
µA
µA
RILIM = 210 kΩ
VOUT = 6.5 V, VIN = 0 V
TJ = 25 °C
UNDERVOLTAGE LOCKOUT
UVLO
Low-level input voltage, IN
Hysteresis, IN
VIN rising
2.35
25
2.45
V
TJ = 25 °C
mV
FAULT FLAG
VOL Output low voltage, FAULT
I/FAULT = 1 mA
V/FAULT = 6.5 V
180
1
mV
µA
ms
ms
Off-state leakage
FAULT assertion or de-assertion due to overcurrent condition
FAULT assertion or de-assertion due to reverse-voltage condition
5
2
7.5
4
10
6
FAULT deglitch
THERMAL SHUTDOWN
Thermal shutdown threshold
155
135
°C
°C
°C
Thermal shutdown threshold in
current-limit
Hysteresis
10
4
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
www.ti.com........................................................................................................................................ SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008
DEVICE INFORMATION
Pin Functions
PIN
I/O
DESCRIPTION
NAME
TPS2552DBV TPS2553DBV TPS2552DRV TPS2553DRV
EN
EN
3
–
2
–
3
2
4
–
5
–
4
5
I
I
Enable input, logic low turns on power switch
Enable input, logic high turns on power switch
GND
Ground connection; connect externally to
PowerPAD
IN
1
4
1
4
6
3
6
3
I
Input voltage; connect a 0.1 µF or greater
ceramic capacitor from IN to GND as close to the
IC as possible.
FAULT
O
Active-low open-drain output, asserted during
overcurrent, overtemperature, or reverse-voltage
conditions.
OUT
ILIM
6
5
6
5
1
2
1
2
O
O
Power-switch output
External resistor used to set current-limit
threshold; recommended 19.1 kΩ ≤ RILIM ≤ 232
kΩ.
Internally connected to GND; used to heat-sink
the part to the circuit board traces. Connect
PowerPAD to GND pin externally.
PowerPAD
™
–
–
PAD
PAD
Add -1 for Latch-Off version
FUNCTIONAL BLOCK DIAGRAM
-
Reverse
Voltage
Comparator
+
CS
OUT
IN
Current
Sense
Charge
Pump
Current
Limit
Driver
EN
FAULT
(Note A)
UVLO
GND
ILIM
Thermal
Sense
8-ms Deglitch
Note A: TPS255x parts enter constant current mode
during current limit condition; TPS255x-1 parts latch off
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
PARAMETER MEASUREMENT INFORMATION
OUT
t
t
f
r
R
C
L
L
90%
90%
V
OUT
%
%
10
10
TEST CIRCUIT
V
%
50
50%
V
50%
EN
50%
EN
t
off
t
t
on
off
t
t
off
on
90%
90%
V
V
OUT
OUT
10%
%
10
VOLTAGE WAVEFORMS
Figure 2. Test Circuit and Voltage Waveforms
I
OS
I
OUT
t
IOS
Figure 3. Response Time to Short Circuit Waveform
Decreasing
Load Resistance
V
OUT
Decreasing
Load Resistance
I
OUT
I
OS
Figure 4. Output Voltage vs. Current-Limit Threshold
6
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
www.ti.com........................................................................................................................................ SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TPS2552
10 mF
VIN
VOUT
IN
OUT
R
FAULT
10 kW
150 mF
ILIM
Fault Signal
Control Signal
FAULT
EN
R
ILIM
GND
Power Pad
Figure 5. Typical Characteristics Reference Schematic
Figure 6. Turnon Delay and Rise Time
Figure 7. Turnoff Delay and Fall Time
Figure 8. Device Enabled into Short-Circuit
Figure 9. Full-Load to Short-Circuit Transient Response
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 10. Short-Circuit to Full-Load Recovery Response
Figure 11. No-Load to Short-Circuit Transient Response
Figure 12. Short-Circuit to No-Load Recovery Response
Figure 13. No Load to 1Ω Transient Response
Figure 14. 1Ω to No Load Transient Response
Figure 15. Reverse-Voltage Protection Response
8
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
www.ti.com........................................................................................................................................ SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS (continued)
2.40
R
= 20 kW
ILIM
2.39
2.38
2.37
2.36
2.35
2.34
2.33
2.32
2.31
2.30
UVLO Rising
UVLO Falling
-50
0
50
100
150
T
- Junction Temperature - °C
J
Figure 16. Reverse-Voltage Protection Recovery
Figure 17. UVLO – Undervoltage Lockout – V
0.40
0.36
0.32
150
135
120
105
90
R
= 20 kW
ILIM
R
= 20 kW
ILIM
V
= 6.5 V
IN
V
= 5 V
IN
0.28
0.24
0.20
0.16
0.12
0.08
V
= 6.5 V
75
V
= 3.3 V
IN
IN
V
= 2.5 V
IN
60
45
30
V
= 2.5 V
IN
0.04
0
15
0
-50
0
50
- Junction Temperature - °C
100
150
-50
0
50
- Junction Temperature - °C
100
150
T
T
J
J
Figure 18. IIN – Supply Current, Output Disabled – µA
Figure 19. IIN – Supply Current, Output Enabled – µA
150
125
100
20
18
16
14
V
= 5 V,
IN
R
= 20 kW,
ILIM
= 25°C
DRV Package
T
A
12
10
DBV Package
75
50
8
6
4
25
0
2
0
-50
0
50
100
150
0
1.5
3
4.5
6
T
- Junction Temperature - °C
Peak Current - A
J
Figure 20. Current Limit Response – µs
Figure 21. MOSFET rDS(on) Vs. Junction Temperature
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
TYPICAL CHARACTERISTICS (continued)
150
140
130
120
110
100
1400
1300
1200
T
= -40°C
= 25°C
1100
1000
900
800
700
600
500
400
300
200
A
T
= 25°C
T
= -40°C
A
A
T
= 125°C
T
A
A
90
80
70
60
50
40
30
T
= 125°C
A
V
= 6.5 V,
V
= 6.5 V,
IN
20
10
0
IN
R
= 20 kW
R
= 200 kW
ILIM
100
0
ILIM
0
100
200
300
400
- V
500
- 100 mV/div
OUT
600
700
800
900
1000
0
100
200
300
400
- V
500
- 100 mV/div
OUT
600
700
800
900
1000
V
V
IN
IN
Figure 22. Current Limit Threshold Vs. RILM
Figure 23. Current Limit Threshold Vs. RILM
10
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
www.ti.com........................................................................................................................................ SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008
DETAILED DESCRIPTION
OVERVIEW
The TPS2552/53 and TPS2552-1/53-1 are current-limited, power-distribution switches using N-channel
MOSFETs for applications where short circuits or heavy capacitive loads will be encountered. These devices
allow the user to program the current-limit threshold between 75 mA and 1.3 A (typ) via an external resistor.
Additional device shutdown features include overtemperature protection and reverse-voltage protection. The
device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-channel MOSFET.
The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the
MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V and requires little
supply current. The driver controls the gate voltage of the power switch. The driver incorporates circuitry that
controls the rise and fall times of the output voltage to limit large current and voltage surges and provides built-in
soft-start functionality. There are two device families that handle overcurrent situations differently. The
TPS2552/53 family enters constant-current mode while the TPS2552-1/53-1 family latches off when the load
exceeds the current-limit threshold.
OVERCURRENT CONDITIONS
The TPS2552/53 and TPS2552-1/53-1 respond to overcurrent conditions by limiting their output current to the IOS
levels shown in Figure 24. When an overcurrent condition is detected, the device maintains a constant output
current and reduces the output voltage accordingly. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS2552/53 ramps the
output current to IOS. The TPS2552/53 devices will limit the current to IOS until the overload condition is removed
or the device begins to thermal cycle. The TPS2552-1/53-1 devices will limit the current to IOS until the overload
condition is removed or the internal deglitch time (7.5-ms typical) is reached and the device is turned off . The
device will remain off until power is cycled or the device enable is toggled.
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 3). The
current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit
MOSFET. The current-sense amplifier recovers and limits the output current to IOS. Similar to the previous case,
the TPS2552/53 will limit the current to IOS until the overload condition is removed or the device begins to thermal
cycle; the TPS2552-1/53-1 will limit the current to IOS until the overload condition is removed or the internal
deglitch time is reached and the device is latched off.
The TPS2552/53 thermal cycles if an overload condition is present long enough to activate thermal limiting in any
of the above cases. The device turns off when the junction temperature exceeds 135°C (typ) while in current
limit. The device remains off until the junction temperature cools 10°C (typ) and then restarts. The TPS2552/53
cycles on/off until the overload is removed (see Figure 10 and Figure 12) .
REVERSE-VOLTAGE PROTECTION
The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceeds
the input voltage by 135 mV (typ) for 4-ms (typ). This prevents damage to devices on the input side of the
TPS2552/53 and TPS2552-1/TPS2253-1 by preventing significant current from sinking into the input capacitance.
The TPS2552/53 devices allow the N-channel MOSFET to turn on once the output voltage goes below the input
voltage for the same 4-ms deglitch time. The TPS2552-1/53-1 devices keep the device turned off even if the
reverse-voltage condition is removed and do not allow the N-channel MOSFET to turn on until power is cycled or
the device enable is toggled. The reverse-voltage comparator also asserts the FAULT output (active-low) after
4-ms.
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Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552
TPS2553, TPS2552-1, TPS2553-1
SLVS841A–NOVEMBER 2008–REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
FAULT RESPONSE
The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature or reverse-voltage
condition. The TPS2552/53 asserts the FAULT signal until the fault condition is removed and the device resumes
normal operation. The TPS2552-1/53-1 asserts the FAULT signal during a fault condition and remains asserted
while the part is latched-off. The FAULT signal is de-asserted once device power is cycled or the enable is
toggled and the device resumes normal operation. The TPS2552/53 and TPS2552-1/53-1 are designed to
eliminate false FAULT reporting by using an internal delay "deglitch" circuit for overcurrent (7.5-ms typ) and
reverse-voltage (4-ms typ) conditions without the need for external circuitry. This ensures that FAULT is not
accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry
delays entering and leaving fault conditions. Overtemperature conditions are not deglitched and assert the
FAULT signal immediately.
UNDERVOLTAGE LOCKOUT (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO
turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from large
current surges.
ENABLE (EN OR EN)
The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the
supply current. The supply current is reduced to less than 1-µA when a logic high is present on EN or when a
logic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits,
and power switch. The enable input is compatible with both TTL and CMOS logic levels.
THERMAL SENSE
The TPS2552/53 and TPS2552-1/53-1 have self-protection features using two independent thermal sensing
circuits that monitor the operating temperature of the power switch and disable operation if the temperature
exceeds recommended operating conditions. The TPS2552/53 device operates in constant-current mode during
an overcurrent conditions, which increases the voltage drop across power-switch. The power dissipation in the
package is proportional to the voltage drop across the power switch, which increases the junction temperature
during an overcurrent condition. The first thermal sensor turns off the power switch when the die temperature
exceeds 135°C (min) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch
turns on after the device has cooled approximately 10 °C.
The TPS2552/53 and TPS2552-1/53-1 also have a second ambient thermal sensor. The ambient thermal sensor
turns off the power-switch when the die temperature exceeds 155°C (min) regardless of whether the power
switch is in current limit and will turn on the power switch after the device has cooled approximately 10 °C. Both
the TPS2552/53 and TPS2552-1/53-1 families continue to cycle off and on until the fault is removed.
The open-drain fault reporting output FAULT is asserted (active low) immediately during an overtemperature
shutdown condition.
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APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITANCE
Input and output capacitance improves the performance of the device; the actual capacitance should be
optimized for the particular application. For all applications, a 0.1µF or greater ceramic bypass capacitor between
IN and GND is recommended as close to the device as possible for local noise de-coupling. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy
transient conditions. This is especially important during bench testing when long, inductive cables are used to
connect the evaluation board to the bench power-supply.
Placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are
expected on the output. Additionally, bypassing the output with a 0.01 µF to 0.1 µF ceramic capacitor improves
the immunity of the device to transient conditions and noise.
PROGRAMMING THE CURRENT-LIMIT THRESHOLD
The overcurrent threshold is user programmable via an external resistor. The TPS2552/53 and TPS2552-1/53-1
use an internal regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is
proportional to the current sourced out of ILIM. The recommended 1% resistor range for RILIM is 19.1 kΩ ≤ RILIM
≤
232 kΩ to ensure stability of the internal regulation loop. Many applications require that the minimum current limit
is above a certain current level or that the maximum current limit is below a certain current level, so it is
important to consider the tolerance of the overcurrent threshold when selecting a value for RILIM. The following
equations and Figure 24 can be used to calculate the resulting overcurrent threshold for a given external resistor
value (RILIM). Figure 24 includes current-limit tolerance due to variations caused by temperature and process.
However, the equations do not account for tolerance due to external resistor variation, so it is important to
account for this tolerance when selecting RILIM. The traces routing the RILIM resistor to the TPS2552/53 and
TPS2552-1/53-1 should be as short as possible to reduce parasitic effects on the current-limit accuracy.
RILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2)
below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a
minimum threshold is important to ensure start up into full load or heavy capacitive loads. The resulting maximum
current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a
maximum threshold is important to avoid current limiting upstream power supplies causing the input voltage bus
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the
IOS(min) curve.
Current-Limit Threshold Equations (IOS):
22980V
IOSmax (mA) =
RILIM0.94kW
23950V
RILIM0.977kW
IOSnom(mA) =
25230V
RILIM1.016kW
IOSmin(mA) =
(1)
where 19.1 kΩ ≤ RILIM ≤ 232 kΩ.
While the maximum recommended value of RILIM is 232 kΩ, there is one additional configuration that allows for
a lower current-limit threshold. The ILIM pin may be connected directly to IN to provide a 75 mA (typ) current-limit
threshold. Additional low-ESR ceramic capacitance may be necessary from IN to GND in this configuration to
prevent unwanted noise from coupling into the sensitive ILIM circuitry.
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1500
1400
1300
1200
1100
1000
900
800
700
I
OS(max)
600
500
I
OS(nom)
400
300
200
I
OS(min)
100
0
20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230
R
- Current Limit Resistor - kW
ILIM
Figure 24. Current-Limit Threshold vs. RILIM
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APPLICATION 1: DESIGNING ABOVE A MINIMUM CURRENT LIMIT
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the
IOS equations and Figure 24 to select RILIM
.
IOSmin (mA) = 1000mA
25230V
RILIM1.016kW
IOSmin (mA) =
1
æ
ç
ç
ö1.016
25230V
mA
÷
÷
÷
÷
ø
RILIM (kW) =
ç
ç
è
I
OSmin
RILIM (kW) = 24kW
(2)
Select the closest 1% resistor less than the calculated value: RILIM = 23.7 kΩ. This sets the minimum current-limit
threshold at 1 A . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to calculate the
maximum resulting current-limit threshold.
RILIM(kW) = 23.7kW
22980V
RILIM0.94kW
IOSmax (mA) =
22980V
23.70.94kW
IOSmax (mA) =
IOSmax (mA) = 1172.4mA
(3)
The resulting maximum current-limit threshold is 1172.4 mA with a 23.7 kΩ resistor.
APPLICATION 2: DESIGNING BELOW A MAXIMUM CURRENT LIMIT
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use
the IOS equations and Figure 24 to select RILIM
.
IOSmax (mA) = 500mA
22980V
RILIM0.94kW
IOSmax (mA) =
1
æ
ç
ç
ö0.94
22980V
÷
÷
÷
÷
ø
RILIM(kW) =
ç
ç
I
mA
è OSmax
RILIM(kW) = 58.7kW
(4)
Select the closest 1% resistor greater than the calculated value: RILIM = 59 kΩ. This sets the maximum
current-limit threshold at 500 mA . Use the IOS equations, Figure 24, and the previously calculated value for RILIM
to calculate the minimum resulting current-limit threshold.
RILIM(kW) = 59kW
25230V
RILIM1.016kW
IOSmin(mA) =
25230V
591.016kW
IOSmin(mA) =
IOSmin(mA) = 400.6mA
(5)
The resulting minimum current-limit threshold is 400.6 mA with a 59 kΩ resistor.
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ACCOUNTING FOR RESISTOR TOLERANCE
The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focussed only on the TPS2552/53 and
TPS2552-1/53-1 performance and assumed an exact resistor value. However, resistors sold in quantity are not
exact and are bounded by an upper and lower tolerance centered around a nominal resistance. The additional
RILIM resistance tolerance directly affects the current-limit threshold accuracy at a system level. The following
table shows a process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one
follows the selection process outlined in the application examples above. Step two determines the upper and
lower resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS
equations to calculate the threshold limits. It is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%,
when precision current limiting is desired.
Table 1. Common RILIM Resistor Selections
Resistor Tolerance
Actual Limits
Ideal
Resistor
(kΩ)
Closest 1%
Resistor
(kΩ)
Desired Nominal
Current Limit (mA)
IOS MIN
(mA)
IOS Nom
(mA)
IOS MAX
(mA)
1% low (kΩ) 1% high (kΩ)
75
120
200
300
400
500
600
700
800
900
1000
1100
1200
1300
SHORT ILIM to IN
50.0
101.3
173.7
262.1
351.2
448.3
544.3
630.2
729.1
824.7
908.3
1023.7
1106.0
1215.1
75.0
120.0
201.5
299.4
396.7
501.6
604.6
696.0
800.8
901.5
989.1
1109.7
1195.4
1308.5
100.0
142.1
233.9
342.3
448.7
562.4
673.1
770.8
882.1
988.7
1081.0
1207.5
1297.1
1414.9
226.1
134.0
88.5
65.9
52.5
43.5
37.2
32.4
28.7
25.8
23.4
21.4
19.7
226
133
223.7
131.7
87.8
65.8
51.8
42.8
37.0
32.1
28.4
25.8
23.0
21.3
19.4
228.3
134.3
89.6
67.2
52.8
43.6
37.8
32.7
29.0
26.4
23.4
21.7
19.8
88.7
66.5
52.3
43.2
37.4
32.4
28.7
26.1
23.2
21.5
19.6
CONSTANT-CURRENT VS. LATCH-OFF OPERATION AND IMPACT ON OUTPUT VOLTAGE
Both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically
during normal operation, i.e. the load current is less than the current-limit threshold and the devices are not
limiting current. During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT
x
rDS(on)). The voltage drop across the MOSFET is relatively small compared to VIN, and VOUT ≈ VIN.
Both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically
during the initial onset of an overcurrent event. Both devices limit current to the programmed current-limit
threshold set by RILIM by operating the N-channel MOSFET in the linear mode. During current-limit operation, the
N-channel MOSFET is no longer fully-enhanced and the resistance of the device increases. This allows the
device to effectively regulate the current to the current-limit threshold. The effect of increasing the resistance of
the MOSFET is that the voltage drop across the device is no longer negligible (VIN ≠ VOUT), and VOUT decreases.
The amount that VOUT decreases is proportional to the magnitude of the overload condition. The expected VOUT
can be calculated by IOS × RLOAD, where IOS is the current-limit threshold and RLOAD is the magnitude of the
overload condition. For example, if IOS is programmed to 1 A and a 1 Ω overload condition is applied, the
resulting VOUT is 1 V.
While both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically
during the initial onset of an overcurrent event, they behave differently if the overcurrent event lasts longer than
the internal delay "deglitch" circuit (7.5-ms typ). The constant-current devices (TPS2552/53) assert the FAULT
flag after the deglitch period and continue to regulate the current to the current-limit threshold indefinitely. In
practical circuits, the power dissipation in the package will increase the die temperature above the
overtemperature shutdown threshold (135°C min), and the device will turn off until the die temperature decreases
by the hysteresis of the thermal shutdown circuit (10°C typ). The device will turn on and continue to thermal cycle
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until the overload condition is removed. The constant-current devices resume normal operation once the
overload condition is removed. The latch-off devices (TPS2552-1/53-1) assert the FAULT flag after the deglitch
period and immediately turn off the device. The device remains off regardless of whether the overload condition
is removed from the output. The latch-off devices remain off and do not resume normal operation until the
surrounding system either toggles the enable or cycles power to the device.
POWER DISSIPATION AND JUNCTION TEMPERATURE
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an
approximation for calculating junction temperature based on the power dissipation in the package. However, it is
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis.
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated by:
2
PD = rDS(on) × IOUT
Where:
PD = Total power dissipation (W)
rDS(on) = Power switch on-resistance (Ω)
IOUT = Maximum current-limit threshold (A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:
TJ = PD ×θJA + TA
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Where:
TA = Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD = Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three
iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent
on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board
layout. The Dissipating Rating Table provides example thermal resistances for specific packages and board
layouts.
UNIVERSAL SERIAL BUS (USB) POWER-DISTRIBUTION REQUIREMENTS
One application for this device is for current limiting in universal serial bus (USB) applications. The original USB
interface was a 12-Mb/s or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC
peripherals (e.g., keyboards, printers, scanners, and mice). As the demand for more bandwidth increased, the
USB 2.0 standard was introduced increasing the maximum data rate to 480-Mb/s. The four-wire USB interface is
conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data,
and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply. The USB specification classifies two different classes of
devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA as
defined by the standard. A device classified as high-power can draw up to 500 mA. It is important that the
minimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw of
the intended application. The latest USB standard should always be referenced when considering the
current-limit threshold
The USB specification defines two types of devices as hubs and functions. A USB hub is a device that contains
multiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). A
function is a USB device that is able to transmit or receive data or control information over the bus. A USB
function can be embedded in a USB hub. A USB function can be one of three types included in the list below.
•
•
•
Low-power, bus-powered function
High-power, bus-powered function
Self-powered function
SPHs and BPHs distribute data and power to downstream functions. The TPS2552/53 has higher current
capability than required for a single USB port allowing it to power multiple downstream ports.
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SELF-POWERED AND BUS-POWERED HUBS
A SPH has a local power supply that powers embedded functions and downstream ports. This power supply
must provide between 4.75 V to 5.25 V to downstream facing devices under full-load and no-load conditions.
SPHs are required to have current-limit protection and must report overcurrent conditions to the USB controller.
Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs.
A BPH obtains all power from an upstream port and often contains an embedded function. It must power up with
less than 100 mA. The BPH usually has one embedded function, and power is always available to the controller
of the hub. If the embedded function and hub require more than 100 mA on power up, the power to the
embedded function may need to be kept off until enumeration is completed. This is accomplished by removing
power or by shutting off the clock to the embedded function. Power switching the embedded function is not
necessary if the aggregate power draw for the function and controller is less than 100 mA. The total current
drawn by the bus-powered device is the sum of the current to the controller, the embedded function, and the
downstream ports, and it is limited to 500 mA from an upstream port.
LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS
Both low-power and high-power bus-powered functions obtain all power from upstream ports. Low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω
and 10 µF at power up, the device must implement inrush current limiting.
USB POWER-DISTRIBUTION REQUIREMENTS
USB can be implemented in several ways regardless of the type of USB device being developed. Several
power-distribution features must be implemented.
•
•
SPHs must:
–
–
Current limit downstream ports
Report overcurrent conditions
BPHs must:
–
–
–
Enable/disable power to downstream ports
Power up at <100 mA
Limit inrush current (<44 Ω and 10 µF)
•
Functions must:
–
–
Limit inrush currents
Power up at <100 mA
The feature set of the TPS2552/53 and TPS2552-1/53-1 meets each of these requirements. The integrated
current limiting and overcurrent reporting is required by self-powered hubs. The logic-level enable and controlled
rise times meet the need of both input and output ports on bus-powered hubs and the input ports for
bus-powered functions.
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AUTO-RETRY FUNCTIONALITY
Some applications require that an overcurrent condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulled
low, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage
on EN reaches the turnon threshold, and the auto-retry time is determined by the resistor/capacitor time
constant. The part will continue to cycle in this manner until the fault condition is removed.
TPS2553
0.1 mF
Input
Output
IN
OUT
R
R
LOAD
FAULT
C
LOAD
100 kW
ILIM
R
ILIM
FAULT
EN
20 kW
GND
C
RETRY
Power Pad
0.1 mF
Figure 25. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal.
The figure below shows how an external logic signal can drive EN through RFAULT and maintain auto-retry
functionality. The resistor/capacitor time constant determines the auto-retry time-out period.
TPS2553
0.1 mF
Input
Output
IN
OUT
R
LOAD
C
LOAD
ILIM
External Logic
Signal & Driver
R
R
FAULT
ILIM
FAULT
EN
100 kW
20 kW
GND
C
RETRY
Power Pad
0.1 mF
Figure 26. Auto-Retry Functionality With External EN Signal
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TWO-LEVEL CURRENT-LIMIT CIRCUIT
Some applications require different current-limit thresholds depending on external system conditions. Figure 27
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see previously discussed "Programming the Current-Limit
Threshold" section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold by
modifying the total resistance from ILIM to GND. Additional MOSFET/resistor combinations can be used in
parallel to Q1/R2 to increase the number of additional current-limit levels.
NOTE:
ILIM should never be driven directly with an external signal.
Input
0.1 mF
Output
IN
OUT
R
R
FAULT
100 kW
C
LOAD
LOAD
R1
210 kW
ILIM
R2
22.1 kW
Fault Signal
FAULT
EN
GND
Control Signal
Power Pad
Q1
2N7002
Current Limit
Control Signal
Figure 27. Two-Level Current-Limit Circuit
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PACKAGE OPTION ADDENDUM
www.ti.com
16-Dec-2008
PACKAGING INFORMATION
Orderable Device
TPS2552DBVR
TPS2552DBVR-1
TPS2552DBVT
TPS2552DBVT-1
TPS2552DRVR
TPS2552DRVR-1
TPS2552DRVT
TPS2552DRVT-1
TPS2553DBVR
TPS2553DBVR-1
TPS2553DBVT
TPS2553DBVT-1
TPS2553DRVR
TPS2553DRVR-1
TPS2553DRVT
TPS2553DRVT-1
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SON
DBV
DBV
DBV
DRV
DRV
DRV
DRV
DBV
DBV
DBV
DBV
DRV
DRV
DRV
DRV
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SON
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Dec-2008
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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