TPS2559DRCT [TI]
高电平有效的 1.2-4.7A 可调节 ILIMIT、2.5-6.5V、13mΩ USB 电源开关 | DRC | 10 | -40 to 125;
| 型号： | TPS2559DRCT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 高电平有效的 1.2-4.7A 可调节 ILIMIT、2.5-6.5V、13mΩ USB 电源开关 | DRC | 10 | -40 to 125 开关 电源开关 光电二极管 |
| 文件： | 总31页 (文件大小：4477K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2559
ZHCSCR7A – JUNE 2014 – REVISED NOVEMBER 2020
TPS2559 精密可调节限流配电开关
1 特性
3 说明
•
工作电压范围：2.5V 至 6.5V
TPS2559 配电开关专门用于需要低阻抗精密限流开关
或电容负载较大的应用。TPS2559 可提供高达 5.5A
的持续负载电流，精密电流限制通过一个接地电阻进行
设置。当输出负载超出限流阈值时，可通过切换至恒流
模式使输出电流保持在一个安全的级别。过载事件期
间，输出电流被限制在由 R(ILIM) 设定的级别。如果出
现持续过载，此器件将进入热关断模式，以防止对
TPS2559 造成损坏。
• 1.2A 至 4.7A 可调节 I(LIMIT)（4.7A 时精度为
±4.4%）
•
•
•
•
•
短路关断（典型值）：3.5µs
高侧 MOSFET：13mΩ
最大待机电源电流：2µA
内置软启动
系统级 ESD 能力：8kV/15kV
对电源开关的上升和下降次数进行控制以最大程度降低
接通或关断期间的电流冲击。在过流和过热情况下，
FAULT 逻辑输出为低电平。
• UL 2367 认证正在申请中
2 应用
器件信息 (1)
• USB 端口、集线器
•
•
数字电视
机顶盒
封装尺寸（标称值）
器件型号
TPS2559
封装
VSON (10)
3.00mm x 3.00mm
• VoIP 电话
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
TPS2559DRC
2.5V-6.5V 0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
RFAULT
COUT
FAULT
Signal
10
FAULT
EN
6
ILIM
Control
Signal
5
Power
PAD
GND
1
RILIM
简化版原理图
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSCL5
TPS2559
www.ti.com.cn
ZHCSCR7A – JUNE 2014 – REVISED NOVEMBER 2020
Table of Contents
8.3 Feature Description...................................................10
8.4 Device Functional Modes..........................................11
9 Application and Implementation..................................12
9.1 Application Information............................................. 12
9.2 Typical Application.................................................... 12
10 Power Supply Recommendations..............................20
11 Layout...........................................................................21
11.1 Layout Guidelines................................................... 21
11.2 Layout Example...................................................... 21
12 Device and Documentation Support..........................22
12.1 Receiving Notification of Documentation Updates..22
12.2 Support Resources................................................. 22
12.3 Trademarks.............................................................22
12.4 Electrostatic Discharge Caution..............................22
12.5 Glossary..................................................................22
13 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings........................................ 4
7.2 ESD Ratings............................................................... 4
7.3 Recommended Operating Conditions.........................4
7.4 Thermal Information....................................................5
7.5 Electrical Characteristics.............................................5
7.6 Timing Requirements..................................................6
7.7 Timing Diagrams.........................................................7
7.8 Typical Characteristics................................................8
8 Detailed Description......................................................10
8.1 Overview...................................................................10
8.2 Functional Block Diagram.........................................10
Information.................................................................... 22
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (June 2014) to Revision A (November 2020)
Page
•
更新了整个文档的表和图的编号格式.................................................................................................................. 1
• Added OUT row to Voltage range parameter in Absolute Maximum Ratings table............................................4
• Added Tstg row to Absolute Maximum Ratings table, moved from ESD Ratings table.......................................4
• Changled title of ESD Ratings table and updated to current standards............................................................. 4
• Added Timing Diagrams title to section, moved from Parameter Measurement Information section to match
current standards................................................................................................................................................7
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5 Device Comparison Table
PACKAGE:
ICONT.
ADJ. RANGE
(A)
SON-8 (DRB)
OPERATING
RANGE (V)
IOS
DEVICE
OCP MODE
SOT-23 (DBV)
SON-10 (DRC)
SON-6 (DRV)
RDS(on) (mΩ)
TOLERANCE
TPS2559
2.5 - 6.5
2.5 - 6.5
Auto retry
Auto retry
5.5
1.2
13
±4.4% at 4.7 A
±6% at 1.7 A
DRC
85 (DBV)
100 (DRV)
TPS2552/3
DBV, DRV
85 (DBV)
100 (DRV)
TPS2552/3-1
2.5 - 6.5
Latch off
1.2
±6% at 1.7 A
DBV, DRV
TPS2554/5
(dual Adjustable)
4.5 - 5.5
2.5 - 6.5
2.5 - 6.5
Auto retry
Auto Retry
Auto retry
2.5
5
73
22
44
±9.7% at 2.8 A
±6.5% at 4.5 A
±7.5% at 2.8 A
DRC
DRB
DRC
TPS2556/7
TPS2560/61
(dual Channels)
2.5
2.1 A to 2.5 A
including ±1%
R(ILIM)
TPS2560A/61A
(dual Channels)
2.5 - 6.5
Auto retry
Auto retry
2.5
2.5
44
60
DRC
DRV
TPS25200
(with OVP protection)
2.5 - 6.5
(withstand up to 20 V)
±6% at 2.9 A
6 Pin Configuration and Functions
GND
1
2
10
FAULT
OUT
OUT
IN
IN
9
8
7
6
PAD
3
4
IN
OUT
ILIM
5
EN
图 6-1. DRC Package, 10-Pin VSON, Top View
表 6-1. Pin Functions
DESCRIPTION
PIN
TYPE
NAME
NO.
GND
1
Ground connection, connect externally to PowerPAD.
Input voltage, connect a 0.1 μF or greater ceramic capacitor from IN to GND as close to the device as
possible.
IN
2, 3, 4
I
EN
5
6
I
Enable input, logic high turns on power switch.
ILIM
OUT
FAULT
O
O
O
External resistor used to set current-limit threshold; recommended. 24.9 kΩ ≤ R(ILIM) ≤ 100 kΩ.
Power-switch output.
7, 8, 9
10
Active-low open-drain output, asserted during over-current or overtemperature conditions.
Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect PowerPAD
to GND pin externally.
PowerPAD™
PAD
—
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
–0.3
–0.8
–7
MAX
UNIT
V
7
7
7
IN, EN, ILIM, FAULT
V
Voltage range
OUT
V
IN to OUT
OUT
Continuous output current, IOUT
Continuous FAULT sink current
ILIM source current
Internally limited
20
Internally limited
mA
mA
mA
°C
Maximum junction temperature, TJ
Storage temperature range, Tstg
OTSD2
–40
°C
150
–62
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) Voltages are referenced to GND unless otherwise noted.
7.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)
Electrostatic
discharge
V(ESD)
V
±8000
±1500
System level (contact/air) (3)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Surges per EN61000-4-2, 1999 applied between USB and output ground of the TPS2559EVM-624 Evaluation Module user guide
(documentation available on the web.) These were the test levels, not the failure threshold.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.5
0
MAX UNIT
VIN
Input voltage, IN
6.5
6.5
5.5
10
V
V
VEN
IOUT
Input voltage, EN
Continuous output current of OUT
Continuous FAULT sink current
Recommended resistor limit range (1)
Operating junction temperature
A
mA
kΩ
°C
R(ILIM)
TJ
24.9
-40
100
125
(1) R(ILIM) is the resistor from ILIM pin to GND and ILIM pin can be shorted to GND.
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7.4 Thermal Information
TPS2559
THERMAL METRIC(1)
DRC (VSON)
10 PINS
40.6
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
45.5
Junction-to-board thermal resistance
15.9
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.4
ψJT
15.7
ψJB
RθJC(bot)
2.8
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
conditions are –40°C ≤ TJ ≤ 125°C, 2.5 V ≤ VIN ≤ 6.5 V, V(EN) = VIN, R(ILIM) = 49.9kΩ; positive current are into pins;
typical value is at 25°C; all voltages are with respect to GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SWITCH
TJ = 25°C
13
16
21
RDS(on) Input/output resistance(1)
mΩ
-40°C ≤ TJ ≤ 125°C
ENABLE INPUT EN
EN turn-on/off threshold
Hysteresis
0.66
1.1
1
V
55(2)
mV
µA
I(EN)
Input current
V(EN) = 0 V or V(EN) = 6.5 V
–1
CURRENT LIMIT
4490
2505
2215
1780
1080
5860
4731
2665
2360
1902
1176
6650
4900
2775
2460
1990
1245
7460
R(ILIM) = 24.9 kΩ
R(ILIM) = 44.2 kΩ
R(ILIM) = 49.9 kΩ
IOS
OUT short-circuit current limit
mA
R(ILIM) = 61.9 kΩ
R(ILIM) = 100 kΩ
ILIM pin short to GND (R(ILIM) = 0)
SUPPLY CURRENT
I(IN_OFF) Disabled, IN supply current
V(EN) = 0 V, no load on OUT
0.1
97
2
125
135
µA
µA
R(ILIM) = 100 kΩ, no load on OUT
R(ILIM) = 24.9 kΩ, no load on OUT
I(IN_ON) Enabled, IN supply current
107
VOUT = 6.5 V, VIN = 0 V, TJ = 25°C,
measure IOUT
I(REV)
Reverse leakage current
0.01
1
µA
UNDERVOLTAGE LOCKOUT (UVLO)
VUVLO
IN rising UVLO threshold voltage
Hysteresis
2.36
35(2)
2.45
V
mV
FAULT
VOL
Output low voltage
Off-state leakage
IFAULT = 1 mA
VFAULT = 6.5 V
180
1
mV
µA
THERMAL SHUTDOWN
OTSD2 Thermal shutdown threshold
OTSD1 Thermal shutdown threshold in current-limit
155
135
°C
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7.5 Electrical Characteristics (continued)
conditions are –40°C ≤ TJ ≤ 125°C, 2.5 V ≤ VIN ≤ 6.5 V, V(EN) = VIN, R(ILIM) = 49.9kΩ; positive current are into pins;
typical value is at 25°C; all voltages are with respect to GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Hysteresis
20 (2)
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature. Thermal effects must be taken into account
separately.
(2) These parameters are provided for reference only, and do not constitute part of TI’s published device specifications for purposes of
TI’s product warranty.
7.6 Timing Requirements
conditions are –40°C ≤ TJ = ≤ 125°C, 2.5 V ≤ VIN ≤ 6.5 V, V(EN) = VIN, R(ILIM) = 49.9kΩ; positive current are into pins;
typical value is at 25°C; all voltages are with respect to GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
POWER SWITCH
VIN = 6.5 V
VIN = 2.5 V
VIN = 6.5 V
VIN = 2.5 V
2.6
1.3
3.65
2.6
5.2
tr
tf
OUT voltage rise time
OUT voltage fall time
3.9
ms
1.3
CL = 1 µF, RL = 100 Ω, see 图 7-2
0.7
0.95
0.78
0.42
1.04
ENABLE INPUT EN
ton OUT voltage turn-on time
toff OUT voltage turn-off time
CURRENT LIMIT
15
ms
8
CL = 1 µF, RL = 100 Ω, see 图 7-3
tIOS
Short-circuit response time(1)
3.5(1)
9.5
µs
VIN = 5 V, RSHORT = 50 mΩ, see 图 7-4
FAULT
FAULT assertion or de-assertion resulting from overcurrent
condition
FAULT deglitch
6
13
ms
(1) This parameter is provided for reference only and does not constitute part of TI's published device specifications for purposes of TI's
product warranty.
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7.7 Timing Diagrams
OUT
RL
CL
图 7-1. Output Rise/Fall Time Test Load
90%
VOUT
tf
tr
10%
图 7-2. Power-On and Off Timing
50%
ton
50%
VEN
toff
90%
VOUT
10%
图 7-3. Enable Timing, Active High Enable
IOUT
IOS
120% x IOS
0A
tIOS
图 7-4. Output Short-Circuit Parameters
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7.8 Typical Characteristics
2.5
0.6
0.5
0.4
0.3
0.2
0.1
0.0
2.4
2.3
2.2
2.1
2.0
Rising
Falling
0
50
100
150
œ50
0
50
100
150
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C001
C002
VIN = 6.5 V
图 7-5. Undervoltage Lockout (UVLO) vs Temperature
图 7-6. Supply Current, Output Disabled (IIN_OFF) vs Temperature
120
140
120
100
80
100
80
60
60
40
40
20
0
V=2.5 V
IN
V=2.5 V
IN
20
VIN = 6.5 V
VIN = 6.5 V
0
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C003
C004
R(ILIM) = 100 kΩ
R(ILIM) = 24.9 kΩ
图 7-7. Supply Current, Output Enabled (IIN_ON) vs Temperature 图 7-8. Supply Current, Output Enabled (IIN_ON) vs Temperature
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
œ0.1
18
16
14
12
10
8
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C005
C006
VOUT = 6.5 V
VIN = 5 V
图 7-9. Reverse Leakage Current (IREV) vs Temperature
图 7-10. Input/Output Resistance (RDS(on)) vs Temperature
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7.8 Typical Characteristics (continued)
8.0
7.5
7.0
6.5
6.0
5.5
5.0
13
12
11
10
9
8
7
6
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C008
C007
V( FAULT) = 2.5 V
图 7-12. Deglitch Time (tFAULT) vs Temperature
VIN = 6.5 V, ILIM pin short to GND
图 7-11. Short-Circuit Current (IOS) vs Temperature
4.0
3.5
3.0
2.5
2.0
1.5
1.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
V=2.5 V
IN
V=2.5V
IN
0.5
0.0
VIN = 6.5 V
VIN = 6.5 V
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C009
C010
COUT = 1 µF, R(LOAD) = 100 Ω
COUT = 1 µF, R(LOAD) = 100 Ω
图 7-14. Output Fall Time (tF) vs Temperature
图 7-13. Output Rise Time (tR) vs Temperature
6
R
= 24.9 kꢀ
ILIM
R
= 44.9 kꢀ
ILIM
5
4
3
2
1
R = 49.9 kꢀ
ILIM
R = 61.9 kꢀ
ILIM
R = 100 kꢀ
ILIM
0
0
50
100
150
œ50
Junction Temperature (°C)
C011
VIN = 6.5 V
图 7-15. Short-Circuit Current (IOS) vs Temperature
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8 Detailed Description
8.1 Overview
The TPS2559 is a current-limited, power-distribution switch using N-channel MOSFETs for applications where
short circuits or heavy capacitive loads will be encountered. This device allows the user to program the current-
limit via an external resistor and the maximum continuous output current up to 5.5 A. This device incorporates an
internal charge pump and the gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump
supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the
source. The charge pump operates from input voltages as low as 2.5 V and requires little supply current. The
driver controls the gate voltage of the power switch. The driver incorporates circuitry that controls the rise and fall
times of the output voltage to limit large current and voltage surges and provides built-in soft-start functionality.
The TPS2559 limits the output current to the programmed current-limit threshold IOS during an overcurrent or
short-circuit event by reducing the charge pump voltage driving the N-channel MOSFET and operating it in the
linear range of operation. The result of limiting the output current to IOS reduces the output voltage at OUT
because N-channel MOSFET is no longer fully enhanced.
8.2 Functional Block Diagram
2/3/4
CS
7/8/9
IN
OUT
Current
Sense
Charge
Pump
Current
Limit
5
Driver
EN
10
FAULT
UVLO
9.5-ms
Deglitch
6
1
ILIM
Thermal
Sense
GND
8.3 Feature Description
8.3.1 Thermal Sense
The TPS2559 self protects by using two independent thermal sensing circuits that monitor the operating
temperature of the power switch and disable operation if the temperature exceeds recommended operating
conditions. The TPS2559 device operates in constant-current mode during an over-current condition, which
increases the voltage drop across power switch. The power dissipation in the package is proportional to the
voltage drop across the power switch, which increases the junction temperature during an over-current condition.
The first thermal sensor (OTSD1) turns off the power switch when the die temperature exceeds 135°C (min) and
the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on after the device has
cooled approximately 20°C.
The TPS2559 also has a second ambient thermal sensor (OTSD2). The ambient thermal sensor turns off the
power switch when the die temperature exceeds 155°C (min) regardless of whether the power switch is in
current limit and will turn on the power switch after the device has cooled approximately 20°C. The TPS2559
continues to cycle off and on until the fault is removed.
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8.3.2 Overcurrent Protection
The TPS2559 responds to overcurrent conditions by limiting their output current to IOS. When an overload
condition is present, the device maintains a constant output current, with the output voltage determined by (IOS
RLOAD). Two possible overload conditions can occur.
×
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS2559 ramps the
output current to IOS. The TPS2559 limits the current to IOS until the overload condition is removed or the device
begins to thermal cycle (see 图 9-9).
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see 图 7-4). The
response speed and shape will vary with the overload level, input circuit, and rate of application. The current-limit
response will vary between simply settling to IOS, or turnoff and controlled return to IOS. Similar to the previous
case, the TPS2559 limits the current to IOS until the overload condition is removed or the device begins to
thermal cycle.
The TPS2559 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of
the above cases. The device turns off when the junction temperature exceeds 135°C (min) while in current limit.
The device remains off until the junction temperature cools 20°C (typ) and then restarts. The TPS2559 cycles
on/off until the overload is removed (see 图 9-10).
8.3.3 FAULT Response
The FAULT open-drain output is asserted (active low) during an over-current or over-temperature condition. The
TPS2559 asserts the FAULT signal until the fault condition is removed and the device resumes normal
operation. The TPS2559 is designed to eliminate false FAULT reporting by using an internal delay "deglitch"
circuit for over-current (9-ms typ.) conditions without the need for external circuitry. This ensures that FAULT is
not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch
circuitry delays entering and leaving current-limit induced fault conditions. The FAULT signal is not deglitched
when the MOSFET is disabled due to an over-temperature condition but is deglitched after the device has
cooled and begins to turn on. This unidirectional deglitch prevents FAULT oscillation during an over-temperature
event.
8.4 Device Functional Modes
8.4.1 Operation with VIN Undervoltage Lockout (UVLO) Control
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO
turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.
8.4.2 Operation with EN Control
The logic enable controls the power switch and device supply current. The supply current is reduced to less than
2-μA when a logic low is present on EN. A logic high input on EN enables the driver, control circuits, and power
switch. The enable input is compatible with both TTL and CMOS logic levels.
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
The TPS2559 current limited power switch uses N-channel MOSFETs in applications requiring up to 5.5 A of
continuous load current. The device enters constant-current mode when the load exceeds the current limit
threshold.
The TPS2559 power switch is used to protect the up-stream power supply when the output is overloaded.
9.2 Typical Application
TPS2559
5 V
0.1mF
VOUT
7/8/9
2/3/4
OUT
ILIM
IN
150µF
10kΩ
Fault
Signal
10
FAULT
EN
6
Control
Signal
5
Power
Pad
*
GND
1
RILIM
图 9-1. Typical TPS2559 Power Switch
Use the IOS in the Electrical Characteristics table or IOS in 方程式 1 to select the RILIM
.
9.2.1 Design Requirements
表 9-1 lists the input parameters for this design example.
表 9-1. Design Requirements
DESIGN PARAMETERS
Input operation voltage
Rating current
EXAMPLE VALUE
5 V
3 A or 4.5 A
3 A
Minimum current limit
Maximum current limit
5 A
When choosing a power switch, there are several general steps:
1. Determine what is the power rail, 3.3 V or 5 V, and then choose the operation range of the power switch that
can cover the power rail voltage range.
2. Determine what is the normal operation current. For example, the maximum allowable current drawn by
portable equipment for a USB 2.0 port is 500 mA, so the normal operation current is 500 mA and the
minimum current limit of power switch must exceed 500 mA to avoid false trigger during normal operation.
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3. Determine what is the maximum allowable current provided by up-stream power, and then decide the
maximum current limit of the power switch that must lower it to ensure the power switch can protect the up-
stream power when an overload is encountered at the output of the power switch.
Note
Choosing power switch with tighter current limit tolerance can loosen the up-stream power-supply
design.
9.2.2 Detailed Design Procedure
9.2.2.1 Step-by-Step Design Procedure
To begin the design process a few parameters must be decided upon. The designer must know the following:
• Normal input operation voltage
• Rating current
• Minimum current limit
• Maximum current limit
9.2.2.2 Input and Output Capacitance
Input and output capacitance improves the performance of the device; the actual capacitance should be
optimized for the particular application. For all applications, a 0.1μF or greater ceramic bypass capacitor
between IN and GND is recommended as close to the device as possible for local noise decoupling. This
precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be
needed on the input to reduce voltage undershoot from exceeding the UVLO of other load share one power rail
with TPS2559 or overshoot from exceeding the absolute-maximum voltage of the device during heavy transient
conditions. This is especially important during bench testing when long, inductive cables are used to connect the
evaluation board to the bench power supply.
Output capacitance is not required, but placing a high-value electrolytic capacitor on the output pin is
recommended when large transient currents are expected on the output to reduce the undershoot, which caused
by the inductance of the output power bus just after a short has occurred and the TPS2559 has abruptly reduced
OUT current. Energy stored in the inductance will drive the OUT voltage down and potentially negative as it
discharges.
9.2.2.3 Programming the Current-Limit Threshold
The overcurrent threshold is user programmable via an external resistor. The TPS2559 uses an internal
regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the
current sourced out of ILIM. The recommended 1% resistor range for R(ILIM) is 24.9 kΩ ≤ R(ILIM) ≤ 100 kΩ to
ensure stability of the internal regulation loop.
When ILIM pin short to GND (single point failure), maximum current limit is less than 8 A over temperature and
process variation.
Many applications require that the minimum current limit is above a certain current level or that the maximum
current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent
threshold when selecting a value for R(ILIM). The equations and the graph below can be used to estimate the
minimum and maximum variation of the current-limit threshold for a predefined resistor value within R(ILIM) is
24.9 kΩ ≤ R(ILIM) ≤ 100 kΩ. This variation is an approximation only and does not take into account, for
example, the resistor tolerance. For examples of more-precise variation of IOS refer to the current-limit section of
the Electrical Characteristics table.
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121635 V
R(ILIM)1.0013kW
IOSmax (mA) =
IOSnom(mA) =
IOSmin(mA) =
+ 36
118079 V
R(ILIM)1.0008kW
113325 V
- 47
R(ILIM)1.0010kW
(1)
24.9 kΩ ≤ R(ILIM) ≤ 100 kΩ
6000
5500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
IOS (Min)
IOS (Typ)
IOS (Max)
0
20
30
40
50
60
70
80
90
100
Current Limit Resistor (kꢀ)
C012
图 9-2. Current-Limit vs R(ILIM)
9.2.2.4 Design Above a Minimum Current Limit
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 3 A must be delivered to the load so that the minimum desired current-limit threshold is 3000 mA. Use the
IOS equations and 图 9-2 to select R(ILIM)
.
IOSmin(mA) = 3000 mA
113325 V
R(ILIM)1.0010kW
I
(mA) =
- 47
OSmin
1
1
1.0010
æ
ö
÷
÷
ø
113325
113325 1.0010
æ
ö
R(ILIM)(kW) = ç
=
= 37.06 kW
ç
÷
ç
è
IOS(min) + 47
3000 + 47
è
ø
(2)
Select the closest 1% resistor less than the calculated value: R(ILIM) = 36.5 kΩ. This sets the minimum current-
limit threshold at 3016 A.
113325 V
R(ILIM)1.0010kW
113325
36.5´1.01 1.0010
IOSmin(mA) =
- 47 =
- 47 = 3016 mA
(
)
(3)
Use the IOS equations, Figure 9-2, and the previously calculated value for R(ILIM) to calculate the maximum
resulting current-limit threshold.
121635
121635
(36.5´0.99)1.0013
IOSmax (mA) =
+ 36 =
+ 36 = 3387 mA
1.0013
R(ILIM)
(4)
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The resulting maximum current-limit threshold minimum is 3016 mA and maximum is 3387 mA with a 36.5 kΩ ±
1%.
9.2.2.5 Design Below a Maximum Current Limit
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that 5A must be delivered to the load so that the minimum desired current-limit threshold is 5000 mA. Use the
IOS equations and 图 9-2 to select R(ILIM)
.
IOSmax (mA) = 5000 mA
121635
R(ILIM)1.0013kW
IOSmax (mA) =
+ 36
1
1
1.0013
æ
ö
÷
÷
ø
121635
IOS(max)
121635 1.0013
æ
ö
R(ILIM)(kW) = ç
=
ç
= 24.4 kW
÷
ç
è
5000 - 36
è
ø
(5)
Select the closest 1% resistor less than the calculated value: RILIM = 24.9 kΩ. This sets the maximum current-
limit threshold at 4950 A.
121635
R(ILIM)1.0013kW
121635
IOSmax (mA) =
+ 36 =
+ 36 = 4950 mA
1.0013
24.9´0.99
(
)
(6)
Use the IOS equations, Figure 9-2, and the previously calculated value for R(ILIM) to calculate the minimum
resulting current-limit threshold.
113325
113325
(24.9´1.01)1.0010
IOSmin(mA) =
- 47 =
- 47 = 4445 mA
1.0010
R(ILIM)
(7)
The resulting minimum current-limit threshold minimum is 4445 mA and maximum is 4950 mA with a 24.9 kΩ ±
1%.
9.2.2.6 Accounting for Resistor Tolerance
The previous sections described the selection of R(ILIM) given certain application requirements and the
importance of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2559 is
bounded by an upper and lower tolerance centered on a nominal resistance. The additional RILIM resistance
tolerance directly affects the current-limit threshold accuracy at a system level. 表 9-2 lists a process that
accounts for worst-case resistor tolerance assuming 1% resistor values.
Step one follows the selection process outlined in the application examples above.
Step two determines the upper and lower resistance bounds of the selected resistor.
Step three uses the upper and lower resistor bounds in the IOS equations to calculate the threshold limits.
It is important to use tighter tolerance resistors, that is, 0.5% or 0.1%, when precision current limiting is desired.
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表 9-2. Common R(ILIM) Resistor Selections
RESISTOR TOLERANCE
ACTUAL LIMITS
IDEAL
RESISTOR
(kΩ)
CLOSEST 1%
RESISTOR
(kΩ)
DESIRED NOMINAL
CURRENT LIMIT
(mA)
1% LOW
1% HIGH
IOS MIN
(mA)
IOS NOM
(mA)
IOS MAX
(mA)
(kΩ)
(kΩ)
1250
1500
1750
2000
2250
2500
2750
3000
3250
3500
3750
4000
4250
4500
4750
94.1
78.4
67.2
58.8
52.3
47.1
42.8
39.2
36.2
33.6
31.4
29.4
27.7
26.1
24.8
93.1
78.7
66.5
59
92.2
77.9
65.8
58.4
51.8
47
94
1153
1372
1633
1847
2090
2306
2541
2805
3016
3241
3491
3757
3947
4238
4445
1264
1495
1770
1995
2551
2478
2725
3003
3226
3463
3726
4005
4206
4512
4730
1348
1588
1874
2107
2373
2610
2866
3155
3386
3633
3907
4197
4405
4724
4950
79.5
67.2
59.6
52.8
48
52.3
47.5
43.2
39.2
36.5
34
42.8
38.8
36.1
33.7
31.3
29.1
27.7
25.8
24.7
43.6
39.6
36.9
34.3
31.9
29.7
28.3
26.4
25.1
31.6
29.4
28
26.1
24.9
9.2.2.7 Power Dissipation and Junction Temperature
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an
approximation for calculating junction temperature based on the power dissipation in the package. However, it is
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis. Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated by:
2
PD = rDS(on) × IOUT
Where:
PD = Total power dissipation (W)
rDS(on) = Power switch on-resistance (Ω)
IOUT = Maximum current-limit threshold (A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:
TJ = PD × θJA + TA
Where:
TA = Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD = Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three
iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent
on thermal resistance θJA and thermal resistance is highly dependent on the individual package and board
layout.
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9.2.2.8 Auto-Retry
Some applications require that an overcurrent condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor
and capacitor. During a fault condition, FAULT pulls low EN. The part is disabled when EN is pulled below the
turn-off threshold, and FAULT goes high impedance allowing C(RETRY) to begin charging. The part re-enables
when the voltage on EN reaches the turn-on threshold. The part will continue to cycle in this manner until the
fault condition is removed. The auto-retry cycling time is determined by the resistor/capacitor time constant,
TPS2559 turn on time and FAULT deglitch time (see 图 9-13).
TPS2559
VIN
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
COUT
RFAULT
100kW
10
FAULT
EN
6
ILIM
5
CRETRY
Power
Pad
GND
1
2.2mF
100kΩ
图 9-3. Auto-Retry Circuit
Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal.
图 9-4 shows how an external logic signal can drive EN through R( FAULT) and maintain auto-retry functionality.
The resistor, capacitor time constant determines the auto-retry time-out period.
TPS2559
VIN
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
COUT
10
FAULT
EN
RFAULT
External Logic
Signal and Driver 100 kW
6
ILIM
5
Power
Pad
CRETRY
2.2 mF
GND
1
100kΩ
图 9-4. Auto-Retry Circuit with External EN Signal
See the A Power-Distribution Switch With Latched OvercurrentProtection application report for how to implement
latch-off.
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9.2.2.9 Two-Level Current-Limit
Some applications require different current-limit thresholds depending on external system conditions. 图 9-5
shows an implementation for an externally-controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see the Programming the Current-Limit Threshold section). A logic-
level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying the total
resistance from ILIM to GND (see 图 9-14 and 图 9-15). Additional MOSFET/resistor combinations can be used
in parallel to Q1/R2 to increase the number of additional current-limit levels.
Note
ILIM must never be driven directly with an external signal.
TPS2559
5 V
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
10kΩ
COUT
10
R1
100 kΩ
FAULT
EN
6
ILIM
Control
Signal
R2
100 kΩ
5
Current Limit
Control Signal
Power
Pad
GND
1
Q1
图 9-5. Two-Level Current-Limit Circuit
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9.2.3 Application Curves
6
5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
6
5
3.0
VEN
VOUT
2.5
IOUT
2.0
4
4
3
3
1.5
1.0
0.5
0.0
œ0.5
2
2
1
1
V
EN
0
0
VOUT
IOUT
œ1
œ1
0
4
8
12
16
0
4
8
12
16
œ4
œ4
Time (ms)
Time (ms)
C013
C014
图 9-6. Output Rise With 150 µF // 5 Ω
图 9-7. Output Fall With 150 µF // 5 Ω
5
5
6
6
VEN
V
VOUT
V
I
OUT
FAULT
V
FAULT
5
5
4
4
I
OUT
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
0
0
0
œ1
œ1
œ1
œ1
0
8
16
Time (ms)
24
32
œ8
0
20
40
60
80 100 120 140 160
œ40 œ20
Time (ms)
C015
C016
图 9-8. Enable Into Output Short
图 9-9. Full Load to Output Short Transient
Response
6
5
6
6
5
6
VOUT
V
V
OUT
I
OUT
FAULT
I
OUT
5
5
4
4
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
0
0
0
œ1
œ1
œ1
œ1
0
20
0
2
4
6
8
œ80
œ60
œ40
œ20
œ2
Time (ms)
Time (ms)
C017
C019
图 9-10. Output Short to Full Load Recovery
图 9-11. 50-mΩ Hot-Short
Response
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6
5
60
50
40
30
20
10
0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VOUT
I
OUT
4
3
2
1
0
œ1
œ2
œ10
œ20
V
OUT
I
IOUT
V
FAULT
œ0.2
0
1
2
3
4
5
œ5
œ4
œ3
œ2
œ1
œ40
0
40
80 120 160 200 240 280 320 360
Time (ms)
Time (ꢀs)
C020
C021
图 9-12. 50-mΩ Hot-Short Response Time
图 9-13. Auto-Retry Cycle
5
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
6
5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
V
V
GATE
V
FAULT
I
OUT
OUT
4
4
3
3
2
2
1
1
0
0
V
V
GATE
I
OUT
OUT
V
FAULT
œ1
œ1
0.0
0.5
1.0
1.5
2.0
0.0 0.1 0.2 0.3 0.4 0.5
œ0.5 œ0.4 œ0.3 œ0.2 œ0.1
Time (s)
œ2.0 œ1.5 œ1.0 œ0.5
Time (s)
C022
C023
图 9-14. Two-Level Current Limit With RLOAD = 2.5
图 9-15. Two-Level Current Limit With RLOAD = 1 Ω
Ω
10 Power Supply Recommendations
Design of the devices is for operation from an input voltage supply range of 2.5 V to 6.5 V. The current capability
of the power supply should exceed the maximum current limit of the power switch.
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11 Layout
11.1 Layout Guidelines
• Place the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low-
inductance trace.
• Placing a high-value electrolytic capacitor and a 100-nF bypass capacitor on the output pin is recommended
when large transient currents are expected on the output.
• The traces routing the RILIM resistor to the device should be as short as possible to reduce parasitic effects
on the current limit accuracy.
• The PowerPAD should be directly connected to PCB ground plane using wide and short copper trace.
11.2 Layout Example
VIA to Power Ground Plane
Power Ground
FAULT
1
2
3
4
5
10
9
High Frequency
Bypass Capacitor
IN
OUT
8
7
ILIM
6
图 11-1. TPS2559 Board Layout
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
PowerPAD™ and TI E2E™ are trademarks of Texas Instruments.
所有商标均为其各自所有者的财产。
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS2559DRCR
TPS2559DRCT
ACTIVE
ACTIVE
VSON
VSON
DRC
DRC
10
10
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
2559
2559
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS2559DRCR
TPS2559DRCT
VSON
VSON
DRC
DRC
10
10
3000
250
330.0
180.0
12.4
12.4
3.3
3.3
3.3
3.3
1.1
1.1
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS2559DRCR
TPS2559DRCT
VSON
VSON
DRC
DRC
10
10
3000
250
346.0
210.0
346.0
185.0
33.0
35.0
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRC 10
3 x 3, 0.5 mm pitch
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4226193/A
www.ti.com
PACKAGE OUTLINE
DRC0010C
VSON - 1 mm max height
S
C
A
L
E
4
.
0
0
0
PLASTIC SMALL OUTLINE - NO LEAD
3.1
2.9
A
B
PIN 1 INDEX AREA
3.1
2.9
1.0
0.8
C
SEATING PLANE
0.08 C
0.05
0.00
1.65 0.1
SYMM
EXPOSED
THERMAL PAD
(0.2) TYP
5
6
SYMM
11
2X 2
2.45 0.1
8X 0.5
10
1
0.30
10X
PIN 1 ID
0.18
0.5
0.3
10X
0.1
C A B
0.05
4218879/A 08/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRC0010C
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(1.65)
SEE SOLDER MASK
DETAIL
10X (0.6)
SYMM
10X (0.24)
1
10
(2.45)
8X (0.5)
11
SYMM
(R0.05) TYP
(0.975)
(
0.2) TYP
VIA
6
5
(2.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218879/A 08/2020
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DRC0010C
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
10X (0.6)
2X (1.51)
10
10X (0.24)
1
2X (1.08)
8X (0.5)
11
SYMM
(0.64)
(R0.05) TYP
6
5
SYMM
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 20X
EXPOSED PAD 11
81% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
4218879/A 08/2020
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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