TPS27S100ARRKR [TI]
具有可调节电流限制的 40V、80mΩ、4A、单通道工业高侧开关 | RRK | 16 | -40 to 125;
| 型号： | TPS27S100ARRKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节电流限制的 40V、80mΩ、4A、单通道工业高侧开关 | RRK | 16 | -40 to 125 开关 |
| 文件： | 总41页 (文件大小：2035K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS27S100
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
TPS27S100x 40V 4A 80mΩ 单通道高侧开关
1 特性
2 应用
1
•
具有全面诊断功能的 80mΩ 单通道高侧开关
•
•
•
可编程逻辑控制器
楼宇自动化
–
–
TPS27S100A：开漏状态输出
电信/网络
TPS27S100B：电流监视器模拟输出
•
•
•
•
•
•
宽工作电压范围：3.5V 至 40V
超低待机电流，低于 0.5µA
3 说明
TPS27S100x 是一款受到全面保护的单通道高侧开
关，具有集成式 NMOS 和电荷泵。全面的诊断功能和
高精度电流监控器 功能 ，可对负载进行智能控制。可
调节电流限制功能能够极大地提高整个系统的可靠性。
器件诊断报告具有两个版本，以支持数字故障状态和模
拟电流监控器输出。精确的电流监控器和可调节电流限
制 特性 使该器件从市场中脱颖而出。
工作结温范围，-40°C 至 150°C
输入控制，兼容 3.3V 和 5V 逻辑
高精度电流监控器，在 1A 时精度为 ±30mA
可通过外部电阻器将电流限制调节为 0.5A 至 6A
（在 0.5A 时精度为 ±20%）
•
•
用于对 MCU、模拟或数字接口进行多路复用的诊
断使能功能
针对 IN 和 OUT 引脚的出色 ESD 保护
器件信息(1)
–
–
–
±16kV IEC 61000-4-2 ESD 接触放电
±4kV IEC 61000-4-4 电气快速瞬变
±1.0kV/42Ω IEC 61000-4-5 浪涌
器件型号
封装
HTSSOP (14)
QFN (16)
封装尺寸（标称值）
4.40mm × 5.00mm
4.00mm × 3.5mm
TPS27S100x
•
保护
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
–
–
–
–
–
过载和接地短路保护
电感负载负电压钳位
典型应用原理图
欠压锁定 (UVLO) 保护
具备自恢复功能的热关断和热振荡
接地失效保护
V+
FIELD_POWER
IN
OUT
TPS27S100
EN
A0
•
•
诊断
DIAG_EN
–
–
–
开启和关闭状态输出开路负载/对电源短路检测
FLT
(A version)
Fault
过载和接地短路检测
热关断和热振荡检测
Current
IMON
(B version)
Sense
Digital
Isolator
Back-plane
ASIC
µC
热增强型 14 引脚 PWP 或 16 引脚 QFN 封装
TPS27S100
A1
TPS27S100
A7
GND
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSE42
TPS27S100
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
www.ti.com.cn
目录
7.2 Functional Block Diagram ....................................... 15
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 23
Application and Implementation ........................ 25
8.1 Application Information............................................ 25
8.2 Typical Application ................................................. 25
Power Supply Recommendations...................... 27
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 6
8
9
10 Layout................................................................... 27
10.1 Layout Guidelines ................................................. 27
10.2 Layout Example .................................................... 27
11 器件和文档支持 ..................................................... 29
11.1 接收文档更新通知 ................................................. 29
11.2 社区资源................................................................ 29
11.3 商标....................................................................... 29
11.4 静电放电警告......................................................... 29
11.5 Glossary................................................................ 29
12 机械、封装和可订购信息....................................... 29
6.6 Timing Requirements – Current Monitor
Characteristics ........................................................... 8
6.7 Switching Characteristics.......................................... 9
6.8 Typical Characteristics............................................ 11
Detailed Description ............................................ 15
7.1 Overview ................................................................. 15
7
4 修订历史记录
Changes from Revision A (February 2018) to Revision B
Page
•
•
•
•
•
•
向特性部分中添加了 QFN 封装............................................................................................................................................... 1
向设备信息 表中添加了 QFN (16) 封装，以及 4.00mm × 3.5mm 的封装尺寸 ....................................................................... 1
更新了 典型应用原理图........................................................................................................................................................... 1
Added RRK Package to the Pin Out Drawing and Pin Functions table ................................................................................. 3
Updated the Specifications Absolute Maximum Ratings table .............................................................................................. 4
Changed the Operation junction temperature range MAX from 150°C to 125°C in the Specifications Recommended
Operating Conditions table .................................................................................................................................................... 4
•
•
Added RRK package to the Specifications Thermal Information table .................................................................................. 4
Updated the Operating Current section in the Specifications Electrical Characteristics table ............................................... 4
Changes from Original (October 2017) to Revision A
Page
•
•
Added footnote 2 and 3 to the Electrical Characteristics table............................................................................................... 4
Added reverse current protection information to the Reverse Current Protection section................................................... 22
2
Copyright © 2017–2019, Texas Instruments Incorporated
TPS27S100
www.ti.com.cn
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
5 Pin Configuration and Functions
TPS27S100A PWP Package
14-Pin HTSSOP With Exposed Thermal Pad
Top View
TPS27S100A RRK Package
16-Pin QFN With Exposed Thermal Pad
Top View
NC
FLT
NC
14
13
FLT
1
2
3
4
5
6
7
ILIM
GND
EN
GND
EN
ILIM
DIAG_EN
DIAG_EN
12
11
10
NC
NC
IN
OUT
OUT
OUT
NC
NC
IN
Tab
IN
IN
OUT
OUT
OUT
IN
9
8
OUT
IN
IN
NC – No internal connection
NC – No internal connection
TPS27S100B RRK Package
16-Pin QFN With Exposed Thermal Pad
Top View
TPS27S100B PWP Package
14-Pin HTSSOP With Exposed Thermal Pad
Top View
NC
IMON
GND
EN
ILIM
14
NC
IMON
ILIM
1
2
3
4
5
6
7
DIAG_EN
NC
NC
IN
13
GND
EN
OUT
OUT
OUT
IN
DIAG_EN
12
11
IN
Tab
NC
NC
IN
OUT
IN
10
OUT
OUT
OUT
NC – No internal connection
IN
9
8
IN
NC – No internal connection
Pin Functions
PIN
TPS27S100 TPS27S100 TPS27S100
I/O
DESCRIPTION
NAME
TPS27S100B
RRK
A PWP
B PWP
A RRK
Enable and disable pin for diagnostic functions.
Connect to device GND if not used.
DIAG_EN
EN
12
12
14
3
14
I
I
3
14
3
—
3
Enable control for channel activation.
Open-drain diagnostic status output. Leave floating
if not used.
FLT
16
2
—
O
—
O
O
I
GND
ILIM
2
2
2
Ground pin.
adjustable current-limit pin. Connect to device GND
if external current limit is not used.
13
13
15
15
16
IMON
IN
—
14
—
Current-monitor output. Leave floating if not used.
9, 10, 11,
12
8, 9, 10
8, 9, 10
9, 10, 11, 12
Power supply.
NC
1, 4, 11
5, 6, 7
1, 4, 11
5, 6, 7
1, 4, 13
1, 4, 13
—
O
No-connect pin; leave floating.
Output, connected to load.
OUT
5, 6, 7, 8
5, 6, 7, 8
Thermal pad. Connect to device GND or leave
floating.
Thermal pad
—
—
—
—
—
Copyright © 2017–2019, Texas Instruments Incorporated
3
TPS27S100
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted)
(1)(2)
MIN
MAX
40
UNIT
V
Supply voltage
Supply voltage (for transients less than 400 ms)
Current on GND pin, t < 2 minutes
Voltage on EN and DIAG_EN pins
Current on EN and DIAG_EN pins
Voltage on FLT pin
48
V
–250
–0.3
–10
100
7
mA
V
mA
V
–0.3
–30
7
10
Current on FLT pin
mA
V
Voltage on ILIM pin
–0.3
–2.7
7
Voltage on IMON pin
6.5
70
V
Inductive load switch-off energy dissipation, single pulse(3)
Operating junction temperature, TJ
Storage temperature, Tstg
mJ
°C
°C
–40
–65
150
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
(3) Test condition: VIN = 13.5 V, L = 8 mH, R = 0 Ω, TJ = 150°C. FR4 2s2p board, 2- × 70-μm Cu, 2- × 35-μm Cu. 600-mm2 board copper
area.
6.2 ESD Ratings
VALUE
±5000
±4000
±750
UNIT
(1)
(1)
Human body model (HBM)
Human body model (HBM)
IN, OUT, GND
Other pins
Electrostatic
discharge
V(ESD)
V
Charged device model (CDM)
(2)
V(ESD)
V(ESD)
V(ESD)
Contact/Air discharge, per IEC 61000-4-2
IN, OUT
IN, OUT
IN, OUT
±16000
±4000
±1000
V
V
V
Electrostatic
discharge
(2)
Electrical fast transient, per IEC 61000-4-4
Surge protection with 42 Ω, per IEC 61000-4-5; 1.2/50 μs
(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) Tested with application circuit shown in 图 35 with CVIN1= 47 μF, CVIN2= 100 nF, CVOUT= 22 nF and SM15T30A TVS input clamp. Supply
voltage of 24 V DC is always ON, EN Inputs are High, so output is High (ON) and floating (no load).
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
5
MAX
40
5
UNIT
V
VIN
Operating voltage
VENx
VFLT
IL,nom
TJ
Voltage on EN and DIAG_EN pins
Voltage on FLT pin
0
V
0
5
V
Nominal dc load current
0
4
A
Operating junction temperature range
–40
125
°C
6.4 Thermal Information
TPS27S100x
THERMAL METRIC(1)
PWP (HTSSOP)
RRK (QFN)
UNIT
14 PINS
41
16 PINS
42.7
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
RθJC(top)
RθJB
29.7
31.3
25.1
16.5
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
Copyright © 2017–2019, Texas Instruments Incorporated
TPS27S100
www.ti.com.cn
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
Thermal Information (continued)
TPS27S100x
THERMAL METRIC(1)
PWP (HTSSOP)
RRK (QFN)
16 PINS
0.4
UNIT
14 PINS
0.9
ψJT
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
ψJB
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
24.8
2.7
16.5
RθJC(bot)
4.6
Copyright © 2017–2019, Texas Instruments Incorporated
5
TPS27S100
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
www.ti.com.cn
MAX UNIT
6.5 Electrical Characteristics
5 V < VIN < 40 V; –40°C < TJ < 150°C unless otherwise specified
PARAMETER
TEST CONDITIONS
MIN
TYP
OPERATING VOLTAGE
VIN(nom)
VIN(uvr)
VIN(uvf)
V(uv,hys)
Nominal operating voltage
Undervoltage restart
4
3.5
3
40
4
V
V
V
V
VIN rises up
3.7
3.2
0.5
Undervoltage shutdown
VIN falls down
3.5
OPERATING CURRENT
VEN = 5 V, VDIAG_EN = 0 V, 5 V < VIN < 30 V, no
load; –40°C TJ < 125°C
I(op)
Nominal operating current
2.5
2.5
3.2
mA
VEN = 5 V, VDIAG_EN = 0 V, 5 V < VIN < 40 V, no
load; –40°C TJ < 150°C
I(op)
Nominal operating current
5
10
2
mA
mA
µA
I(op)
Nominal operating current
VEN = 5 V, VDIAG_EN = 0 V, 24-Ω load
VIN = 24 V, VEN = VDIAG_EN = VIMON = VILIM = VOUT
0 V, TJ = 25°C
=
I(off)
Standby mode current
I(off,diag)
t(off,deg)
Standby current with diagnostic enabled
Standby mode deglitch time(1)
Off-state output leakage current
VIN = 24 V, VEN = 0 V, VDIAG_EN = 5 V
1.2
mA
ms
µA
EN from high to low, if deglitch time > t(off,deg), the
device enters into standby mode.
2
Ilkg(out)
VIN = 24 V, VEN = VOUT = 0, TJ = 25°C
0.5
POWER STAGE
VIN > 5 V, TJ = 25°C
VIN > 5 V, TJ = 150°C
VIN = 3.5 V, TJ = 25°C
80
100
166
120
mΩ
mΩ
mΩ
rDS(on)
On-state resistance
Internal current limit
Internal current limit value, ILIM pin connected to
GND
IILIM(int)
7
13
A
A
Internal current limit value under thermal shutdown
5
External current limit value under thermal shutdown
as a percentage of the external current limit setting
value
IILIM(TSD)
Current limit during thermal shutdown
Drain-to-source internal clamp voltage
50
%
V
VDS(clamp)
50
70
OUTPUT DIODE CHARACTERISTICS
VF
Drain-to-source diode voltage
VEN = 0, IOUT = −0.2 A
0.7
2
V
A
Continuous reverse current from source to t < 60 s, VEN = 0, TJ = 25°C. Short-to-supply
drain
I(R1)
condition.
t < 60 s, VEN = 0, TJ = 25°C. With GND network, 1-
kΩ resistor in parallel with A diode. Reverse-polarity
condition.
Continuous reverse current from source to
drain
I(R2)
3
A
LOGIC INPUT (EN AND DIAG_EN)
VIH
Logic high-level voltage
Logic low-level voltage
EN pulldown resistor
2
V
V
VIL
0.8
R(EN,pd)
R(DIAG,pd)
500
150
kΩ
kΩ
DIAG_EN pulldown resistor
(1) Value is specified by design, not subject to production test.
6
Copyright © 2017–2019, Texas Instruments Incorporated
TPS27S100
www.ti.com.cn
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
Electrical Characteristics (continued)
5 V < VIN < 40 V; –40°C < TJ < 150°C unless otherwise specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
DIAGNOSTICS
VEN = 0 V, When VIN – VOUT < V(ol,off), duration
longer than td(ol,off). Open load detected.
V(ol,off)
Open-load detection threshold in off-state
1.4
1.8
2.6
V
Off-state output sink current with open
load
I(ol,off)
VEN = 0 V, VIN = VOUT = 24 V, TJ = 125°C.
–150
µA
µs
Open-load detection-threshold deglitch
time in off state
VEN = 0 V, When VIN – VOUT < Vol,off, duration longer
than tol,off. Open load detected.
td(ol,off)
600
6
VEN = 5 V, when IOUT < I(ol,on), duration longer than
td(ol,on). Open load detected.
I(ol,on)
Open-load detection threshold in on state
2
10
mA
Version A only
Open-load detection-threshold deglitch
time in on-state
VEN = 5 V, when IOUT < I(ol,on), duration longer than
td(ol,on). Open load detected.
td(ol,on)
700
µs
V(FLT)
T(SD)
Fault low output voltage
IFLT = 2 mA
0.4
V
Thermal shutdown threshold
Thermal shutdown status reset
Thermal swing shutdown threshold
175
155
60
°C
°C
°C
T(SD,rst)
T(SW)
Hysteresis for resetting the thermal
shutdown and swing
T(hys)
10
°C
CURRENT MONITOR AND CURRENT LIMIT
K(IMON)
K(ILIM)
Current sense current ratio
Current limit current ratio
500
2000
I
I
I
I
I
I
I
I
I
load ≥ 5 mA
–80
–12
–8
80
12
8
load ≥ 25 mA
dK(IMON)/K(IMON) Current-monitor accuracy
load ≥ 50 mA
%
load ≥ 0.1 A
–5
5
load ≥ 1 A
–3
3
limit ≥ 0.5 A, 25°C < TJ < 150°C
limit ≥ 0.5 A, -40°C < TJ < 25°C
limit ≥ 1.6 A, 25°C < TJ < 150°C
limit ≥ 1.6 A, -40°C < TJ < 25°C
–20
–28
–15
–18
20
28
15
18
%
%
(3)
(3)
dK(ILIM)/K(ILIM)
External current-limit accuracy(2)
,
,
dK(ILIM)/K(ILIM)
External current-limit accuracy(2)
%
Current-monitor voltage linear voltage
range(1)
VIMON(lin)
IOUT(lin)
VIN ≥ 5 V
0
4
V
A
Current-monitor voltage linear current
range(1)
VIN ≥ 5 V, VIMON(lin) ≤ 4 V
VIN ≥ 7 V, fault mode
0
4
4.9
4.9
4.3
4.75
VIMON(H)
IMON pin voltage in Fault mode
V
Min(VIN
–
VIN ≥ 5 V, fault mode
0.8, 4.3)
IIMON(H)
IMON pin current in Fault mode
Current limit internal threshold voltage(1)
VIMON = 4.3 V, VIN > 7 V, fault mode
10
mA
V
VIMON(th)
1.233
(2) External current limit set is recommended to be higher than 500 mA.
(3) External current limit accuracy is only applicable to overload conditions greater than 1.5 x the current limit setting.
Copyright © 2017–2019, Texas Instruments Incorporated
7
TPS27S100
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
www.ti.com.cn
MAX UNIT
6.6 Timing Requirements – Current Monitor Characteristics(1)
MIN
NOM
IMON settling time from
DIAG_EN disabled
tIMON(off1)
tIMON(on1)
VEN = 5 V, Iload ≥ 5 mA. VDIAG_EN from 5 to 0 V. IMON to 10% of sense value.
VEN = 5 V, Iload ≥ 5 mA. VDIAG_EN from 0 to 5 V. IMON to 90% of sense value.
10
10
µs
µs
IMON settling time from
DIAG_EN enabled
VDIAG_EN = 5 V, Iload ≥ 5 mA. EN from 5 to 0 V. IMON to 10% of sense value.
VDIAG_EN = 5 V, Iload ≥ 5 mA. EN from 5 to 0 V. Current limit triggered.
10
µs
µs
IMON settling time from
EN falling edge
tIMON(off2)
180
IMON settling time from VIN = 24 V, VDIAG_EN = 5 V, Iload ≥ 100 mA. VEN from 0 to 5 V. IMON to 90%
EN rising edge of sense value.
tIMON(on2)
150
µs
(1) Value specified by design, not subject to production test.
8
Copyright © 2017–2019, Texas Instruments Incorporated
TPS27S100
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ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
6.7 Switching Characteristics
VIN = 24 V, Rload = 24 Ω, over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER
Turn-on delay time
Turn-off delay time
Slew rate on
TEST CONDITIONS
EN rising edge to VOUT = 10%, DIAG_EN high
EN falling edge to VOUT = 90%, DIAG_EN high
VOUT = 10% to 90%, DIAG_EN high
MIN
20
TYP
MAX
50
UNIT
µs
td(on)
td(off)
40
80
µs
dV/dt(on)
dV/dt(off)
0.1
0.1
0.5
0.5
V/µs
V/µs
Slew rate off
VOUT = 90% to 10%, DIAG_EN high
(1) Value specified by design, not subject to production test.
Figure 1. Pin Current and Voltage Conventions
VEN
90%
90%
dV/dt(off)
10%
dV/dt(on)
VOUT
10%
td(on)
td(off)
Figure 2. Output Delay Characteristics
Copyright © 2017–2019, Texas Instruments Incorporated
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TPS27S100
ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
www.ti.com.cn
VEN
IOUT
VDIAG_EN
VIMON
tIMON(on2) tIMON(off1)
tIMON(on1)
tIMON(off2)
Figure 3. Current sense Delay Characteristics
Open
Load
Open Load
EN
VIMON(H)
IMON
FLT
td(ol,off)
td(ol,on)
td(ol,off)
Figure 4. Open Load Blanking Time Characteristics
10
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TPS27S100
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ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
6.8 Typical Characteristics
All the below data are based on the mean value of the three lots samples, VIN = 24 V if not specified.
10
8
4
3.8
3.6
3.4
3.2
3
Inom (no load)
Inom (24-O load)
Vs,uvr
Vs,uvf
6
4
2
0
-40
-15
10
35
60
85
110 125
-40
-15
10
35 60
Temperature (°C)
85
110 125
Temperature (èC)
D002
D001
图 6. Inom With No Load and 24-Ω Load
图 5. IN Pin Undervoltage Rising and Falling Thresholds
VIN,UVR and VIN,UVF
1.2
1.8
1.6
1.4
1.2
1
Vlogic,h
Vlogic,l
1
0.8
0.6
0.4
0.2
0
0.8
0.6
-40
-15
10
35
60
85
110 125
-40
-15
10
35 60
Temperature (°C)
85
110 125
Temperature (èC)
D004
D005
图 7. Ioff,diag as a Function of Temperature
图 8. Vlogic,h and Vlogic,l
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Typical Characteristics (接下页)
All the below data are based on the mean value of the three lots samples, VIN = 24 V if not specified.
0.9
0.8
0.7
0.6
0.5
65
60
55
50
-40
-15
10
35
60
85
110 125
-40
-15
10
35 60
Temperature (°C)
85
110 125
Temperature (èC)
D006
D007
图 9. Drain-to-source Diode Voltage VF
图 10. VDS, Clamp
130
115
100
85
11
Rdson_3P5V
Rdson_5V
Rdson_13P5
Rdson_40V
10.5
10
9.5
70
55
9
-40
-15
10
35
60
85
110 125
-40
-15
10
35
60
85
110 125
Temperature (èC)
Temperature (èC)
D008
D009
图 11. FET RDSON
图 12. Current Limit Ilim,nom
70
65
60
55
50
45
40
35
30
25
20
0.44
0.42
0.4
0.38
0.36
0.34
0.32
0.3
TD_On
TD_Off
dV/dtON
dV/dtOFF
-40
-15
10
35
60
85
110 125
-40
-15
10
35
60
85
110 125
Temperature (èC)
Temperature (èC)
D010
D011
图 13. TDon and TDoff
图 14. dV/dtON and dV/dtOFF
12
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Typical Characteristics (接下页)
All the below data are based on the mean value of the three lots samples, VIN = 24 V if not specified.
1.95
9
8
7
6
5
1.9
1.85
1.8
1.75
1.7
-40
-15
10
35
60
85
110 125
-40
-15
10
35 60
Temperature (°C)
85
110 125
Temperature (èC)
D013
D014
图 15. Vol,off
图 16. Iol,on
10%
8%
20%
15%
10%
5%
6%
4%
2%
0
0
-2%
-4%
-6%
-8%
-10%
-5%
-10%
-15%
-20%
-40
-10
20
50
80
110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
Temperature (èC)
D017
D015
图 18. K(IMON) at IOUT = 25 mA, VIN = 24 V
图 17. K(IMON) at IOUT = 5 mA, VIN = 24 V
1.75%
1.5%
1.25%
1%
10%
8%
6%
4%
0.75%
0.5%
0.25%
0
2%
0
-2%
-4%
-6%
-8%
-10%
-0.25%
-0.5%
-0.75%
-40
-20
0
20
40
60
80
100 120 140
-40
-10
20 50
Temperature (°C)
80
110 125
Temperature (èC)
D019
D016
图 19. K(IMON) at IOUT = 50 mA, VIN = 24 V
图 20. K(IMON) at IOUT = 100 mA, VIN = 24 V
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Typical Characteristics (接下页)
All the below data are based on the mean value of the three lots samples, VIN = 24 V if not specified.
3%
2.5%
2%
10%
8%
6%
1.5%
1%
4%
2%
0.5%
0
0
-2%
-4%
-6%
-8%
-10%
-0.5%
-1%
-1.5%
-2%
-2.5%
-40
-10
20 50
Temperature (°C)
80
110 125
-40
-10
20
50
80
110 125
Temperature (èC)
D018
D020
图 21. K(IMON) at IOUT = 1 A, VIN = 24 V
图 22. K(ILIM) at IILIM = 0.5 A, VIN = 24 V
10%
8%
6%
4%
2%
0
-2%
-4%
-6%
-8%
-10%
-40
-10
20 50
Temperature (°C)
80
110 125
D021
图 23. K(ILIM) at IILIM = 1.6 A, VIN = 24 V
14
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7 Detailed Description
7.1 Overview
The TPS27S100x is a single-channel, fully-protected, high-side switch with an integrated NMOS and charge
pump. Full diagnostics and high-accuracy current-monitor features enable intelligent control of the load. An
adjustable current-limit function greatly improves the reliability of the whole system. The device diagnostic
reporting has two versions to support both digital fault status and analog current monitor output.
For TPS27S100A, the digital fault status report is implemented with an open-drain structure. For TPS27S100B,
high-accuracy current-monitor allows a better real-time monitoring effect and more-accurate diagnostics without
further calibration. A current mirror is used to source a fraction ( 1 / K(IMON)) of the load current. K(IMON) is a nearly
constant value across the temperature and supply voltage.
The external high-accuracy current limit allows setting the current limit value by application. Under start-up or
short-circuit conditions, it improves the reliability of the system significantly by clamping the inrush current
effectively. It can also save system costs by reducing PCB trace, connector size, and the preceding power-stage
capacity. An internal current limit is also implemented in this device. The lower value of the external or internal
current-limit value is applied.
An active drain to source voltage clamp is built in to address switching off the energy of inductive loads, such as
relays, solenoids, motors, and so forth. During switching-off cycle, both the energy of the power supply and the
inductive load are dissipated on the device itself. See Inductive-Load Switching-Off Clamp for more details.
The TPS27S100x device can be used as a high-side switch to drive a wide variety of resistive, inductive, and
capacitive loads.
7.2 Functional Block Diagram
IN
Internal LDO
Charge Pump
VDS Clamp
Internal Reference
EN
Gate Driver
DIAG_EN
Open Load
Detection
FLT
ILIM
Diagnostics
& Protection
Current Limit
Current Sense
OUT
Thermal Monitor
IMON
GND
7.3 Feature Description
7.3.1 Accurate Current Monitor
For TPS27S100B, the high-accuracy current-monitor function is internally implemented, which allows a better
real-time monitoring effect. A current mirror is used to source 1 / KIMON of the load current, flowing out to the
external resistor between the IMON and GND.
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Feature Description (接下页)
KIMON is the ratio of the output current and the sense current. It is a constant value across the temperature and
supply voltage range. Each part is factory calibrated during production test, so user-calibration is not required in
most cases.
IN
IOUT/
K(IMON)
IOUT
VIMON(H)
OUT
FAULT
IMON
RIMON
图 24. Current-monitor Block Diagram
When a fault occurs, the IMON pin also works as a fault report with a pullup voltage, VIMON(H)
.
VIMON
VIMON(H)
VIMON(lin)
Fault report
Normal Operating
IOUT
On-state: current limit, thermal fault
Off-state: open load/ short to supply
On-state: open load/ short to supply
图 25. IMON Output-Voltage Curve
Use Equation 1 to calculate RIMON. Also, please ensure VIMON is within the current-sense linear region VIMON(lin)
across the full range of the load current.
V
IMON ìK(IMON)
V
IMON
RIMON
=
=
IIMON
IOUT
(1)
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Feature Description (接下页)
7.3.2 Adjustable Current Limit
A high-accuracy current limit allows high reliability of the design. It protects the load and the power supply from
over-stressing during short-circuit-to-GND or power-up conditions. The current limit can also save system cost by
reducing the size of PCB traces and connectors, and the capacity of the preceding power stage.
When the current-limit threshold is hit, a closed loop activates immediately. The output current is clamped at the
set value, and a fault is reported out. The device heats up due to the high power dissipation on the power FET. If
thermal shutdown occurs, the current limit is set to IILIM(TSD) to reduce the power dissipation on the power FET.
The device has two current-limit thresholds.
Internal current limit – The internal current limit is fixed at IILM(int). Tie the ILIM pin directly to the device GND for
large-transient-current applications.
External adjustable current limit – An external resistor is used to set the current-limit threshold. Use Equation 2
below to calculate the RILIM. VILIM(th) is the internal band-gap voltage. K(ILIM) is the ratio of the output current and
the current-limit set value. It is constant across the temperature and supply voltage. The external adjustable
current limit allows the flexibility to set the current limit value by applications.
VIILM(th) ∂K(ILIM)
RILIM
=
IOUT
(2)
Note that if a GND network is used (which leads to the level shift between the device GND and board GND), the
ILIM pin must be connected with device GND.
IN
IOUT/
K(ILIM)
Internal Current Limit
-
+
+
-
IOUT
+
VILIM(th)
OUT
External Current Limit
-
+
VILIM(th)
ILIM
图 26. Current-Limit Block Diagram
For better protection from a hard short-to-GND condition (when the EN pin is enabled, a short to GND occurs
suddenly), the device implements a fast-trip protection to turn off the channel before the current-limit closed loop
is set up. The fast-trip response time is less than 1 μs, typically. With this fast response, the device can achieve
better inrush current-suppression performance.
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Feature Description (接下页)
7.3.3 Inductive-Load Switching-Off Clamp
When switching an inductive load off, the inductive reactance tends to pull the output voltage negative. Excessive
negative voltage could cause the power FET to break down. To protect the power FET, an internal clamp
between drain and source is implemented, namely VDS(clamp)
.
IN
VDS(clam
p)
-
L
OUT
R
GND
+
图 27. Drain-to-Source Clamping Structure
EN
VIN
VOUT
VDS(clamp)
IOUT
t(decay)
图 28. Inductive-Load Switching-Off Diagram
7.3.4 Full Protections and Diagnostics
表 1 is when DIAG_EN enabled. When DIAG_EN is low, all the diagnostics is disabled accordingly. The output is
in high-impedance mode. Refer to 表 2 for details.
表 1. Fault Table
FLT
(TPS27S100A)
IMON
(TPS27S100B)
CONDITIONS
IN
OUT
CRITERION
FAULT RECOVERY
L
H
H
L
H
L
H
H
L
0
Normal
In linear region
VIMON(H)
Short to GND
Current limit triggered.
AUTO
18
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Feature Description (接下页)
表 1. Fault Table (接下页)
FLT
(TPS27S100A)
IMON
(TPS27S100B)
CONDITIONS
IN
OUT
CRITERION
FAULT RECOVERY
TPS27S100A: IOUT< I(ol,on)
TPS27S100B: Judged by users
Open load(1)
Short to supply
H
L
H
H
L
L
Almost 0
AUTO
AUTO
VIN – VOUT < V(ol,off)
VIMON(H)
Recovery when TJ <
T(SD,rst)or when EN
toggles.
Thermal shutdown
Thermal swing
H
H
TSD triggered
L
L
VIMON(H)
VIMON(H)
TSW triggered
AUTO
(1) Need external pull-up resistor during off-state
表 2. DIAG_EN Logic Table
DIAG_EN
EN
ON
PROTECTIONS AND DIAGNOSTICS
See 表 1
See 表 1
HIGH
OFF
Diagnostics disabled, protection normal
IMON or FLT is high Impedance
ON
LOW
Diagnostics disabled, no protections
IMON or FLT is high impedance
OFF
7.3.4.1 Short-to-GND and Overload Detection
When the switch is on, a short to GND or overload condition causes overcurrent. If the overcurrent triggers either
the internal or external current-limit threshold, the fault condition is reported out. The microcontroller can handle
the overcurrent by turning off the switch. The device heats up if no actions are taken. If a thermal shutdown
occurs, the current limit is IILIM(TSD)to keep the power stressing on the power FET to a minimum. The device
automatically recovers when the fault condition is removed.
7.3.4.2 Open-Load Detection
When the channel is on, for TPS27S100A, if the current flowing through the output is less than I(ol,on), the device
recognizes an open-load fault. For TPS27S100B, if an open-load event occurs, it can be detected as an ultra-low
VIMON and handled by the microcontroller.
When the channel is off, if a load is connected, the output is pulled down to GND. But if an open load occurs, the
output voltage is close to the supply voltage (VIN – VOUT < V(ol,off)), and the fault is reported out.
There is always a leakage current I(ol,off) present on the output due to internal logic control path or external
humidity, corrosion, and so forth. Thus, TI recommends an external pullup resistor to offset the leakage current
when an open load is detected. The recommended pullup resistance is 15 kΩ.
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Open Load Detection in Off-State
V(ol,off)
Vds
R(pullup)
Load
图 29. Open-Load Detection Circuit in Off-State
7.3.4.3 Short-to-Supply Detection
Short-to-Supply has the same detection mechanism and behavior as open-load detection, in both the on-state
and off-state. See 表 1 for more details.
7.3.4.4 Thermal Fault Detection
To protect the device in severe power stressing cases, the device implements two types of thermal fault
detection, absolute temperature protection (thermal shutdown) and dynamic temperature protection (thermal
swing). Respective temperature sensors are integrated close to each power FET, so the thermal fault is reported
by each channel. This arrangement can help the device keep the cross-channel effect to a minimum when some
channels are in a thermal fault condition.
Thermal shutdown is active when the absolute temperature TJ > T(SD). When thermal shutdown occurs, the
respective output turns off.
Thermal swing activates when the power FET temperature is increasing sharply, that is, when ΔT = T(FET)
–
T(Logic) > T(sw), then the output turns off. The output automatically recovers and the fault signal clears when ΔT =
T(FET) – T(Logic) < T(sw) – T(hys). Thermal swing function improves the device reliability when subjected to repetitive
fast thermal variation.
20
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Thermal behaviors after Short to GND
EN
TJ
T(SD)
T(hys)
T(SD,rst)
T(hys)
T(SW)
IILIM
IILIM(TSD)
IOUT
VILM
VILM(H)
FLT
图 30. Thermal Behavior Diagram
7.3.4.5 UVLO Protection
The device monitors the supply voltage VIN, to prevent unpredicted behaviors when VIN is too low. When VIN falls
down to VIN(uvf), the device shuts down. When VIN rises up to VIN(uvr), the device turns on.
7.3.4.6 Loss of GND Protection
When loss of GND occurs, output is shut down regardless of whether the EN pin is high or low. The device can
protect against two ground-loss conditions, loss of device GND and loss of module GND.
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7.3.4.7 Reverse Current Protection
Reverse current occurs in two conditions: short to supply and reverse polarity.
● When a short to the supply occurs, there is only reverse current through the body diode. IR(1) specifies the limit
of the reverse current.
● In a reverse-polarity condition, there are reverse currents through the body diode and the device GND pin. IR(2)
specifies the limit of the reverse current.
To protect the device, TI recommends two types of external circuitry.
● Adding a blocking diode. Both the IC and load are protected when in reverse polarity.
Load
图 31. Reverse-Current External Protection, Method 1
● Adding a GND network. The reverse current through the device GND is blocked. The reverse current through
the FET is limited by the load itself. TI recommends a resistor in parallel with the diode as a GND network. The
recommended selection are 1-kΩ resistor in parallel with an >100-mA diode. The reverse current protection diode
in the GND network forward voltage should be less than 0.6 V in any circumstances. In addition a minimum
resistance of 4.7 K is recommended on the I/O pins.
22
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Load
图 32. Reverse-Current External Protection, Method 2
7.3.4.8 Protection for MCU I/Os
TI recommends serial resistors to protect the microcontroller, for example, 4.7-kΩ when using a 3.3-V
microcontroller and 10-kΩ for a 5-V microcontroller.
IOs
MCU
High Side Switch
Load
图 33. MCU I/O External Protection
7.4 Device Functional Modes
7.4.1 Working Mode
The device has three working modes: the normal mode, the standby mode, and the standby mode with
diagnostics.
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Device Functional Modes (接下页)
Standby Mode
(EN low, DIAG_EN low)
DIAG_EN low
AND
EN high to low
AND
t > t(off,deg)
DIAG_EN high to low
EN low to high
DIAG_EN low to high
Standby Mode
With DIAG
(EN low, DIAG_EN high)
EN low to high
Normal Mode
(EN high)
EN high to low
AND
DIAG_EN high
AND
t > t(off,deg)
图 34. Working Modes
24
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The device is capable of driving a wide variety of resistive, inductive, and capacitive loads. Full diagnostics and
high accuracy current-monitor features enable intelligent control of the load. An external adjustable current limit
improves the reliability of the whole system by clamping the inrush or overload current.
8.2 Typical Application
图 35 shows an example of how to design the external circuitry parameters.
3.5 V to 40 V
Supply Voltage
CVIN1
CVIN2
D_TVS
IN
RSER
EN
RSER
General Resistive,
Capacitive, Inductive
Loads
DIAG_EN
OUT
CVOUT
3.3 / 5 V
Rpullup
MCU
RSER
FLT (TPS27S100A)
IMON (TPS27S100B)
RIMON
GND
ILIM
GND
RILIM
GND
图 35. Typical Application Circuitry
表 3. Recommended External Components
COMPONENT
RSER
TYPICAL VALUE
15 kΩ
PURPOSE
Protect microcontroller and device I/O pins
RIMON
1 kΩ
Translate the sense current into sense voltage
Low-pass filter for the ADC input
Set current limit threshold
CSNS
100 pF - 10 nF
0.82 kΩ
RILIM
4.7 nF to Device GND
Filtering of high frequency noise
CVIN1/2
Stabilize the input supply and voltage spike suppression for surge transient
immunity.
220 nF to Module GND
COUT
DTVS
22 nF
Immunity to ESD
36V TVS diode
Transient voltage clamp for surge transient immunity
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8.2.1 Design Requirements
•
•
•
•
•
VIN range from 9 V to 30 V
Nominal current of 2 A
Current Monitor for fault monitoring
Expected current limit value of 5 A
Full diagnostics with 5-V MCU
8.2.2 Detailed Design Procedure
To keep the 2-A nominal current in the 0 to 4-V current-sense range, calculate the RIMON resistor using Equation
3. To achieve better current-sense accuracy, a 1% tolerance or better resistor is preferred.
VIMON ì K(IMON)
IOUT
4 ì 500
R IMON
=
=
= 1000 ꢀ
2
(3)
(4)
To set the adjustable current limit value at 5-A, calculate RILIM using Equation 4.
VLIM(th) ∂ K(ILIM)
1.233 ∂ 2000
R ILIM
=
=
= 493.2 ꢀ
IOUT
5
TI recommends RSER = 10 kΩ for 5-V MCU, and Rpullup = 10 kΩ as the pull-up resistor.
8.2.3 Application Curves
图 36 shows a an example of initial inrush or short-circuit current limit. Test conditions: EN is from low to high,
load is resistive short-to-GND or with a 470-µF capacitive load, external current limit is 2 A. CH1 is the output
current. CH3 is the EN step.
图 37 shows an example of current limit during hard short-circuit. Test conditions: EN is high, load is (5 µH + 100
mΩ), external current limit is 1 A. A short to GND suddenly happens.
图 37. Hard Short-to-GND Waveform
图 36. Initial Short-to-GND Waveform
26
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9 Power Supply Recommendations
The device is qualified for both 12-V and 24-V applications. The typical power input is a 12-V or 24-V industrial
power supply.
10 Layout
10.1 Layout Guidelines
To prevent thermal shutdown, TJ must be less than 150°C. If the output current is very high, the power
dissipation may be large. The HTSSOP package has good thermal impedance. However, the PCB layout is very
important. Good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability
of the device.
•
Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat-
flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely
important when there are not any heat sinks attached to the PCB on the other side of the board opposite the
package.
•
•
Add as many thermal vias as possible directly under the package ground pad to optimize the thermal
conductivity of the board.
All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent
solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.
10.2 Layout Example
10.2.1 Without a GND Network
Without a GND network, tie the thermal pad directly to the board GND copper for better thermal performance.
14
13
FLT/IMON
NC
1
2
3
4
5
6
7
ILIM
GND
DIAG_EN
12
11
EN
NC
Thermal
Pad
NC
IN
10
OUT
OUT
OUT
IN
9
8
IN
图 38. Layout Without a GND Network
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Layout Example (接下页)
10.2.2 With a GND Network
With a GND network, tie the thermal pad with a single trace through the GND network to the board GND copper.
GND Network
14
13
NC
GND
1
2
3
4
5
6
7
FLT/IMON
ILIM
12
11
EN
NC
DIAG_EN
Thermal
Pad
NC
IN
10
OUT
OUT
OUT
IN
9
8
IN
图 39. Layout With a GND Network
28
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ZHCSHQ0B –OCTOBER 2017–REVISED SEPTEMBER 2019
11 器件和文档支持
11.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.2 社区资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.3 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2017–2019, Texas Instruments Incorporated
29
PACKAGE OPTION ADDENDUM
www.ti.com
7-Apr-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS27S100APWPR
TPS27S100APWPT
TPS27S100ARRKR
TPS27S100ARRKT
TPS27S100BPWPR
TPS27S100BPWPT
TPS27S100BRRKR
TPS27S100BRRKT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
HTSSOP
HTSSOP
WQFN
PWP
PWP
RRK
RRK
PWP
PWP
RRK
RRK
14
14
16
16
14
14
16
16
2000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
2000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-3-260C-168 HR
Level-3-260C-168 HR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-3-260C-168 HR
Level-3-260C-168 HR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
27S1A
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
27S1A
27S100A
27S100A
27S1B
WQFN
HTSSOP
HTSSOP
WQFN
27S1B
27S100B
27S100B
WQFN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Apr-2023
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS27S100APWPR
TPS27S100ARRKR
TPS27S100ARRKT
TPS27S100BRRKR
TPS27S100BRRKT
HTSSOP PWP
14
16
16
16
16
2000
3000
250
330.0
330.0
180.0
330.0
180.0
12.4
12.4
12.4
12.4
12.4
6.9
3.8
3.8
3.8
3.8
5.6
4.3
4.3
4.3
4.3
1.6
1.5
1.5
1.5
1.5
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
WQFN
WQFN
WQFN
WQFN
RRK
RRK
RRK
RRK
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS27S100APWPR
TPS27S100ARRKR
TPS27S100ARRKT
TPS27S100BRRKR
TPS27S100BRRKT
HTSSOP
WQFN
WQFN
WQFN
WQFN
PWP
RRK
RRK
RRK
RRK
14
16
16
16
16
2000
3000
250
350.0
367.0
210.0
367.0
210.0
350.0
367.0
185.0
367.0
185.0
43.0
35.0
35.0
35.0
35.0
3000
250
Pack Materials-Page 2
PACKAGE OUTLINE
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK- NO LEAD
RRK0016A
3.65
3.35
A
B
4.15
3.85
PIN 1 INDEX AREA
C
0.8
0.7
SEATING PLANE
0.05
0.00
0.08 C
2.05±0.1
2X 1.5
(0.1) TYP
8
9
(0.2)MIN
10X 0.5
2X 2.5
7
10
PKG
2.55±0.1
17
0.29
0.19
2
15
16X
0.1
0.05
C A B
C
1
PIN 1 ID
(OPTIONAL)
16
PKG
0.5
0.3
16X
4424663 / B 03/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
WQFN - 0.8 mm max height
RRK0016A
PLASTIC QUAD FLATPACK- NO LEAD
(2.05)
2X(1.5)
1
16
16X (0.6)
PKG
15
2
16X (0.24)
10X (0.5)
(1.025)
PKG
(2.55)
(3.8)
17
(Ø0.2) VIA
(TYP)
7
10
(R0.05) TYP
9
8
(0.775)
(3.3)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 20X
SOLDER MASK
OPENING
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
NON- SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4424663 / B 03/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
WQFN - 0.8 mm max height
RRK0016A
PLASTIC QUAD FLATPACK- NO LEAD
2X(1.5)
0.56
(R0.05) TYP
1
16
16X (0.6)
2
15
16X (0.24)
10X (0.5)
(0.67)
PKG
(3.8)
17
4X(1.13)
7
10
PKG
EXPOSED METAL
8
9
4X(0.92)
(3.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
PADS 80%
SCALE: 20X
4424663 / B 03/2020
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations..
www.ti.com
GENERIC PACKAGE VIEW
PWP 14
4.4 x 5.0, 0.65 mm pitch
PowerPAD TSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224995/A
www.ti.com
PACKAGE OUTLINE
PWP0014K
PowerPADTM TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX
AREA
SEATING
PLANE
12X 0.65
14
1
2X
5.1
4.9
3.9
NOTE 3
7
8
0.30
14X
0.19
4.5
4.3
B
0.1
C A B
SEE DETAIL A
(0.15) TYP
2X (0.6)
NOTE 5
2X (0.4)
NOTE 5
THERMAL
PAD
7
8
0.25
1.2 MAX
GAGE PLANE
2.59
1.89
15
0.15
0.05
0.75
0.50
0 -8
A
20
1
14
DETAIL A
TYPICAL
2.6
1.9
4229706/A 06/2023
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
PWP0014K
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(3.4)
NOTE 9
(2.6)
METAL COVERED
BY SOLDER MASK
SYMM
14X (1.5)
(1.2) TYP
14
14X (0.45)
1
(5)
NOTE 9
(R0.05) TYP
SYMM
(0.6)
15
(2.59)
12X (0.65)
7
8
(
0.2) TYP
VIA
SEE DETAILS
(1.1) TYP
SOLDER MASK
DEFINED PAD
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 12X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
SOLDER MASK DETAILS
4229706/A 06/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
10. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged
or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0014K
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(2.6)
BASED ON
0.125 THICK
STENCIL
METAL COVERED
BY SOLDER MASK
14X (1.5)
14X (0.45)
14
1
(R0.05) TYP
(2.59)
SYMM
15
BASED ON
0.125 THICK
STENCIL
12X (0.65)
7
8
SYMM
(5.8)
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 12X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
2.91 X 2.90
2.60 X 2.59 (SHOWN)
2.37 X 2.36
0.125
0.15
0.175
2.20 X 2.19
4229706/A 06/2023
NOTES: (continued)
11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
12. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
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TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
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