TPS3306-25DGKR [TI]

具有电源故障监视功能和看门狗计时器的双处理器电压监控器 | DGK | 8 | -40 to 85;
TPS3306-25DGKR
型号: TPS3306-25DGKR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有电源故障监视功能和看门狗计时器的双处理器电压监控器 | DGK | 8 | -40 to 85

监控 光电二极管
文件: 总13页 (文件大小:270K)
中文:  中文翻译
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TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
DUAL PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL  
FEATURES  
APPLICATIONS  
Multivoltage DSPs and Processors  
Dual Supervisory Circuits With Power-Fail for  
DSP and Processor-Based Systems  
Portable Battery-Powered Equipment  
Embedded Control Systems  
Intelligent Instruments  
Voltage Monitor for Power-Fail or Low-Battery  
Warning  
Automotive Systems  
Watchdog Timer With 0.8 Second Time-Out  
Power-On Reset Generator With Integrated  
100 ms Delay Time  
D OR DGK PACKAGE  
(TOP VIEW)  
Open-Drain Reset and Power-Fail Output  
Supply Current of 15 µA (Typ.)  
SENSE1  
SENSE2  
PFI  
V
DD  
1
2
3
4
8
7
6
5
WDI  
PFO  
Supply Voltage Range . . . 2.7 V to 6 V  
Defined RESET Output From VDD 1.1 V  
MSOP-8 and SO-8 Packages  
GND  
RESET  
Temperature Range . . . - 40°C to 85°C  
DESCRIPTION  
The TPS3306 family is a series of supervisory circuits designed for circuit initialization which require two supply  
voltages, primarily in DSP and processor-based systems.  
The product spectrum of the TPS3306-xx is designed for monitoring two independent supply voltages of  
3.3 V/1.5 V, 3.3 V/1.8 V, 3.3 V/2 V, 3.3 V/2.5 V, or 3.3 V/5 V.  
TYPICAL OPERATING CIRCUIT  
3.3 V  
1.5 V  
AV  
DD  
CV  
TPS3306–15  
SENSE1  
DD  
DD  
R3 R4  
V
DD  
DV  
R1  
1%  
SENSE2  
PFI  
WDI  
PFO  
B_XF  
TMS320  
VC5441  
A_XF  
R2  
1%  
RESET  
GND  
RESET  
V
V
SS  
SSA  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2000–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
The various supervisory circuits are designed to monitor the nominal supply voltage, as shown in the following  
supply voltage monitoring table.  
SUPPLY VOLTAGE MONITORING  
NOMINAL SUPERVISED VOLTAGE  
THRESHOLD VOLTAGE (typ)  
SENSE1 SENSE2  
DEVICE  
SENSE1  
3.3 V  
3.3 V  
3.3 V  
3.3 V  
5 V  
SENSE2  
1.5 V  
1.8 V  
2 V  
TPS3306-15  
TPS3306-18  
TPS3306-20  
TPS3306-25  
TPS3306-33  
2.93 V  
2.93 V  
2.93 V  
2.93 V  
4.55 V  
1.4 V  
1.68 V  
1.85 V  
2.25 V  
2.93 V  
2.5 V  
3.3 V  
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the  
supervisory circuits monitor the SENSEn inputs and keep RESET active as long as SENSEn remains below the  
threshold voltage VIT.  
An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system  
reset. The delay time, td(typ) = 100 ms, starts after SENSE1 and SENSE2 inputs have risen above the threshold  
voltage VIT. When the voltage at SENSE1 or SENSE2 input drops below the threshold voltage VIT, the output  
becomes active (low) again.  
The integrated power-fail (PFI) comparator with separate open-drain (PFO) output can be used for low-battery  
detection, power-fail warning, or for monitoring a power supply other than the main supply.  
The TPS3306-xx devices integrate a watchdog timer that is periodically triggered by a positive or negative  
transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval,  
tt(out) = 0.50 s, RESET becomes active for the time period td. This event also reinitializes the watchdog timer.  
Leaving WDI unconnected disables the watchdog.  
The TPS3306-xx devices are available in either 8-pin MSOP or standard 8-pin SO packages, and are  
characterized for operation over a temperature range of -40°C to 85°C.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
SMALL OUTLINE (D)  
MARKING  
DGK PACKAGE  
TA  
µ-SMALL OUTLINE (DGK)  
TPS3306-15DGK  
TPS3306-18DGK  
TPS3306-20DGK  
TPS3306-25DGK  
TPS3306-33DGK  
TPS3306-15D  
TPS3306-18D  
TPS3306-20D  
TPS3306-25D  
TPS3306-33D  
TIAIC  
TIAID  
TIAIE  
TIAIF  
TIAIG  
-40°C to 85°C  
2
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
FUNCTION/TRUTH TABLES  
SENSE1 > VIT1  
SENSE2 > VIT2  
RESET  
0
0
1
1
0
1
0
1
L
L
L
H
FUNCTION/TRUTH TABLES  
PFI > VIT  
0"1  
PFO  
L"H  
H"L  
TYPICAL DELAY  
0.5 µs  
1"0  
0.5 µs  
FUNCTIONAL BLOCK DIAGRAM  
TPS3306  
SENSE 1  
SENSE 2  
R1  
R2  
V
DD  
+
_
RESET  
RESET  
R3  
Logic + Timer  
+
_
R4  
GND  
Reference  
Voltage  
of 1.25 V  
Oscillator  
PFO  
_
+
PFI  
Watchdog  
Logic + Timer  
Transition  
Detection  
WDI  
40 k  
3
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
TIMING DIAGRAM  
SENSEn  
V
(nom)  
V
IT  
1.1 V  
t
WDI  
1
t
t(out)  
0
t
t
RESET  
1
Undefined  
Behavior  
Undefined  
Behavior  
0
t
d
t
d
t
d
RESET Because of  
Power-Down  
RESET Because of WDI  
RESET Because of a Power Drop Below V  
IT–  
RESET Because of Power-Up  
Terminal Functions  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
GND  
NO.  
4
I
I
Ground  
PFI  
3
Power-fail comparator input  
Power-fail comparator output, open-drain  
Active-low reset output, open-drain  
Sense voltage input 1  
PFO  
6
O
O
I
RESET  
SENSE1  
SENSE2  
WDI  
5
1
2
I
Sense voltage input 2  
7
I
Watchdog timer input  
VDD  
8
I
Supply voltage  
DETAILED DESCRIPTION  
Watchdog  
In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also  
important to ensure correct program execution. The task of a watchdog is to ensure that the program is not  
stalled in an indefinite loop. The microprocessor, microcontroller, or DSP has to typically toggle the watchdog  
input within 0.8 s to avoid a time out occurring. Either a low-to-high or a high-to-low transition resets the internal  
watchdog timer. If the input is unconnected or tied with a high impedance driver, the watchdog is disabled and  
will be retriggered internally.  
4
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
DETAILED DESCRIPTION (continued)  
Saving Current While Using the Watchdog  
The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily  
pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum overall power  
consumption), leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once within  
7/8 of the watchdog time-out period to reset the watchdog timer. If instead WDI is externally driven high for the  
majority of the time-out period, a current of 5 V/40 k9 125 µA can flow into WDI.  
V
DD  
V
IT  
t
t
t
WDI  
t
(tout)  
RESET  
t
d
t
d
Figure 1. Watchdog Timing  
Power-Fail Comparator (PFI and PFO)  
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The  
power-fail-input (PFI) will be compared with an internal voltage reference of 1.25 V. If the input voltage falls  
below the power-fail threshold (VPFI) of typ. 1.25 V, the power-fail output (PFO) goes low. If it goes above 1.25 V  
plus about 10 mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to  
supervise any voltages above 1.25 V. The sum of both resistors should be about 1 M, to minimize power  
consumption and also to assure that the current in the PFI pin can be neglected compared with the current  
through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure  
minimal variation of sensed voltage. If the power-fail comparator is unused, connect PFI to ground and leave  
PFO unconnected.  
V
(SENSE)  
R1  
1%  
V
CC  
PFI  
PFO  
TPS3306  
GND  
R2  
1%  
R + R  
1
2
V
= 1.25 V ×  
PFI,trip  
R
2
5
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
ABSOLUTE MAXIMUM RATINGS  
over operating free-air temperature range (unless otherwise noted)(1)  
UNIT  
7 V  
(2)  
Supply voltage, VDD (see  
)
(2)  
All other pins (see  
)
-0.3 V to 7 V  
5 mA  
Maximum low output current, IOL  
Maximum high output current, IOH  
Input clamp current, IIK (VI < 0 or VI > VDD  
- 5 mA  
)
±20 mA  
±20 mA  
Output clamp current, IOK (VO < 0 or VO > VDD  
Continuous total power dissipation  
Operating free-air temperature range, TA  
Storage temperature range, Tstg  
Soldering temperature  
)
See Dissipation Rating Table  
-40°C to 85°C  
-65°C to 150°C  
260°C  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to GND. For reliable operation, the device must not be operated at 7 V for more than t = 1000 h  
continuously.  
DISSIPATION RATING TABLE  
T
A 25°C  
DERATING FACTOR  
ABOVE TA = 25°C  
TA = 70°C  
POWER RATING  
TA = 85°C  
POWER RATING  
PACKAGE  
POWER RATING  
DGK  
D
424 mW  
3.4 mW/°C  
5.8 mW/°C  
271 mW  
464 mW  
220 mW  
377 mW  
725 mW  
RECOMMENDED OPERATING CONDITIONS  
at specified temperature range  
MIN  
MAX  
UNIT  
Supply voltage, VDD  
2.7  
6
V
V
Input voltage at WDI and PFI, VI  
Input voltage at SENSE1 and SENSE2, VI  
High-level input voltage at WDI, VIH  
Low-level input voltage at WDI, VIL  
Operating free-air temperature range, TA  
0
0
VDD + 0.3  
(VDD + 0.3)VIT/1.25 V  
V
0.7 x VDD  
V
0.3 × VDD  
V
-40  
85  
°C  
6
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
ELECTRICAL CHARACTERISTICS  
over recommended operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
VDD = 2.7 V to 6 V, IOL = 20 µA  
VDD = 3.3 V, IOL= 2 mA  
MIN  
TYP  
MAX  
0.2  
UNIT  
V
RESET,  
PFO  
VOL  
Low-level output voltage  
0.4  
0.4  
VDD = 6 V, IOL = 3 mA  
(1)  
Power-up reset voltage (see  
)
V
DD 1.1 V, IOL = 20 µA  
0.4  
V
1.37  
1.64  
1.81  
2.20  
2.86  
4.46  
1.22  
1.37  
1.64  
1.81  
2.20  
2.86  
4.46  
1.22  
1.40  
1.43  
1.72  
1.89  
2.30  
3
1.68  
1.85  
2.25  
2.93  
4.55  
1.25  
1.40  
1.68  
1.85  
2.25  
2.93  
4.55  
1.25  
10  
VSENSE1  
VSENSE2  
,
VDD = 2.7 V to 6 V  
TA = 0°C to 85°C  
V
4.64  
1.28  
1.44  
1.73  
1.90  
2.32  
3.02  
4.67  
1.29  
PFI  
Negative-going input threshold voltage  
VIT  
(2)  
(see  
)
VSENSE1  
,
VDD = 2.7 V to 6 V  
TA = -40°C to 85°C  
VSENSE2  
V
PFI  
PFI  
VIT = 1.25 V  
VIT = 1.40 V  
VIT = 1.68 V  
VIT = 1.86 V  
VIT = 2.25 V  
VIT = 2.93 V  
VIT = 4.55 V  
15  
15  
Vhys  
Hysteresis  
20  
mV  
VSENSEn  
20  
30  
40  
WDI = VDD = 6 V, Time average  
(dc = 88%)  
IH(AV) Average high-level input current  
100  
-15  
150  
-20  
WDI  
WDI  
µA  
µA  
WDI = 0 V, VDD = 6 V, Time  
average (dc = 12%)  
IL(AV)  
Average low-level input current  
High-level input current  
WDI = VDD = 6 V  
120  
5
170  
8
IH  
SENSE1  
SENSE2  
WDI  
VSENSE1 = VDD = 6 V  
VSENSE2 = VDD = 6 V  
WDI = 0 V, VDD, = 6 V  
VDD = 6 V, 0 V VI VDD  
6
9
IL  
Low-level input current  
Input current  
-120  
-170  
25  
40  
µA  
nA  
µA  
pF  
II  
PFI  
-25  
IDD  
Ci  
Supply current  
15  
10  
Input capacitance  
VI = 0 V to VDD  
(1) The lowest supply voltage at which RESET becomes active. tr, VDD 15 µs/V.  
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1 µF) should be placed close to the supply terminals.  
7
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
TIMING REQUIREMENTS  
at VDD = 2.7 V to 6 V, RL= 1 M, CL= 50 pF, TA= 25°C  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SENSEn  
WDI  
VSENSEnL = VIT - 0.2 V, VSENSEnH = VIT + 0.2 V  
6
µs  
ns  
tw  
Pulse width  
VIH = 0.7 × VDD, VIL= 0.3 × VDD  
100  
SWITCHING CHARACTERISTICS  
at VDD = 2.7 V to 6 V, RL= 1 M, CL = 50 pF, TA= 25°C  
PARAMETER  
TEST CONDITIONS  
I(SENSEn) VIT + 0.2 V,  
See timing diagram  
I(SENSEn) VIT + 0.2 V,  
MIN  
TYP  
0.8  
MAX  
1.2  
UNIT  
V
tt(out)  
td  
Watchdog time out  
Delay time  
0.5  
s
V
70  
100  
1
140  
5
ms  
µs  
See timing diagram  
Propagation (delay) time,  
high-to-low level output  
tPHL  
tPHL  
tPLH  
SENSEn to RESET  
PFI to PFO  
VIH = VIT + 0.2 V, VIL = VIT - 0.2 V  
Propagation (delay) time,  
high-to-low level output  
0.5  
1
µs  
Propagation (delay) time,  
low-to-high level output  
8
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
TYPICAL CHARACTERISTICS  
NORMALIZED SENSE THRESHOLD VOLTAGE  
SUPPLY CURRENT  
vs  
SUPPLY VOLTAGE  
vs  
FREE-AIR TEMPERATURE AT VDD  
18  
16  
14  
12  
10  
8
1.005  
1.004  
1.003  
1.002  
1.001  
1
V
DD  
= 6 V  
TPS3306−33  
6
4
2
0.999  
0.998  
0.997  
0
−2  
−4  
SENSEn = V  
DD  
−6  
T = 25°C  
A
0.996  
0.995  
−8  
−10  
−0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7  
−40  
−15  
10  
35  
60  
85  
V − Supply Voltage − V  
DD  
T
A
− Free-Air Temperature − °C  
Figure 2.  
Figure 3.  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
2.8  
2.4  
2
6.5  
6
V
DD  
= 2.7 V  
V
DD  
= 6 V  
5.5  
5
4.5  
4
1.6  
1.2  
0.8  
0.4  
0
3.5  
3
85°C  
85°C  
2.5  
2
−40°C  
1.5  
1
−40°C  
0.5  
0
0
5
10 15 20 25 30 35 40 45 50 55 60  
0
1
2
3
4
5
6
7
8
9 10 11 12 13  
I
− Low-Level Output Current − mA  
I
− Low-Level Output Current − mA  
OL  
OL  
Figure 4.  
Figure 5.  
9
TPS3306-15  
TPS3306-18, TPS3306-20  
TPS3306-25, TPS3306-33  
www.ti.com  
SLVS290AAPRIL 2000REVISED MAY 2004  
TYPICAL CHARACTERISTICS (continued)  
MINIMUM PULSE DURATION AT SENSE  
vs  
THRESHOLD OVERDRIVE  
10  
9
V
= 6 V  
DD  
8
7
6
5
4
3
2
1
0
0
100 200 300 400 500 600 700 800 900 1000  
SENSE − Threshold Overdrive − mV  
Figure 6.  
10  
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accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
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TPS3306-33DGK

DUAL PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL
TI

TPS3306-33DGKG4

Dual-Processor Supervisory Circuit with Power-Fail and Watchdog Timer 8-VSSOP -40 to 85
TI