TPS610981DSET [TI]
具有集成 LDO 的低输入电压、3.3V 输出电压、同步升压转换器 | DSE | 6 | -40 to 85;型号: | TPS610981DSET |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有集成 LDO 的低输入电压、3.3V 输出电压、同步升压转换器 | DSE | 6 | -40 to 85 升压转换器 光电二极管 |
文件: | 总44页 (文件大小:4006K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS61098, TPS610981, TPS610982, TPS610985, TPS610986, TPS610987
ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
TPS61098x 具有集成LDO/负载开关的超低静态电流同步升压转换器
物电池供电的产品提供超低功耗解决方案。该器件集成
了低压降线性稳压器 (LDO) 或者带有升压转换器的负
1 特性
载开关,并且提供有双输出电源轨。升压转换器输出
(MAIN) 用作主系统的电源并且始终开启,LDO 或负载
开关输出V(SUB) 则为外设供电。
• 低功耗模式下具有300nA 超低IQ
• 启动至负载(输入电压为0.7V)
• 工作输入电压范围为0.7V 至4.5V
• 可选输出电压高达4.3V
• 最小350mA 开关峰值电流限制
• 集成LDO/负载开关
V
TPS61098x 具备由 MODE 引脚控制的两个模式:工
作模式和低功耗模式。在工作模式下,两输出均启用并
具有增强的响应性能。在低功耗模式下,LDO 或负载
开关被禁用,断开与外设的连接。在低功耗模式下,
TPS61098x 仅消耗 300nA 静态电流,而且在 10µA 负
载条件下能够实现高达88% 的效率。
• 由MODE 引脚控制的两种模式
– 工作模式:两路输出均处于设定值
– 低功耗模式:LDO/负载开关关闭;升压转换器
继续运行
TPS61098x 支持自动直通功能。当输入电压高于直通
阈值时,升压转换器停止开关并将输入电压传送至
VMAIN 轨;当输入电压低于该阈值时,升压转换器在
升压模式下工作并将输出调节至目标值。TPS61098x
针对不同的输出设定值提供了多种版本。
• 自动直通
• 在10µA 负载条件下进行2V 至3.3V 转换时的效率
高达88%(低功耗模式)
• 在5mA 至100mA 负载条件下进行2V 至3.3V 转
换时的效率高达93%
• 1.5mm × 1.5mm WSON 封装
在 0.7V 输入到 3.3V 输出的转换过程中,TPS61098x
可提供高达 50mA 的总输出电流。该升压转换器基于
滞后控制器拓扑结构,可利用同步整流器以超低的静态
电流实现超高效率。
2 应用
• 智能远程控制
• BLE 标签
• 可穿戴应用
• 低功耗无线应用
• 便携式消费类或医疗类产品
• 单节纽扣电池、单节或两节碱性电池供电的应用
TPS61098x 可采用 1.5mm × 1.5mm WSON 封装,从
而实现小型电路布局。
器件信息
封装(1)
封装尺寸(标称值)
器件型号
3 说明
TPS61098x
1.50mm × 1.50mm
6 引脚WSON
TPS61098x 可以为由单节或双节碱性电池、镍镉电池
或镍氢电池、单节纽扣电池、单节锂离子电池或锂聚合
(1) 如需了解所有可用封装,请参阅本文档末尾的可订购产品附
录。
L
4.7µH
0.7 V to 4.5 V
SW
VMAIN
CBAT
10µF
400ꢀ
CO1
10µF
RIN
BOOST
CTRL
LDO / LS
CTRL
VIN
VSUB
GND
CIN
0.1µF
CO2
10µF
MODE
Copyright © 2016, Texas Instruments Incorporated
简化版原理图
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLVS873
TPS61098, TPS610981, TPS610982, TPS610985, TPS610986, TPS610987
ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
www.ti.com.cn
Table of Contents
9 Applications and Implementation................................21
9.1 Application Information............................................. 21
9.2 Typical Applications.................................................. 21
10 Power Supply Recommendations..............................33
11 Layout...........................................................................34
11.1 Layout Guidelines................................................... 34
11.2 Layout Example...................................................... 34
12 Device and Documentation Support..........................35
12.1 Device Support....................................................... 35
12.2 Documentation Support.......................................... 35
12.3 接收文档更新通知................................................... 35
12.4 支持资源..................................................................35
12.5 Trademarks.............................................................35
12.6 静电放电警告.......................................................... 35
12.7 术语表..................................................................... 35
13 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings........................................ 4
7.2 ESD Ratings............................................................... 4
7.3 Recommended Operating Conditions.........................4
7.4 Thermal Information....................................................4
7.5 Electrical Characteristics.............................................5
7.6 Typical Characteristics................................................7
8 Detailed Description......................................................16
8.1 Overview...................................................................16
8.2 Functional Block Diagrams....................................... 16
8.3 Feature Description...................................................17
8.4 Device Functional Modes..........................................19
Information.................................................................... 35
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision E (December 2016) to Revision F (September 2021)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
Changes from Revision D (April 2016) to Revision E (November 2016)
Page
• Changed the HBM value From: ±1000 To: ±2000 in 节7.2 ...............................................................................4
• Changed the CDM value From: ±250 To: ±750 in 节7.2 ...................................................................................4
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
5 Device Comparison Table
VSUB ACTIVE
DISCHARGE IN LOW
POWER MODE
INTEGRATED LDO OR
PART NUMBER
VMAIN
(ACTIVE MODE)
VMAIN
(LOW POWER MODE)
VSUB
(ACTIVE MODE)
VSUB
(LOW POWER MODE)
LOAD SWITCH
TPS61098DSE(1)
TPS610981DSE
TPS610982DSE
TPS610985DSE
TPS610986DSE
TPS610987DSE
LDO
LDO
4.3 V
3.3 V
3.3 V
3.0 V
3.3 V
4.3 V
2.2 V
3.3 V
3.3 V
3.0 V
3.3 V
2.2 V
3.1 V
3.0 V
2.8 V
ON
OFF
OFF
2.8 V
OFF
OFF
OFF
No
Yes
No
LDO
Load Switch
Load Switch
LDO
Yes
Yes
Yes
ON
3.1 V
(1) The DSE package is available taped and reeled. Add R suffix to device type (for example, TPS61098DSER) to order quantities of 3000
devices per reel. Add T suffix to device type (for example, TPS61098DSET) to order quantities of 250 devices per reel. For detailed
ordering informationm, please check the package option addendum at the end of this data sheet.
6 Pin Configuration and Functions
VMAIN
GND
SW
VSUB
MODE
VIN
图6-1. DSE Package 6-Pin WSON Top View
表6-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
VMAIN
SW
NO.
1
PWR Boost converter output
PWR Connection for inductor
2
VIN
3
I
I
IC power supply input
Mode selection pin. 1: Active mode; 0: Low Power mode. Must be actively tied high or low. Do not leave
floating.
MODE
4
VSUB
GND
5
6
PWR LDO or load switch output
PWR IC ground
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–40
–65
MAX
4.7
UNIT
V
Input voltage
VIN, SW, VMAIN, VSUB
MODE
5.0
V
Operating junction temperature, TJ
Storage temperature range, Tstg
150
150
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
±2000
±750
UNIT
Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
V
V(ESD)
Electrostatic discharge
Charged Device Model (CDM), per JEDEC specification JESD22-
C101, all pins(2)
(1) JEDEC document JEP155 states that 500V HBM rating allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250V CDM rating allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
0.7
2.2
1.8
1.54
5
NOM
MAX
4.5
UNIT
V
VIN
Input voltage range
V(MAIN) Boost converter output voltage range
V(SUB) Load switch / LDO outut voltage range
4.3
V
3.7
V
L
Effective inductance range
4.7
6.11
µH
µF
µF
µF
µF
°C
CBAT
CO1
Effective input capacitance range at input(1)
Effective output capacitance range at VMAIN pin for boost converter output(1)
Effective output capacitance range at VSUB pin for LDO output(1)
Effective output capacitance range at VSUB pin for load switch output(1) (3)
Operating virtual junction temperature
5
10
5
22
10
1(2)
CO2
TJ
1
2.2
125
–40
(1) Effective value. Ceramic capacitor’s derating effect under bias should be considered. Choose the right nominal capacitance by
checking capacitor DC bias characteristics.
(2) If LDO output current is lower than 20 mA, the minimum effective output capacitance value can be lower to 0.5 µF.
(3) With load switch version, the output capacitor at VSUB pin is only required if smaller voltage ripple is needed.
7.4 Thermal Information
TPS61098x
THERMAL METRIC(1)
UNIT
DSE 6 PINS
207.3
118.9
136.4
8.3
RθJA
RθJCtop
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
136.4
N/A
ψJB
RθJCbot
(1) For more information about traditional and new thermal metrics, see theSemiconductor and IC Package Thermal Metrics application
report.
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7.5 Electrical Characteristics
TJ = –40°C to 125°C and VIN = 0.7 V to 4.5 V. Typical values are at VIN = 1.5 V, TJ = 25°C, unless otherwise noted.
PARAMETER
VERSION
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Power Supply
VIN
Input voltage range
TPS61098x
0.7
4.5
0.7
V
V
R
Load ≥3 kΩ (1)
VIN(start)
Minimum input voltage at start-up
TPS61098x
MODE = High, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
Quiescent current into the VIN pin
in Active mode
TPS61098x
2
5
4
90
23
µA
nA
µA
IQ(VIN)
Quiescent current into the VIN pin
in Low Power mode
MODE = Low, Boost or Pass-through
no load, no switching
TPS61098x
MODE = High, Boost or Pass-through
no load, no switching
TPS61098/1/5/6/7
15
TJ = –40°C to 85°C
Quiescent current into the VMAIN pin
in Active mode
MODE = High, Boost or Pass-through
no load, no switching
TPS610982
18
300
300
4
23
400
800
10
µA
nA
nA
µA
TJ = –40°C to 85°C
MODE = Low, Boost or Pass-through
no load, no switching
TJ = 25°C
IQ(VMAIN)
TPS61098/1/7
TPS61098/1/5/6/7
TPS610982
MODE = Low, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
Quiescent current into the VMAIN pin
in Low Power mode
MODE = Low, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
V(MAIN) = V(SW) = 4.7 V, no load
TJ = –40°C to 85°C
Leakage current of the SW pin
(from the SW pin to GND pin)
ILKG(SW)
ILKG(MAIN)
ILKG(SUB)
TPS61098x
5
10
10
5
100
200
150
30
nA
nA
nA
nA
V(MAIN) = 4.7 V, V(SW) = 0 V, no load
TJ = –40°C to 85°C
Leakage current of the VMAIN pin
(from the VMAIN pin to SW pin)
TPS61098x
MODE = Low, V(MAIN) = 4.7 V, V(SUB) = 0 V
TJ = –40°C to 85°C
Leakage current of the VSUB pin
(from the VMAIN pin to VSUB pin)
TPS61098/1/5/6/7
TPS61098x
V(MODE) = 5 V
TJ = –40°C to 85°C
ILKG(MODE) Leakage current into the MODE pin
Power Switch
MODE = Low
600
300
350
400
700
450
500
550
1.2
1000
600
650
700
1000
700
700
750
2
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
TPS61098/7
MODE = High
RDS(on)_LS
Low-side switch on resistance
TPS610981/2/6
TPS610985
MODE = Low / High
MODE = Low / High
MODE = Low
TPS61098/7
MODE = High
RDS(on)_HS Rectifier on resistance
TPS610981/2/6
TPS610985
MODE = Low / High
MODE = Low / High
R(LS)
Load switch on resistance
LDO dropout voltage
TPS610985/6
TPS61098/1/2/7
TPS61098x
Ω
V(Dropout)
ILH
ILIM(BST)
ILIM(SUB)
ISUB = 50 mA
60
100
mV
mA
mA
Inductor current ripple
Boost switch current limit
VSUB output current limit
100
500
TPS61098x
0.7 V < VIN < V(MAIN)
350
200
650
TPS61098x
mA
mA
TJ = –20°C to 125°C
Discharge current from the VSUB pin to
GND pin
I(DISCH)
TPS610981/5/6/7
MODE = Low, V(SUB) = 3 V
5
8
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TJ = –40°C to 125°C and VIN = 0.7 V to 4.5 V. Typical values are at VIN = 1.5 V, TJ = 25°C, unless otherwise noted.
PARAMETER
VERSION
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output
MODE = High, VIN < V(PSTH), Burst mode,
open loop
4.45
4.27
2.3
2.23
3.4
3.3
3.4
3.3
3.1
3.0
3.4
3.3
V
V
V
V
V
V
V
V
V
V
V
V
MODE = High, VIN < V(PSTH), PWM mode,
open loop
4.142
2.163
3.201
3.201
2.91
4.398
2.297
3.399
3.399
3.09
TPS61098/7
MODE = Low, VIN < V(PSTH), Burst mode,
open loop
MODE = Low, VIN < V(PSTH), PWM mode,
open loop
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
TPS610981
TPS610982
TPS610985
TPS610986
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
V(MAIN)
Boost converter output voltage
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
3.201
3.399
TPS61098/7
TPS610981
TPS610982
MODE = High
3.038
2.94
3.1
3.0
3.162
3.06
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
LDO output voltage
(LDO version)
V(SUB)
MODE = High
MODE = High / Low
2.744
2.8
2.856
MODE = High, VIN rising
MODE = High, Hysteresis
MODE = Low, VIN rising
4.4
0.1
TPS61098/7
2.25
0.1
MODE = Low, Hysteresis
MODE = High / Low, VIN rising
MODE = High / Low, Hysteresis
MODE = High / Low, VIN rising
MODE = High / Low, Hysteresis
MODE = High / Low, VIN rising
MODE = High / Low, Hysteresis
MODE = High / Low, VIN rising
MODE = High / Low, Hysteresis
3.35
0.1
TPS610981
TPS610982
TPS610985
TPS610986
V(PSTH)
Pass-through mode threshold
3.35
0.1
3.05
0.1
3.35
0.1
f = 1kHz, CO2 = 10 µF, ISUB = 10 mA
MODE = High
TPS61098/1/2/7
TPS610982
40
28
1
dB
dB
ms
Power-supply rejection ratio from LDO
input to output
PSRR
f = 1kHz, CO2 = 10 µF, ISUB = 10 mA
MODE = Low
VSUB start-up time
(LDO version and load switch version)
No load
tstup_LDO
TPS61098x
time from MODE high to 90% of V(SUB)
Control Logic
VIL
VIH
MODE input low voltage
TPS61098x
TPS61098x
TPS61098x
TPS61098x
0.4
V
V
MODE input high voltage
Overtemperature protection
Overtemperature hysteresis
1.2
150
25
°C
°C
(1) TPS61098x is able to drive RLoad > 150 Ω after VMAIN is established over 1.8 V.
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7.6 Typical Characteristics
20
18
16
14
12
10
8
1.2
1
0.8
0.6
0.4
0.2
0
6
4
2
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
D002
D001
TPS61098, '1, '5, '6
MODE = Low
TPS61098, '1, '5, '6
MODE = High
图7-2. IQ into VMAIN Pin at Low Power Mode vs
图7-1. IQ into VMAIN Pin at Active Mode vs
Temperature
Temperature
30
25
20
15
10
5
9
8
7
6
5
4
3
2
1
0
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D035
D036
TPS610982
MODE = High
TPS610982
MODE = Low
图7-3. IQ into VMAIN Pin at Active Mode vs
图7-4. IQ into VMAIN Pin at Low Power Mode vs
Temperature
Temperature
700
600
500
400
300
200
100
0
500
400
300
200
100
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
D022
D021
TPS61098, '7
MODE = High
TPS61098, '7
MODE = High
图7-6. Low Side Switch On Resistance vs
图7-5. Rectifier On Resistance vs Temperature
Temperature
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900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
D024
D023
TPS61098, '7
MODE = Low
TPS61098, '7
MODE = Low
图7-8. Low Side Switch On Resistance vs
图7-7. Rectifier On Resistance vs Temperature
Temperature
700
600
500
400
300
200
100
0
600
500
400
300
200
100
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
D003
D004
TPS610981 MODE = High / Low
TPS610981 MODE = High / Low
图7-9. Rectifier On Resistance vs Temperature
图7-10. Low Side Switch On Resistance vs
Temperature
700
600
500
400
300
200
100
0
600
500
400
300
200
100
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D037
D038
TPS610982 MODE = High / Low
TPS610982 MODE = High / Low
图7-11. Rectifier On Resistance vs Temperature
图7-12. Low Side Switch On Resistance vs
Temperature
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700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D039
D040
TPS610985 MODE = High / Low
TPS610985 MODE = High / Low
图7-13. Rectifier on Resistance vs Temperature
图7-14. Low Side Switch On Resistance vs
Temperature
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D042
D041
TPS610986 MODE = High / Low
TPS610986 MODE = High / Low
图7-16. Low Side Switch on Resistance vs
图7-15. Rectifier on Resistance vs Temperature
Temperature
510
500
490
480
100
90
80
70
60
50
40
470
VIN = 0.7 V
VIN = 1.5 V
VIN = 3.1 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
30
20
460
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (èC)
0.001
0.01
0.1 1
Boost Output Current (mA)
10
100
D005
D006
TPS61098x
VIN < V(MAIN)
TPS61098, '7
MODE = Low
V(MAIN) = 2.2 V
图7-17. Current Limit vs Temperature
图7-18. Boost Efficiency vs Output Current (Low
Power Mode)
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100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.3 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
0.001
0.01
0.1
Boost Output Current (mA)
1
10
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
D008
D007
TPS61098, '7
MODE = High
V(MAIN) = 4.3 V
TPS610981
MODE = Low
V(MAIN) = 3.3 V
图7-19. Boost Efficiency vs Output Current (Active 图7-20. Boost Efficiency vs Output Current (Low
Mode)
Power Mode)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
VIN = 3 V
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
D009
D025
TPS610981
MODE = High
V(MAIN) = 3.3 V
TPS610982
MODE = Low
V(MAIN) = 3.3 V
图7-21. Boost Efficiency vs Output Current (Active 图7-22. Boost Efficiency vs Output Current (Low
Mode) Power Mode)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
VIN = 2.5 V
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
D026
D043
TPS610982
MODE = High
V(MAIN) = 3.3 V
TPS610985
Mode = Low
V(MAIN) = 3 V
图7-23. Boost Efficiency vs Output Current (Active 图7-24. Boost Efficiency vs Output Current (Low
Mode)
Power Mode)
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100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
30
20
VIN = 2.5 V
VIN = 3 V
0
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
D044
D045
TPS610985
Mode = High
V(MAIN) = 3 V
TPS610986
Mode = Low
V(MAIN) = 3.3 V
图7-25. Boost Efficiency vs Output Current (Active 图7-26. Boost Efficiency vs Output Current (Low
Mode)
Power Mode)
100
90
80
70
60
50
40
30
20
10
0
2.5
2.4
2.3
2.2
2.1
2
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
1.9
0.001
0.01
0.1 1
Boost Output Current (mA)
10
200
0.001
0.01
0.1 1
Boost Output Current (mA)
10
100
D046
D010
TPS610986
MODE = High
V(MAIN) = 3.3 V
TPS61098, '7
MODE = Low
V(MAIN) = 2.2 V
图7-27. Boost Efficiency vs Output Current (Active
图7-28. Boost Load Regulation (Low Power Mode)
Mode)
4.6
4.5
4.4
4.3
3.6
3.5
3.4
3.3
VIN = 0.7 V
4.2
3.2
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
VIN = 0.7 V
VIN = 1.2 V
3.1
4.1
VIN = 2 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.3 V
4
3
0.001
0.01
0.1 1
Boost Output Current (mA)
10
200
0.001
0.01
0.1 1
Boost Output Current (mA)
10
200
D011
TPS610981
MODE = Low
V(MAIN) = 3.3 V
TPS61098, '7
MODE = High
V(MAIN) = 4.3 V
图7-30. Boost Load Regulation (Low Power Mode)
图7-29. Boost Load Regulation (Active Mode)
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3.6
3.5
3.4
3.3
3.2
3.1
3
3.6
3.5
3.4
3.3
3.2
3.1
3
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
VIN = 3 V
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
D027
D013
TPS610981
MODE = High
V(MAIN) = 3.3 V
TPS610982
MODE = Low
V(MAIN) = 3.3 V
图7-31. Boost Load Regulation (Active Mode)
图7-32. Boost Load Regulation (Low Power Mode)
3.6
3.3
3.5
3.4
3.3
3.2
3.1
3
3.2
2.9
VIN = 0.7 V
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 2.5 V
3.1
2.8
3
0.001
2.7
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
0.01
0.1
Boost Output Current (mA)
1
10
200
D028
D047
TPS610982
MODE = High
V(MAIN) = 3.3 V
TPS610985
MODE = Low
V(MAIN) = 3 V
图7-33. Boost Load Regulation (Active Mode)
图7-34. Boost Load Regulation (Low Power Mode)
3.3
3.6
3.2
3.1
3
3.5
3.4
3.3
2.9
3.2
VIN = 0.7 V
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 2.5 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
2.8
3.1
2.7
0.001
3
0.001
0.01
0.1
Boost Output Current (mA)
1
10
200
0.01
0.1
Boost Output Current (mA)
1
10
200
D048
D049
TPS610985
MODE = High
V(MAIN) = 3 V
TPS610986
MODE = Low
V(MAIN) = 3.3 V
图7-35. Boost Load Regulation (Active Mode)
图7-36. Boost Load Regulation (Low Power Mode)
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3.6
3.16
3.14
3.12
3.1
3.5
3.4
3.3
3.2
3.1
3.08
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
TA = -40èC
TA = 25èC
TA = 85èC
3.06
3.04
0.001
3
0.001
0.01
0.1 1
LDO Output Current (mA)
10
200
0.01
0.1 1
Boost Output Current (mA)
10
200
D014
D050
TPS61098, '7
MODE = High
VIN = 3.6 V
TPS610986
MODE = High
V(MAIN) = 3.3 V
图7-38. LDO Load Regulation
图7-37. Boost Load Regulation (Active Mode)
3.06
2.86
2.84
2.82
2.8
3.04
3.02
3
2.78
2.76
2.74
2.72
2.7
2.98
TA = -40èC
TA = 25èC
TA = 85èC
TA = -40°C
TA = 25°C
TA = 85°C
2.96
2.94
0.001
0.01
0.1
LDO Output Current (mA)
1
10
200
0.001
0.01
0.1
LDO Output Current (mA)
1
10
200
D015
D029
TPS610981
MODE = High
VIN = 2.5 V
TPS610982
MODE = Low
VIN = 2.5 V
图7-39. LDO Load Regulation
图7-40. LDO Load Regulation (Low Power Mode)
2.86
2.84
2.82
2.8
5
TA = -40èC
4.5
TA = 25èC
TA = 85èC
4
3.5
3
2.78
2.76
2.74
2.72
2.7
2.5
2
1.5
1
TA = -40èC
TA = 25èC
TA = 85èC
0.5
0
0.001
0.01
0.1 1
LDO Output Current (mA)
10
200
0.7
0.9
1.1
1.3
1.5
1.7
Input Voltage (V)
1.9
2.1
2.3
D030
D016
TPS610982
MODE = High
VIN = 2.5 V
TPS61098, '7
MODE = Low
No Load
图7-41. LDO Load Regulation (Active Mode)
图7-42. Input Current vs Input Voltage (Low Power
Mode)
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10
9
8
7
6
5
4
3
2
1
0
180
160
140
120
100
80
TA = -40èC
TA = 25èC
TA = 85èC
TA = -40èC
TA = 25èC
TA = 85èC
60
40
20
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D018
D017
TPS610981
MODE = High
No Load
TPS610981
MODE = Low
No Load
图7-44. Input Current vs Input Voltage (Active
图7-43. Input Current vs Input Voltage (Low Power
Mode)
Mode)
60
160
TA = -40°C
TA = 25°C
TA = 85°C
TA = -40°C
TA = 25°C
TA = 85°C
140
120
50
40
30
20
10
100
80
60
40
20
0
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D032
D031
TPS610982
MODE = High
No Load
TPS610982
MODE = Low
No Load
图7-46. No Load Input Current vs Input Voltage
图7-45. No Load Input Current vs Input Voltage
(Active Mode)
(Low Power Mode)
10
10
TA = -40°C
TA = 25°C
TA = 85°C
TA = -40°C
TA = 25°C
TA = 85°C
9
9
8
8
7
6
5
4
3
2
1
7
6
5
4
3
2
1
0
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
Input Voltage (V)
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D051
D053
TPS610985
MODE = Low
V(MAIN) = 3 V
TPS610986
MODE = Low
V(MAIN) = 3.3 V
图7-47. Input Current vs Input Voltage (Low Power 图7-48. Input Current vs Input Voltage (Low Power
Mode)
Mode)
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100
100
80
60
40
20
80
60
40
20
IOUT = 10 mA
IOUT = 100 mA
IOUT = 10 mA
IOUT = 100 mA
0
0
10
100
1k
10k 100k
Frequency (Hz)
1M
10M
10
100
1k
10k 100k
Frequency (Hz)
1M
10M
D019
D020
TPS61098. '7
MODE = High
CO2 = 10 µF
TPS610981
MODE = High
CO2 = 10 µF
VIN - VOUT = 4.3 V - 3.1 V = 1.2 V
VIN - VOUT = 3.3 V - 3 V = 0.3 V
图7-49. LDO PSRR vs Frequency
图7-50. LDO PSRR vs Frequency
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
IOUT = 10 mA
IOUT = 100 mA
IOUT = 10 mA
IOUT = 100 mA
10
100
1k
10k 100k
Frequency (Hz)
1M
10M
10
100
1k
10k 100k
Frequency (Hz)
1M
10M
D033
D034
TPS610982
MODE = Low
CO2 = 10 µF
TPS610982
MODE = High
CO2 = 10 µF
VIN - VOUT = 3.3 V - 2.8 V = 0.5 V
VIN - VOUT = 3.3 V - 2.8 V = 0.5 V
图7-51. LDO PSRR vs Frequency (Low Power
图7-52. LDO PSRR vs Frequency (Active Mode)
Mode)
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8 Detailed Description
8.1 Overview
The TPS61098x is an ultra-low power solution optimized for products powered by either a one-cell or two-cell
alkaline, NiCd or NiMH, one-cell coin cell battery or one-cell Li-Ion or Li-polymer battery. To simplify system
design and save PCB space, the TPS61098x integrates an LDO or load switch with a boost converter (different
configurations for different versions) to provide two output rails in a compact package. The boost output V(MAIN)
is designed as an always-on supply to power a main system, and the LDO or load switch output V(SUB) is
designed to power peripheral devices and can be turned off.
The TPS61098x features two modes controlled by MODE pin: Active mode and Low Power mode. In Active
mode, both outputs are enabled, and the transient response performance of the boost converter and LDO/load
switch are enhanced, so it is able to respond load transient quickly. In Low Power mode, the LDO/load switch is
disabled, so the peripherals can be disconnected to minimize the battery drain. Besides that, the boost
consumes only 300 nA quiescent current in Low Power mode, so up to 88% efficiency at 10 µA load can be
achieved to extend the battery run time. The TPS610982 is an exception. Its LDO is always on in both Active
mode and Low Power mode. The main differences between the two modes of the TPS610982 are the quiescent
current and performance. Refer to 节8.4.1 for details.
The TPS61098x supports automatic pass-through function in both Active mode and Low Power mode. When VIN
is detected higher than a pass-through threshold, which is around the target V(MAIN) voltage, the boost converter
stops switching and passes the input voltage through inductor and internal rectifier switch to V(MAIN), so V(MAIN)
follows VIN; when VIN is lower than the threshold, the boost works in boost mode and regulates V(MAIN) at the
target value. The TPS61098x can support different V(MAIN) target values in Active mode and Low Power mode to
meet various requirements. For example, for TPS61098, the set value of V(MAIN) is 4.3 V in Active mode but 2.2
V in Low Power mode.
8.2 Functional Block Diagrams
SW
2
1
VMAIN
Current
Sense
Boost
Gate Driver
Startup
OCP
Pulse
Modulator
REF
Pass_Through
VIN
3
5
VSUB
VPSTH
OCP_SUB
Logic
Control
Thermal
Shutdown
ILIM_SUB
1) LDO Version
LDO/Load Switch
Gate Driver
MODE
4
VREF
Softstart
6
GND
Copyright © 2016, Texas Instruments Incorporated
A. Implemented in versions with LDO configuration.
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8.3 Feature Description
8.3.1 Boost Controller Operation
The TPS61098x boost converter is controlled by a hysteretic current mode controller. This controller regulates
the output voltage by keeping the inductor ripple current constant in the range of 100 mA and adjusting the offset
of this inductor current depending on the output load. Since the input voltage, output voltage and inductor value
all affect the rising and falling slopes of inductor ripple current, the switching frequency is not fixed and is
decided by the operation condition. If the required average input current is lower than the average inductor
current defined by this constant ripple, the inductor current goes discontinuous to keep the efficiency high under
light load conditions. 图 8-1 illustrates the hysteretic current operation. If the load is reduced further, the boost
converter enters into Burst mode. In Burst mode, the boost converter ramps up the output voltage with several
pulses and it stops operating once the output voltage exceeds a set threshold, and then it goes into a sleep
status and consumes less quiescent current. It resumes switching when the output voltage is below the set
threshold. It exits the Burst mode when the output current can no longer be supported in this mode. Refer to 图
8-2 for Burst mode operation details.
To achieve high efficiency, the power stage is realized as a synchronous boost topology. The output voltage
V(MAIN) is monitored via an internal feedback network which is connected to the voltage error amplifier. To
regulate the output voltage, the voltage error amplifier compares this feedback voltage to the internal voltage
reference and adjusts the required offset of the inductor current accordingly.
IL
Continuous Current Operation
Discontinuous Current Operation
100mA
(typ.)
100mA
(typ.)
t
图8-1. Hysteretic Current Operation
Output Voltage of
Boost Converter
Burst Mode Operation at
Light Load
VOUT_BST
Continuous Current Operation at
Heavy Load
VOUT_NOM
t
图8-2. Burst Mode Operation
8.3.2 Pass-Through Operation
The TPS61098x supports automatic pass-through function for the boost converter. When the input voltage is
detected higher than the pass-through threshold V(PSTH), which is around V(MAIN) set value, the boost converter
enters into pass-through operation mode. In this mode, the boost converter stops switching, the rectifier is
constantly turned on and the low side switch is turned off. The input voltage passes through external inductor
and the internal rectifier to the output. The output voltage in this mode depends on the resistance between the
input and the output, calculated as 方程式1:
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VMAIN = V -(IMAIN +ISUB )ì(RL +RDSon _HS
IN
)
(1)
where
• RL is the DCR of external inductor
• RDS(on)_HS is the resistance of internal rectifier
When the input voltage is lower than V(PSTH), the boost converter resumes switching to regulate the output at
target value.
The TPS61098x can support automatic pass-through function in both Active mode and Low Power mode.
8.3.3 LDO / Load Switch Operation
The TPS61098x uses a PMOS as a pass element of its integrated LDO / load switch. The input of the PMOS is
connected to the output of the boost converter. When the MODE pin is pulled logic high, the PMOS is enabled to
output a voltage on VSUB pin.
For load switch version, the PMOS pass element is fully turned on when enabled, no matter the boost converter
works in boost operation mode or pass-through operation mode. So the output voltage at VSUB pin is decided
by the output voltage at VMAIN pin and the current passing through the PMOS as 方程式2:
VSUB = VMAIN -ISUB ìRLS
where
(2)
• I(SUB) is the load of VSUB rail
• RLS is the resistance of the PMOS when it is fully turned on
For LDO version, the output voltage V(SUB) is regulated at the set value when the voltage difference between its
input and output is higher than the dropout voltage V(Dropout), no matter the boost converter works in boost
operation mode or pass-through operation mode. The V(SUB) is monitored via an internal feedback network
which is connected to the voltage error amplifier. To regulate V(SUB), the voltage error amplifier compares the
feedback voltage to the internal voltage reference and adjusts the gate voltage of the PMOS accordingly. When
the voltage drop across the PMOS is lower than the dropout voltage, the PMOS will be fully turned on and the
output voltage at V(SUB) is decided by 方程式2.
When the MODE pin is pulled low, the LDO or load switch is turned off to disconnect the load at VSUB pin. For
some versions, active discharge function at VSUB pin is offered, which can discharge the V(SUB) to ground after
MODE pin is pulled low, to avoid any bias condition to downstream devices. For versions without the active
discharge function, the VSUB pin is floating after MODE pin is pulled low, and its voltage normally drops down
slowly due to leakage. Refer to the 节5 for version differences.
When MODE pin is toggled from low to high, soft-start is implemented for the LDO versions to avoid inrush
current during LDO startup. The start up time of LDO is typically 1 ms. For load switch versions, the load switch
is turned on faster, so the output capacitor at VSUB pin is suggested 10X smaller than the output capacitor at
VMAIN pin to avoid obvious voltage drop of V(MAIN) during load switch turning on process.
8.3.4 Start Up and Power Down
The boost converter of the TPS61098x is designed always-on, so there is no enable or disable control of it. The
boost converter starts operation once input voltage is applied. If the input voltage is not high enough, a low
voltage startup oscillator operates the switches first. During this phase, the switching frequency is controlled by
the oscillator, and the maximum switch current is limited. Once the converter has built up the output voltage
V(MAIN) to approximately 1.8 V, the device switches to the normal hysteretic current mode operation and the
VMAIN rail starts to supply the internal control circuit. If the input voltage is too low or the load during startup is
too heavy, which makes the converter unable to build up 1.8 V at V(MAIN) rail, the boost converter can't start up
successfully. It will keep in this status until the input voltage is increased or removed.
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The TPS61098x is able to startup with 0.7 V input voltage with ≥ 3 kΩ load. The startup time depends on input
voltage and load conditions. After the V(MAIN) reaches 1.8 V to start the normal hysteretic current mode
operation, an internal ramp-up reference controls soft-start time of the boost converter until V(MAIN) reaches its
set value.
The TPS61098x does not support undervoltage lockout function. When the input voltage drops to a low voltage
and can't provide the required energy to the boost converter, the V(MAIN) drops. When and to what extent V(MAIN)
drops are dependent on the input and load conditions. When the boost converter is unable to maintain 1.8 V at
VMAIN rail to supply the internal circuit, the TPS61098x powers down and enters into startup process again.
8.3.5 Over Load Protection
The boost converter of the TPS61098x supports a cycle-by-cycle current limit function in boost mode operation.
If the peak inductor current reaches the internal switch current limit threshold, the main switch is turned off to
stop a further increase of the input current. In this case the output voltage will decrease since the device cannot
provide sufficient power to maintain the set output voltage. If the output voltage drops below the input voltage,
the backgate diode of the rectifying switch gets forward biased and current starts to flow through it. Because this
diode cannot be turned off, the load current is only limited by the remaining DC resistance. After the overload
condition is removed, the converter automatically resumes normal operation.
The overload protection is not active in pass-through mode operation, in which the load current is only limited by
the DC resistance.
The integrated LDO / load switch also supports over load protection. When the load current of VSUB rail reaches
the ILIM_SUB, the V(SUB) output current will be regulated at this limit value and will not increase further. In this case
the V(SUB) voltage will decrease since the device cannot provide sufficient power to the load.
8.3.6 Thermal Shutdown
The TPS61098x has a built-in temperature sensor which monitors the internal junction temperature in boost
mode operation. If the junction temperature exceeds the threshold (150°C typical), the device stops operating.
As soon as the junction temperature has decreased below the programmed threshold with a hysteresis, it starts
operating again. There is a built-in hysteresis (25°C typical) to avoid unstable operation at the overtemperature
threshold. The over temperature protection is not active in pass-through mode operation.
8.4 Device Functional Modes
8.4.1 Operation Modes by MODE Pin
The TPS61098x features two operation modes controlled by MODE pin: the Active mode and Low Power mode.
It can provide quick transient response in Active mode and ultra-low quiescent current in Low Power mode. So a
low power system can easily use the TPS61098x to get high performance in its active mode and meantime
minimize its power consumption to extend the battery run time in its sleep mode.
The MODE pin is usually controlled by an I/O pin of a controller, and should not be left floating.
8.4.1.1 Active Mode
The TPS61098x works in Active mode when MODE pin is logic high. In Active mode, both of the boost converter
and the integrated LDO/load switch are enabled, and the TPS61098x can provide dual outputs simultaneously.
The transient response performance of the boost converter is enhanced in Active mode, and the device
consumes around 15 µA quiescent current. It is able to respond load transient quickly.
When MODE pin is toggled from low to high, soft-start is implemented for the LDO versions to avoid inrush
current during startup. For load switch versions, the load switch is turned on faster, so the output capacitor at
VSUB pin is suggested 10X smaller than the output capacitor at VMAIN pin to avoid obvious voltage drop of
V(MAIN) during turning on process.
8.4.1.2 Low Power Mode
The TPS61098x works in Low Power mode when MODE pin is logic low. In Low Power mode, the LDO/load
switch is turned off, so the peripherals can be disconnected to minimize the battery drain. The VSUB pin either
outputs high impedance or is pulled to ground by internal active discharge circuit, depending on different
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versions. The boost converter consumes only 300 nA quiescent current typically, and can achieve up to 88%
efficiency at 10 µA load.
The Low Power mode is designed to keep the load device powered with minimum power consumption. For
example, it can be used to keep powering the main system, like an MCU, in a system's sleep mode even under
< 0.7 V input voltage condition.
图 8-3 and 图 8-4 illustrate the outputs of the TPS61098 and TPS610981 under different input voltages in Active
mode and Low Power mode.
Voltage (V)
Voltage (V)
VIN
VIN
4.5
4.5
VMAIN (Active Mode & Low
Power Mode)
VMAIN (Active Mode)
VSUB (Active Mode)
4.3
3.3
3.0
3.1
2.2
VSUB (Active Mode)
2.2
VMAIN (Low Power Mode)
0.7
0
0.7
0
t
t
图8-3. TPS61098 Output under Different Input
图8-4. TPS610981 Output under Different Input
Voltages
Voltages
The TPS610982 is an exception. Its LDO is always on in both Active mode and Low Power mode with higher
quiescent current consumption than other versions. The TPS610982 can be used to replace discrete boost and
LDO solutions where the LDO output is always on, and its two modes provide users two options of different
quiescent current consumption and performance. Refer to 节8.4.1, 节7 and 节7.6 for details.
8.4.2 Burst Mode Operation under Light Load Condition
The boost converter of TPS61098x enters into Burst Mode operation under light load condition. Refer to 节8.3.1
for details.
8.4.3 Pass-Through Mode Operation
The boost converter of TPS61098x automatically enters into pass-through mode operation when input voltage is
higher than the target output voltage. Refer to 节8.3.2 for details.
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9 Applications and Implementation
Note
以下应用部分的信息不属于TI 组件规范,TI 不担保其准确性和完整性。客户应负责确定 TI 组件是否适
用于其应用。客户应验证并测试其设计,以确保系统功能。
9.1 Application Information
The TPS61098x is an ultra low power solution for products powered by either a one-cell or two-cell alkaline,
NiCd or NiMH, one-cell coin cell or one-cell Li-Ion or Li-polymer battery. It integrates either a Low-dropout Linear
Regulator (LDO) or a load switch with a boost converter and provides dual output rails. The V(MAIN) rail is the
output of the boost converter. It is an always-on output and can only be turned off by removing input voltage. The
V(SUB) rail is the output of the integrated LDO or load switch, and it can be turned off by pulling the MODE pin
low.
9.2 Typical Applications
9.2.1 VMAIN to Power MCU and VSUB to Power Subsystem
The TPS61098x suits for low power systems very well, especially for the system which spends the most of time
in sleep mode and wakes up periodically to sense or transmit signals. For this kind of application, the boost
output V(MAIN) can be used as an always-on supply for the main system, such as an MCU controller, and the
LDO or load switch output V(SUB) is used to power peripheral devices or subsystem.
As shown in 图9-1, the MCU can control both of the subsystem and the TPS61098x. When the system goes into
sleep mode, the MCU can disable the subsystem first, and then force the TPS61098x enter into Low Power
mode, where the VSUB rail is disconnected but the V(MAIN) rail still powers the MCU with only 300 nA quiescent
current. When the system wakes up, the MCU pulls the MODE pin of TPS61098x high first to turn on the VSUB
rail, and then enables the subsystem. In this way, the system can benefit both of the enhanced transient
response performance in active mode and the ultra-low quiescent current in sleep mode.
L
4.7µH
0.7 V to 1.65 V
3.3 V
CO1
SW
VMAIN
MCU
CBAT
10µF
RIN
400ꢀ
10µF
BOOST
CTRL
LDO
CTRL
VIN
3.0 V
VSUB
GND
Subsystem
CIN
0.1µF
CO2
10µF
MODE
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图9-1. Typical Application of TPS610981 to Power Low Power System
9.2.1.1 Design Requirements
• 3.3 V V(MAIN) rail to power MCU with 15 mA load current, 3 V V(SUB) rail to power subsystem with 10 mA load
current
• Power source, single-cell alkaline battery (0.7 V to 1.65 V range)
• Greater than 90% conversion efficiency
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9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Device Choice
In the TPS61098x family, different versions are provided. Refer to 节 5 for version details and select the right
version for target applications. It is OK to use only one output rail, either V(MAIN) or V(BUS), as long as it suits the
application.
In this example, dual rails of 3.3 V and 3 V are required to power both MCU and subsystem, so the TPS610981
is selected.
9.2.1.2.2 Maximum Output Current
For the boost converter, it provides output current for both V(MAIN) and V(SUB) rails. Its maximum output capability
is determined by the input to output ratio and the current limit of the boost converter and can be estimated by 方
程式3.
V ì(ILIM_BST - 50mA)ì h
IN
IOUT(max)
=
VMAIN
(3)
where
• ηis the boost converter power efficiency estimation
• 50 mA is half of the inductor current ripple value
Minimum input voltage, maximum boost output voltage and minimum current limit ILIM_BST should be used as the
worst case condition for the estimation.
Internal current limit is also implemented for the integrated LDO/load switch. So the maximum output current of
VSUB rail should be lower than ILIM_SUB, which has 200 mA minimum value. For LDO version, the maximum
output current is also limited by its input to output headroom, that is V(MAIN) - V(SUB). Make sure the headroom
voltage is enough to support the load current. Please refer to 节7.5 for the dropout voltage information.
In this example, assume the power efficiency is 80% (lower than typical value for the worst case estimation), so
the calculated maximum output current of the boost converter is 50.9 mA, which satisfies the application
requirements (15 mA + 10 mA). The load of VSUB rail is 10 mA, which is well below the V(SUB) rail current limit
and the dropout voltage is also within the headroom.
9.2.1.2.3 Inductor Selection
Because the selection of the inductor affects steady state operation, transient behavior, and loop stability, the
inductor is the most important component in power regulator design. There are three important inductor
specifications, inductor value, saturation current, and dc resistance (DCR).
The TPS61098x is designed to work with inductor values between 2.2 µH and 4.7 µH. The inductance values
affects the switching frequency ƒin continuous current operation, which is proportional to 1/L as shown in 方程式
4.
1
VIN ì(VMAIN - VIN ì h)
VMAIN
f =
ì
L ì100mA
(4)
The inductor current ripple is fixed to 100mA typical value by internal design, but it can be affected by the
inductor value indirectly. Normally when a smaller inductor value is applied, the inductor current ramps up and
down more quickly, so the current ripple becomes bigger because the internal current comparator has some
delay to respond. So if smaller inductor peak current is required in applications, a higher inductor value can be
tried. However, the TPS61098x is optimized to work within a range of L and C combinations. The LC output filter
inductance and capacitance must be considered together. The output capacitor sets the corner frequency of the
converter while the inductor creates a Right-Half-Plane-Zero degrading the stability of the converter.
Consequently with a larger inductor, a bigger capacitor normally should be used to ensure the same L/C ratio
thus a stable loop.
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Having selected an inductance value, the peak current for the inductor in steady-state operation varies as a
function of the load, the input and output voltages and can be estimated using 方程式5.
VMAIN
ì
V
(
IMAIN +ISUB
IN ì h
)
+ 50mA; continuous current operation
IL,MAX
=
IL,MAX = 100mA;
discontinu ous current operation
(5)
where, 80% can be used for the boost converter power efficiency estimation, 100 mA is the typical inductor
current ripple value and 50mA is half of the ripple value, which may be affected a little bit by inductor value. 方程
式 5 provides a suitable inductor current rating by using minimum input voltage, maximum boost output voltage
and maximum load current for the calculation. Load transients and error conditions may cause higher inductor
currents.
方程式6 provides an easy way to estimate whether the device will work in continuous or discontinuous operation
depending on the operating points. As long as the 方程式 6 is true, continuous operation is typically established.
If 方程式6 becomes false, discontinuous operation is typically established.
VMAIN
ì
V
(
IMAIN +ISUB
IN ì h
)
> 50mA
(6)
Selecting an inductor with insufficient saturation performance can lead to excessive peak current in the
converter. This could eventually harm the device and reduce it's reliability.
In this example, the maximum load for the boost converter is 25 mA, and the minimum input voltage is 0.7 V, and
the efficiency under this condition can be estimated at 80%, so the boost converter works in continuous
operation by the calculation. The inductor peak current is calculated as 197 mA. To leave some margin, a 4.7 µH
inductor with at least 250 mA saturation current is recommended for this application.
表9-1 also lists the recommended inductor for the TPS61098x device.
表9-1. List of Inductors
INDUCTANCE [µH]
ISAT [A]
0.86
IRMS [A]
1.08
PART NUMBER
MANUFACTURER
DC RESISTANCE [mΩ]
4.7
4.7
2.2
2.2
168
300
84
VLF302510MT-4R7M
VLF252010MT-4R7M
VLF302510MT-2R2M
VLF252010MT-2R2M
TDK
TDK
TDK
TDK
0.57
0.95
1.23
1.5
0.83
0.92
120
9.2.1.2.4 Capacitor Selection
For best output and input voltage filtering, low ESR X5R or X7R ceramic capacitors are recommended.
The input capacitor minimizes input voltage ripple, suppresses input voltage spikes and provides a stable system
rail for the device. An input capacitor value of at least 10 μF is recommended to improve transient behavior of
the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible
to the VIN and GND pins of the IC is recommended. For applications where line transient is expected, an input
filter composed of 400-Ω resistor and 0.1-µF capacitor as shown in 图 9-1 is mandatory to avoid interference to
internal pass-through threshold comparison circuitry.
For the output capacitor of VMAIN pin, small ceramic capacitors are recommended, placed as close as possible
to the VMAIN and GND pins of the IC. If, for any reason, the application requires the use of large capacitors
which cannot be placed close to the IC, the use of a small ceramic capacitor with a capacitance value of around
2.2 μF in parallel to the large one is recommended. This small capacitor should be placed as close as possible
to the VMAIN and GND pins of the IC. The recommended typical output capacitor values are 10 μF and 22 µF
(nominal values).
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For LDO version, like all low dropout regulators, VSUB rail requires an output capacitor connected between
VSUB and GND pins to stabilize the internal control loop. Ceramic capacitor of 10 µF (nominal value) is
recommended for most applications. If the V(SUB) drop during load transient is much cared, higher capacitance
value up to 22 µF is recommended to provide better load transient performance. Capacitor below 10 µF is only
recommended for light load operation. For load switch version, capacitor of 10x smaller value than capacitor at
VMAIN pin is recommended to minimize the voltage drop caused by charge sharing when the load switch is
turned on.
When selecting capacitors, ceramic capacitor’s derating effect under bias should be considered. Choose the
right nominal capacitance by checking capacitor's DC bias characteristics. In this example,
GRM188R60J106ME84D, which is a 10 µF ceramic capacitor with high effective capacitance value at DC biased
condition, is selected for both VMAIN and VSUB rails. The load transient response performance is shown in 节
9.2.1.3.
For load switch version, VSUB rails requires an output capacitor connected between VSUB and GND pins.
Ceramic capacitor of 1 µF (nominal value) is recommended for most applications.
9.2.1.2.5 Control Sequence
In this example, the MCU is powered by the boost output V(MAIN) and the subsystem is powered by the LDO
V
(SUB). MCU controls both of the TPS610981 and subsystem. The control sequence as shown in 图 9-2 is
recommended.
Logic
High
MODE
Logic
Low
3.3V
VMAIN
3.0V
VSUB
0V
Subsystem
Load
System
status
Sleep Mode
Active Mode
图9-2. System Control Sequence
When the system is waking up, the MCU wakes up itself first, and it then pulls the MODE pin of TPS610981 to
high to turned on the V(SUB) rail. TPS610981 enters into Active mode and gets ready to provide power to the
subsystem. Then the MCU enables the subsystem.
When the system is entering into sleep mode, the MCU disables the subsystem first and then pulls the MODE
pin to low to turn off the V(SUB), so the subsystem is disconnected from the supply to minimize the current drain.
TPS610981 enters into Low Power mode and the VMAIN rail still powers the MCU with only 300 nA quiescent
current. The MCU enters into sleep mode itself finally.
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9.2.1.3 Application Curves
TPS610981
MODE = L
I(MAIN) = 1 mA
VIN = 1.5 V
I(SUB) = 0 mA
TPS610981
MODE = L
I(MAIN) = 10 mA
VIN = 1.5 V
I(SUB) = 0 mA
图9-3. Switching Waveforms
图9-4. Switching Waveforms
TPS610981
MODE = L
I(MAIN) = 100 mA
VIN = 1.5 V
I(SUB) = 0 mA
TPS610981
MODE = H
I(MAIN) = 0 mA
VIN = 1.5 V
I(SUB) = 1 mA
图9-5. Switching Waveforms
图9-6. Switching Waveforms
TPS610981
MODE = H
I(MAIN) = 0 mA
VIN = 1.5 V
I(SUB) = 10 mA
TPS610981
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 100 mA
图9-7. Switching Waveforms
图9-8. Switching Waveforms
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TPS610986
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 1 mA
TPS610986
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 10 mA
图9-9. Switching Waveforms
图9-10. Switching Waveforms
TPS610986
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 100 mA
TPS610981
MODE = L
VIN = 2.5 V
I(SUB) = 0 mA
I(MAIN) = 0 mA to 50 mA, 5 µs rising/falling
edge
图9-11. Switching Waveforms
图9-12. Load Transient Response
TPS610981
MODE = H
VIN = 2.5 V
I(SUB) = 0 mA
TPS610981
MODE = H
VIN = 2.5 V
I(MAIN) = 0 mA
I(MAIN) = 0 mA to 50 mA, 5 µs rising/falling
edge
I(SUB) = 0 mA to 50 mA, 5 µs rising/falling
edge
图9-13. Load Transient Response
图9-14. LDO Load Transient Response
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TPS610981
MODE = L
I(MAIN) = 20 mA
I(SUB) = 0 mA
TPS610981
MODE = H
I(MAIN) = 20 mA
I(SUB) = 0 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
图9-15. Line Transient Response
图9-16. Line Transient Response
TPS610981
MODE = H
I(MAIN) = 0 mA
I(SUB) = 20 mA
TPS610981
VIN = 1.5 V
I(SUB) = 0 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
MODE = L
I(MAIN) = 0 mA to 120 mA to 0 mA, ramp
up and down
图9-17. Line Transient Response
图9-18. Load Regulation
TPS610981
MODE = H
VIN = 1.5 V
I(MAIN) = 0 mA
TPS610981
MODE = H
I(MAIN) = 0 mA
I(SUB) = 30 mA
I(SUB) = 0 mA to 120 mA to 0 mA, ramp
up and down
VIN = 0.7 V to 4.5 V, ramp up and down
图9-20. Line Regulation
图9-19. Load Regulation
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
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TPS610981
R(SUB) = open load
TPS610981
MODE connected to GND
VIN = 0.7 V
R(MAIN) = 1 kΩ
R(MAIN) = 3 kΩ
MODE pin toggling
图9-21. Mode Toggling
图9-22. Startup
TPS610981
VIN = 1.5 V
TPS610986
VIN = 1.5 V
R(MAIN) = 1 kΩ
R(SUB) = 1 kΩ
R(MAIN) = 1 kΩ
R(SUB) = 1 kΩ
MODE connected to VMAIN
C(SUB) = 1 µF
MODE connected to VMAIN
图9-23. Startup
图9-24. Startup
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9.2.2 VMAIN to Power the System in Low Power Mode
If only one power supply is needed for the whole system, users can easily leave the VSUB pin float and only use
the VMAIN rail as the power supply. In this case, the TPS61098x functions as a standard boost converter. If
enhanced load transient performance is needed when the system works in Active mode, the controller can
control the MODE pin to switch the TPS61098x between the Active mode and Low Power mode. If the ultra-low
Iq is critical for the application, users can connect the MODE pin to GND so the TPS61098x keeps working in
Low Power mode with only 300 nA quiescent current. Below shows a typical application where the TPS61098 is
used in Low Power mode to generate 2.2 V with only 300 nA Iq to power the whole system.
L
4.7µH
0.7 V to 1.65 V
2.2 V
SW
VMAIN
System
CBAT
10µF
RIN
400ꢀ
BOOST
CTRL
LDO
CTRL
VIN
CO1
10µF
VSUB
GND
CIN
0.1µF
MODE
Copyright © 2016, Texas Instruments Incorporated
图9-25. Typical Application of TPS61098 VMAIN to Power the System in Low Power Mode
9.2.2.1 Design Requirements
• 2.2 V V(MAIN) to power the whole system
• Power source, single-cell alkaline battery (0.7 V to 1.65 V range)
• ≥80% conversion efficiency at 10 µA load
9.2.2.2 Detailed Design Procedure
Refer to 节9.2.1.2 for the detailed design steps.
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
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9.2.2.3 Application Curves
TPS61098
MODE = L
VIN = 1.5 V
TPS61098
MODE = L
I(MAIN) = 100 mA I(SUB) = 0 mA
I(MAIN) = 50 mA to 100 mA, 5 µs rising/falling
edge
VIN = 1.2 V to 1.8 V, 10 µs rising/falling
edge
图9-26. Load Transient Response
图9-27. Line Transient Response
TPS61098
R(MAIN) = 3 kΩ
MODE connected to GND
VIN = 0.7 V
图9-28. Startup
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
9.2.3 VSUB to Power the System in Active Mode
In some applications, the system controller can be powered by the battery directly, but a buck-boost or a boost
converter with an LDO is needed to provide a quiet power supply for a subsystem like a sensor. In this type of
application, the TPS61098x can be used to replace the discrete boost converter and the LDO, providing a
compact solution to simplify the system design and save the PCB space. The LDO can be turned on and off by
the MODE pin. When the MODE pin is pulled low, the LDO is turned off to disconnect the load, and the
TPS61098x also enters into Low Power mode to save power consumption. 图 9-29 shows an application where
the VSUB of the TPS61098 is used to supply the 3.1 V for a sensor in a system. The boost converter of the
TPS61098 outputs 4.3 V and provides enough headroom for the LDO operation.
L
4.7µH
0.7 V to 1.65 V
SW
VMAIN
CBAT
10µF
CO1
10µF
RIN
400ꢀ
BOOST
CTRL
LDO
CTRL
VIN
3.1 V
VSUB
GND
Sensor
CIN
0.1µF
CO2
10µF
MODE
Copyright © 2016, Texas Instruments Incorporated
图9-29. Typical Application of TPS61098 VSUB to Power the System in Active Mode
9.2.3.1 Design Requirements
• 3.1 V rail to power a sensor
• Power source, single-cell li-ion battery (2.7 V to 4.3 V range)
9.2.3.2 Detailed Design Procedure
Refer to 节9.2.1.2 for the detailed design steps.
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
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9.2.3.3 Application Curves
TPS61098
MODE = H
VIN = 3.6 V
I(MAIN) = 0 mA
TPS61098
MODE = H
I(MAIN) = 0 mA
I(SUB) = 100 mA
I(SUB) = 0 mA to 50 mA , 5 µs rising/falling
edge
VIN = 2.7 V to 3.2 V, 5 µs rising/falling edge
图9-31. Line Transient Response
图9-30. LDO Load Transient Response
TPS610982
MODE = L
I(MAIN) = 0 mA
I(SUB) = 100 mA
TPS610982
MODE = H
I(MAIN) = 0 mA
I(SUB) = 100 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
图9-32. Line Transient Response
图9-33. Line Transient Response
TPS610982 VIN = 2.5 V
I(MAIN) = 0 mA
I(SUB) = 50 mA to 100 mA , 5 µs rising/falling
edge
TPS610982 VIN = 2.5 V
I(MAIN) = 0 mA
I(SUB) = 50 mA to 100 mA , 5 µs rising/falling
edge
MODE = L
MODE = H
图9-34. LDO Load Transient Response
图9-35. LDO Load Transient Response
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www.ti.com.cn
ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
TPS61098
TPS61098
MODE connected to VMAIN
R(MAIN) = 10 kΩ
R(SUB) = 3 kΩ
R(MAIN) = 1 kΩ
R(SUB) = 1 kΩ
MODE pin toggling
VIN = 3.6 V
图9-36. MODE Toggling
图9-37. Startup
TPS610982
TPS610982
MODE connected to VMAIN
R(MAIN) = 1 kΩ
R(SUB) = 1 kΩ
VIN = 1.5 V
R(MAIN) = 1 kΩ
R(SUB) = 1 kΩ
MODE connected to GND
VIN = 1.5 V
图9-38. Startup
图9-39. Startup
10 Power Supply Recommendations
The TPS61098x family is designed to operate from an input voltage supply range between 0.7 V to 4.5 V. The
power supply can be either a one-cell or two-cell alkaline, NiCd or NiMH, one-cell coin cell or one-cell Li-Ion or
Li-polymer battery. The input supply should be well regulated with the rating of TPS61098x.
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
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11 Layout
11.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
paths. The input and output capacitor, as well as the inductor should be placed as close as possible to the IC.
11.2 Layout Example
The bottom layer is a large GND plane connected by vias.
Top Layer
INPUT
VMAIN
GROUND
GROUND
MODE VSUB
图11-1. Layout
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ZHCSDX3F –JUNE 2015 –REVISED SEPTEMBER 2021
12 Device and Documentation Support
12.1 Device Support
12.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息,不能构成与此类产品或服务或保修的适用性有关的认可,不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
12.2 Documentation Support
12.2.1 Related Documentation
• Texas Instruments, Performing Accurate PFM Mode Efficiency Measurements Application Report
• Texas Instruments, Accurately Measuring Efficiency Of Ultra Low-IQ Devices Technical Brief
• Texas Instruments, IQ: What It Is, What It Isn’t, And How To Use It Techanical Brief
12.3 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册,即可每周接收产品信息更
改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
12.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
12.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
12.6 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序,可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级,大至整个器件故障。精密的集成电路可能更容易受到损坏,这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
12.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS610981DSER
TPS610981DSET
TPS610982DSER
TPS610982DSET
TPS610985DSER
TPS610985DSET
TPS610986DSER
TPS610986DSET
TPS610987DSER
TPS610987DSET
TPS61098DSER
TPS61098DSET
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
6
6
6
6
6
6
6
6
6
6
6
6
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
GM
GM
G8
G8
1G
1G
1H
1H
3X
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
3X
GL
GL
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2021
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS610981DSER
TPS610981DSET
TPS610982DSER
TPS610982DSET
TPS610985DSER
TPS610985DSET
TPS610986DSER
TPS610986DSET
TPS610987DSER
TPS610987DSET
TPS61098DSER
TPS61098DSET
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
6
6
6
6
6
6
6
6
6
6
6
6
3000
250
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
0.95
0.95
0.95
0.95
0.95
0.95
0.95
0.95
0.95
0.95
0.95
0.95
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
3000
250
3000
250
3000
250
3000
250
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS610981DSER
TPS610981DSET
TPS610982DSER
TPS610982DSET
TPS610985DSER
TPS610985DSET
TPS610986DSER
TPS610986DSET
TPS610987DSER
TPS610987DSET
TPS61098DSER
TPS61098DSET
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
DSE
6
6
6
6
6
6
6
6
6
6
6
6
3000
250
205.0
205.0
205.0
205.0
205.0
205.0
205.0
205.0
205.0
205.0
205.0
205.0
200.0
200.0
200.0
200.0
200.0
200.0
200.0
200.0
200.0
200.0
200.0
200.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
3000
250
3000
250
3000
250
3000
250
3000
250
Pack Materials-Page 2
PACKAGE OUTLINE
DSE0006A
WSON - 0.8 mm max height
SCALE 6.000
PLASTIC SMALL OUTLINE - NO LEAD
1.55
1.45
A
B
1.55
1.45
PIN 1 INDEX AREA
0.8 MAX
C
SEATING PLANE
0.08 C
(0.2) TYP
0.05
0.00
0.6
0.4
5X
3
4
2X 1
4X 0.5
6
1
0.3
6X
0.7
0.5
0.2
0.1
0.05
PIN 1 ID
C A B
C
4220552/A 04/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
DSE0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
PKG
(0.8)
5X (0.7)
1
6
6X (0.25)
SYMM
4X 0.5
4
3
(R0.05) TYP
(1.6)
LAND PATTERN EXAMPLE
SCALE:40X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
PADS 4-6
NON SOLDER MASK
DEFINED
PADS 1-3
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4220552/A 04/2021
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
DSE0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
PKG
5X (0.7)
(0.8)
6X (0.25)
1
6
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:40X
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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