TPS62240DRVR_技术文档

TPS62240, TPS62242, TPS62243

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

2.25 MHz 300 mA Step Down Converter in 2x2SON/TSOT23 Package

1

FEATURES

DESCRIPTION

23

•

High Efficiency Step Down Converter

•

Output Current up to 300 mA

The TPS62240 device is

a

high efficiency

synchronous step down dc-dc converter optimized for

battery powered portable applications. It provides up

to 300 mA output current from a single Li-Ion cell and

is ideal to power portable applications like mobile

phones and other portable equipment..

V_INRange From 2 V to 6 V for Li-Ion Batteries

With Extended Voltage Range

•

2.25 MHz Fixed Frequency Operation

Power Save Mode at Light Load Currents

Output Voltage Accuracy in PWM Mode ±1.5%

Adjustable Output Voltage from 0.6 V to V_IN

Typical 15 μA Quiescent Current

With an input voltage range of 2 V to 6 V, the device

supports applications powered by Li-Ion batteries with

extended voltage range, two- and three-cell alkaline,

3.3-V and 5-V input voltage rails.

100% Duty Cycle for Lowest Dropout

Available in a TSOT23 and 2×2×0,8 mm SON

Allows < 1 mm Solution Height

The TPS62240 operates at 2.25 MHz fixed switching

frequency and enters Power Save Mode operation at

light load currents to maintain high efficiency over the

entire load current range.

APPLICATIONS

The Power Save Mode is optimized for low output

voltage ripple. For low noise applications, the device

can be forced into fixed frequency PWM mode by

pulling the MODE pin high. In the shutdown mode,

the current consumption is reduced to less than 1 μA.

TPS62240 allows the use of small inductors and

capacitors to achieve a small solution size.

•

Bluetooth™ Headset

Cell Phones, Smart-phones

WLAN

PDAs, Pocket PCs

Low Power DSP Supply

Portable Media Players

Digital Cameras

The TPS62240 is available in a 5-pin TSOT23 and

6-pin 2mm×2mm SON package.

L₁

2.2µH

100

TPS62243DRV

V_IN2.0V to 6V

V = 2 V

I

V_OUT1.8V

V = 2 V

I

V = 2.7

90

80

70

V_IN

SW

Up to 300mA

I

V = 4.5

I

C_IN

4.

EN

V = 3 V

I

7

µF

C_OUT

10µF

FB

GND

V = 3.6

60

50

40

I

MODE

V = 4.5

I

30

20

10

0

V_O= 1.8 V,

MODE = GND,

L = 2.2 mH,

DCR 110 mΩ

0.01

0.1

1

10

100 1000

I

- Output Current - mA

O

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

3

PowerPAD is a trademark of Texas Instruments.

Bluetooth is a trademark of Bluetooth SIG, Inc..

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS62240, TPS62242, TPS62243

www.ti.com

SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

PACKAGE

DESIGNATOR

PACKAGE

MARKING

(1)

T_A

PART NUMBER

OUTPUT VOLTAGE⁽²⁾

PACKAGE⁽³⁾

ORDERING

TPS62240

TPS62242

TPS62243

adjustable

TSOT23-5

SON 2x2 -6

DDC

DRV

TPS62240DDC

TPS62240DRV

TPS62242DRV

TPS62243DRV

BYO

BYJ

adjustable

–40°C to

85°C

1.2V fixed output voltage

1.8V fixed output voltage

CCY

CBQ

(1) The DDC (TSOT-23-5) and DRV (SON2x2) package are available in tape on reel. Add R suffix to order quantities of 3000 parts per reel.

(2) Contact TI for other fixed output voltage options.

(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

VALUE

–0.3 to 7

–0.3 to V_IN+0.3, ≤7

–0.3 to 7

Internally limited

2

UNIT

V_I

Input voltage range⁽²⁾

Voltage range at EN, MODE

Voltage on SW

V

A

Peak output current

HBM Human body model

CDM Charge device model

Machine model

kV

ESD rating⁽³⁾

1

200

V

T_J

Maximum operating junction temperature

Storage temperature range

-40 to 125

-65 to 150

°C

T_stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) The human body model is a 100-pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200-pF

capacitor discharged directly into each pin.

DISSIPATION RATINGS

POWER RATING

FOR T_A≤ 25°C

DERATING FACTOR

ABOVE T_A= 25°C

PACKAGE

R_θJA

DDC

DRV

250°C/W

76°C/W

400 mW

4 mW/°C

1300 mW

13 mW/°C

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

2

NOM

MAX

6

UNIT

V

V_I

Supply voltage, VIN

Output voltage range for adjustable voltage

Operating ambient temperature

Operating junction temperature

0.6

–40

VIN

85

V

T_A

T_J

°C

125

2

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

ELECTRICAL CHARACTERISTICS

Over full operating ambient temperature range, typical values are at T_A= 25°C. Unless otherwise noted, specifications apply

for condition V_IN= EN = 3.6V. External components C_IN= 4,7μF 0603, C_OUT= 10μF 0603, L = 2.2μH, refer to parameter

measurement information.

PARAMETER

TEST CONDITIONS

MIN

TYP MAX UNIT

SUPPLY

V_IN

Input voltage range

Output current

2

6

300

150

V

2.3 V ≤ V_IN≤ 6 V

I_OUT

mA

2 V ≤ V_IN≤ 2.3 V

I_OUT= 0 mA. PFM mode enabled (MODE = GND)

device not switching

15

18.5

3.8

μA

I_OUT= 0 mA. PFM mode enabled (MODE = GND)

I_Q

Operating quiescent current

(1)

device switching, V_OUT= 1.8 V,

I_OUT= 0 mA, switching with no load (MODE = V_IN),

PWM operation , V_OUT= 1.8 V, V_IN= 3 V

mA

I_SD

Shutdown current

EN = GND

Falling

0.1

1.85

1.95

1

μA

UVLO

Undervoltage lockout threshold

V

Rising

ENABLE, MODE

V_IH

V_IL

I_IN

High level input voltage, EN, MODE

2 V ≤ V_IN≤ 6 V

1

0

V_IN

0.4

1

V

Low level input voltage, EN, MODE

Input bias current, EN, MODE

2 V ≤ V_IN≤ 6 V

EN, MODE = GND or VIN

0.01

μA

POWER SWITCH

High side MOSFET on-resistance

240 480

180 380

R_DS(on)

V_IN= V_GS= 3.6 V, T_A= 25°C

mΩ

Low side MOSFET on-resistance

Forward current limit MOSFET

high-side and low side

I_LIMF

TSD

VIN = VGS = 3.6 V

0.56

0.7 0.84

A

Thermal shutdown

Increasing junction temperature

Decreasing junction temperature

140

20

°C

Thermal shutdown hysteresis

OSCILLATOR

f_SW

Oscillator frequency

2 V ≤ V_IN≤ 6 V

2

2.25

600

2.5

V_IN

MHz

OUTPUT

V_OUT

V_ref

Adjustable output voltage range

Reference Voltage

0.6

V

mV

MODE = V_IN, PWM operation, 2 V ≤ V_IN≤ 6 V, in

fixed output voltage versions V_FB= V_OUT, See

Feedback voltage

–1.5%

0% 1.5%

(2)

V_FB

Feedback voltage PFM mode

Load regulation

MODE = GND, device in PFM mode

0%

-0.5

500

250

%/A

μs

t_{Start Up}

t_Ramp

I_lkg

Start-up Time

Time from active EN to reach 95% of V_OUTnominal

Time to ramp from 5% to 95% of V_OUT

V_IN= 3.6 V, V_IN= V_OUT= V_SW, EN = GND,⁽³⁾

V_OUTramp UP time

Leakage current into SW pin

μs

0.1

1

μA

(1) See the parameter measurement information.

(2) for V_IN= V_O+ 0.6

(3) In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

PIN ASSIGNMENTS

DDC PACKAGE

(TOP VIEW)

DRV PACKAGE

(TOP VIEW)

V_IN

GND

EN

5

SW

FB

1

2

3

1

6

5

4

SW

MODE

FB

GND

VIN

EN

2

3

4

TERMINAL FUNCTIONS

TERMINAL

NO.

I/O

DESCRIPTION

NO.

NAME

(SON)

TSTO23-5

V_IN

5

6

1

2

PWR V_INpower supply pin.

PWR GND supply pin

GND

This is the enable pin of the device. Pulling this pin to low forces the device into shutdown

mode. Pulling this pin to high enables the device. This pin must be terminated.

EN

SW

FB

4

1

3

5

4

I

OUT

I

This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor

to this terminal.

Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin.

In case of fixed output voltage option, connect this pin directly to the output capacitor.

This pin is only available at SON package option. MODE pin = high forces the device to

operate in fixed frequency PWM mode. MODE pin = low enables the Power Save Mode with

automatic transition from PFM mode to fixed frequency PWM mode.

MODE

2

I

FUNCTIONAL BLOCK DIAGRAM

VIN

Current

Limit Comparator

VIN

Thermal

Shutdown

Undervoltage

Lockout1.8V

Limit

EN

High Side

PFM Comparator

Reference

0.6V VREF

FB

VREF

Gate Driver

Anti-

Shoot-Through

Only in 2x2SON

Control

Stage

Mode

FB

MODE

Error Amp .

SW1

Softstart

VOUT RAMP

CONTROL

VREF

Integrator

PWM

Comp.

FB

Zero-Pole

AMP.

Limit

RI 1

GND

Low Side

RI..N

Current

Limit Comparator

Sawtooth

Generator

2.25 MHz

Oscillator

Int. Resistor

Network

GND

4

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

PARAMETER MEASUREMENT INFORMATION

L

2.2 mH

TPS62240DVR

V

OUT

C

V

IN

SW

FB

R

1

C

1

22 pF

IN

4.7 mF

EN

OUT

10 mF

GND

R

2

MODE

L: LPS3015 2.2 mH, 110 mW

GRM188R60J475K 4.7 mF Murata 0603 size

C

IN

C

GRM188R60J106M 10 mF Murata 0603 size

OUT

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Figure 21

Figure 22

Figure 23

Figure 24

Figure 25

vs Output current, Power Save Mode

vs Output current, Forced PWM Mode

vs Output current

Efficiency

vs Output current

vs Output current, T_A= 25°C, Mode = GND

vs Output current, T_A= –40°C, Mode = GND

vs Output current, T_A= 85°C, Mode = GND

vs Output current, T_A= 25°C, Mode = V_I

vs Output current, T_A= 85°C, Mode = GND

vs Output current, T_A= –40°C, Mode = V_I

Output voltage accuracy

Startup timing

PWM Mode with V_O= 1.8V

PFM Mode with V_O= 1.8V

Typical operation

PFM Mode Ripple

1 mA to 50 mA with V_O= 1.8V

20 mA to 200 mA with V_O= 1.8V

50 mA to 200 mA with V_O= 1.8V

I_O= 50 mA, 3.6V to 4.2V

PFM load transient

PFM line transient

Mode transition

I_O= 250 mA, 3.6V to 4.2V

PFM to PWM

PWM to PFM

Shutdown Current into VIN

Quiescent Current

vs Input Voltage, (T_A= 85°C, T_A= 25°C, T_A= -40°C)

Static Drain-Source On-State

Resistance

vs Input Voltage, (T_A= 85°C, T_A= 25°C, T_A= -40°C)

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

EFFICIENCY (Power Save Mode)

EFFICIENCY (Forced PWM Mode)

vs

OUTPUT CURRENT

100

90

80

70

60

V = 2 V

I

V = 2 V

I

V = 2 V

90

80

70

I

V = 2.7 V

I

V = 2.7 V

I

V = 4.5 V

I

V = 3 V

I

V = 3 V

I

V = 4.5 V

I

V = 3.6 V

I

60

50

40

V = 3.6 V

I

V = 4.5 V

I

50

40

30

20

10

0

30

20

10

V_O= 1.8 V,

MODE = GND,

L = 2.2 mH,

DCR 110 mΩ

V

= 1.8 V,

O

MODE = V ,

I

L = 2.2 mH

0.01

0.1

1

10

100

1000

0

1

10

100

1000

I

- Output Current - mA

O

I

- Output Current - mA

O

Figure 1.

Figure 2.

EFFICIENCY

vs

OUTPUT CURRENT

EFFICIENCY

vs

OUTPUT CURRENT

100

90

80

70

60

50

40

V

= 2.3 V

90

80

70

60

50

40

I

VI = 2.7 V

V

I

= 4.5 V

V

= 2.3 V

V

= 2.3 V

V

= 3.6 V

I

V

= 4.5 V

V

= 2.7 V

I

V

= 3.6 V

I

30

V

= 1.2 V,

V = 1.2 V,

O

MODE = V ,

I

MODE = GND,

L = 2 mH,

MIPSA2520

20

10

0

20

10

0

L = 2 mH,

MIPSA2520

C

= 10 mF 0603

C

= 10 mF 0603

O

1

10

100

1000

0.01

0.1

1

10

100

1000

I

− Output Current − mA

I

− Output Current − mA

O

Figure 3.

Figure 4.

6

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

OUTPUT VOLTAGE ACCURACY

vs

OUTPUT CURRENT

1.88

T

1.88

1.86

T

= -40°C,

= 25°C,

A

V

= 1.8 V,

V

= 1.8 V,

O

MODE = GND,

O

MODE = GND,

1.86

1.84

1.82

1.8

L = 2.2 mH,

= 10 mF

L = 2.2 mH,

= 10 mF

C

1.84

1.82

1.80

1.78

O

PFM

PWM

V = 2.3 V

I

V = 2.3 V

I

V = 2.7 V

I

V = 3 V

I

V = 3.6 V

I

V = 2.7 V

I

V = 3 V

I

1.78

V = 3.6 V

I

1.76

1.74

V = 4.5 V

I

1.76

1.74

V = 4.5 V

I

0.01

0.1

1

10

100

1000

0.01

0.1

1

10

100

1000

I

- Output Current - mA

O

I

- Output Current - mA

O

Figure 5.

Figure 6.

OUTPUT VOLTAGE ACCURACY

vs

OUTPUT CURRENT

1.854

1.836

1.88

1.86

T

= 85°C,

T = 25°C,

A

V

= 1.8 V,

V = 1.8 V,

O

MODE = GND,

MODE = V ,

I

L = 2.2 mH,

= 10 mF

L = 2.2 mH

C

1.84

1.82

1.8

O

1.818

1.8

PFM

PWM

V = 2 V

I

V = 2.3 V

I

V = 2.7 V

I

V = 3 V

1.782

V = 2.7 V

I

1.78

I

V = 3 V

I

V = 3.6 V

I

V = 4.5 V

I

1.764

1.746

1.76

1.74

V = 4.5 V

I

0.01

0.1

1

10

100

1000

0.01

0.1

I

1

10

100

1000

I

- Output Current - mA

O

Figure 7.

Figure 8.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

OUTPUT VOLTAGE ACCURACY

vs

OUTPUT CURRENT

1.854

1.836

1.818

1.854

T

= -40°C,

= 1.8 V,

T

= 85°C,

= 1.8 V,

A

V

O

1.836

1.818

MODE = V ,

I

MODE = V ,

I

L = 2.2 mH

1.8

1.782

1.764

1.746

V = 2 V

I

V = 2.7 V

I

V = 2 V

I

1.782

V = 3 V

I

V = 3.6 V

V = 2.7 V

I

V = 3 V

I

V = 3.6 V

V = 4.5 V

I

1.764

1.746

V = 4.5 V

I

0.01

0.1

I

1

10

100

1000

100

1000

10

0.01

0.1

1

- Output Current - mA

O

I

- Output Current - mA

O

Figure 9.

Figure 10.

TYPICAL OPERATION

vs

STARTUP TIMING

PWM MODE

V_IN3.6V

V_IN= 3.6V

R_Load= 10R

V_OUT= 1.8V

I_INinto C_IN

EN 2V/Div

V_OUT1.8V, I_OUT150mA

L 2.2mH, C_OUT10mF 0603

V_OUT10mV/Div

SW 2V/Div

MODE = GND

SW 2V/Div

V_OUT2V/Div

I_IN100mA/Div

I_coil200mA/Div

Time Base - 100ms/Div

Time Base - 10ms/Div

Figure 11.

Figure 12.

8

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

TYPICAL OPERATION

vs

PFM MODE

PFM MODE RIPPLE

V_IN3.6V; V_OUT1.8V, I_OUT10mA;

L = 4.7mH, C_OUT= 10mF 0603,

MODE = GND

V_OUT20mV/Div

V_IN3.6V

V_OUT1.8V, I_OUT10mA

L 2.2mH, C_OUT10mF 0603

SW 2V/Div

I_coil200mA/Div

Time Base - 2ms/Div

Time Base - 10ms/Div

Figure 13.

Figure 14.

PFM LOAD TRANSIENT

V_OUT50mV/Div

V_IN3.6V

V_OUT1.8V

I_OUT20mA to 200mA

I_OUT1mA to 50mA

MODE = GND

200mA

I_OUT200mA/Div

20mA

I_OUT50mA/Div

50mA

1mA

I_coil200mA/Div

Time base - 40ms/Div

Time Base - 100ms/Div

Figure 15.

Figure 16.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

PFM LOAD TRANSIENT

PFM LINE TRANSIENT

V_IN3.6V to 4.2V

500mV/Div

V_OUT50mV/Div

V_IN3.6V

V_OUT1.8V

I_OUT50mA to 200mA

MODE = V_IN

I_OUT200mA/Div

50mA

200mA

V_OUT= 1.8V

50mV/Div

I_OUT= 50mA

MODE = GND

I_coil200mA/Div

Time Base - 100ms/Div

Figure 17.

Figure 18.

MODE TRANSITION

PFM to PWM

PFM LINE TRANSIENT

V_IN3.6V to 4.2V

500mV/Div

V_IN= 3.6

V_OUT= 1.8V

I_OUT= 10mA

MODE

2V/Div

SW

2V/Div

PFM Mode

Forced PWM Mode

V_OUT= 1.8V

50mV/Div

I_OUT= 250mA

MODE = GND

I_coil

200mA/Div

Time Base - 100ms/Div

Time Base - 1ms/Div

Figure 19.

Figure 20.

10

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

SHUTDOWN CURRENT INTO VIN

MODE TRANSITION

PWM to PFM

vs

INPUT VOLTAGE

0.8

EN = GND

MODE

V_IN= 3.6

2V/Div

0.7

0.6

V_OUT= 1.8V

I_OUT= 10mA

T

= 85^oC

A

SW

0.5

0.4

0.3

0.2

2V/Div

PFM Mode

Forced PWM Mode

I_coil

200mA/Div

T

= 25^oC

T

= -40^oC

A

0.1

0

2

2.5

3

3.5

4

4.5

5

5.5

6

V

− Input Voltage − V

IN

Time Base - 2.5ms/Div

Figure 21.

Figure 22.

QUIESCENT CURRENT

vs

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs

INPUT VOLTAGE

20

18

16

0.8

MODE = GND,

EN = VIN,

Devise Not Switching

High Side Switching

0.7

0.6

0.5

T

= 85^oC

A

T

= 85^oC

A

= 25^oC

T

= 25^oC

T

A

14

12

10

8

0.4

0.3

0.2

0.1

0

T

= -40^oC

A

T

= -40^oC

A

2

2.5

3

3.5

4

4.5

5

5.5

6

2

2.5

3

3.5

4

4.5

5

V

− Input Voltage − V

V

− Input Voltage − V

IN

Figure 23.

Figure 24.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs

INPUT VOLTAGE

0.4

0.35

0.3

Low Side Switching

T

= 85^oC

A

0.25

T

= 25^oC

A

0.2

0.15

0.1

T

= -40^oC

A

0.05

0

2

2.5

3

3.5

4

4.5

5

V

− Input Voltage − V

IN

Figure 25.

12

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DETAILED DESCRIPTION

OPERATION

The TPS62240 step down converter operates with typically 2.25MHz fixed frequency pulse width modulation

(PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter Power

Save Mode and operates then in PFM mode.

During PWM operation, the converter use a unique fast response voltage mode control scheme with input

voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output

capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is

turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the inductor

to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the

control logic will turn off the switch. The current limit comparator will also turn off the switch if the current limit of

the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low Side

MOSFET rectifier is turned on and the inductor current will ramp down. The current flows now from the inductor

to the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET rectifier.

The next cycle is initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the

on the High Side MOSFET switch.

POWER SAVE MODE

The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the converter

will enter Power Save Mode operation automatically. During Power Save Mode, the converter skips switching

and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency.

The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET switch

becomes zero, which indicates discontinuous conduction mode.

During the Power Save Mode, the output voltage is monitored with a PFM comparator. As the output voltage falls

below the PFM comparator threshold of V_OUTnominal, the device starts a PFM current pulse. The High Side

MOSFET switch will turn on, and the inductor current ramps up. After the On-time expires, the switch is turned

off and the Low Side MOSFET switch is turned on until the inductor current becomes zero.

The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered

current, the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold,

the device stops switching and enters a sleep mode with typical 15-μA current consumption.

If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are

generated until the PFM comparator threshold is reached. The converter starts switching again once the output

voltage drops below the PFM comparator threshold.

With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept small.

The PFM Pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the

value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the

size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will

minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger

values.

The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM

mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will then operate

in fixed frequency PWM mode.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

Output voltage

V_OUTnominal

PWM + PFM

moderate to heavy load

PWM Mode

Light load

PFM Mode

Figure 26. Power Save Mode

100% Duty Cycle Low Dropout Operation

The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output

voltage. In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or

more cycles.

With further decreasing V_INthe High Side MOSFET switch is turned on completely. In this case the converter

offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to

achieve longest operation time by taking full advantage of the whole battery voltage range.

The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be

calculated as:

V_INmin = V_Omax + I_Omax × (R_DSo(n)max + R_L)

With:

I_Omax = maximum output current plus inductor ripple current

R_DS(on)max = maximum P-channel switch R_DS(on)

.

R_L= DC resistance of the inductor

V_Omax = nominal output voltage plus maximum output voltage tolerance

UNDERVOLTAGE LOCKOUT

The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from

excessive discharge of the battery and disables the output stage of the converter. The under-voltage lockout

threshold is typically 1.85V with falling V_IN.

MODE SELECTION

The MODE pin allows mode selection between forced PWM mode and Power Save Mode.

Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM

mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light

load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode,

the efficiency is lower compared to the Power Save Mode during light loads.

The condition of the MODE pin can be changed during operation and allows efficient power management by

adjusting the operation mode of the converter to the specific system requirements.

ENABLE

The device is enabled setting EN pin to high. During the start up time t_{Start Up}the internal circuits are settled and

the soft start circuit is activated. The EN input can be used to control power sequencing in a system with various

dc/dc converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and

getting a sequencing of supply rails. With EN pin = GND, the device enters shutdown mode in which all circuits

are disabled. In fixed output voltage versions, the internal resistor divider network is then disconnected from FB

pin.

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SOFT START

The TPS62240 has an internal soft start circuit that controls the ramp up of the output voltage. The output

voltage ramps up from 5% to 95% of its nominal value within typical 250μs. This limits the inrush current in the

converter during ramp up and prevents possible input voltage drops when a battery or high impedance power

source is used. The soft start circuit is enabled within the start up time t_{Start up}

.

SHORT-CIRCUIT PROTECTION

The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current = I_LIMF

.

The current in the switches is monitored by current limit comparators. Once the current in the High Side

MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET

switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side

MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below

the threshold of its current limit comparator.

THERMAL SHUTDOWN

As soon as the junction temperature, T_J, exceeds 140°C (typical) the device goes into thermal shutdown. In this

mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the

junction temperature falls below the thermal shutdown hysteresis.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

APPLICATION INFORMATION

L₁

2.2µH

TPS62240DRV

V_IN2.0V to 6V

V_OUT1.2V

Up to 300mA

V_IN

EN

SW

C₁

33pF

R₁

360 kΩ

C_IN

4.7µF

C_OUT

10 µF

FB

GND

R₂

360 kΩ

MODE

Figure 27. TPS62240DRV Adjustable 1.2 V

L₁

2.2µH

TPS62240DRV

V_IN2.0V to 6V

V_OUT1.8V

Up to 300mA

V_IN

EN

SW

C₁

33pF

R₁

360 kΩ

C_IN

4.7µF

C_OUT

10 µF

FB

GND

R₂

180 kΩ

MODE

Figure 28. TPS62240DRV 1.8 V

L₁

4.7 µH

TPS62240DRV

V_IN2.0V to 6V

V_OUT1.8V

Up to 300mA

V_IN

EN

SW

C₁

33pF

R₁

360 kΩ

C_IN

4.7µF

C_OUT

10 µF

FB

GND

R₂

180 kΩ

MODE

Figure 29. TPS62240DRV 1.8 V Low Ripple

16

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

L₁

2.2 µH

TPS62243DRV

V_IN2.0V to 6V

V_OUT1.8V

V_IN

EN

SW

Up to 300mA

C_IN

47. µF

C_OUT

10 µF

FB

GND

MODE

Figure 30. TPS62243 Fixed 1.8 V

OUTPUT VOLTAGE SETTING

The output voltage can be calculated to:

R

1

ǒ_{1 )}Ǔ

V

+ V

OUT

REF

R

2

with an internal reference voltage V_REFtypical 0.6 V.

To minimize the current through the feedback divider network, R₂should be 180 kΩ or 360 kΩ. The sum of R₁

and R₂should not exceed ~1MΩ, to keep the network robust against noise.

An external feed forward capacitor C₁is required for optimum load transient response. The value of C₁should be

in the range between 22pF and 33pF.

Route the FB line away from noise sources, such as the inductor or the SW line.

OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)

The TPS62240 is designed to operate with inductors in the range of 1.5μH to 4.7μH and with output capacitors in

the range of 4.7μF to 22μF. The part is optimized for operation with a 2.2μH inductor and 10μF output capacitor.

Larger or smaller inductor values can be used to optimize the performance of the device for specific operation

conditions. For stable operation, the L and C values of the output filter may not fall below 1μH effective

Inductance and 3.5μF effective capacitance. Selecting larger capacitors is less critical because the corner

frequency of the L-C filter moves to lower frequencies with fewer stability problems.

Inductor Selection

The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc

resistance and saturation current. The inductor ripple current (ΔI_L) decreases with higher inductance and

increases with higher V_Ior V_O.

The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead

to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output

voltage ripple but lower PFM frequency.

Equation 1 calculates the maximum inductor current in PWM mode under static load conditions. The saturation

current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 2.

This is recommended because during heavy load transient the inductor current will rise above the calculated

value.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

Vout

Vin

1 *

DI + Vout

L

L ƒ

(1)

(2)

DI

L

I

+ I

)

outmax

Lmax

2

With:

f = Switching Frequency (2.25 MHz typical)

L = Inductor Value

ΔI_L= Peak to Peak inductor ripple current

I_Lmax= Maximum Inductor current

A more conservative approach is to select the inductor current rating just for the maximum switch current limit

I_LIMFof the converter.

Accepting larger values of ripple current allows the use of low inductance values, but results in higher output

voltage ripple, greater core losses, and lower output current capability.

The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the

losses in the dc resistance (R_(DC)) and the following frequency-dependent components:

•

The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)

Additional losses in the conductor from the skin effect (current displacement at high frequencies)

Magnetic field losses of the neighboring windings (proximity effect)

Radiation losses

Table 1. List of Inductors

DIMENSIONS [mm³]

2.5 × 2.0 × 1.0

2.5 × 2.0 × 1.2

2.5x2.0x1.0

Inductance μH

INDUCTOR TYPE

MIPS2520D2R2

MIPSA2520D2R2

KSLI-252010AG2R2

LQM2HPN2R2MJ0L

LPS3015

SUPPLIER

FDK

2.0

2.2

FDK

Hitachi Metals

Murata

2.5x2.0x1.2

3 × 3 × 1.4

Coilcraft

Output Capacitor Selection

The advanced fast-response voltage mode control scheme of the TPS62240 allows the use of tiny ceramic

capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are

recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,

aside from their wide variation in capacitance over temperature, become resistive at high frequencies.

At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:

Vout

Vin

L ƒ

1 *

1

I

+ Vout

RMSCout

Ǹ

2

3

(3)

At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the

voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the

output capacitor:

Vout

Vin

L ƒ

1 *

1

ǒ

_) ESRǓ

DVout + Vout

8 Cout ƒ

(4)

At light load currents, the converter operates in Power Save Mode and the output voltage ripple is dependent on

the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple

in PFM mode and tighten dc output accuracy in PFM mode.

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

Input Capacitor Selection

The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best

input voltage filtering, and minimizing the interference with other circuits caused by high input voltage spikes. For

most applications, a 4.7-μF to 10-μF ceramic capacitor is recommended. Because ceramic capacitors lose up to

80% of its initial capacitance at 5V, it is recommended that a 10-μF input capacitors be used for input voltages >

4.5V. The input capacitor can be increased without any limit for better input voltage filtering.

Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input, and

the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step

on the input can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop

instability or could even damage the part by exceeding the maximum ratings

Table 2. List of Capacitors

CAPACITANCE

4.7μF

TYPE

SIZE

SUPPLIER

Murata

GRM188R60J475K

GRM188R60J106M69D

0603: 1.6x0.8x0.8mm³

10μF

Murata

LAYOUT CONSIDERATIONS

As for all switching power supplies, the layout is an important step in the design. Proper function of the device

demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If

the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well

as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and

short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins

as well as the inductor and output capacitor.

Connect the GND pin of the device to the PowerPAD™ land of the PCB and use this pad as a star point. Use a

common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.

Connect these ground nodes together to the PowerPAD land (star point) underneath the IC. Keep the common

path to the GND pin, which returns the small signal components, and the high current of the output capacitors as

short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed

away from noisy components and traces (e.g., SW line).

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SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007

V_OUT

GND

C1

R1

V_IN

C

OUT

L

U

GND

Figure 31. Layout

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PACKAGE OPTION ADDENDUM

www.ti.com

25-Sep-2007

PACKAGING INFORMATION

Orderable Device

TPS62240DDCR

TPS62240DDCRG4

TPS62240DDCT

TPS62240DDCTG4

TPS62240DRVR

TPS62240DRVRG4

TPS62240DRVT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

TO/SOT

DDC

5

6

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TO/SOT

SON

DDC

DRV

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS62240DRVTG4

TPS62243DRVR

TPS62243DRVRG4

TPS62243DRVT

SON

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS62243DRVTG4

SON

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

25-Sep-2007

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Sep-2007

TAPE AND REEL BOX INFORMATION

Device

Package Pins

Site

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) (mm) Quadrant

(mm)

179

(mm)

TPS62240DDCR

TPS62240DDCT

TPS62240DRVR

TPS62240DRVT

TPS62243DRVR

TPS62243DRVT

DDC

DRV

5

6

SITE 48

8

3.2

2.2

3.2

2.2

1.4

1.2

4

8

Q3

Q2

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Sep-2007

Device

Package

Pins

Site

Length (mm) Width (mm) Height (mm)

TPS62240DDCR

TPS62240DDCT

TPS62240DRVR

TPS62240DRVT

TPS62243DRVR

TPS62243DRVT

DDC

DRV

5

6

SITE 48

195.0

200.0

0.0

Pack Materials-Page 2

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型号：	TPS62240DRVR
厂家：	TEXAS INSTRUMENTS
描述：	2.25 MHz 300 mA Step Down Converter in 2x2SON/TSOT23 Package 2.25 MHz的300毫安降压转换器在2x2SON / TSOT23套餐转换器
文件：	总29页 (文件大小：1076K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TPS62240DRVR [TI]

相关型号：

TPS62240DRVRG4

TPS62240DRVT

TPS62240DRVTG4

TPS62240_13

TPS62242

TPS62242-Q1

TPS62242DRV

TPS62242DRVR

TPS62242DRVRG4

TPS62242DRVT

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TPS62242QDDCRQ1