TPS62674 [TI]
500-mA, 6-MHz HIGH-EFFICIENCY STEP-DOWN CONVERTER IN LOW PROFILE CHIP SCALE PACKAGING; 500毫安， 6 MHz的高效率降压转换器低姿态芯片级封装
| 型号： | TPS62674 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 500-mA, 6-MHz HIGH-EFFICIENCY STEP-DOWN CONVERTER IN LOW PROFILE CHIP SCALE PACKAGING |
| 文件： | 总28页 (文件大小：755K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CSP-6
TPS6267x
www.ti.com
SLVS952 –APRIL 2010
500-mA, 6-MHz HIGH-EFFICIENCY STEP-DOWN CONVERTER
IN LOW PROFILE CHIP SCALE PACKAGING (HEIGHT < 0.4mm)
Check for Samples: TPS6267x
1
FEATURES
APPLICATIONS
23
•
92% Efficiency at 6MHz Operation
•
•
•
Cell Phones, Smart-Phones
Camera Module Embedded Power
Digital TV, WLAN, GPS and Bluetooth™
Applications
•
17mA Quiescent Current
•
•
•
•
•
•
•
•
•
Wide VIN Range From 2.3V to 4.8V
6MHz Regulated Frequency Operation
Spread Spectrum, PWM Frequency Dithering
Best in Class Load and Line Transient
±2% Total DC Voltage Accuracy
Low Ripple Light-Load PFM Mode
>50dB VIN PSRR (1kHz to 10kHz)
Simple Logic Enable Inputs
•
DC/DC Micro Modules
DESCRIPTION
The TPS6267x device is
a
high-frequency
synchronous step-down dc-dc converter optimized for
battery-powered portable applications. Intended for
low-power applications, the TPS6267x supports up to
500-mA load current, and allows the use of low cost
chip inductor and capacitors.
Supports External Clock Presence Detect
Enable Input
•
•
Three Surface-Mount External Components
Required (One 0603 MLCC Inductor, Two 0402
Ceramic Capacitors)
With a wide input voltage range of 2.3V to 4.8V, the
device supports applications powered by Li-Ion
batteries with extended voltage range. Different fixed
voltage output versions are available from 1.0V to
2.3V.
Complete Sub 0.33-mm Component Profile
Solution
Total Solution Size <10 mm2
The TPS6267x operates at a regulated 6-MHz
switching frequency and enters the power-save mode
operation at light load currents to maintain high
efficiency over the entire load current range.
•
•
Available in a 6-Pin NanoFree™ (CSP)
Ultra-Thin Packaging, 0,4mm Max. Height
The PFM mode extends the battery life by reducing
the quiescent current to 17mA (typ) during light load
operation. For noise-sensitive applications, the device
has PWM spread spectrum capability providing a
lower noise regulated output, as well as low noise at
the input. These features, combined with high PSRR
and AC load regulation performance, make this
device suitable to replace a linear regulator to obtain
better power conversion efficiency.
100
200
V = 3.6 V,
I
90
V
= 1.8 V
180
O
80
70
60
50
40
30
20
160
140
120
100
80
V
V
OUT
1.8 V @ 500mA
TPS62671
VIN
BAT
2.3 V .. 4.8 V
L
SW
0.47 mH
60
C
I
40
FB
EN
C
O
2.2 mF
10
0
4.7 mF
20
0
MODE
GND
0.1
1
10
100
1000
I
- Load Current - mA
O
Figure 2. Smallest Solution Size Application
Figure 1. Efficiency vs. Load Current
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
NanoFree is a trademark of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG, Inc.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
TPS6267x
SLVS952 –APRIL 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PACKAGE
MARKING
CHIP CODE
PART
NUMBER
OUTPUT
DEVICE
SPECIFIC FEATURE
TA
ORDERING(3)
VOLTAGE(2)
TPS62671(4)
TPS62672(4)
1.8V
1.5V
PWM Spread Spectrum Modulation
PWM Spread Spectrum Modulation
TPS62671YFD
TPS62672YFD
NZ
OA
PWM Spread Spectrum Modulation
PWM Operation Only
-40°C to 85°C
TPS62674
1.26V
TPS62674YFD
PN
PM
Output Capacitor Discharge
TPS62676(4)
TPS62677(4)
2.1V
1.2V
PWM Spread Spectrum Modulation
PWM Spread Spectrum Modulation
TPS62676YFD
TPS62677YFD
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Internal tap points are available to facilitate output voltages in 25mV increments.
(3) The YFD package is available in tape and reel. Add a R suffix (e.g. TPS62670YFDR) to order quantities of 3000 parts. Add a T suffix
(e.g. TPS62670YFDT) to order quantities of 250 parts.
(4) Product preview.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
Voltage at VIN(2), SW(3)
Voltage at FB(3)
–0.3 V to 6 V
–0.3 V to 3.6 V
–0.3 V to VI + 0.3 V
Internally limited
–40°C to 85°C
150°C
VI
(3)
Voltage at EN, MODE
Power dissipation
TA
Operating temperature range(4)
Maximum operating junction temperature
Storage temperature range
Human body model
TJ (max)
Tstg
–65°C to 150°C
2 kV
(5)
ESD rating
Charge device model
1 kV
Machine model
200 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Operation above 4.8V input voltage for extended periods may affect device reliability.
(3) All voltage values are with respect to network ground terminal.
(4) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the
maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package
in the application (qJA), as given by the following equation: TA(max)= TJ(max)–(qJA X PD(max)). To achieve optimum performance, it is
recommended to operate the device with a maximum junction temperature of 105°C.
(5) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin.
2
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SLVS952 –APRIL 2010
RECOMMENDED OPERATING CONDITIONS
MIN
2.3
0
NOM
MAX UNIT
VI
IO
L
Input voltage range
Output current range
Inductance
4.8(1)
500
1.8
V
mA
µH
µF
°C
°C
0.3
1.4
–40
–40
CO
TA
TJ
Output capacitance
Ambient temperature
Operating junction temperature
2.5
12
+85
+125
(1) Operation above 4.8V input voltage for extended periods may affect device reliability.
DISSIPATION RATINGS(1)
POWER RATING
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
(2)
(2)
PACKAGE
RqJA
RqJB
T
YFD-6
125°C/W
53°C/W
800mW
8mW/°C
(1) Maximum power dissipation is a function of TJ(max), qJA and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = [TJ(max)–TA] / qJA
.
(2) This thermal data is measured with high-K board (4 layers board according to JESD51-7 JEDEC standard).
ELECTRICAL CHARACTERISTICS
Minimum and maximum values are at VI = 2.3V to 5.5V, VO = 1.8V, EN = 1.8V, AUTO mode and TA = –40°C to 85°C; Circuit
of Parameter Measurement Information section (unless otherwise noted). Typical values are at VI = 3.6V, VO = 1.8V, EN =
1.8V, AUTO mode and TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY CURRENT
TPS62671
TPS62672
TPS62676
TPS62677
IO = 0mA. Device not switching
17
40
mA
Operating quiescent
current
IQ
TPS62671
TPS62674
IO = 0mA, PWM mode
IO = 0mA, PWM mode
EN = GND
5.5
5.0
mA
mA
mA
V
I(SD)
Shutdown current
0.2
1
UVLO
Undervoltage lockout threshold
2.05
2.1
ENABLE, MODE
High-level input
voltage
VIH
VIL
Ilkg
1.0
V
V
TPS62671
TPS62672
TPS62676
TPS62677
Low-level input
voltage
0.4
1.5
Input leakage
current
Input connected to GND or VIN
0.01
mA
V
High-level input
voltage (ENABLE)
1.26
1.0
VIH
High-level input
voltage (MODE)
V
TPS62674
Low-level input
voltage (ENABLE)
VIL
Ilkg
CIN
0.54
1.5
V
Input leakage
current
Input connected to GND or VIN
0.01
5
mA
pF
MHz
%
Input capacitance
(ENABLE)
Clock presence
detect frequency
4
27
60
EXTCLK
Clock presence
detect duty cycle
40
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ELECTRICAL CHARACTERISTICS (continued)
Minimum and maximum values are at VI = 2.3V to 5.5V, VO = 1.8V, EN = 1.8V, AUTO mode and TA = –40°C to
85°C; Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VI =
3.6V, VO = 1.8V, EN = 1.8V, AUTO mode and TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
POWER SWITCH
rDS(on)
Ilkg
VI = V(GS) = 3.6V. PWM mode
170
230
mΩ
mΩ
P-channel MOSFET on resistance
P-channel leakage current, PMOS
N-channel MOSFET on resistance
N-channel leakage current, NMOS
VI = V(GS) = 2.5V. PWM mode
V(DS) = 5.5V, -40°C ≤ TJ ≤ 85°C
VI = V(GS) = 3.6V. PWM mode
VI = V(GS) = 2.5V. PWM mode
V(DS) = 5.5V, -40°C ≤ TJ ≤ 85°C
1
mA
mΩ
mΩ
mA
120
180
rDS(on)
Ilkg
2
150
Discharge resistor for power-down
sequence
rDIS
70
1000
12
Ω
P-MOS current limit
2.3V ≤ VI ≤ 4.8V. Open loop
900
1150
mA
mA
Input current limit under short-circuit
conditions
VO shorted to ground
Thermal shutdown
140
10
°C
°C
Thermal shutdown hysteresis
OSCILLATOR
TPS62671
TPS62672
TPS62676
TPS62677
Oscillator center
frequency
IO = 0mA. PWM operation
IO = 0mA. PWM operation
5.4
4.9
6
6.6
6.0
MHz
MHz
fSW
Oscillator center
frequency
TPS62674
5.45
OUTPUT
2.3V ≤ VI ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
VNOM
VNOM
VNOM
VNOM
1.03×VNOM
1.04×VNOM
1.02×VNOM
1.02×VNOM
V
V
V
V
TPS62671
TPS62672
TPS62676
TPS62677
2.3V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
Regulated DC
output voltage
2.3V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 500 mA
PWM operation
V(OUT)
2.3V ≤ VI ≤ 5.5V, 0mA ≤ IO ≤ 500 mA
PWM operation
TPS62674
TPS6267X
Line regulation
Load regulation
VI = VO + 0.5V (min 2.3V) to 5.5V, IO = 200 mA
IO = 0mA to 500 mA. PWM operation
0.23
–0.00045
480
%/V
%/mA
kΩ
Feedback input resistance
TPS62671
IO = 1mA, VO = 1.8 V
IO = 1mA, VO = 1.2 V
20
mVPP
mVPP
Power-save mode
ripple voltage
ΔVO
TPS62677
TPS62671
24
Power Supply
Rejection Ratio
PSRR
f = 10kHz, IO = 150mA. PWM mode
TBD
dB
TPS62671
TPS62674
IO = 0mA, Time from active EN to VO
130
125
ms
ms
Start-up time
IO = 0mA, Time from EXTCLK clock active to VO
IO = 0mA, Time from EXTCLK clock inactive to VO
down
Shutdown time
TPS62674
1.2
ms
4
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TPS6267x
www.ti.com
SLVS952 –APRIL 2010
PIN ASSIGNMENTS
TPS6267x
CSP-6
(TOP VIEW)
TPS6267x
CSP-6
(BOTTOM VIEW)
VIN
EN
A2
B2
C2
A1
B1
C1
A1
A2
B2
VIN
EN
MODE
SW
MODE
B1
C1
SW
FB
GND
C2 GND
FB
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
FB
NO.
C1
I
I
Output feedback sense input. Connect FB to the converter’s output.
Power supply input.
VIN
A2
This is the switch pin of the converter and is connected to the drain of the internal Power
MOSFETs.
SW
EN
B1
B2
I/O
This is the enable pin of the device. Connecting this pin to ground forces the device into
shutdown mode. Pulling this pin to VI enables the device. If an external clock (4MHz to 27MHz) is
detected the device will automatically power up. This pin must not be left floating and must be
terminated.
I
This is the mode selection pin of the device. This pin must not be left floating and must be
terminated.
MODE = LOW: The device is operating in regulated frequency pulse width modulation mode
(PWM) at high-load currents and in pulse frequency modulation mode (PFM) at light load
currents.
MODE
GND
A1
C2
I
MODE = HIGH: Low-noise mode enabled, regulated frequency PWM operation forced.
Ground pin.
–
FUNCTIONAL BLOCK DIAGRAM
MODE
EN
VIN
Undervoltage
Lockout
Bias Supply
VIN
Soft-Start
Negative Inductor
Current Detect
Bandgap
V
= 0.8 V
Power Save Mode
Switching Logic
REF
Current Limit
Detect
Thermal
Shutdown
Frequency
Control
R
1
FB
-
Gate Driver
SW
Anti
R
V
2
REF
Shoot-Through
+
GND
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PARAMETER MEASUREMENT INFORMATION
TPS6267x
L
SW
VIN
V
O
FB
EN
V
C
I
I
C
O
MODE
GND
List of components:
•
•
•
L = MURATA LQM21PN1R0NGR
CI = MURATA GRM155R60J225ME15 (2.2mF, 6.3V, 0402, X5R)
CO = MURATA GRM155R60J475M (4.7mF, 6.3V, 0402, X5R)
6
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SLVS952 –APRIL 2010
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
3, 4, 5, 6
7
vs Load current
vs Input voltage
h
Efficiency
Peak-to-peak output ripple voltage
vs Load current
8, 9
Combined line/load transient
response
10, 11
12, 13, 14, 15,
16, 17, 18
Load transient response
AC load transient response
DC output voltage
19
20, 21, 22
23
VO
vs Load current
vs Input voltage
vs Input voltage
vs Input voltage
vs Input voltage
vs. Frequency
PFM/PWM boundaries
Quiescent current
IQ
24
PWM switching frequency
PFM switching frequency
Power supply rejection ratio
PWM operation
25, 26
27
fs
PSRR
28
29, 30
31
Power-save mode operation
Start-up
32, 33
34
Shutdown
Spurious output noise (PWM mode)
Spurious output noise (PFM mode)
vs. Frequency
vs. Frequency
35, 36, 38
37
EFFICIENCY
vs
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
100
100
90
V = 2.7 V
I
V
= 1.2 V
V
= 1.8 V
O
O
PFM/PWM Operation
90
80
70
60
50
80
70
60
50
V = 3.6 V
I
V = 3.6 V
I
PFM/PWM Operation
PFM/PWM Operation
V
= 4.2 V
I
V = 2.7 V
I
PFM/PWM Operation
V
= 4.2 V
I
PFM/PWM Operation
PFM/PWM Operation
V = 3.6 V
I
40
30
20
10
40
30
20
Forced PWM Operation
V = 3.6 V
I
Forced PWM Operation
10
0
0
0.1
1
10
- Load Current - mA
100
1000
0.1
1
10
- Load Current - mA
100
1000
I
I
O
O
Figure 3.
Figure 4.
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TYPICAL CHARACTERISTICS (continued)
EFFICIENCY
EFFICIENCY
vs
vs
LOAD CURRENT
LOAD CURRENT
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
100
L = muRata LQM21PN1R0NGR
L = muRata LQM21PN1R0MC0
V
= 1.26 V
O
90
V = 2.7 V
I
80
70
60
50
PWM Operation
V = 3.6 V
I
PWM Operation
V
= 4.2 V
40
30
20
10
I
L = muRata
LQM18PN1R5-B35
PWM Operation
V - 3.6 V,
I
V
= 1.2 V
O
PFM/PWM Operation
0
1
10
100 1000
1
10
100
- Load Current - mA
1000
I
- Load Current - mA
I
O
O
Figure 5.
Figure 6.
EFFICIENCY
vs
PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE
vs
INPUT VOLTAGE
LOAD CURRENT
90
88
20
18
16
14
12
10
8
I
= 10 mA
I
= 100 mA
O
O
V
= 1.8 V
O
I
= 300 mA
O
86
84
82
80
78
76
74
I
= 1 mA
O
6
4
V
= 1.2 V
O
PFM/PWM Operation
2
72
70
0
2.5
2.8
3.1
3.4
3.7 4.0 4.3 4.6 4.8
0
50
100
I
150
200
- Load Current - mA
250
300
350
V - Input Voltage - V
I
O
Figure 7.
Figure 8.
8
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SLVS952 –APRIL 2010
TYPICAL CHARACTERISTICS (continued)
PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE
vs
LOAD CURRENT
COMBINED LINE/LOAD TRANSIENT RESPONSE
34
32
30
28
26
24
22
20
18
16
14
12
10
8
V
= 1.2 V
V = 3.6 V,
O
I
V
= 1.2 V
O
V = 4.8 V
I
V = 3.6 V
I
V = 2.5 V
I
50 to 350 mA Load Step
3.3V to 3.9V Line Step
MODE = Low
6
4
2
0
0
50
100
I
150
200
- Load Current - mA
250
300
350
O
Figure 9.
Figure 10.
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
COMBINED LINE/LOAD TRANSIENT RESPONSE
V = 3.6 V,
I
V = 3.6 V,
I
V
= 1.2 V
V = 1.2 V
O
O
5 to 150 mA Load Step
50 to 350 mA Load Step
2.7V to 3.3V Line Step
MODE = Low
MODE = Low
Figure 11.
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
V = 3.6 V,
I
V = 2.7 V,
I
V
= 1.2 V
V = 1.2 V
O
50 to 350 mA Load Step
50 to 350 mA Load Step
O
MODE = Low
MODE = Low
Figure 13.
Figure 14.
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
V = 4.8 V,
V = 3.6 V,
I
I
V
= 1.2 V
V = 1.2 V
O
50 to 350 mA Load Step
O
150 to 500 mA Load Step
MODE = Low
MODE = Low
Figure 15.
Figure 16.
10
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SLVS952 –APRIL 2010
TYPICAL CHARACTERISTICS (continued)
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
LOAD TRANSIENT RESPONSE
IN PFM/PWM OPERATION
V = 2.7 V,
I
V = 4.8 V,
I
V
= 1.2 V
V
= 1.2 V
O
O
150 to 500 mA Load Step
150 to 500 mA Load Step
MODE = Low
MODE = Low
Figure 17.
Figure 18.
DC OUTPUT VOLTAGE
vs
AC LOAD TRANSIENT RESPONSE
LOAD CURRENT
1.836
1.818
1.8
V = 1.8 V
O
PFM/PWM Operation
V = 3.6 V,
I
V
= 1.2 V
O
5 to 300 mA Load Sweep
V = 4.5 V
I
V = 3.6 V
I
V = 2.7 V
I
1.782
1.764
MODE = Low
0.1
1
10
- Load Current - mA
100
1000
I
O
Figure 19.
Figure 20.
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TYPICAL CHARACTERISTICS (continued)
DC OUTPUT VOLTAGE
OUTPUT VOLTAGE
vs
vs
LOAD CURRENT
LOAD CURRENT
1.224
1.285
1.273
1.260
V
= 1.2 V
V
= 1.26 V
O
PFM/PWM Operation
O
PWM Operation
1.212
1.200
V = 3.6 V
I
V = 4.5 V
I
V
= 4.5 V
I
V = 3.6 V
I
V = 2.7 V
I
V = 2.7 V
I
1.188
1.176
1.247
1.235
0.1
1
10
- Load Current - mA
100
1000
0.1
1
10
- Load Current - mA
100
1000
I
I
O
O
Figure 21.
Figure 22.
QUIESCENT CURRENT
vs
PFM/PWM BOUNDARIES
= 1.2 V
INPUT VOLTAGE
160
150
140
130
120
110
100
90
28
26
24
22
20
18
16
14
12
10
8
V
Always PWM
O
T
= 85°C
A
T
= 25°C
PWM to PFM
Mode Change
A
The Switching Mode
Changes at
These Borders
80
70
60
T
= -40°C
A
50
40
PFM to PWM
Mode Change
6
30
Always PFM
4
20
2
10
0
2.7
0
3
3.3
3.6
3.9
4.2
4.5
4.8
2.7
3
3.3
3.6
3.9
V - Input Voltage - V
4.2
4.5
4.8
V - Input Voltage - V
I
I
Figure 23.
Figure 24.
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TYPICAL CHARACTERISTICS (continued)
PWM SWITCHING FREQUENCY
PWM SWITCHING FREQUENCY
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
6.5
6
6.5
6.3
6.1
5.9
5.7
5.5
5.3
5.1
4.9
4.7
4.5
I
= 150 mA
O
V
= 1.2 V
O
I
Ranging from 0 to 500 mA
O
I
= 500 mA
= 400 mA
O
5.5
5
I
O
I
= 300 mA
O
4.5
4
3.5
3
V
= 1.8 V
O
2.5
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5
V - Input Voltage - V
V - Input Voltage - V
I
I
Figure 25.
Figure 26.
PFM SWITCHING FREQUENCY
POWER SUPPLY REJECTION RATIO
vs
vs
INPUT VOLTAGE
FREQUENCY
6.5
6
60
V = 3.6 V,
I
V
= 1.2 V
O
55
50
V
= 1.8 V
O
5.5
V = 2.7 V
I
5
4.5
4
45
40
I
= 150 mA
V = 3.6 V
I
O
35
30
25
V = 4.8 V
I
3.5
3
2.5
2
20
15
1.5
1
10
PFM/PWM Operation
0.5
5
0
0
1000
0
20
40
60
- Load Current - mA
80
100 120 140 160
0.1
1
10
100
10000
I
f - Frequency - kHz
O
Figure 27.
Figure 28.
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TYPICAL CHARACTERISTICS (continued)
PWM OPERATION
PWM OPERATION
SSFM MODULATION
V = 3.6 V,
V = 3.6 V,
I
I
V
I
= 1.2 V,
V
I
= 1.2 V,
O
O
= 200 mA
= 150 mA
O
O
MODE = Low
MODE = Low
Figure 29.
POWER-SAVE MODE OPERATION
Figure 30.
START-UP
V = 3.6 V, V = 1.2V, I = 40 mA
I
O
O
V = 3.6 V,
I
V
I
= 1.2 V,
O
= 0 mA
O
MODE = Low
MODE = Low
Figure 31.
Figure 32.
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TYPICAL CHARACTERISTICS (continued)
SHUT-DOWN (RF CLOCK)
START-UP (RF CLOCK)
vs
V = 3.6 V,
I
V
I
= 1.2 V,
O
= 0 mA
O
V = 3.6 V,
I
V
I
= 1.2 V,
O
= 0 mA
O
MODE = High
MODE = High
Figure 33.
Figure 34.
SPURIOUS OUTPUT NOISE (PWM MODE)
SPURIOUS OUTPUT NOISE (PWM MODE)
vs
vs
FREQUENCY
FREQUENCY
350 m
300 m
220 m
200 m
180 m
160 m
140 m
120 m
100 m
V = 3.6 V
I
V
= 1.26 V
= 12 Ω
O
V
= 1.26 V
= 12 Ω
R
O
L
R
L
250 m
200 m
150 m
100 m
V = 4.2 V
I
80 m
60 m
40 m
V = 3.6 V
I
V = 2.7 V
I
50 m
20 m
3.5 n
2.2 n
0
Span = 4 MHz
40
4.15
Span = 250 kHz
6.65
f - Frequency - MHz
f - Frequency - MHz
Figure 35.
Figure 36.
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TYPICAL CHARACTERISTICS (continued)
SPURIOUS OUTPUT NOISE (PFM MODE)
SPURIOUS OUTPUT NOISE (PWM MODE)
vs
vs
FREQUENCY
FREQUENCY
350 m
300 m
V
= 1.8 V
= 12 Ω
O
R
L
250 m
200 m
150 m
100 m
50 m
V = 3.6 V
I
V = 4.2 V
I
V = 2.7 V
I
3.5 n
0
Span = 10 MHz
100
f - Frequency - MHz
Figure 37.
Figure 38.
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DETAILED DESCRIPTION
OPERATION
The TPS6267x is a synchronous step-down converter typically operates at a regulated 6-MHz frequency pulse
width modulation (PWM) at moderate to heavy load currents. At light load currents, the TPS6267x converter
operates in power-save mode with pulse frequency modulation (PFM).
The converter uses a unique frequency locked ring oscillating modulator to achieve best-in-class load and line
response and allows the use of tiny inductors and small ceramic input and output capacitors. At the beginning of
each switching cycle, the P-channel MOSFET switch is turned on and the inductor current ramps up rising the
output voltage until the main comparator trips, then the control logic turns off the switch.
One key advantage of the non-linear architecture is that there is no traditional feed-back loop. The loop response
to change in VO is essentially instantaneous, which explains the transient response. The absence of a traditional,
high-gain compensated linear loop means that the TPS6267x is inherently stable over a range of L and CO.
Although this type of operation normally results in a switching frequency that varies with input voltage and load
current, an internal frequency lock loop (FLL) holds the switching frequency constant over a large range of
operating conditions.
Combined with best in class load and line transient response characteristics, the low quiescent current of the
device (ca. 17mA) allows to maintain high efficiency at light load, while preserving fast transient response for
applications requiring tight output regulation.
Using the YFD package allows for a low profile solution size (0.4mm max height, including external components).
The recommended external components are stated within the application information. The maximum output
current is 500mA when these specific low profile external components are used.
SWITCHING FREQUENCY
The magnitude of the internal ramp, which is generated from the duty cycle, reduces for duty cycles either set of
50%. Thus, there is less overdrive on the main comparator inputs which tends to slow the conversion down. The
intrinsic maximum operating frequency of the converter is about 10MHz to 12MHz, which is controlled to circa.
6MHz by a frequency locked loop.
When high or low duty cycles are encountered, the loop runs out of range and the conversion frequency falls
below 6MHz. The tendency is for the converter to operate more towards a "constant inductor peak current" rather
than a "constant frequency". In addition to this behavior which is observed at high duty cycles, it is also noted at
low duty cycles.
When the converter is required to operate towards the 6MHz nominal at extreme duty cycles, the application can
be assisted by decreasing the ratio of inductance (L) to the output capacitor's equivalent serial inductance (ESL).
This increases the ESL step seen at the main comparator's feed-back input thus decreasing its propagation
delay, hence increasing the switching frequency.
POWER-SAVE MODE
If the load current decreases, the converter will enter Power Save Mode operation automatically (does not apply
for TPS62674). During power-save mode the converter operates in discontinuous current (DCM) single-pulse
PFM mode, which produces low output ripple compared with other PFM architectures.
When in power-save mode, the converter resumes its operation when the output voltage trips below the nominal
voltage. It ramps up the output voltage with a minimum of one pulse and goes into power-save mode when the
inductor current has returned to a zero steady state. The PFM on-time varies inversely proportional to the input
voltage and proportional to the output voltage giving the regulated switching frequency when in steady-state.
PFM mode is left and PWM operation is entered as the output current can no longer be supported in PFM mode.
As a consequence, the DC output voltage is typically positioned ca. 0.5% above the nominal output voltage and
the transition between PFM and PWM is seamless.
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PFM Mode at Light Load
PFM Ripple
Nominal DC Output Voltage
PWM Mode at Heavy Load
Figure 39. Operation in PFM Mode and Transfer to PWM Mode
MODE SELECTION
The MODE pin allows to select the operating mode of the device. Connecting this pin to GND enables the
automatic PWM and power-save mode operation. The converter operates in regulated frequency PWM mode at
moderate to heavy loads and in the PFM mode during light loads, which maintains high efficiency over a wide
load current range.
Pulling the MODE pin high forces the converter to operate in the PWM mode even at light load currents. The
advantage is that the converter modulates its switching frequency according to a spread spectrum PWM
modulation technique allowing simple filtering of the switching harmonics in noise-sensitive applications. In this
mode, the efficiency is lower compared to the power-save mode during light loads. Notice that the TPS62674
device only permits PWM operation and required the MODE input to be tied high.
For additional flexibility, it is possible to switch from power-save mode to PWM mode during operation. This
allows efficient power management by adjusting the operation of the converter to the specific system
requirements.
SPREAD SPECTRUM, PWM FREQUENCY DITHERING
The goal is to spread out the emitted RF energy over a larger frequency range so that the resulting EMI is similar
to white noise. The end result is a spectrum that is continuous and lower in peak amplitude, making it easier to
comply with electromagnetic interference (EMI) standards and with the power supply ripple requirements in
cellular and non-cellular wireless applications. Radio receivers are typically susceptible to narrowband noise that
is focused on specific frequencies.
Switching regulators can be particularly troublesome in applications where electromagnetic interference (EMI) is
a concern. Switching regulators operate on a cycle-by-cycle basis to transfer power to an output. In most cases,
the frequency of operation is either fixed or regulated, based on the output load. This method of conversion
creates large components of noise at the frequency of operation (fundamental) and multiples of the operating
frequency (harmonics).
The spread spectrum architecture varies the switching frequency by ca. ±10% of the nominal switching frequency
thereby significantly reducing the peak radiated and conducting noise on both the input and output supplies. The
frequency dithering scheme is modulated with a triangle profile and a modulation frequency fm.
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0 dBV
F
Dfc
ENV,PEAK
Dfc
Non-modulated harmonic
F
1
Side-band harmonics
window after modulation
0 dBVref
B = 2×fm ×(1+ mf )= 2×(Dfc + fm )
Bh = 2×fm ×(1+ mf ×h)
B = 2×fm ×(1+ mf )= 2×(Dfc + fm )
Figure 40. Spectrum of a Frequency Modulated
Sin. Wave with Sinusoidal Variation in Time
Figure 41. Spread Bands of Harmonics in
Modulated Square Signals
The above figures show that after modulation the sideband harmonic is attenuated compared to the
non-modulated harmonic, and the harmonic energy is spread into a certain frequency band. The higher the
modulation index (mf) the larger the attenuation.
δ ´ ƒc
mƒ
=
ƒm
(1)
With:
fc is the carrier frequency
fm is the modulating frequency (approx. 0.008*fc)
d is the modulation ratio (approx 0.1)
Dƒc
d =
ƒc
(2)
The maximum switching frequency fc is limited by the process and finally the parameter modulation ratio (d),
together with fm , which is the side-band harmonics bandwidth around the carrier frequency fc . The bandwidth of
a frequency modulated waveform is approximately given by the Carson’s rule and can be summarized as:
B = 2 ´ ¦m ´ 1 + m = 2 ´ D¦ + ¦m
(
)
(
)
¦
c
(3)
fm < RBW: The receiver is not able to distinguish individual side-band harmonics, so, several harmonics are
added in the input filter and the measured value is higher than expected in theoretical calculations.
fm > RBW: The receiver is able to properly measure each individual side-band harmonic separately, so the
measurements match with the theoretical calculations.
ENABLE
The TPS6267x device starts operation when EN is set high and starts up with the soft start as previously
described. For proper operation, the EN pin must be terminated and must not be left floating.
Pulling the EN pin low forces the device into shutdown, with a shutdown quiescent current of typically 0.1mA. In
this mode, the P and N-channel MOSFETs are turned off, the internal resistor feedback divider is disconnected,
and the entire internal-control circuitry is switched off. The TPS6267x device can actively discharge the output
capacitor when it turns off. The integrated discharge resistor has a typical resistance of 100 Ω. The required time
to discharge the output capacitor at the output node depends on load current and the output capacitance value.
When an external clock signal (EXTCLK), 4MHz to 27MHz is applied to the TPS62674, the DC/DC converter
powers-up automatically within approx. 120ms. When the external clock signal is stopped, the DC/DC converter is
powered down and the output capacitor is discharged actively.
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SOFT START
The TPS6267x has an internal soft-start circuit that limits the inrush current during start-up. This limits input
voltage drops when a battery or a high-impedance power source is connected to the input of the converter.
The soft-start system progressively increases the on-time from a minimum pulse-width of 35ns as a function of
the output voltage. This mode of operation continues for c.a. 100ms after enable. Should the output voltage not
have reached its target value by this time, such as in the case of heavy load, the soft-start transitions to a second
mode of operation.
The converter then operates in a current limit mode, specifically the P-MOS current limit is set to half the nominal
limit, and the N-channel MOSFET remains on until the inductor current has reset. After a further 100 ms, the
device ramps up to the full current limit operation if the output voltage has risen above 0.5V (approximately).
Therefore, the start-up time mainly depends on the output capacitor and load current.
UNDERVOLTAGE LOCKOUT
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6267x device
have a UVLO threshold set to 2.05V (typical). Fully functional operation is permitted down to 2.1V input voltage.
SHORT-CIRCUIT PROTECTION
The TPS6267x integrates a P-channel MOSFET current limit to protect the device against heavy load or short
circuits. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is turned
off and the N-channel MOSFET is turned on. The regulator continues to limit the current on a cycle-by-cycle
basis.
As soon as the output voltage falls below ca. 0.4V, the converter current limit is reduced to half of the nominal
value. Because the short-circuit protection is enabled during start-up, the device does not deliver more than half
of its nominal current limit until the output voltage exceeds approximately 0.5V. This needs to be considered
when a load acting as a current sink is connected to the output of the converter.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds typically 140°C, the device goes into thermal shutdown. In this
mode, the P- and N-channel MOSFETs are turned off. The device continues its operation when the junction
temperature again falls below typically 130°C.
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APPLICATION INFORMATION
INDUCTOR SELECTION
The TPS6267x series of step-down converters have been optimized to operate with an effective inductance
value in the range of 0.3mH to 1.8mH and with output capacitors in the range of 2.2mF to 4.7mF. The internal
compensation is optimized to operate with an output filter of L = 0.47mH and CO = 2.2mF. Larger or smaller
inductor values can be used to optimize the performance of the device for specific operation conditions. For more
details, see the CHECKING LOOP STABILITY section.
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage
ripple and the efficiency. The selected inductor has to be rated for its dc resistance and saturation current. The
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO.
V
V * V
DI
O
I
O
L
DI +
DI
+ I
)
L
L(MAX)
O(MAX)
2
V
L ƒ
sw
I
with: fSW = switching frequency (6 MHz typical)
L = inductor value
ΔIL = peak-to-peak inductor ripple current
IL(MAX) = maximum inductor current
(4)
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e.
quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care
should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing
the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor
size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance (DC)) and the following
frequency-dependent components:
•
•
•
•
The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
Additional losses in the conductor from the skin effect (current displacement at high frequencies)
Magnetic field losses of the neighboring windings (proximity effect)
Radiation losses
The following inductor series from different suppliers have been used with the TPS6267x converters.
Table 1. List of Inductors
MANUFACTURER
SERIES
DIMENSIONS (in mm)
2.0 x 1.2 x 1.0 max. height
2.0 x 1.2 x 0.55 max. height
2.0 x 1.2 x 0.55 max. height
1.6 x 0.8 x 0.4 max. height
1.6 x 0.8 x 0.33 max. height
2.0 x 1.2 x 1.0 max. height
2.0 x 1.2 x 1.0 max. height
1.6 x 0.8 x 0.9 max. height
1.6 x 0.8 x 0.9 max. height
1.6 x 0.8 x 0.55 max. height
1.6 x 0.8 x 0.4 max. height
2.0 x 1.2 x 0.6 max. height
2.0 x 1.2 x 1.0 max. height
LQM21PN1R0NGR
LQM21PNR47MC0
LQM21PN1R0MC0
LQM18PN1R5-B35
LQM18PN1R5-A62
ELGTEAR82NA
CIG21L1R0MNE
BRC1608T1R0
MURATA
PANASONIC
SEMCO
BRC1608T1R5
TAIYO YUDEN
CKP1608L1R5M
CKP1608U1R5M
MLP2012SR82T
MDT2012-CR1R0A
TDK
TOKO
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OUTPUT CAPACITOR SELECTION
The advanced fast-response voltage mode control scheme of the TPS6267x allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. For best performance, the device should be operated with a minimum effective output
capacitance of 0.8mF. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric
capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage step caused by the output capacitor ESL and the ripple current flowing through the output capacitor
impedance.
At light loads, the output capacitor limits the output ripple voltage and provides holdup during large load
transitions. A 2.2mF capacitor typically provides sufficient bulk capacitance to stabilize the output during large
load transitions. The typical output voltage ripple is 1% of the nominal output voltage VO.
The output voltage ripple during PFM mode operation can be kept very small. The PFM pulse is time controlled,
which allows to modify the charge transferred to the output capacitor by the value of the inductor. The resulting
PFM output voltage ripple and PFM frequency depend in first order on the size of the output capacitor and the
inductor value. The PFM frequency decreases with smaller inductor values and increases with larger once.
Increasing the output capacitor value and the effective inductance will minimize the output ripple voltage.
INPUT CAPACITOR SELECTION
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required to prevent large voltage transients that can cause misbehavior of the device or interferences with other
circuits in the system. For most applications, a 1 or 2.2-mF capacitor is sufficient. If the application exhibits a
noisy or erratic switching frequency, the remedy will probably be found by experimenting with the value of the
input capacitor.
Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the
power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce
ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even
damage the part. Additional "bulk" capacitance (electrolytic or tantalum) should in this circumstance be placed
between CI and the power source lead to reduce ringing than can occur between the inductance of the power
source leads and CI.
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
•
•
•
Switching node, SW
Inductor current, IL
Output ripple voltage, VO(AC)
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between
the application of the load transient and the turn on of the P-channel MOSFET, the output capacitor must supply
all of the current required by the load. VO immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR
is the effective series resistance of CO. ΔI(LOAD) begins to charge or discharge CO generating a feedback error
signal used by the regulator to return VO to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, VO can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET
rDS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage range,
load current range, and temperature range.
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LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. High-speed operation of the
TPS6267x devices demand careful attention to PCB layout. Care must be taken in board layout to get the
specified performance. If the layout is not carefully done, the regulator could show poor line and/or load
regulation, stability and switching frequency issues as well as EMI problems. It is critical to provide a low
inductance, impedance ground path. Therefore, use wide and short traces for the main current paths.
The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output
capacitor. In order to get an optimum ESL step, the output voltage feedback point (FB) should be taken in the
output capacitor path, approximately 1mm away for it. The feed-back line should be routed away from noisy
components and traces (e.g. SW line).
MODE
VIN
CI
L
ENABLE
CO
GND
VOUT
Figure 42. Suggested Layout (Top)
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THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependant issues such as thermal coupling, airflow, added
heat sinks, and convection surfaces, and the presence of other heat-generating components, affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
•
•
•
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB
Introducing airflow into the system
The maximum recommended junction temperature (TJ) of the TPS6267x devices is 105°C. The thermal
resistance of the 6-pin CSP package (YFD-6) is RqJA = 125°C/W. Regulator operation is specified to a maximum
steady-state ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 160 mW.
T
- T
A
105°C - 85°C
125°C/W
J(MAX)
P
=
=
= 160mW
D(MAX)
R
qJA
(5)
PACKAGE SUMMARY
CHIP SCALE PACKAGE
(BOTTOM VIEW)
CHIP SCALE PACKAGE
(TOP VIEW)
A2
B2
C2
A1
B1
C1
YMSCC
LLLL
D
A1
Code:
•
•
•
•
YM — Year Month date Code
S — Assembly site code
CC— Chip code
E
LLLL — Lot trace code
CHIP SCALE PACKAGE DIMENSIONS
The TPS6267x device is available in an 6-bump chip scale package (YFD, NanoFree™). The package
dimensions are given as:
•
•
D = 1.30 ±0.03 mm
E = 0.926 ±0.03 mm
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS6267x
TPS6267x
www.ti.com
SLVS952 –APRIL 2010
APPLICATION INFORMATION
V
V
OUT
1.26 V @ 500 mA
TPS62674
L
BAT
2.3 V .. 4.8 V
VIN
SW
1.5 mH
C
O
C
I
MODE
FB
2.2 mF
1 mF
L = muRata LQM18PN1R5-B35
CI = muRata GRM153R60J105M
EN
GND
EXTCLK
CO = muRata GRM153R60G225M
Figure 43. 1.26V CMOS Sensor Embedded Power Solution — Featuring Sub 0.4mm Profile
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): TPS6267x
PACKAGE OPTION ADDENDUM
www.ti.com
7-May-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TPS62674YFDR
TPS62674YFDT
ACTIVE
ACTIVE
DSBGA
DSBGA
YFD
6
6
3000
250
TBD
TBD
Call TI
Call TI
Call TI
Call TI
YFD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
X: Max = 1350 µm, Min = 1250 µm
Y: Max = 976 µm, Min = 876 µm
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