TPS62841YBGR [TI]
60nA 静态电流 (IQ)、1.8V 至 6.5V 输入电压、高效 750mA 降压转换器 | YBG | 6 | -40 to 125;
| 型号： | TPS62841YBGR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 60nA 静态电流 (IQ)、1.8V 至 6.5V 输入电压、高效 750mA 降压转换器 | YBG | 6 | -40 to 125 转换器 |
| 文件： | 总45页 (文件大小：3378K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS62840
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
TPS62840 1.8V 至 6.5V、750mA、60nA IQ 降压转换器
1 特性
3 说明
1
•
60nA 工作静态电流
100% 占空比模式下，IQ 为 120nA
TPS62840 是一款高效降压转换器，具有典型值为
60nA 的超低工作静态电流。此器件具有特殊电路，可
在 100% 模式下实现仅 120nA 的 IQ，因此可在放电末
期进一步延长电池寿命。
•
•
•
•
•
•
•
•
•
•
•
输入电压范围 VIN：1.8V 至 6.5V
高达 750mA 的输出电流
射频友好型 DCS-Control™
此器件采用 DCS-Control 技术，可以为无线电提供干
净的电源，工作时具有 1.8MHz 的典型开关频率。在
省电模式下，此器件可将轻负载效率向下扩展至 1μA
负载电流及以下。
1µA IOUT（3.6VIN 至 1.8VOUT）时的效率为 80%
通过 VSET 引脚提供 16 种可选输出电压
自动转换 PFM/PWM 或强制 PWM 模式
可选的强制 PWM 和 STOP 模式
输出放电功能
可以将一个电阻器连接到 VSET 引脚以选择 16 种预定
义的输出电压，因此这款器件可以灵活地用于各种 应
用 并最大限度地减少了外部组件的数量。
25nA 关断电流
SON-8、WCSP-6 和热增强型 HVSSOP-8
该器件的 STOP 引脚可立即消除所有的开关噪声，从
而在测试和测量系统中执行无噪声测量。
2 应用
•
•
•
•
•
•
•
智能仪表、智能恒温器
TPS62840 提供了高达 750mA 的输出电流。此器件的
输入电压为 1.8V 至 6.5V，支持多种电源，例如 2 节
至 4 节碱性电池或 1 节至 2 节锂二氧化锰 (Li-MnO2)
或 1 节锂离子/锂亚硫酰氯 (Li-SOCl2) 电池。
资产跟踪设备
可穿戴电子产品
医疗传感器贴片和患者监护仪
工业物联网（智能传感器）/窄带物联网
测试和测量
器件信息(1)
ATEX/本质安全
器件型号
封装
封装尺寸（标称值）
8 引脚 DLC (SON) 1.5mm x 2mm
6 引脚 YBG
0.97mm x 1.47mm
(WCSP)
TPS6284x
8 引脚 DGR
3mm x 5mm
(HVSSOP)
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
典型应用
效率与负载电流间的关系 (VOUT = 1.8V)
TPS62841DLC
100
95
90
85
80
75
70
L
2.2 µH
VIN
VIN
SW
VOUT
CO
10µF
CI
4.7 µF
VOS
GND
MODE
STOP
MODE
65
60
55
50
45
40
VIN = 1.8V
VIN = 2.5V
VIN = 3.0V
VIN = 3.6V
VIN = 4.2V
VIN = 5.0V
VIN = 6.5V
RUN/STOP
VSET
EN
ENABLE
RSET
100n
1m
10m
100m 1m
Output Current (A)
10m
100m
1
D002
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSEC6
TPS62840
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
www.ti.com.cn
目录
8.4 Device Functional Modes........................................ 15
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical Application ................................................. 16
9.3 System Example ..................................................... 27
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 4
Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information.................................................. 6
7.5 Electrical Characteristics........................................... 7
7.6 Typical Characteristics.............................................. 9
Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 11
8.3 Feature Description................................................. 12
9
10 Power Supply Recommendations ..................... 28
11 Layout................................................................... 28
11.1 Layout Guidelines ................................................. 28
11.2 Layout Example .................................................... 28
12 器件和文档支持 ..................................................... 30
12.1 器件支持................................................................ 30
12.2 保障资源................................................................ 30
12.3 商标....................................................................... 30
12.4 静电放电警告......................................................... 30
12.5 Glossary................................................................ 30
13 机械、封装和可订购信息....................................... 30
8
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision C (November 2019) to Revision D
Page
•
•
Updated the Device Comparison Table ................................................................................................................................ 3
Added efficiency graphs to the Application Curves.............................................................................................................. 20
Changes from Revision B (August 2019) to Revision C
Page
•
•
•
•
•
•
•
•
•
•
•
将 SON-8、WCSP-6 和热增强型 HVSSOP-8 添加至特性 ..................................................................................................... 1
将“ATEX/本质安全”添加到应用 .............................................................................................................................................. 1
更新了典型应用图像以显示 TPS62842DGR 器件 .................................................................................................................. 1
Added orderable part number TPS62841DGR to Device Comparison Table ....................................................................... 3
Added orderable part number TPS62842DGR to Device Comparison Table ....................................................................... 3
Updated Thermal Information values to support TPS62842DGR .......................................................................................... 6
Added low-side MOSFET switch current limit to Electrical Characteristics ........................................................................... 8
Added TPS62841DGR to Output Voltage Selection ........................................................................................................... 13
Updated Efficiency Power Save graphs in Application Curves ............................................................................................ 20
Updated Load Transient waveform in Application Curves ................................................................................................... 24
Added PCB layout for DGR package ................................................................................................................................... 29
Changes from Revision A (July 2019) to Revision B
Page
•
将销售状态从“预告信息”更改为“生产数据”.............................................................................................................................. 1
2
Copyright © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
5 Device Comparison Table
PACKAGE
MODE PIN STOP PIN PACKAGE
MARKING
ORDERABLE
OUTPUT
CURRENT
OUTPUT
DISCHARGE
OUTPUT VOLTAGE
PART NUMBER
SON-8
(DLC)
TPS62840DLC
1.8 V to 3.3 V
yes
no
yes
no
E5
750 mA
750 mA
750 mA
yes
yes
yes
in 100-mV steps
WCSP-6
(YBG)
TPS62840YBG
62840
E9
SON-8
(DLC)
TPS62841DLC
yes
no
yes
no
0.8 V to 1.55 V
TPS62841YBG
WCSP-6
(YBG)
62841
62841
62842
FF
in 50-mV steps
HVSSOP-8
(DGR)
TPS62841DGR
yes
no
1.8 V, 2.0 V, 2.2 V,
TPS62842DGR
HVSSOP-8
(DGR)
no
2.4 V to 3.6 V in 100-mV steps
yes
SON-8
(DLC)
TPS62849DLC
3.4-V fixed output voltage
yes
Copyright © 2019–2020, Texas Instruments Incorporated
3
TPS62840
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
www.ti.com.cn
6 Pin Configuration and Functions
DLC
SON-8
Bottom view
Top view
1
2
3
4
8
7
6
5
1
2
3
4
8
GND
VIN
VOS
SW
VOS
SW
GND
VIN
7
6
5
MODE
EN
STOP
VSET
STOP
VSET
MODE
EN
DGR
HVSSOP-8
Bottom view
Top view
8
7
6
5
1
1
8
VOS
SW
GND
GND
NC
VOS
SW
2
3
4
2
3
4
7
6
5
NC
VIN
EN
EP
EP
MODE
VSET
VIN
EN
MODE
VSET
YBG
WCSP-6
Top view
Bottom view
1
2
2
1
VOS
GND
GND
VOS
A
B
C
A
B
C
VIN
EN
SW
VIN
EN
SW
VSET
VSET
4
Copyright © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
Pin Functions
PIN
I/O
DESCRIPTION
NAME
DLC
DGR
YBG
(SON-8)
(HVSSOP-8) (WCSP-6)
VIN
2
6
B1
PWR
VIN power supply pin. Connect the input capacitor close to this pin for best
noise and voltage spike suppression. A 4.7-µF ceramic capacitor is
required.
SW
7
1
5
8
2
8
4
1
B2
A1
C2
A2
PWR
PWR
IN
The switch pin is connected to the internal MOSFET switches. Connect the
inductor to this terminal.
GND
VSET
VOS
GND supply pin. Connect this pin close to the GND terminal of the input
and output capacitors.
Connecting a resistor to GND sets the output voltage when the converter is
enabled. For the TPS62849, connect this pin to GND.
IN
Output voltage sense pin for the internal feedback divider network and
regulation loop. When the converter is disabled, this pin discharges VOUT by
an internal MOSFET. Connect this pin directly to the output capacitor with a
short trace.
EN
4
6
5
C1
n/a
IN
IN
Enable pin. A high level enables the device and a low level turns the device
off. The pin features an internal pulldown resistor, which is disabled once
the device has started up and the output voltage is regulated. The pulldown
resistor is activated again, once a low level has been detected.
STOP
n/a
STOP Switching pin. When this pin is logic high, the converter stops
switching in order to provide a quiet supply rail. The output is powered from
the charge available in the output capacitor. When this pin is logic low, the
device immediately resumes operation. The pin features an internal
pulldown resistor, which is disabled once a high level is detected at the
input. The pulldown resistor is activated again, once a low level has been
detected.
MODE
3
3
n/a
IN
MODE pin. A low level enables Power-Save Mode operation with an
automatic transition between PFM and PWM modes. A high level forces the
converter to operated in PWM mode. This pin can be toggled during
operation. It must be terminated.
NC
EP
n/a
n/a
7
9
n/a
n/a
This pin is not connected internally. Do not connect this pin.
Exposed thermal pad(1). The PowerPAD must be connected to GND.
PWR
(1) For more information about the PowerPAD, see the PowerPAD™ Thermally Enhanced Package application report.
Copyright © 2019–2020, Texas Instruments Incorporated
5
TPS62840
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings(1)
MIN
–0.3
–0.3
–2.0
–0.3
–0.3
–0.3
–40
MAX
UNIT
V
VIN
7
SW (DC)
VIN + 0.3
V
SW (AC), less than 10ns(3)
8.5
V
Pin voltage(2)
EN, MODE, STOP
6.5
V
VSET
VOS
VIN + 0.3 < 3.6
V
3.7
150
150
V
Operating junction temperature, TJ
Storage temperature, Tstg
°C
°C
–65
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal GND.
(3) While switching.
7.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
±2000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins(2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body
model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN NOM MAX UNIT
VIN
Supply voltage VIN
1.8
1.51
3
6.5
2.9
40
V
L
Effective inductance
2.2
10
µH
µF
µF
pF
kΩ
COUT
CIN
Effective output capacitance
Effective input capacitance
1
4.7
CVSET
External parasitic capacitance at VSET pin
Nominal resistance range for external voltage selection resistor (E96 resistor series)
External voltage selection resistor tolerance
External voltage selection resistor temperature coefficient
Operating junction temperature range
100
267
1%
0.909
-40
RSET
±200 ppm/°C
TJ
125
°C
7.4 Thermal Information
8 Pins DLC
Package
6 Pins YBG
Package
8 Pins DGR
Package
DGR EVM
THERMAL METRIC(1)
UNIT
JEDEC PCB 51-7
JEDEC PCB 51-5 TPS62841-2EVM123
RθJA
Junction-to-ambient thermal resistance
105.6
75.7
31.9
2.3
133.4
0.4
54.4
58.1
25.9
1.2
46.9
N/A
N/A
0.9
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
RθJB
ψJT
Junction-to-board thermal resistance
39.4
0.1
Junction-to-top characterization parameter
Junction-to-board characterization parameter
ψJB
31.5
n/a
39.4
n/a
25.9
11.7
17.4
N/A
RθJC(bot) Junction-to-case (bottom) thermal resistance
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6
Copyright © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
7.5 Electrical Characteristics
VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
No load
operating input current
EN = VIN, IOUT = 0µA, VOUT = 1.8V
device switching
IQ_NO_LOAD
60
80
nA
nA
No load
operating input current
EN = VIN, IOUT = 0µA, VOUT = 1.2V
device switching
IQ_NO_LOAD
No load
operating input current
(PWM Mode)
EN = VIN, IOUT = 0µA, VOUT = 1.8V, MODE = VIN
device switching
IQ_NO_LOAD
3
mA
nA
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT
1.8V
device not switching, TJ = 25°C
(DLC package option)
=
IQ_VIN
Operating quiescent current into pin VIN
36
100
120
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT
1.8V
device not switching, TJ = 25°C
(DLC package option)
=
IQ_VOS
Operating quiescent current into pin VOS
56
nA
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT
1.8V
device not switching, TJ = -40°C to 85°C
=
=
IQ_VIN
Operating quiescent current into pin VIN
Operating quiescent current into pin VOS
36
56
360
170
nA
nA
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT
1.8V
IQ_VOS
device not switching, TJ = -40°C to 85°C
EN = VIN, VOUT = 3.3V
device not switching
70
5
nA
nA
nA
EN = VIN, VOUT < 1.5 V
device not switching
IQ_VOS
Operating quiescent current into VOS pin
EN, STOP = VIN, 3V < VOUT < 3.3V
TJ = -40°C to 85°C
5
100
IQ_100%_MODE
IQ_VIN_STOP
Operating quiescent current 100% Mode
Operating quiescent current into pin VIN
VIN = VOUT = 3.3V, TJ = -40°C to 85°C
120
70
nA
µA
STOP = High, VOUT = 1.8V, TJ = -40°C to 85°C
175
300
EN = GND, shutdown current into VIN
VSET = GND, TJ = -40°C to 85°C
ISD
Shutdown current
25
nA
VTH_UVLO+
VTH_UVLO–
Rising VIN
Falling VIN
1.72
1.45
1.8
V
V
Undervoltage lockout threshold
1.75
EN, MODE, STOP INPUTS
VIH_TH
VIL_TH
IIN
High level input voltage
1.1
V
V
Low level input voltage
Input bias current
0.4
25
MODE input, TJ = -40°C to 85°C
EN, STOP inputs
1
nA
kΩ
RPD
Internal pull-down resistance
200
450
Copyright © 2019–2020, Texas Instruments Incorporated
7
TPS62840
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
www.ti.com.cn
Electrical Characteristics (continued)
VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SWITCHES
High-side MOSFET
on-resistance
(DLC, YBG package)
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
430
340
170
135
460
370
200
165
600
465
240
180
630
495
270
210
mΩ
mΩ
mΩ
Low-side MOSFET
on-resistance
(DLC, YBG package)
RDS(ON)
High-side MOSFET
on-resistance
(DGR package)
Low-side MOSFET
on-resistance
(DGR package)
mΩ
Soft-start
ILIMF_SS
0.15
1.0
0.225
0.3
1.4
A
switch current limit(1)
High-side MOSFET switch current limit(1)
Low-side MOSFET switch current limit
Negative current limit
1.2
1.0
533
50
A
A
ILIMF
ILIMN
mA
ns
tI_LIM_DELAY
Current limit propagation delay
Leakage current
into SW pin
ILKG_SW
VSW = 1.8V, TJ = -40°C to 85°C
10
nA
OUTPUT VOLTAGE DISCHARGE
IDISCHARGE_VOS Output discharge current
THERMAL PROTECTION
EN = GND, sink current into VOS pin, over VIN
range
VOUT = 1.8V, TJ = -40°C to 85°C
16
35
44
mA
Thermal shutdown temperature
Rising junction temperature, PWM Mode
160
5
°C
°C
TSD
Thermal shutdown hysteresis
OUTPUT
PWM Mode, IOUT = 0 mA, VOUT >= 1.8 V
PWM Mode, IOUT = 0 mA, VOUT <= 1.55 V
-1.5
-2
0
0
1.5
2
%
%
VOUT
Output voltage accuracy
DC output voltage
load regulation
PWM Mode
0
0
%/mA
%/V
MHz
µs
VOUT
DC output voltage
line regulation
PWM Mode
VOUT = 1.8V, IOUT = 200 mA, over VIN range
VIN = 3.6V, VOUT = 1.8V, MODE = VIN
IOUT = 0mA
fSW
Switching frequency
1.8
VIN = 3.6V, from EN = low to high until device
starts switching
tSTARTUP_DELAY Regulator start up delay time
tSTARTUP_DELAY Regulator start up delay time
200
EN ramps with VIN, VIN 0 to 3.6V (< 100us), until
device starts switching
10
ms
tSS
Soft-start time
IOUT = 0mA
120
700
µs
µs
tSS_ILIMF
Reduced current limit soft-start timeout
1200
(1) This is the static current limit. It can be temporarily higher in applications due to internal propagation delay (see Switch Current Limit /
Short Circuit Protection section).
8
版权 © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
7.6 Typical Characteristics
160
150
140
130
120
110
100
90
80
70
60
50
1000
VIN = 1.8V
VIN = 2.5V
VIN = 3.6V
VIN = 4.5V
VIN = 5.5V
VIN = 6.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.6V
VIN = 4.5V
VIN = 5.5V
VIN = 6.5V
900
800
700
600
500
400
300
200
100
0
40
30
20
10
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
-40
25
Junction Temperature (°C)
85
125
EN = VIN
VOUT = 1.55 V
Device Not
Switching
EN = VIN
VOUT = 1.55 V
Device Not
Switching
图 2. Quiescent Current into VOS
(IQ_VOS
图 1. Quiescent Current into VIN
(IQ_VIN
)
)
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
200
180
160
140
120
100
80
VIN = 1.8V
VIN = 2.5V
VIN = 3.6V
VIN = 4.5V
VIN = 5.5V
VIN = 6.5V
60
40
20
0
-40
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
25
Junction Temperature (°C)
85
125
EN = VIN
VIN = VOUT = 3.3 V
Device Not
Switching
EN = VIN
VOUT = 1.8 V
Device Not
Switching
图 3. 100% Mode Quiescent Current
(IQ_100%_MODE
图 4. STOP Mode Quiescent Current into VIN
)
(IQ_VIN_STOP
)
1000
1400
1200
1000
800
TJ=-40°C
TJ=-20°C
TJ=0°C
TJ=25°C
TJ=65°C
TJ=85°C
VIN = 1.8V
VIN = 2.0V
VIN = 2.5V
VIN = 3.6V
VIN = 4.5V
VIN = 5.5V
VIN = 6.5V
100
600
400
10
1.5
200
-40
2
2.5
3
3.5
Input Voltage [V]
4
4.5
5
5.5
6
6.5
25
Junction Temperature (°C)
85
125
EN = GND
图 5. Shutdown Current
(ISD
图 6. High-Side RDSON versus Temperature
)
(DLC, YBG packages)
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9
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Typical Characteristics (接下页)
600
1
0.95
0.9
VIN = 1.8V
VIN = 2.0V
VIN = 2.5V
VIN = 3.6V
VIN = 4.5V
VIN = 5.5V
VIN = 6.5V
550
500
450
400
350
300
250
200
150
100
50
VIH Threshold
0.85
0.8
0.75
0.7
Undefined Region
0.65
0.6
VIL Threshold
0.55
0.5
0.45
0.4
VIN = 1.8V
VIN = 3.6V
VIN = 6.5V
85 125
0
-40
25
Junction Temperature (°C)
85
125
-40
25
Junction Temperature (°C)
图 7. Low-Side RDSON versus Temperature
图 8. EN Input Thresholds versus Temperature
(DLC, YBG packages)
1
0.95
0.9
1
0.95
0.9
VIH Threshold
VIH Threshold
0.85
0.8
0.85
0.8
0.75
0.7
0.75
0.7
Undefined Region
Undefined Region
0.65
0.6
0.65
0.6
VIL Threshold
VIL Threshold
0.55
0.5
0.55
0.5
0.45
0.4
0.45
0.4
VIN = 1.8V
25
Junction Temperature (°C)
VIN = 3.6V
VIN = 6.5V
125
VIN = 1.8V
25
Junction Temperature (°C)
VIN = 3.6V
VIN = 6.5V
85 125
-40
85
-40
图 9. MODE Input Thresholds versus Temperature
图 10. STOP Input Thresholds versus Temperature
47
VIN = 1.8V
VIN = 2.5V
VIN = 3.6V
VIN = 4.5V
VIN = 5.5V
VIN = 6.5V
39
31
23
15
-40
25
Junction Temperature (°C)
85
125
EN = GND
VOUT = 1.8 V
图 11. Output Discharge Current versus Temperature
10
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8 Detailed Description
8.1 Overview
The TPS6284x is a synchronous step-down converter with ultra-low quiescent current consumption. Using TI's
DCS-Control topology, the device extends the high efficiency operation area down to micro amperes of load
current during Power-Save Mode Operation. Depending on the output voltage, the device consumes quiescent
current from both the input and output to reduce the overall input current consumption to 60 nA typical.
DCS-Control™ (Direct Control with Seamless Transition into Power-Save Mode) is an advanced regulation
topology that combines the advantages of hysteretic and voltage mode controls. Characteristics of DCS-Control
are excellent AC load regulation and transient response, low output ripple voltage, and a seamless transition
between PFM and PWM modes. It includes a AC loop which senses the output voltage (VOS pin) and directly
feeds this information into a fast comparator stage.
The device operates with a nominal switching frequency of 1.8 MHz. An additional voltage feedback loop is used
to achieve accurate DC load regulation. The internally compensated regulation network achieves fast and stable
operation with small external components and low ESR capacitors.
In Power-Save Mode, the switching frequency varies linearly with the load current. Since DCS-Control supports
both operating modes, the transition from PWM to PFM is seamless with minimum output voltage ripple. The
TPS6284x offers both, excellent DC voltage and superior load transient regulation, combined with low output
voltage ripple thereby minimizing interferences with Radio Frequency circuits.
8.2 Functional Block Diagram
MODE
MODE
STOP
STOP
PD
Control
R
PD
Smart PD
+
–
VTH_UVLO
VIN
UVLO
EN
EN
PD
Control
UVLO Comparator
R
PD
Ultra Low Power
Reference
Smart PD
VOS
R2D converter
Thermal
Shutdown
UVLO
EN
VOUT
Discharge
VREF
Resistor to Digital
Converter
VSET
Softstart
Power Stage
ILIM Comp.
VIN
SW
DCS
Control
VIN
High-Side
Limit
TON timer
PMOS
VOS
VSW
VOS
UVLO
Ramp
Generator
Gate Driver
Anti
Main
Comparator
Error
VOS
VREF
Shoot-Through
amplifier
EN
NMOS
Low-Side
Limit
MODE
STOP
GND
ILIM Comp.
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8.3 Feature Description
8.3.1 Smart Enable and Shutdown
To avoid a floating input, an internal 450-kΩ resistor pulls the EN pin to GND. This prevents an uncontrolled
start-up of the device in case the EN pin cannot be driven low safely. The device is in shutdown mode when the
EN input is logic low.
The device turns on with a logic high EN signal. An internal control circuit disconnects the EN pin pulldown
resistor once the device has finished soft start and the output voltage is in regulation. With the EN pin set low,
the device enters shutdown mode and the pulldown resistor is activated again.
8.3.2 Soft Start
To protect the battery and system from excessive inrush current, the device features a soft start of the output
voltage.
Once the device has been enabled, it initializes and powers up its internal circuits. This occurs during the
regulator start-up delay time (tSTARTUP_DELAY). Once this delay expires, the device enters soft start, starts
switching, and ramps up the output voltage.
The device operates with a reduced switch current limit (ILIMF_SS) throughout the entire soft-start phase (tSS). The
switch current limit is increased to its nominal value (ILIMF) once the output voltage has reached its nominal value
or the reduced current limit soft-start time (tSS_ILIMF) has expired, whichever occurs first. The soft-start phase (tSS
)
can last up to approximately 700 µs. 图 12 shows the start-up procedure.
EN
Device starts switching
VOUT ramps up
VOUT
tSTARTUP_DELAY
tSS
图 12. Device Start-up
8.3.3 Mode Selection: Power-Save Mode (PFM/PWM) or Forced PWM Operation (FPWM)
Connecting the MODE input to GND enables the automatic PWM and power-save mode operation. The
converter operates in PWM mode at moderate to heavy loads and in the PFM mode during light loads, which
maintains high efficiency over a wide load current range.
Pulling the MODE pin high forces the converter to operate in PWM mode even at light load currents, allowing
lower ripple compared to PFM mode switching. In this mode, the efficiency is lower compared to the power-save
mode during light loads. For additional flexibility, it is possible to switch from power-save mode to forced PWM
mode during operation. This allows efficient power management by adjusting the operation of the converter to
the specific system requirements. The MODE pin must be terminated.
This pin is not available in the YBG package, where the device automatically transitions between power-save
and PWM modes.
8.3.4 Output Voltage Selection (VSET)
The output voltage is set with a single external resistor connected between the VSET pin and GND. Once the
device has been enabled and the control logic as well as the reference system are powered up, an R2D (resistor
to digital) conversion is started to detect the value of the external RSET resistor. A pre-defined fixed output voltage
is set based on the RSET value. The output voltage is set once during the start-up delay phase of the device.
12
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Feature Description (接下页)
Once the output voltage is set, the R2D converter is turned off to avoid current flowing through RSET. Care must
be taken that no parasitic current, capacitance, or both greater than 100 pF is present between the VSET and
GND pins. This can cause false RSET readings and a faulty output voltage to be set. The R2D converter is
designed to operate with resistor values out of E96 series. 表 1 shows the allowed RSET values.
表 1. Output Voltage Setting, RSET Resistor
OUTPUT VOLTAGE SETTING VOUT [V]
VSET RESISTANCE TO GND - E96 VALUES [Ω]
TPS62841YBG
TPS62840YBG
TPS62840DLC
TPS62841DLC
TPS62842DGR
MIN
NOM
MAX
TPS62841DGR
0.8
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
1.8
2.0
2.2
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.49
3.6
0
GND
0.909 k
1.74 k
2.87 k
4.32 k
6.04 k
8.45 k
11.5 k
15.8 k
21.5 k
28.7 k
38.3 k
52.3 k
71.5 k
102 k
0.01 k
0.95 k
0.85
0.9
0.87 k
1.67 k
1.81 k
0.95
1.0
2.76 k
2.98 k
4.15 k
4.49 k
1.05
1.1
5.80 k
6.28 k
8.11 k
8.79 k
1.15
1.2
11.04 k
15.17 k
20.64 k
27.55 k
36.77 k
50.21 k
68.64 k
97.92 k
256.32 k
11.96 k
16.43 k
22.36 k
29.85 k
39.83 k
54.39 k
74.36 k
106.08 k
277.68 k
1.25
1.3
1.35
1.4
1.45
1.5
1.55
267 k
The output voltage of the TPS62849 is internally set to 3.4 V. Connect VSET directly to GND for this device.
8.3.5 Undervoltage Lockout UVLO
To avoid mis-operation of the device at low input voltages, an undervoltage lockout (UVLO) comparator monitors
the supply voltage. The UVLO comparator shuts down the device at an input below the threshold VTH_UVLO– with
falling VIN. The device starts at an input voltage higher than the threshold VTH_UVLO+ with rising VIN.
When the device resumes operation from an undervoltage lockout condition, it behaves like being enabled. This
means the internal control logic is powered up, the external RSET resistor is read out and a soft-start sequence is
initiated.
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8.3.6 Switch Current Limit / Short Circuit Protection
The TPS6284x integrates a current limit on the high-side as well as on the low-side MOSFETs to protect the
device against overload or short circuit conditions. The current in the switches is monitored cycle-by-cycle. If the
high-side MOSFET current limit (ILIMF) trips, the high-side MOSFET is turned off and the low-side MOSFET is
turned on to ramp the inductor current down. Once the inductor current decreases below the low-side current
limit (ILIMF), the low-side MOSFET turns off and the high-side MOSFET turns on again.
During soft start, the current limit is reduced to ILIMF_SS. After soft start has finished, the current limit value
increases to the normal value ILIMF
.
Due to internal propagation delay, the actual inductor current can exceed the static current limit during that time.
The dynamic current limit can be calculated as follows:
VL
I peak(typ) ILIMF
ꢁ
ꢀ tI_LIM_DELAY
where
•
•
•
•
ILIMF is the static current limit, specified in Electrical Characteristics
L is the inductance
VL is the voltage across the inductor (VIN - VOUT
)
tI_LIM_DELAY is the internal propagation delay
(1)
In forced PWM mode, a negative current limit (ILIMN) is enabled to prevent excessive current flowing backwards
to the input. When the inductor current reaches ILIMN, the low-side MOSFET turns off and the high-side MOSFET
turns on and kept on until TON time expires.
8.3.7 Output Voltage Discharge
The purpose of the output discharge function is to ensure a defined ramp-down of the output voltage when the
device is disabled.
The internal discharge resistor is connected to the VOS pin. The discharge function is enabled as soon as the
device is disabled or if UVLO is entered. It is not active during Thermal Shutdown. The discharge circuit remains
active as long as the input voltage is above 0.7 V.
8.3.8 Thermal Shutdown
The junction temperature (TJ) of the device is monitored by an internal temperature sensor. The device enters
thermal shutdown when the junction temperature exceeds the thermal shutdown threshold (TSD) of 160°C (typ.).
Both the high-side and low-side MOSFETs are turned off. The device resumes its operation when the junction
temperature falls below typically 155°C again and begins with a soft-start cycle without reading RSET again. In
Power-Save Mode, the thermal shutdown feature is disabled.
8.3.9 STOP Mode
The TPS6284x includes the STOP input pin, allowing the user to temporarily stop the switching of the regulator.
The STOP pin function does not depend on the setting of the MODE pin. The STOP pin is only present on the
DLC package.
When a logic high level is applied to the STOP pin, the regulator is forced to stop switching after the current
switching cycle. The application is powered by the charge available in the output capacitor. No switching noise is
generated, which can be beneficial in noise-sensitive sampled applications.
An MCU controlling this pin needs to take care to turn the device back on before the output voltage reaches a
system critical level. Should this not happen, the output voltage is clamped to about 0.5 V below the set output
voltage. In STOP mode, the device consumes typically 70 µA operating quiescent current from the input supply.
When a logic low level is applied to the STOP pin, the regulator immediately resumes switching operation without
a start-up delay or soft start. To avoid a floating input, an internal 450-kΩ resistor pulls the STOP pin to GND. A
control circuit disconnects the pulldown resistor at the STOP pin once a high level has been detected (similar to
the EN pin).
14
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8.4 Device Functional Modes
8.4.1 Power-Save Mode Operation
The DCS-Control topology supports Power-Save Mode operation. At light loads, the device operates in PFM
(Pulse Frequency Modulation) mode that generates a single switching pulse to ramp up the inductor current and
recharge the output capacitor, followed by a sleep period where most of the internal circuits are shutdown to
achieve lowest operating quiescent current. During this time, the load current is supported by the output
capacitor. The duration of the sleep period depends on the load current and the inductor peak current. During the
sleep periods, the current consumption is reduced to typically 60 nA. This low quiescent current consumption is
achieved by an ultra-low power reference, an integrated high-impedance feedback divider network, and an
optimized Power-Save Mode operation. To achieve a stable switching frequency in steady state operation, the
on-time is calculated as in 公式 2.
VOUT
TON
=
⋅556ns
V
IN
(2)
In PFM Mode, the switching frequency varies linearly with the load current and is calculated in 公式 3. At medium
and high load conditions, the device enters automatically PWM (Pulse Width Modulation) mode and operates in
continuous conduction mode with a nominal switching frequency (fsw). The switching frequency in PWM mode is
controlled and depends on VIN and VOUT. The boundary between PWM and PFM mode is when the inductor
current becomes discontinuous.
2ꢀIO` UT
fPFM
ꢁ
V
V V
!
"
TO2N
ꢀ
IN
IN
OUT
#
$
&
VOUT
L
%
(3)
If the load current decreases, the converter seamlessly enters PFM mode to maintain high efficiency down to
ultra-light loads. Since DCS-Control supports both operation modes within one single building block, the
transition from PWM to PFM modes is seamless with minimum output voltage ripple.
8.4.2 Forced PWM Mode Operation
With a high level on the MODE input, the device enters forced PWM Mode and operates with a high switching
frequency over the entire load range, even at very light loads. This reduces or eliminates interference with RF
and noise-sensitive circuits, but reduces efficiency at light loads. The MODE pin can be changed during
operation and must be terminated.
8.4.3 100% Mode Operation
In PWM mode, the duty-cycle of a buck converter is given as D = VOUT/VIN. The duty-cycle increases as the input
voltage comes closer to the output voltage. Once the input voltage decreases to near 100% duty cycle, the
output voltage set point is increased by +30 mV. As the input voltage decreases further, the device enters 100%
duty-cycle mode and keeps the high-side MOSFET on continuously. The output (VOUT) is connected to the input
(VIN) through the inductor and the internal high-side MOSFET. The minimum input voltage to maintain a given
output voltage depends on the load current and is calculated as:
VINmin = VOUT + IOUT × (RDS(on)max + RL)
where
•
•
•
IOUT = output current
RDS(on)max = maximum P-channel switch RDS(on)
RL = DC resistance of the inductor
The TPS6284x contains special circuitry to keep an ultra-low IQ of 120 nA during 100% mode operation.
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The following section discusses the design of the external components to complete the power supply design for
several input and output voltage options by using typical applications as a reference.
9.2 Typical Application
L
TPS62840YBG
VIN
2.2 µH
VIN
SW
VOS
VOUT
CI
4.7 µF
CO
10µF
GND
EN
ENABLE
VSET
RSET
TPS62841DLC
VIN
L
VIN
SW
2.2 µH
CI
4.7 µF
VOUT
CO
10µF
VOS
GND
MODE
STOP
EN
MODE
VSET
RUN/STOP
ENABLE
RSET
L
TPS62842DGR
VIN
2.2 µH
VIN
SW
VOUT
CI
4.7 µF
CO
10µF
VOS
GND
EN
ENABLE
VSET
NC
RSET
MODE
图 13. TPS6284x Application Circuit
Additional circuits are shown in the System Examples.
9.2.1 Design Requirements
表 2 shows the list of components for the application circuit and the characteristic application curves.
16
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Typical Application (接下页)
表 2. Components for Application Characteristic Curves
REFERENC
DESCRIPTION
E
MANUFACTURER(1
VALUE
SIZE [L x W x T]
)
TPS6284x
IC
TI
step-down converter
GRM155R61A475MEAAD
CI
4.7 µF / 10 V / X5R
10 µF / 4 V / X5R
2.2 µH / 116 mΩ DCR
See 表 1
(0402) [1 mm x 0.5 mm x 0.65 mm max.]
(0402) [1 mm x 0.5 mm x 0.65 mm max.]
muRata
muRata
muRata
ceramic capacitor
GRM155R60G106ME44D
CO
ceramic capacitor
DFE201612E-2R2M=P2
(2016) [2.0 mm x 1.6 mm x 1.2 mm
max.]
L
inductor
Resistor E96 series
RSET
1%, TC ±200ppm
(1) See the Third-party Products Disclaimer.
9.2.2 Detailed Design Procedure
The inductor and output capacitor together provide a low-pass filter. To simplify this process, 表 3 outlines
possible inductor and capacitor value combinations.
表 3. Recommended LC Output Filter Combinations
OUTPUT CAPACITOR VALUE [µF](2)
INDUCTOR VALUE [µH](1)
10 µF
22 µF
(3)
2.2
√
√
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and -20%.
(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance varies by +20% and –50%.
(3) Typical application configuration. Other check marks indicate alternative filter combinations.
9.2.2.1 Inductor Selection
The inductor value affects the peak-to-peak ripple current, PWM-to-PFM transition point, output voltage ripple,
and efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The inductor
ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT and can be estimated
according to 公式 4.
公式 5 calculates the maximum inductor current under static load conditions. The saturation current of the
inductor must be rated higher than the maximum inductor current, as calculated with 公式 5. This is
recommended because during a heavy load transient the inductor current rises above the calculated value. A
more conservative way is to select the inductor saturation current according to the high-side MOSFET switch
current limit, ILIMF
.
Vout
Vin
1-
DIL = Vout ´
L ´ ¦
(4)
DI
L
I
= I
+
Lmax
outmax
2
where
•
•
•
•
f is the switching frequency
L is the inductance
ΔIL is the peak-to-peak inductor ripple current
ILmax is the maximum inductor current
(5)
17
表 4 shows a list of possible inductors.
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表 4. List of Possible Inductors(1)
INDUCTANCE [µH]
INDUCTOR TYPE
DFE201612E
DFE201210S
SIZE [L x W x T]
SUPPLIER
2.2
2.2
[2.0 mm x 1.6 mm x 1.2 mm max.]
[2.0 mm x 1.2 mm x 1.0 mm max.]
muRata
muRata
(1) See the Third-party Products Disclaimer.
9.2.2.2 Output Capacitor Selection
The DCS-Control scheme of the TPS62840 allows the use of tiny ceramic capacitors. Ceramic capacitors with
low-ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires
either an X7R or X5R dielectric.
At light load currents, the converter operates in Power-Save Mode and the output voltage ripple is dependent on
the output capacitor value. Larger output capacitors reduce the output voltage ripple. The leakage current of the
output capacitor adds to the overall quiescent current.
表 5. List of Possible Capacitors(1)
CAPACITOR VALUE
CAPACITOR TYPE
SIZE IMPERIAL
(METRIC)
SIZE [L x W x T]
SUPPLIER
[μF]
10
GRM155R60G106ME44D
0402
[1mm x 0.5mm x 0.65mm max.]
muRata
(1005)
(1) See the Third-party Products Disclaimer.
9.2.2.3 Input Capacitor Selection
Because the buck converter has a pulsating input current, a low-ESR input capacitor is required for best input
voltage filtering to minimize input voltage spikes. For most applications, a 4.7-µF input capacitor is sufficient.
When operating from a high impedance source, a larger input buffer capacitor is recommended to avoid voltage
drops during start-up and load transients.
The input capacitor can be increased without any limit for better input voltage filtering. The leakage current of the
input capacitor adds to the overall quiescent current. 表 6 shows a selection of input and output capacitors.
表 6. List of Possible Capacitors(1)
CAPACITOR VALUE
CAPACITOR TYPE
GRM155R61A475MEAAD
GRM31CR71H475MA12L
C1608X7S1A475M080AC
GRM155R60J106ME15D
SIZE IMPERIAL
(METRIC)
SIZE [L x W x T]
SUPPLIER
muRata
muRata
TDK
[μF]
4.7
4.7
4.7
10
0402
(1005)
[1mm x 0.5mm x 0.65mm max.]
[3.2mm x 1.6mm x 1.8mm max.]
[1.6mm x 0.8mm x 1.0mm max.]
[1mm x 0.5mm x 0.65mm max.]
1206
(3216)
0603
(1608)
0402
muRata
(1005)
(1) See the Third-party Products Disclaimer.
18
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9.2.3 Application Curves
The conditions for the following application curves are VIN = 3.6 V, VOUT = 1.8 V, MODE = GND, STOP = GND,
and the used components listed in 表 2, unless otherwise noted.
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
VOUT=0.8V
PFM/PWM Operation
VOUT=1.2V
PFM/PWM Operation
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
1
1
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
1
1
RSET = GND
RSET = 15.8 kΩ to GND
图 14. Efficiency Power Save Mode
图 15. Efficiency Power Save Mode
VOUT = 0.8 V
VOUT = 1.2 V
100
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
VOUT=1.8V
95 PFM/PWM Operation
VOUT=1.8V
PFM/PWM Operation
90
85
80
75
70
65
60
55
50
45
40
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=3.6V, TA=-40oC
VIN=3.6V, TA=25oC
VIN=3.6V, TA=85oC
VIN=6.5V, TA=-40oC
VIN=6.5V, TA=25oC
VIN=6.5V, TA=85oC
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
RSET = GND
RSET = GND
图 16. Efficiency Power Save Mode
图 17. Efficiency Power Save Mode
VOUT = 1.8 V
VOUT = 1.8 V
100
100
VOUT=2.5V
95 PFM/PWM Operation
VOUT=3.3V
95 PFM/PWM Operation
90
85
80
75
70
65
60
55
50
45
40
90
85
80
75
70
65
60
55
50
45
40
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=3.3V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
RSET = 11.5 kΩ to GND
RSET = 267 kΩ to GND
图 18. Efficiency Power Save Mode
图 19. Efficiency Power Save Mode
VOUT = 2.5 V
VOUT = 3.3 V
版权 © 2019–2020, Texas Instruments Incorporated
19
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
www.ti.com.cn
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
100n
1m
10m
100m 1m
Load Current [A]
10m
100m 0.75
100n
1m
10m
100m 1m
Load Current [A]
10m
100m 0.75
RSET = GND
RSET = GND
图 20. Efficiency Power Save Mode
图 21. Efficiency Power Save Mode
VOUT = 0.8 V for the DGR device
VOUT = 1.2 V for the DGR device
100
100
95
90
85
80
75
70
65
60
55
50
45
40
95
90
85
80
75
70
65
60
55
50
45
40
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.0V
VIN=6.5V
100n
1m
10m
100m 1m
Load Current [A]
10m
100m 0.75
100n
1m
10m
100m 1m
Load Current [A]
10m
100m 0.75
RSET = GND
RSET = 267 kΩ to GND
图 22. Efficiency Power Save Mode
图 23. Efficiency Power Save Mode
VOUT = 1.8 V for the DGR device
VOUT = 3.6 V for the DGR device
100
90
80
70
60
50
40
30
20
10
0
0.824
0.816
0.808
0.8
VIN=3.6V
PWM Operation
0.792
0.784
0.776
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VOUT=0.8V
VOUT=1.2V
VOUT=1.8V
VOUT=3.3V
VIN=5.0V
VIN=6.5V
VOUT=0.8V
PFM/PWM Operation
1m
10m
100m
1
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
Load Current [A]
RSET = GND
图 24. Efficiency Forced PWM Mode
图 25. Output Voltage versus Load Current
VOUT = 0.8 V / 1.2 V / 1.8 V / 3.3 V
VOUT = 0.8 V
20
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TPS62840
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
1.236
1.854
1.836
1.818
1.8
VOUT=1.8V
PFM/PWM Operation
1.224
1.212
1.2
1.188
1.176
1.164
1.782
1.764
1.746
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=1.8V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VOUT=1.2V
PFM/PWM Operation
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
RSET = 15.8k Ω to GND
RSET = GND
图 26. Output Voltage versus Load Current
图 27. Output Voltage versus Load Current
VOUT = 1.2 V
VOUT = 1.8 V
2.575
3.4
3.35
3.3
2.55
2.525
2.5
3.25
3.2
3.15
3.1
2.475
2.45
3.05
3
VIN=3.3V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=3.3V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
2.95
2.9
VOUT=2.5V
PFM/PWM Operation
VOUT=3.3V
PFM/PWM Operation
2.425
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
100n
1µ
10µ
100µ 1m
Load Current [A]
10m
100m
1
RSET = 11.5 kΩ to GND
RSET = 267 kΩ to GND
图 28. Output Voltage versus Load Current
图 29. Output Voltage versus Load Current
VOUT = 2.5 V
VOUT = 3.3 V
3.55
3.55
VOUT=3.4V at 25°C
VOUT=3.4V at 70°C
3.5
3.45
3.4
3.5
3.45
3.4
3.35
3.3
3.35
3.3
3.25
3.2
3.25
3.2
3.15
3.1
3.15
3.1
3.05
3
3.05
3
VIN=3.4V
VIN=3.5V
VIN=3.6V
VIN=3.7V
VIN=3.8V
VIN=3.9V
VIN=4V
VIN=3.4V
VIN=3.5V
VIN=3.6V
VIN=3.7V
VIN=3.8V
VIN=3.9V
VIN=4V
2.95
2.9
2.95
2.9
2.85
2.85
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Load Current [A]
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Load Current [A]
RSET = GND
RSET = GND
图 30. Output Voltage versus Load Current
图 31. Output Voltage versus Load Current
VOUT = 3.4 V
VOUT = 3.4 V
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1.2
1.1
1
3.55
VOUT=3.4V at 85°C
VOUT=1.8V
3.5
3.45
3.4
3.35
3.3
0.9
0.8
0.7
0.6
0.5
0.4
0.3
3.25
3.2
3.15
3.1
3.05
3
TA=-40°C
TA=25°C
TA=70°C
TA=85°C
VIN=3.4V
VIN=3.5V
VIN=3.6V
VIN=3.7V
VIN=3.8V
VIN=3.9V
VIN=4V
2.95
2.9
2.85
Forced PWM Operation
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Load Current [A]
1.8 2.2 2.6
3
Input Voltage [V]
3.4 3.8 4.2 4.6
5
RSET = GND
RSET = GND
图 32. Output Voltage versus Load Current
图 33. Maximum Output Current versus Input Voltage
VOUT = 3.4 V
VOUT = 1.8 V
1.2
VOUT=0.8V
1
PFM/PWM Operation
VOUT=3.3V
1.1
1
100m
0.9
0.8
0.7
0.6
0.5
0.4
0.3
10m
VIN=1.8V
VIN=2.0V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
1m
TA=-40°C
TA=25°C
TA=70°C
TA=85°C
100µ
10µ
Forced PWM Operation
3.2 3.4 3.6 3.8
4
Input Voltage [V]
4.2 4.4 4.6 4.8
5
5.2
100n 1µ 10µ 100µ 1m 10m 100m
Load Current [A]
1
RSET = 267 kΩ to GND
RSET = GND
图 34. Maximum Output Current versus Input Voltage
VOUT = 3.3 V
图 35. Switching Frequency versus Load Current
VOUT = 0.8 V
VOUT=1.2V
1
PFM/PWM Operation
VOUT=1.8V
1
PFM/PWM Operation
0.1
0.1
0.01
0.01
VIN=1.8V
VIN=2.0V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
0.001
0.001
VIN=2.0V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
0.0001
0.00001
0.0001
0.00001
VIN=5.0V
VIN=6.5V
100n 1µ 10µ 100µ 1m 10m 100m
Load Current [A]
1
100n 1µ 10µ 100µ 1m 10m 100m
Load Current [A]
1
RSET = 15.8 kΩ to GND
RSET = GND
图 36. Switching Frequency versus Load Current
图 37. Switching Frequency versus Load Current
VOUT = 1.2 V
VOUT = 1.8 V
22
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
2.4
2.2
2
1
VOUT=3.3V
PFM/PWM Operation
VOUT=1.8V
Forced PWM Operation
0.1
0.01
1.8
1.6
1.4
1.2
1
0.001
0.8
0.6
0.4
0.2
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
VIN=2.0V
VIN=2.5V
VIN=3.0V
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
0.0001
0.00001
100n 1µ 10µ 100µ 1m 10m 100m
Load Current [A]
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7
Load Current [A]
RSET = 267 kΩ to GND
RSET = GND
图 38. Switching Frequency versus Load Current
图 39. Switching Frequency versus Load Current
VOUT = 3.3 V
VOUT = 1.8 V
1µ
2.4
PFM Operation
No Load
VOUT=0.8V
VOUT=1.2V
VOUT=1.8V
VOUT=3.3V
VOUT=3.3V
Forced PWM Operation
2.2
2
1.8
1.6
1.4
1.2
1
100n
0.8
0.6
0.4
0.2
VIN=3.6V
VIN=4.2V
VIN=5.0V
VIN=6.5V
10n
1.5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7
Load Current [A]
2
2.5
3
3.5
4
4.5
Input Voltage [V]
5
5.5
6
6.5
RSET = 267 kΩ to GND
图 40. Switching Frequency versus Load Current
图 41. No Load Operating Current versus Input Voltage
VOUT = 3.3 V
10m
1.802
1.8016
1.8012
1.8008
1.8004
1.8
VOUT=0.8V
VOUT=1.8V
VOUT=3.3V
1.7996
1.7992
1.7988
1m
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
VIN = 6.0V
VIN = 6.5V
1.7984
1.798
0
0.15
0.3 0.45
Load Current [A]
0.6
0.75
Forced PWM Operation
No Load
100µ
1.5
2
2.5
3
3.5
4
4.5
Input Voltage [V]
5
5.5
6
6.5
EN = VIN
MODE = HIGH
图 43. Output Voltage Accuracy (Load Regulation)
图 42. No Load Operating Current versus Input Voltage
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1.8012
1.8009
1.8006
1.8003
1.8
1.7997
1.7994
1.7991
1.7988
1.7985
1.7982
1.7979
IOUT = 10µA
IOUT = 100µA
IOUT = 1mA
IOUT = 10mA
IOUT = 100mA
IOUT = 200mA
2
2.5
3
3.5
4
4.5
Input Voltage (V)
5
5.5
6
6.5
EN = VIN
MODE = HIGH
VOUT = 1.8 V
IOUT = 10 mA
图 44. Output Voltage Accuracy (Line Regulation)
图 45. Output Voltage Ripple, PFM Operation
VOUT = 1.8 V
MODE = HIGH
IOUT = 10 mA
VOUT = 1.8 V
rise/fall time = 20 µs
VIN = 2.5 V to 6.5 V
IOUT = 10 mA
图 46. Output Voltage Ripple, PWM Operation
图 47. Line Transient PFM Mode
VOUT = 1.8 V
rise/fall time = 20 µs
VIN = 2.5 V to 6.5 V
IOUT = 500 mA
VOUT = 1.8 V
rise/fall time < 1 µs
VIN = 3.6 V
IOUT = 125 µA to 50 mA
图 48. Line Transient PWM Mode
图 49. Load Transient PFM Mode
24
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TPS62840
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
VOUT = 1.8 V
rise/fall time < 1 µs
VIN = 3.6 V
IOUT = 125 mA to 375 mA
VOUT = 1.8 V
rise/fall time < 1 µs
VIN = 3.6 V
IOUT = 0 A to 100 mA
图 50. Load Transient PFM/PWM Mode
图 51. Load Transient PWM Mode from No load
VOUT = 3.3 V
rise/fall time < 1 µs
VIN = 3.6 V
IOUT = 75 µA to 50 mA
VOUT = 3.3 V
VIN = 3.1 V to 3.6 V
IOUT = 50 mA
图 52. Load Transient PFM Mode
图 53. 100% Mode Entry/Exit Operation
VOUT = 1.8 V
Turned on by EN input
VIN = 3.6 V
IOUT = 400 mA
RLOAD = 4.5 Ω
VOUT = 1.8 V
Turned on by EN input
VIN = 3.6 V
IOUT = 0 mA
图 55. Start-up/Shutdown into Load
图 54. Start-up/Shutdown into No Load
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TPS62840
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VOUT = 1.8 V
VIN rising from 0 V to 3.6 V
EN = VIN
IOUT = 0 mA
VOUT = 3.3 V
Turned on by EN input
VIN = 3.6 V
IOUT = 0 mA
图 56. Start-up/Shutdown into No Load
图 57. Start-up/Shutdown into No Load
VOUT = 1.8 V
PFM Operation
VIN = 3.6 V
IOUT = 10 mA
VOUT = 1.8 V
PWM Operation
VIN = 3.6 V
IOUT = 10 mA
图 58. STOP Mode Operation
图 59. STOP Mode Operation
26
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TPS62840
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
9.3 System Example
High Power Loads
WiFi
VIN Sources
WMBus
2 x Li-MnO2 (6 V)
LPWAN/NB-IoT
Motors
4 x 1.6 V Alkaline (6.4 V)
1 x Li-SOCL2 (3.6 V)
1 x LiMnO2 (3 V)
1 x Li-Ion (4.2 V)
USB (5 V)
Main Rail
LDOs
OHRM TX
TPS6284x
60nA IQ Buck Converter
Several 100mA
Load Switches
Medium Power Loads
Audio Amplifier
Up to 6.5 V
Ultra-Low Power Loads
Audio Codec
Bluetooth Radio
GPS
MCU
SOC
Few µA
Few 10mA
图 60. The Broad Range of Input Voltage Sources and Various Power Loads that TPS6284x Can Support
版权 © 2019–2020, Texas Instruments Incorporated
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
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10 Power Supply Recommendations
The power supply must provide a current rating according to the supply voltage, output voltage, and output
current of the TPS62840.
11 Layout
11.1 Layout Guidelines
The TPS62840 pinout has been optimized to enable a single layer PCB routing of the device and its critical
passive components such as CIN, COUT, and L.
•
•
•
•
As for all switching power supplies, the layout is an important step in the design. Care must be taken in board
layout to get the specified performance.
It is critical to provide a low inductance, low impedance ground path. Therefore, use wide and short traces for
the main current paths.
The input capacitor must be placed as close as possible to the VIN and GND pins of the device. This is the
most critical component placement.
The VOS line is a sensitive, high impedance line and must be connected to the output capacitor and routed
away from noisy components and traces (for example, the SW line) or other noise sources.
11.2 Layout Example
VOUT
GND
VIN
COUT
L
IC
MODE
EN
STOP
RSET
GND
图 61. Recommended PCB Layout
DLC Package
GND
VOUT
COUT
IC
L
RSET
VIN
EN
GND
图 62. Recommended PCB Layout
YBG Package
28
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TPS62840
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ZHCSJW0D –JUNE 2019–REVISED MARCH 2020
Layout Example (接下页)
GND
EN
RSET
MODE
VIN
IC
L
COUT
VOUT
图 63. Recommended PCB Layout
GND
DGR Package
版权 © 2019–2020, Texas Instruments Incorporated
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12 器件和文档支持
12.1 器件支持
12.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此类
产品或服务单独或与任何 TI 产品或服务一起的表示或认可。
12.2 保障资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 商标
DCS-Control, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
30
版权 © 2019–2020, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
15-Jul-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS62840DLCR
TPS62840YBGR
TPS62841DGRR
TPS62841DLCR
TPS62841YBGR
TPS62842DGRR
TPS62849DLCR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSON-HR
DSBGA
DLC
YBG
DGR
DLC
YBG
DGR
DLC
8
6
8
8
6
8
8
3000 RoHS & Green
3000 RoHS & Green
2500 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
2500 RoHS & Green
3000 RoHS & Green
Call TI | NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
E5
Samples
Samples
Samples
Samples
Samples
Samples
Samples
SNAGCU
NIPDAU
62840
HVSSOP
VSON-HR
DSBGA
T841R
E9
Call TI | NIPDAU
SNAGCU
NIPDAU
62841
T842R
FF
HVSSOP
VSON-HR
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Jul-2023
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Dec-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS62840DLCR
VSON-
HR
DLC
8
3000
180.0
8.4
1.8
2.25
1.15
4.0
8.0
Q1
TPS62840YBGR
TPS62841DGRR
TPS62841DLCR
DSBGA
YBG
6
8
8
3000
2500
3000
180.0
330.0
180.0
8.4
12.4
8.4
1.14
5.3
1.64
3.4
0.59
1.4
4.0
8.0
4.0
8.0
12.0
8.0
Q1
Q1
Q1
HVSSOP DGR
VSON-
HR
DLC
1.8
2.25
1.15
TPS62841YBGR
TPS62842DGRR
TPS62849DLCR
DSBGA
YBG
6
8
8
3000
2500
3000
180.0
330.0
180.0
8.4
12.4
8.4
1.14
5.3
1.64
3.4
0.59
1.4
4.0
8.0
4.0
8.0
12.0
8.0
Q1
Q1
Q1
HVSSOP DGR
VSON-
HR
DLC
1.8
2.25
1.15
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Dec-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS62840DLCR
TPS62840YBGR
TPS62841DGRR
TPS62841DLCR
TPS62841YBGR
TPS62842DGRR
TPS62849DLCR
VSON-HR
DSBGA
DLC
YBG
DGR
DLC
YBG
DGR
DLC
8
6
8
8
6
8
8
3000
3000
2500
3000
3000
2500
3000
182.0
182.0
366.0
182.0
182.0
366.0
182.0
182.0
182.0
364.0
182.0
182.0
364.0
182.0
20.0
20.0
50.0
20.0
20.0
50.0
20.0
HVSSOP
VSON-HR
DSBGA
HVSSOP
VSON-HR
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DLC 8
2.0 x 1.5 mm, 0.5 mm pitch
VSON-HR - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224379/A
PACKAGE OUTLINE
VSON-HR - 1 mm max height
PLASTIC SMALL OUTLINE- NO LEAD
DLC0008B
1.6
1.4
A
B
2.1
1.9
PIN 1 INDEX AREA
1 MAX
C
SEATING PLANE
0.08 C
0.05
0.00
(0.1) TYP
SYMM
6X 0.5
4
5
SYMM
2X
1.5
8
1
0.3
0.2
8X
0.1
0.05
C A B
C
0.5
8X
0.3
4224310/A 05/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
VSON-HR - 1 mm max height
PLASTIC SMALL OUTLINE- NO LEAD
DLC0008B
8X (0.6)
8X (0.25)
SYMM
1
8
6X (0.5)
SYMM
5
4
(R0.05) TYP
(1.3)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 30X
SOLDER MASK
OPENING
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
NON- SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4224310/A 05/2018
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
VSON-HR - 1 mm max height
PLASTIC SMALL OUTLINE- NO LEAD
DLC0008B
8X (0.6)
8X (0.25)
SYMM
1
8
6X (0.5)
SYMM
5
4
(R0.05) TYP
(1.3)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 30X
4224310/A 05/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
DGR0008A
VSSOP PowerPADTM - 1.1 mm max height
S
C
A
L
E
3
.
7
0
0
PLASTIC SMALL OUTLINE
C
5.0
4.8
TYP
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
1
3.1
2.9
NOTE 3
2X
1.95
4
5
0.27
0.18
8X
3.1
2.9
1.1 MAX
B
0.13
C A B
NOTE 4
0.20
0.15
TYP
SEE DETAIL A
4X (0.445)
2X (0.61)
EXPOSED
4X (0.175)
THERMAL PAD
5
4
0.25
GAGE PLANE
PKG
(0.85)
1.75
1.55
0.15
0.05
0.65
0.45
8
1
1 -5
DETAIL A
TYPICAL
PKG
1.45
1.25
4224944/A 04/2019
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.3 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DGR0008A
VSSOP PowerPADTM - 1.1 mm max height
PLASTIC SMALL OUTLINE
(2.2)
NOTE 8
(1.35)
SOLDER MASK
OPENING
SOLDER MASK
DEFINED PAD
SEE DETAILS
8X (1.45)
8
8X (0.3)
1
(3.1)
NOTE 8
(1.65)
SYMM
SOLDER MASK
OPENING
(1.3)
6X (0.65)
TYP
4
5
(R0.05) TYP
SYMM
METAL COVERED
BY SOLDER MASK
(
0.2) TYP
VIA
(1.1) TYP
(4.4)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4224944/A 04/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
8. Size of metal pad may vary due to creepage requirement.
www.ti.com
EXAMPLE STENCIL DESIGN
DGR0008A
VSSOP PowerPADTM - 1.1 mm max height
PLASTIC SMALL OUTLINE
(1.35)
BASED ON
0.125 THICK
STENCIL
8X (1.45)
8
8X (0.3)
1
(1.65)
SYMM
BASED ON
0.125 THICK
STENCIL
6X (0.65)
4
5
(R0.05) TYP
SEE TABLE FOR
SYMM
(4.4)
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
METAL COVERED
BY SOLDER MASK
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE BY AREA
SCALE:15X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
1.51 X 1.84
1.35 X 1.65 (SHOWN)
1.23 X 1.51
0.125
0.150
0.175
1.14 X 1.39
4224944/A 04/2019
NOTES: (continued)
9. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
10. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
YBG0006
DSBGA - 0.5 mm max height
SCALE 13.000
DIE SIZE BALL GRID ARRAY
A
B
E
BALL A1
CORNER
D
0.5 MAX
C
SEATING PLANE
0.05 C
0.20
0.14
BALL TYP
0.4
TYP
C
0.8
TYP
SYMM
D: Max = 1.498 mm, Min =1.438 mm
E: Max = 0.998 mm, Min =0.938 mm
B
0.4 TYP
A
0.27
0.23
C A B
1
2
6X
0.015
SYMM
4224328/A 05/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YBG0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
6X ( 0.23)
1
2
A
(0.4) TYP
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 50X
0.05 MIN
0.05 MAX
METAL UNDER
SOLDER MASK
(
0.23)
METAL
(
0.23)
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4224328/A 05/2018
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YBG0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
6X ( 0.25)
2
1
A
(0.4) TYP
SYMM
B
C
METAL
TYP
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 50X
4224328/A 05/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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Copyright © 2023，德州仪器 (TI) 公司
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