TPS63021DSJ [TI]
HIGH EFFICIENCY SINGLE INDUCTOR BUCK-BOOST CONVERTER WITH 4-A SWITCHES; 与4 -A开关系列高效率单电感器降压 - 升压型转换器
| 型号： | TPS63021DSJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HIGH EFFICIENCY SINGLE INDUCTOR BUCK-BOOST CONVERTER WITH 4-A SWITCHES |
| 文件： | 总24页 (文件大小：1404K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS63020
TPS63021
www.ti.com
SLVS916 –APRIL 2010
HIGH EFFICIENCY SINGLE INDUCTOR BUCK-BOOST CONVERTER WITH 4-A SWITCHES
Check for Samples: TPS63020, TPS63021
1
FEATURES
APPLICATIONS
•
All Two-Cell and Three-Cell Alkaline, NiCd or
NiMH or Single-Cell Li Battery Powered
Products
Ultra Mobile PC's and Mobile Internet Devices
Digital Media Players
2
•
Up to 96% Efficiency
•
•
•
3A Output Current at 3.3V in Step Down Mode
(VIN = 3.6V to 5.5V)
•
•
•
•
•
•
•
More than 2A Output Current at 3.3V in Boost
Mode (VIN > 2.5V)
DSC's and Camcorders
Automatic Transition Between Step Down and
Boost Mode
Cellular Phones and Smartphones
Personal Medical Products
Industrial Metering Equipment
High Power LED's
•
•
•
•
Dynamic Input Current Limit
Device Quiescent Current less than 50mA
Input Voltage Range: 1.8V to 5.5V
Fixed and Adjustable Output Voltage Options
from 1.2V to 5.5V
DESCRIPTION
The TPS6302x devices provide a power supply
solution for products powered by either a two-cell or
three-cell alkaline, NiCd or NiMH battery, or a
one-cell Li-Ion or Li-polymer battery. Output currents
can go as high as 3A while using a single-cell Li-Ion
or Li-Polymer Battery, and discharge it down to 2.5V
or lower. The buck-boost converter is based on a
fixed frequency, pulse-width-modulation (PWM)
controller using synchronous rectification to obtain
maximum efficiency. At low load currents, the
converter enters Power Save mode to maintain high
efficiency over a wide load current range. The Power
Save mode can be disabled, forcing the converter to
operate at a fixed switching frequency. The maximum
average current in the switches is limited to a typical
value of 4A. The output voltage is programmable
using an external resistor divider, or is fixed internally
on the chip. The converter can be disabled to
minimize battery drain. During shutdown, the load is
disconnected from the battery. The device is
packaged in a 14-pin QFN PowerPAD™ package
measuring 3 × 4 mm (DSJ).
•
•
Power Save Mode for Improved Efficiency at
Low Output Power
Forced Fixed Frequency Operation at 2.4MHz
and Synchronization Possible
•
•
•
•
•
Smart Power Good Output
Load Disconnect During Shutdown
Overtemperature Protection
Overvoltage Protection
Available in a 3 × 4-mm, QFN-14 Package
L1
1.5 µH
L1
L2
VIN
VOUT
VIN
VOUT
1.8 V to
5.5 V
3.3 V
up to 3 A
C1
VINA
EN
FB
PG
C2
PS/SYNC
Power Good
Output
GND
PGND
TPS63021
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
TPS63020
TPS63021
SLVS916 –APRIL 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE DEVICE OPTIONS(1)
OUTPUT VOLTAGE
TA
PACKAGE MARKING
PACKAGE
PART NUMBER(2)
DC/DC
Adjustable
3.3 V
PS63020
PS63021
TPS63020DSJ
TPS63021DSJ
–40°C to 85°C
14-Pin QFN
(1) Contact the factory to check availability of other fixed output voltage versions.
(2) For detailed ordering information please check the PACKAGE OPTION ADDENDUM section at the end of this datasheet.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–40
–65
MAX
7
UNIT
V
Voltage range(2)
VIN, VINA, L1, L2, VOUT, PS/SYNC, EN, FB, PG
Operating junction, TJ
150
150
3
°C
°C
kV
V
Temperature range
Storage, Tstg
Human Body Model - (HBM)
Machine Model - (MM)
ESD rating(3)
200
1.5
Charge Device Model - (CDM)
kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) All voltages are with respect to network ground terminal.
(3) ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
TPS63020,
TPS63021
THERMAL METRIC(1)
UNITS
DSJ
14 PINS
41.8
47
qJA
Junction-to-ambient thermal resistance(2)
(3)
qJC(TOP)
qJB
Junction-to-case(top) thermal resistance
(4)
Junction-to-board thermal resistance
17
°C/W
(5)
yJT
Junction-to-top characterization parameter
0.9
(6)
yJB
Junction-to-board characterization parameter
16.8
3.6
(7)
qJC(BOTTOM)
Junction-to-case(bottom) thermal resistance
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case(top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard
test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, yJB estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case(bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
2
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
www.ti.com
SLVS916 –APRIL 2010
RECOMMENDED OPERATING CONDITIONS
MIN
1.8
NOM
MAX UNIT
Supply voltage at VIN, VINA
5.5
85
V
Operating free air temperature range, TA
Operating junction temperature range, TJ
–40
–40
°C
°C
125
ELECTRICAL CHARACTERISTICS
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
DC/DC STAGE
PARAMETER
Input voltage range
TEST CONDITIONS
MIN
1.8
1.5
1.5
1.2
TYP
MAX
5.5
UNIT
V
V
V
V
VI
Minimum input voltage for startup
Minimum input voltage for startup
TPS63020 output voltage range
Minimum duty cycle in step down conversion
TPS63020 feedback voltage
TPS63021 output voltage
0°C ≤ TA ≤ 85°C
1.8
1.8
1.9
2.0
VO
VFB
5.5
30%
500
40%
505
495
mV
V
PS/SYNC = VIN
3.267
3.3 3.333
0.5%
Maximum line regulation
Maximum load regulation
0.5%
2400
2400
4000
50
f
Oscillator frequency
2200
2200
3500
2600
2600
4500
kHz
kHz
mA
mΩ
mΩ
mA
Frequency range for synchronization
Average switch current limit
High side switch on resistance
Low side switch on resistance
ISW
VIN = VINA = 3.6 V, TA = 25°C
VIN = VINA = 3.6 V
VIN = VINA = 3.6 V
50
VIN and VINA
VOUT
25
50
10
Quiescent
current
IO = 0 mA, VEN = VIN = VINA = 3.6 V,
VOUT = 3.3 V
Iq
5
mA
TPS63021 FB input impedance
Shutdown current
VEN = HIGH
1
MΩ
mA
IS
VEN = 0 V, VIN = VINA = 3.6 V
0.1
1
1.6
0.4
CONTROL STAGE
Under voltage lockout threshold
VINA voltage decreasing
1.4
1.2
1.5
V
mV
V
UVLO
Under voltage lockout hysteresis
EN, PS/SYNC input low voltage
EN, PS/SYNC input high voltage
EN, PS/SYNC input current
PG output low voltage
200
VIL
VIH
V
Clamped to GND or VINA
0.01
0.04
0.01
0.1
0.4
0.1
7
mA
V
VOUT = 3.3 V, IPGL = 10 mA
PG output leakage current
Output overvoltage protection
Overtemperature protection
Overtemperature hysteresis
mA
V
5.5
140
20
°C
°C
Copyright © 2010, Texas Instruments Incorporated
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TPS63020
TPS63021
SLVS916 –APRIL 2010
www.ti.com
PIN ASSIGNMENTS
DSJ PACKAGE
(TOP VIEW)
VINA
PG
GND
FB
PS/SYNC
EN
VOUT
VOUT
L2
VIN
VIN
L1
L2
L1
Pin Functions
PIN
I/O
DESCRIPTION
NAME
EN
NO.
12
3
I
I
Enable input (1 enabled, 0 disabled) , must not be left open
FB
Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage
versions
GND
L1
2
Control / logic ground
Connection for Inductor
Connection for Inductor
8, 9
6, 7
13
I
I
I
L2
PS/SYNC
Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization), must
not be left open
PG
14
O
Output power good (1 good, 0 failure; open drain)
Power ground
PGND
VIN
PowerPAD™
10, 11
4, 5
1
I
O
I
Supply voltage for power stage
VOUT
Buck-boost converter output
VINA
Supply voltage for control stage
PowerPAD™
Must be connected to PGND. Must be soldered to achieve appropriate power dissipation.
4
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
www.ti.com
SLVS916 –APRIL 2010
FUNCTIONAL BLOCK DIAGRAM (TPS63020)
L1
L2
VIN
VOUT
Current
Sensor
VINA
PGND
PGND
VIN
Gate
Control
VOUT
_
+
VINA
+
_
Modulator
Oscillator
FB
PG
+
-
VREF
Device
Control
PS/SYNC
EN
Temperature
Control
PGND
GND
PGND
FUNCTIONAL BLOCK DIAGRAM (TPS63021)
L1
L2
VIN
VOUT
Current
Sensor
VINA
PGND
PGND
VIN
Gate
Control
VOUT
FB
_
+
VINA
+
_
Modulator
Oscillator
PG
+
-
Device
Control
VREF
PS/SYNC
EN
Temperature
Control
PGND
GND
PGND
Copyright © 2010, Texas Instruments Incorporated
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TPS63020
TPS63021
SLVS916 –APRIL 2010
www.ti.com
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
DESCRIPTION
FIGURE
vs Input voltage (TPS63020, VOUT = 2.5 V / VOUT = 4.5 V)
1
2
3
4
5
6
Maximum output current
vs Input voltage (TPS63021, VOUT = 3.3V)
vs Output current (TPS63020, Power Save Enabled, VOUT = 2.5 V / VOUT = 4.5 V)
vs Output current (TPS63020, Power Save Disabled, VOUT = 2.5V / VOUT = 4.5V)
vs Output current (TPS63021, Power Save Enabled, VOUT = 3.3V)
vs Output current (TPS63021, Power Save Disabled, VOUT = 3.3V)
vs Input voltage (TPS63020, Power Save Enabled, VOUT = 2.5V, IOUT = {10; 500; 1000;
2000 mA})
7
8
vs Input voltage (TPS63020, Power Save Enabled, VOUT = 4.5V, IOUT = {10; 500; 1000;
2000 mA})
Efficiency
vs Input voltage (TPS63020, Power Save Disabled, VOUT = 2.5V, IOUT = {10; 500;
1000; 2000 mA})
9
vs Input voltage (TPS63020, Power Save Disabled, VOUT = 4.5V, IOUT = {10; 500;
1000; 2000 mA})
10
11
12
vs Input voltage (TPS63021, Power Save Enabled, VOUT = 3.3V, IOUT = {10; 500; 1000;
2000 mA})
vs Input voltage (TPS63021, Power Save Disabled, VOUT = 3.3V, IOUT = {10; 500;
1000; 2000 mA})
vs Output current (TPS63020, VOUT = 2.5 V)
vs Output current (TPS63020, VOUT = 4.5 V)
vs Output current (TPS63021, VOUT = 3.3V)
13
14
15
Output voltage
Waveforms
Load transient response (TPS63021, VIN < VOUT, Load change from 500 mA to 1500
mA)
16
17
Load transient response (TPS63021, VIN > VOUT, Load change from 500 mA to 1500
mA)
Line transient response (TPS63021, VOUT = 3.3V, IOUT = 1500 mA)
Startup after enable (TPS63021, VOUT = 3.3V, VIN = 2.4V, IOUT = 1500mA)
Startup after enable (TPS63021, VOUT = 3.3V, VIN = 4.2V, IOUT = 1500mA)
18
19
20
6
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
www.ti.com
SLVS916 –APRIL 2010
MAXIMUM OUTPUT CURRENT
MAXIMUM OUTPUT CURRENT
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
4
3.5
3
4
3.5
3
TPS63020
TPS63021
2.5
2
2.5
2
1.5
1
1.5
1
0.5
0
0.5
0
VOUT = 2.5V
VOUT = 4.5V
VOUT = 3.3V
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
Input Voltage (V)
Input Voltage (V)
Figure 1.
Figure 2.
EFFICIENCY
vs
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
VIN = 3.6V, VOUT = 4.5V
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
VIN = 3.6V, VOUT = 4.5V
TPS63020, Power Save Enabled
10m 100m
TPS63020, Power Save Disabled
10m 100m 4
100µ
1m
1
4
100µ
1m
1
Output Current (A)
Output Current (A)
Figure 3.
Figure 4.
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
SLVS916 –APRIL 2010
www.ti.com
EFFICIENCY
vs
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
0
VIN = 2.4V
VIN = 3.6V
VIN = 2.4V
VIN = 3.6V
TPS63021, Power Save Enabled
TPS63021, Power Save Disabled
0
100µ
1m
10m
100m
1
4
100µ
1m
10m
100m
1
4
Output Current (A)
Output Current (A)
Figure 5.
Figure 6.
EFFICIENCY
vs
EFFICIENCY
vs
INPUT VOLTAGE
INPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
IOUT = 2A
TPS63020, VOUT = 2.5V, Power Save Enabled
TPS63020, VOUT = 4.5V, Power Save Enabled
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
Input Voltage (V)
Input Voltage (V)
Figure 7.
Figure 8.
8
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
www.ti.com
SLVS916 –APRIL 2010
EFFICIENCY
vs
EFFICIENCY
vs
INPUT VOLTAGE
INPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
IOUT = 2A
TPS63020, VOUT = 2.5V, Power Save Disabled
TPS63020, VOUT = 4.5V, Power Save Disabled
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
Input Voltage (V)
Input Voltage (V)
Figure 9.
Figure 10.
EFFICIENCY
vs
EFFICIENCY
vs
INPUT VOLTAGE
INPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
IOUT = 2A
TPS63021, Power Save Enabled
TPS63021, Power Save Disabled
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
Input Voltage (V)
Input Voltage (V)
Figure 11.
Figure 12.
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TPS63020
TPS63021
SLVS916 –APRIL 2010
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OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
2.6
2.55
2.5
4.6
4.55
4.5
VIN = 3.6V
VIN = 3.6V
2.45
4.45
TPS63020, Power Save Disabled
TPS63020, Power Save Disabled
2.4
4.4
100µ
1m
10m
100m
1
5
100µ
1m
10m
100m
1
5
Output Current (A)
Output Current (A)
Figure 13.
Figure 14.
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
LOAD TRANSIENT RESPONSE
3.4
3.35
3.3
VIN = 3.6V
Output Voltage
50 mV/div, AC
Output Current
500 mA/div, DC
3.25
TPS63021
V
= 2.4 V, I
= 500 mA to 1500 mA
IN
OUT
TPS63021, Power Save Disabled
Time 2 ms/div
3.2
100µ
1m
10m
100m
1
5
Output Current (A)
Figure 15.
Figure 16.
10
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
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SLVS916 –APRIL 2010
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
Output Voltage
50 mV/div, AC
Output Voltage
50 mV/div, AC
Output Current
500 mA/div, DC
Input Voltage
500 mV/div, AC
TPS63021
V
= 4.2 V, I
= 500 mA to 1500 mA
TPS63021
V
= 3.0 V to 3.7 V, I = 1500 mA
OUT
IN
OUT
IN
Time 2 ms/div
Time 2 ms/div
Figure 17.
Figure 18.
STARTUP AFTER ENABLE
STARTUP AFTER ENABLE
Enable
2 V/div, DC
Enable
2 V/div, DC
Output Voltage
1 V/div, DC
Output Voltage
1 V/div, DC
Inductor Current
500 mA/div, DC
Inductor Current
1 A/div, DC
Voltage at L1
5 V/div, DC
Voltage at L2
5 V/div, DC
TPS63021
V
= 2.4 V, R = 2.2 W
L
TPS63021
V
= 4.2 V, R = 2.2 W
L
IN
IN
Time 100 ms/div
Time 40 ms/div
Figure 19.
Figure 20.
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Product Folder Link(s): TPS63020 TPS63021
TPS63020
TPS63021
SLVS916 –APRIL 2010
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PARAMETER MEASUREMENT INFORMATION
L1
L1
L2
V
V
OUT
IN
VIN
EN
VOUT
C1
R1
R2
C2
VINA
R3
C3
FB
PG
PS/SYNC
PS/SYNC
Power Good
Output
GND
PGND
TPS6302x
Table 1. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER
TPS63020 or TPS63021
Texas Instruments
L1
1.5 mH, 4 mm x 4 mm x 2 mm
2 × 10 mF 6.3V, 0603, X7R ceramic
3 × 10 mF 6.3V, 0603, X7R ceramic
0.1 mF, X7R ceramic
XFL4020-152ML, Coilcraft
C1
C2
C3
R1
R2
R3
GRM188R60J106KME84D, Murata
GRM188R60J106KME84D, Murata
Depending on the output voltage at TPS63020, 0 Ω at TPS63021
Depending on the output voltage at TPS63020, not used at TPS63021
1 MΩ
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TPS63020
TPS63021
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SLVS916 –APRIL 2010
DETAILED DESCRIPTION
CONTROLLER CIRCUIT
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses
input and output voltage feedforward. Changes of input and output voltage are monitored and immediately can
change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier
gets its feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be
connected to that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the
voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will be
compared with the internal reference voltage to generate a stable and accurate output voltage.
The controller circuit also senses the average input current. With this, maximum input power can be controlled to
achieve a safe and stable operation under all possible conditions. To protect the device from overheating, an
internal temperature sensor is implemented.
Synchronous Operation
The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion across all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and
PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter.
Buck-Boost Operation
To regulate the output voltage properly at all possible input voltage conditions, the device automatically switches
from step down operation to boost operation and back as required by the configuration. It always uses one active
switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates
as a step down converter (buck) when the input voltage is higher than the output voltage, and as a boost
converter when the input voltage is lower than the output voltage. There is no mode of operation in which all 4
switches are permanently switching. Controlling the switches this way allows the converter to maintain high
efficiency at the most important point of operation, when input voltage is close to the output voltage. The RMS
current through the switches and the inductor is kept at a minimum to minimize switching and conduction losses.
Switching losses are kept low by using only one active and one passive switch. For the remaining 2 switches,
one is kept permanently on and the other is kept permanently off, thus causing no switching losses.
Power Save Mode and Synchronization
The PS/SYNC pin can be used to select different operation modes. To enable power save, PS/SYNC must be
set low. Power save mode is used to improve efficiency at light load. If power save mode is enabled, the
converter stops operating if the average inductor current goes lower than about 100 mA and the output voltage is
at or above its nominal value. If the output voltage decreases below its nominal value, the device ramps up the
output voltage again by starting operation using an average inductor current higher than required by the current
load condition. Operation can last for one or several pulses. The converter again stops operating once the
conditions for stopping operation are met again.
The power save mode can be disabled with a high at the PS/SYNC. Connecting a clock signal at PS/SYNC
forces the device to synchronize to the connected clock frequency. Synchronization is done by a PLL, so
synchronizing to lower and higher frequencies compared to the internal clock works without any issues. The PLL
can also tolerate missing clock pulses without the converter malfunctioning. The PS/SYNC input supports
standard logic thresholds.
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Dynamic Current Limit
To protect the device and the application, the average inductor current is limited internally on the IC. At nominal
operating conditions, this current limit is constant. The current limit value can be found in the electrical
characteristics table. If the supply voltage at VIN drops below 2.3V, the current limit is reduced. This can happen
when the input power source becomes weak. Increasing output impedance, when the batteries are almost
discharged, or an additional heavy pulse load is connected to the battery can cause the VIN voltage to drop. The
dynamic current limit has its lowest value when reaching the minimum recommended supply voltage at VIN. At
this voltage, the device is forced into burst mode operation trying to stay active as long as possible even with a
weak input power source.
If the die temperature increases above the recommended maximum temperature, the dynamic current limit
becomes active. Similar to the behavior when the input voltage at VIN drops, the current limit is reduced with
temperature increasing.
Smart Power Good
The device has a built in power good function to indicate whether the output voltage is regulated properly. As
soon as the average inductor current is limited to a value below the current the voltage regulator demands for
maintaining the output voltage the power good output goes low impedance. The output is open drain, so its logic
function can be adjusted to any voltage level the connected logic is using, by connecting a pull up resistor to the
supply voltage of the logic. By monitoring the status of the current control loop, the power good output provides
the earliest indication possible for an output voltage break down and leaves the connected application a
maximum time to safely react.
Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry is switched off and the load is
disconnected from the input. This means that the output voltage can drop below the input voltage during
shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high
peak currents flowing from the input.
Softstart and Short Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from an initial value of about
500mA following the increasing output voltage. At an output voltage of about 1.2V, the current limit is at its
nominal value. If the output voltage does not increase, the current limit will not increase. There is no timer
implemented. Thus, the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum.
The device ramps up the output voltage in a controlled manner even if a large capacitor is connected at the
output. If the output voltage does not increase above 1.2V, the device assumes a short circuit at the output and
keeps the current limit low to protect itself and the application. At a short on the output during operation, the
internal clock frequency and the current limit are also decreased accordingly. At 0 V on the output, the output
current will be limited in the range of 400 mA.
Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VINA is lower than
approximately its threshold (see electrical characteristics table). When in operation, the device automatically
enters the shutdown mode if the voltage on VINA drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see electrical characteristics table) the device stops switching. As soon as
the IC temperature has decreased below the programmed threshold, it starts switching again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
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SLVS916 –APRIL 2010
APPLICATION INFORMATION
DESIGN PROCEDURE
The TPS6302x dc/dc converters are intended for systems powered by one-cell Li-Ion or Li-Polymer battery with a
typical voltage between 2.3 V and 4.5 V. They can also be used in systems powered by a double or triple cell
Alkaline, NiCd, or NiMH battery with a typical terminal voltage between 1.8V and 5.5V . Additionally, any other
voltage source with a typical output voltage between 1.8V and 5.5V can power systems where the TPS6302x is
used.
PROGRAMMING THE OUTPUT VOLTAGE
Within the TPS6302x family there are fixed and adjustable output voltage versions available. To properly
configure the fixed output voltage devices, the FB pin is used to sense the output voltage. This means that it
must be connected directly to VOUT. For the adjustable output voltage versions, an external resistor divider is
used to adjust the output voltage. The resistor divider must be connected between VOUT, FB and GND. When
the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500mV. The maximum
recommended value for the output voltage is 5.5V. The current through the resistor divider should be about 100
times greater than the current into the FB pin. The typical current into the FB pin is 0.01mA, and the voltage
across the resistor between FB and GND, R2, is typically 500 mV. Based on these two values, the recommended
value for R2 should be lower than 500kΩ, in order to set the divider current at 1mA or higher. It is recommended
to keep the value for this resistor in the range of 200kΩ. From that, the value of the resistor connected between
VOUT and FB, R1, depending on the needed output voltage (VOUT), can be calculated using Equation 1:
æ
ç
è
ö
VOUT
VFB
R1 = R2 ×
- 1
÷
ø
(1)
L1
L1
L2
V
V
OUT
IN
VIN
EN
VOUT
C1
R1
R2
C2
VINA
R3
C3
FB
PG
PS/SYNC
PS/SYNC
Power Good
Output
GND
PGND
TPS6302x
Figure 21. Typical Application Circuit for Adjustable Output Voltage Option
INDUCTOR SELECTION
To properly configure the TPS6302x devices, an inductor must be connected between pin L1 and pin L2. To
estimate the inductance value, Equation 2 and Equation 3 can be used.
μs
L1 =
VIN1 - VOUT × 0.5 ×
(
)
A
(2)
(3)
μs
A
L2 = VOUT × 0.5 ×
In Equation 2 the minimum inductance value, L1 for step down mode operation is calculated. VIN1 is the
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maximum input voltage. In Equation 3 the minimum inductance, L2, for boost mode operation is calculated. The
recommended minimum inductor value is either L1 or L2, whichever is higher. As an example, a suitable inductor
for generating 3.3V from a Li-Ion battery with a battery voltage range from 2.5V up to 4.2V is 1.5mH. The
recommended inductor value range is between 1.5mH and 4.7mH. This means that at high voltage conversion
rates, higher inductor values offer better performance.
With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated.
Equation 4 shows how to calculate the peak current I1 in step down mode operation and Equation 5 shows how
to calculate the peak current I2 in boost mode operation.
IOUT
VOUT (V - VOUT
IN1
)
I1 =
+
0.8
2 x V x f x L
IN1
(4)
VOUT x IOUT
V
(VOUT - V
)
IN2 x
IN2
I2 =
+
0.8 x V
2 x VOUT x f x L
IN2
(5)
In both equations, f is the minimum switching frequency. VIN2 is the minimum input voltage. The critical current
value for selecting the right inductor is the higher value of I1 and I2 . Consideration must be given to the load
transients and error conditions that can cause higher inductor currents. This must be taken into account when
selecting an appropriate inductor. The following inductor series from different suppliers have been used with
TPS6302x converters:
Table 2. List of Inductors
VENDOR
Coilcraft
Toko
INDUCTOR SERIES
XFL4020
FDV0530S
CAPACITOR SELECTION
Input Capacitor
At least a 10mF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of
the IC is recommended.
Bypass Capacitor
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor can
be connected between VINA and GND. Using a ceramic capacitor with a value of 0.1mF is recommended. The
value of this capacitor should not be higher than 0.22mF. If no capacitor is used at VINA, VINA should be
connected directly to VIN.
Output Capacitor
For the output capacitor, use of small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. If, for any reason, the application requires the use of large capacitors which can
not be placed close to the IC, use a smaller ceramic capacitor in parallel to the large capacitor. The small
capacitor should be placed as close as possible to the VOUT and PGND pins of the IC.
To get an estimate of the recommended minimum output capacitance, Equation 6 can be used.
μF
COUT =10×L×
μH
(6)
A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain
control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit
for the output capacitance value. Larger capacitors will cause lower output voltage ripple as well as lower output
voltage drop during load transients.
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LAYOUT CONSIDERATIONS
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, short traces are recommended as well, separation from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control ground
current.
L1
VIN
VOUT
C1
C2
U1
GND
R1
GND
R2
C3
GND
Figure 22. PCB Layout Suggestion
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
•
•
•
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB by soldering the PowerPAD™
Introducing airflow in the system
For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics
Application Note (SZZA017), and IC Package Thermal Metrics Application Note (SPRA953).
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PACKAGE OPTION ADDENDUM
www.ti.com
12-Apr-2010
PACKAGING INFORMATION
Orderable Device
TPS63020DSJR
TPS63020DSJT
TPS63021DSJR
TPS63021DSJT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
VSON
DSJ
14
14
14
14
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
VSON
VSON
VSON
DSJ
DSJ
DSJ
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS63020DSJR
TPS63020DSJT
VSON
VSON
DSJ
DSJ
14
14
3000
250
330.0
180.0
12.4
12.4
3.3
3.3
4.3
4.3
1.1
1.1
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS63020DSJR
TPS63020DSJT
VSON
VSON
DSJ
DSJ
14
14
3000
250
346.0
190.5
346.0
212.7
29.0
31.8
Pack Materials-Page 2
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