TPS65148_技术文档

TPS65148

www.ti.com ........................................................................................................................................................................................................ SLVS904–MAY 2009

Compact TFT LCD Bias IC for Monitor with VCOM Buffer, Voltage Regulator for Gamma

Buffer and Reset Function

1

FEATURES

•

Reset Function (XAO Signal)

LCD Discharge Function

Overvoltage Protection

Overcurrent Protection

Thermal Shutdown

•

2.5V to 6.0V Input Voltage Range

•

Up to 18V Boost Converter With 4A Switch

Current

•

630kHz/1.2MHz Selectable Switching

Frequency

32-Pin 5*5mm QFN Package

•

Adjustable Soft-Start for the Boost Converter

Gate Driver for External Input-to-Output

Isolation Switch

APPLICATIONS

•

Monitor

•

0.5% Accuracy Voltage Regulator for Gamma

Buffer

•

TV (5V Input Voltage)

•

Gate Voltage Shaping

VCOM Buffer

DESCRIPTION

The TPS65148 offers a very compact power supply solution designed to supply the LCD bias voltages required

by TFT (Thin Film Transistor) LCD panels running from a typical 5 V supply rail. The device integrates a high

power step-up converter for V_S(Source Driver voltage), a very accurate voltage rail using an integrated LDO to

supply the Gamma Buffer (V_{REG_O}) and a Vcom buffer driving the LCD backplane. In addition to that, a gate

voltage shaping block is integrated. The V_GHsignal (Gate Driver High voltage) supplied by an external positive

charge pump, is modulated into V_GHMwith high flexibility by using a logic input VFLK and an external discharge

resistor connected to RE pin. Also, an external negative charge pump can be set using the boost converter of the

TPS65148 to generate V_GL(Gate Driver Low voltage). The integrated reset function together with the LCD

discharge function available in the TPS65148 provide the signals enabling the discharge of the LCD TFT pixels

when powering-off. The device includes safety features like overcurrent protection (OCP) and short-circuit

protection (SCP) achieved by an external input-to-output isolation switch, as well as overvoltage protection (OVP)

and thermal shutdown.

Space between text and graphic

V_IN

5V

Boost Converter

-

(Over Voltage Protection)

V_S

13.6 V/500 mA

-

(High Voltage Stress)

Gate Driver for Input-to-output

GD

Isolation Switch

Gate Voltage

Shaping

V_GHM

24 V/20mA

&

LCD Discharge

Voltage Regulator for

Gamma

V_{REG_O}

12.5 V/30 mA

VCOM Buffer

(unity gain)

V_OPO

130mA

XAO

Reset Function

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS65148

SLVS904–MAY 2009........................................................................................................................................................................................................ www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION⁽¹⁾

T_A

ORDERING

PACKAGE

PACKAGE MARKING

–40°C to 85°C

TPS65148RHB

32-pin QFN

TPS65148

(1) The RHB package is available taped an reeled. For the most current package and ordering information, see the Package Option

Addendum at the end of this document, or see the TI website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

(1)

VALUE

UNIT

Input voltage range VIN⁽²⁾

–0.3 to 6.5

V

Voltage range on pins EN, FB, SS, FREQ, COMP, GD, REG_FB, VDET, XAO, HVS, RHVS, VDPM,

(2)

VFLK

Voltage on pins SW, OPI, OPO, SUP, REG_I, REG_O⁽²⁾

Voltage on pins VGH, VGHM, RE⁽²⁾

ESD rating HBM

–0.3 to 20

–0.3 to 36

2

V

kV

V

ESD rating MM

200

ESD rating CDM

500

V

Continuous power dissipation

Storage temperature range

See Dissipation Rating Table

–65 to 150 °C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

DISSIPATION RATINGS⁽¹⁾⁽²⁾

PACKAGE

R_θJA

T_A≤25°C

T_A= 70°C

T_A= 85°C

POWER RATING

QFN

30°C/W

3.3 W

1.8 W

1.3 W

(1) P_D= (T_J– T_A)/R_θJA.

(2) R_θJA.given for High-K PCB board.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

UNIT

V_IN

Input voltage range.

2.5

6.0

V

V_S, V_SUP

V_{REG_I}

,

Boost converter output voltage range. SUP pin and REG_I pin input supply voltage

range.

7

18

V

V_GH

T_A

Gate voltage shaping input voltage range.

Operating ambient temperature.

15

–40

35

85

V

°C

T_J

Operating junction temperature.

125

2

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ELECTRICAL CHARACTERISTICS

V_IN= 5 V, V_{REG_I}= V_S= V_SUP= 13.6 V, V_{REG_O}= 12.5 V, V_OPI= 5 V, V_GH= 23 V, T_A= –40°C to 85°C, typical values are at

T_A= 25°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY

V_IN

Input voltage range

2.5

6.0

0.5

6

V

I_QVIN

Operating quiescent current into VIN

Operating quiescent current into SUP

Operating quiescent current into VGH

Operating quiescent current into REG_I

Shutdown current into VIN

Device not switching, V_FB= 1.240 V + 5%

V_GH= 24 V, VFLK = 'high'

0.23

3

mA

µA

I_QSUP

I_QVGH

30

60

3

I_{QREG_I}

I_SDVIN

I_SDSUP

I_SDVGH

I_{SDREG_I}

REG_O = 'open', V_{REG_FB}= 1.240 V + 5%

V_IN= 6.0 V, EN = GND

0.05

35

70

7

Shutdown current into SUP

V_IN= 6.0 V, EN = GND, V_SUP= 18 V

V_IN= 6.0 V, EN = GND, V_GH= 35 V

3.5

30

Shutdown current into VGH

60

Shutdown current into REG_I

V_IN= 6.0 V, EN = GND, V_{REG_I}= 18 V,

V_{REG_O}= 16.9 V

4

10

µA

V_INrising

2.1

2.3

V_UVLO

Under-voltage lockout threshold

V

Hysterisis

0.1

150

14

T_SD

Thermal shutdown

Temperature rising

°C

T_SDHYS

Thermal shutdown hysteresis

LOGIC SIGNALS EN, FREQ, VFLK, HVS

I_LEAK

V_IH

Input leakage current

Logic high input voltage

Logic low input voltage

EN = FREQ = VFLK = HVS = 6.0 V

V_IN= 2.5 V to 6.0 V

0.1

0.4

µA

V

2

V_IL

V_IN= 2.5 V to 6.0 V

V

BOOST CONVERTER (V_S)

V_S

Output voltage boost converter

18

19.8

1.252

0.1

V

V_OVP

V_FB

I_FB

Overvoltage protection

V_Srising

18.2

19

Feedback regulation voltage

Feedback input bias current

Transconductiance error amplifier gain

1.228

1.240

V

V_FB= 1.240V

µA

µA/V

gm

107

0.12

0.14

V_IN= V_GS= 5 V, I_SW= 'current limit'

V_IN= V_GS= 3.3 V, I_SW= 'current limit'

EN = GND, V_SW= 18.5 V

0.18

0.22

30

R_DS(ON)

N-channel MOSFET on-resistance

Ω

I_{LEAK_SW}

I_LIM

SW leakage current

µA

A

N-Channel MOSFET current limit

Softstart current

4.0

4.8

10

5.6

I_SS

V_SS= 1.240 V

µA

FREQ = 'high'

0.9

1.2

1.5

MHz

kHZ

%/V

%/A

f

Switching frequency

FREQ = 'low'

470

630

790

Line regulation

Load regulation

V_IN= 2.5 V to 6.0 V, I_OUT= 1 mA

I_OUT= 0 A to 1.3 A

)

0.015

0.22

LDO - VOLTAGE REGULATOR FOR GAMMA BUFFER (V_{REG_O}

V_{REG_O}

LDO output voltage range

Feedback regulation voltage

7

17.6

V

V_{REG_I}= 10 V to 18V, REG_O = REG_FB,

I_{REG_O}= 1 mA, T_A= -40°C to 85°C

1.228

1.240

1.252

V_{REG_FB}

V_{REG_I}= 10 V to 18V, REG_O = REG_FB,

I_{REG_O}= 1 mA, T_A= 25°C

1.234

1.246

I_{REG_FB}

I_{SC_REG}

V_DO

Feedback input bias current

Short circuit current limit

Dropout voltage

V_{REG_FB}= 1.240 V

0.1

90

µA

mA

mV

%/V

%/A

V_{REG_I}= 18 V, REG_O = REG_FB = GND

V_{REG_I}= 18 V, I_{REG_O}= 30 mA

V_{REG_I}= 13.6 V to 18 V, I_{REG_O}= 1 mA

I_{REG_O}= 1 mA to 50 mA

400

Line regulation

0.003

0.28

Load regulation

GATE VOLTAGE SHAPING (V_GHM

)

I_DPM

Capacitor charge current VDPM pin

VGH to VGHM R_DS(ON)(M1 PMOS)

VGHM to RE R_DS(ON)(M2 PMOS)

20

13

µA

Ω

R_DS(ON)M1

R_DS(ON)M2

VFLK = 'high', I_VGHM= 20 mA, V_GH= 20 V

VFLK = 'low', I_VGHM= 20 mA, V_GHM= 7.5 V

25

Ω

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ELECTRICAL CHARACTERISTICS (continued)

V_IN= 5 V, V_{REG_I}= V_S= V_SUP= 13.6 V, V_{REG_O}= 12.5 V, V_OPI= 5 V, V_GH= 23 V, T_A= –40°C to 85°C, typical values are at

T_A= 25°C (unless otherwise noted)

PARAMETER

RESET FUNCTION (XAO)

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V_{IN_DET}

V_DET

Operating voltage for V_IN

Threshold voltage

1.6

6.0

V

Falling, V_IN= 2.3 V

1.216

1.240

65

1.264

V_{DET_HYS}

I_XAO(ON)

V_XAO(ON)

I_{LEAK_XAO}

Threshold hysterisis

Sink current capability⁽¹⁾

Low voltage level

mV

mA

V

V_XAO(ON)= 0.5 V

I_XAO(ON)= 1 mA

1

0.5

2

Leakage current

V_XAO= V_IN= 3.3V

µA

VCOM BUFFER (V_COM

)

V_SUP

V_OFFSET

I_B

V_SUPsupply range⁽²⁾

V_SUP= V_S

7

–15

-1

18

15

V

mV

µA

V

Input offset voltage

V_CM= V_OPI= V_SUP/2 = 6.8 V

V_OFFSET= 10 mV, I_OPO= 10 mA

V_CM= V_OPI= V_SUP/2 = 6.8 V, 1 MHz

I_OPO= 10 mA

Input bias current

1

V_CM

Common mode input voltage range

Common mode rejection ratio

Output voltage swing low

Output voltage swing high

1

V_S-1.5

CMRR

V_OL

66

dB

V

0.10

0.25

V_OH

I_OPO= 10 mA

V_S- 1 V_S- 0.65

V

Source (V_OPI= V_SUP/2 = 6.8 V, OPO = GND)

90

130

160

I_sc

Short circuit current

Output current

mA

Sink (V_OPI= V_SUP/2 = 6.8 V,

V_COM= V_SUP= 13.6 V)

110

Source (V_OPI= V_SUP/2 = 6.8, V_OFFSET= 15 mV)

Sink (V_OPI= V_SUP/2 = 6.8, V_OFFSET= 15 mV)

130

40

I_o

PSRR

SR

Power supply rejection ratio

Slew rate

dB

A_V= 1, V_OPI= 2 Vpp

60

V/µs

MHz

BW

–3db bandwidth

A_V= 1, V_OPI= 60 mVpp

60

GATE DRIVER (GD)

I_GD

Gate driver sink current

Gate driver internal pull up resistance

EN = 'high'

10

5

µA

kΩ

R_GD

HIGH VOLTAGE STRESS TEST (HVS)

R_HVS

RHVS pull down resistance

RHVS leakage current

HVS = 'high', V_IN= 2.5V to 6.0 V, I_HVS= 100 µA

HVS = 'low', V_RHVS= 5 V

400

500

600

0.1

Ω

I_{LEAK_RHVS}

µA

(1) External pull-up resistor to be chosen so that the current flowing into XAO Pin (V_XAO= 0 V) when active is below I_{XAO_MIN}= 1mA.

(2) Maximum output voltage limited by the Overvoltage Protection and not the maximum power switch rating of the boost converter.

4

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PIN ASSIGNMENT

27

26

25

32

31

30

29

28

REG_FB

REG_O

REG_I

SUP

1

2

3

4

FB

24

23

22

21

RHVS

NC

PowerPAD^®

-

Exposed Thermal Die

PGND

OPO

OPI

5

6

7

8

PGND

SW

20

19

18

17

OPGND

VFLK

SW

GD

9

10

11

12

13

14

15

19

TERMINAL FUNCTIONS

I/O

DESCRIPTION

NAME

REG_FB

REG_O

REG_I

NO.

1

I

O

I

Voltage regulator feedback pin.

Voltage regulator output pin.

Voltage regulator input pin.

2

3

SUP

4

I

Input supply pin for the gate voltage shaping and operational amplifier blocks. Also overvoltage

protection sense pin. SUP pin must be supplied by V_Svoltage.

OPO

5

6

O

I

VCOM Buffer output pin.

OPI

VCOM Buffer input pin.

OPGND

VFLK

XAO

7

VCOM Buffer analog ground.

8

I

O

I

Input pin for charge/discharge signal for V_GHM. VFLK = 'low' discharges V_GHMthrough RE pin.

Reset function output pin (open-drain). XAO signal is active low.

Reset function threshold pin. Connect a voltage divider to this pin to set the threshold voltage.

High Voltage Stress function logic input pin. Apply a high logic voltage to enable this function

9

VDET

HVS

10

11

12

I

FREQ

I

Boost converter frequency select pin. Oscillator is 630 kHz when FREQ is connected to GND and

1.2 MHz when FREQ is connected to VIN.

EN

13

I

Shutdown control input. Apply a logic high voltage to enable the device.

Analog ground.

AGND

14, 26,

exposed pad

VIN

GD

15, 16

I

Input supply pin.

17

O

Gate driver pin. Connect the gate of the boost converter's external input-to-output isolation switch to

this pin.

SW

18, 19

20, 21

22, 28

Switch pin of the boost converter.

Power ground.

PGND

NC

Not connected.

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TERMINAL FUNCTIONS (continued)

I/O

DESCRIPTION

NAME

RHVS

NO.

23

Voltage level set pin. Connect a resistor to this pin to set V_Svoltage when HVS = 'high'.

Boost converter feedback pin.

FB

24

I

COMP

SS

25

I/O

Boost converter compensation pin .

27

Boost soft-start control pin. Connect a capacitor to this pin if a soft-start is needed. Open = no

soft-start.

VDPM

VGH

VGHM

RE

29

30

31

32

I/O

I

Sets the delay to enable VGHM output. Pin for external capacitor. Floating if no delay needed.

Input pin for the positive charge pump voltage.

O

Gate voltage shaping output pin.

Slope adjustment pin for gate voltage shaping. Connect a resistor to this pin to set the discharging

slope of V_GHMwhen VFLK = 'low'.

FUNCTIONAL BLOCK DIAGRAM

V_IN

V_S

EN

FREQ

FB

Boost Converter

(V_S)

RHVS

HVS

VIN

High Voltage

Stress

V_S

Gate

Driver

REG_I

V_IN

V_{REG_O}

XAO

REG_O

LDO

(V_{REG_O}

Reset Function

(XAO)

)

VDET

REG_FB

V_GH

VGH

V_S

V_GHM

VGHM

Gate Voltage

Shaping

RE

(V_GHM

)

OPI

VCOM

(V_COM

VFLK

V_COM

)

OPO

VDPM

6

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TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

FIGURE

Efficieny vs. Load Current

V_IN= 5 V, V_S= 13.6 V

f = 630 kHz/1.2 MHz

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Efficiency vs. Load Current

V_IN= 5 V, V_S= 18 V

f = 630 kHz/1.2 MHz

PWM Switching Discontinuous Conduction Mode

PWM Switching Continuous Conduction Mode

Boost Frequency vs. Load Current

Boost Frequency vs. Supply Voltage

V_IN= 5 V, V_S= 13.6 V/ 2 mA

f = 630 kHz

V_IN= 5 V, V_S= 13.6 V/ 500 mA

f = 630 kHz

V_IN= 5 V, V_S= 13.6 V

f = 630 kHz/1.2 MHz

V_S= 13.6 V/100 mA

f = 630 kHz/1.2 MHz

Load Transient Response Boost Converter

High Frequency (1.2 MHz)

V_IN= 5 V, V_S= 13.6 V

I_OUT= 50 mA ~ 400 mA, f = 1.2 MHz

Load Transient Response Boost Converter

Low Frequency (630 KHz)

V_IN= 5 V, V_S= 13.6 V

I_OUT= 50 mA ~ 400 mA, f = 630 kHz

Boost Converter Output Current Capability

V_IN= 5 V, V_S= 9 V, 13.6 V, 15 V, 18 V

f = 1.2 MHz, L = 4.7 µH

Soft-start Boost Converter

V_IN= 5 V, V_S= 13.6 V, I_OUT= 600 mA

V_IN= 5 V, V_S= 13.6 V

Figure 10

Figure 11

Figure 12

Overvoltage Protection Boost Converter (OVP)

Load Transient Response LDO

V_LVIN= 5 V, V_S= 13.6 V

V_{REG_O}= 12.5 V, I_LVOUT= 5 mA - 30 mA

Gate Voltage Shaping

V_GH= 23 V

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

XAO Signal and LCD Discharge Function

Power On Sequencing

Power Off Sequencing

Short Circuit Protection ( < 114 ms)

Short Circuit Protection ( > 114 ms)

For all the following graphics, the inductors used for the measurements are CDRH127 (L = 4.7 µF) for

f = 1.2 MHz, and CDRH127LD (L = 10 µF) for f = 630 kHz.

EFFICIENCY

vs

LOAD CURRENT (V_s= 13.6 V)

EFFICIENCY

vs

Load Current (V_s= 18 V)

100

90

80

70

60

50

40

30

20

10

0

100

90

f = 630 kHz

L = 10 µH

f = 630 kHz

L = 10 µH

f = 1.2 MHz

L = 4.7 µ H

f = 1.2 MHz

L = 4.7 µH

80

70

60

50

40

30

20

V

= 5 V

V

= 5 V

IN

= 18 V

IN

10

0

= 13.6 V

S

0.0

0.2

0.4

0.6

0.8

1.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

I_OUT- Load current - [A]

Figure 1.

Figure 2.

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BOOST CONVERTER PWM SWITCHING

DISCONTINUOUS CONDUCTION MODE

BOOST CONVERTER PWM SWITCHING

CONTINUOUS CONDUCTION MODE

V

SW

10 V/div

V

S_AC

50 mV/div

V

= 5 V

IN

V

= 13.6 V/2 mA

= 630 kHz

S

f

V

= 5 V

IN

I

L

V

= 13.6 V/500 mA

= 630 kHz

S

500 mA/div

1 A/div

f

1 µs/div

Figure 3.

Figure 4.

BOOST CONVERTER FREQUENCY

vs

LOAD CURRENT

SUPPLY VOLTAGE

1600

1400

1200

1000

800

600

400

200

0

1400

1200

1000

800

600

400

200

0

FREQ = V_IN

L = 4.7 µH

FREQ = GND

L = 10 µH

FREQ = GND

L = 10 µH

V_IN= 5 V

V_S= 13.6 V

V_S= 13.6 V/100 mA

0

0.2

0.4

0.6

0.8

1

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

I_OUT- Load current - [A]

V_IN- Supply voltage - [V]

Figure 5.

Figure 6.

LOAD TRANSIENT RESPONSE

BOOST CONVERTER - HIGH FREQUENCY (1.2 MHz)

LOAD TRANSIENT RESPONSE

BOOST CONVERTER - LOW FREQUENCY (630 kHz)

V_IN= 5 V

V_S= 13.6 V

V_{S_AC}

200 mV/div

C_OUT= 40 µF

L = 10 µH

C

_OUT= 40 µF

L = 4.7 µH

R_COMP= 47 kΩ

C_COMP= 3.3 nF

R_COMP= 47 kΩ

C_COMP= 3.3 nF

I_OUT

200 mA/div

I_OUT

200 mA/div

I_OUT= 50 mA – 400 mA

200 µs/div

Figure 7.

Figure 8.

8

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BOOST CONVERTER

OUTPUT CURRENT CAPABILITY

BOOST CONVERTER

SOFT-START

3.0

2.5

2.0

1.5

1.0

0.5

0.0

V_IN

5 V/div

EN

V_IN= 5 V

5 V/div

V_S= 13.6 V / 600 mA

C_SS= 100 nF

V_S= 18 V

V_S= 15 V

GD

V_S= 9 V

10 V/div

V_S= 13.6 V

V_S

10 V/div

V_IN= 5 V

f = 1.2 MHz

L = 4.7 µH

I_L

1 A/div

2 ms/div

2.5

3.0

3.5

4.0

V_IN- S

4.5

5.0

5.5

6.0

upply

voltage - [V]

Figure 9.

Figure 10.

OVERVOLTAGE PROTECTION

BOOST CONVERTER (OVP)

LOAD TRANSIENT RESPONSE

VOLTAGE REGULATOR FOR GAMMA BUFFER

V_IN= 5 V

FB shorted

to GND

V_{REG_O}= 12.5 V

C_OUT= 1 µF

for > 55ms

GD

V_{REG_O_AC}

5 V/div

50 mV/div

V_S

10 V/div

V_SW

I_{REG_O}

10 V/div

10 mA/div

I_{REG_O}= 5 mA – 30 mA

200 µs/div

20 ms/div

Figure 11.

Figure 12.

XAO SIGNAL AND

LCD DISCHARGE FUNCTION

GATE VOLTAGE SHAPING

V_{DET_threshold}

reached

V

= 23 V down to GND

GHM

V_IN

5 V/div

RE = 80 k Ω

V_FLK

V_S

5 V/div

10 V/div

XAO

5 V/div

V_GHM

V_GH

10 V/div

V_{GHM =}V_GH

V_GHM

10 V/div

400 µs/div

2 ms/div

Figure 13.

Figure 14.

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POWER ON SEQUENCING

POWER OFF SEQUENCING

V_IN

5 V/div

GD

5 V/div

V_S

Boost PG

10 V/div

V_COM

10 V/div

V_{REG_O}

10 V/div

V_GHM

20 V/div

Delay set by C_DPM

4 ms/div

Figure 15.

Figure 16.

SHORT CIRCUIT PROTECTION

(< 114 ms)

SHORT CIRCUIT PROTECTION

(> 114 ms)

V_S

10 V/div

2 ms

GD

5 V/div

55 ms

XAO

5 V/div

40 ms/div

Figure 17.

Figure 18.

10

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APPLICATION INFORMATION

BOOST CONVERTER

V

S

IN

SW

VIN

GD

EN

SUP

Gate Driver

(Short Circuit

Protection)

FREQ

OVP

SUP FB

SS

Current limit

and

Soft Start

Toff Generator

Bias Vref = 1.24V

UVLO

HVS

Thermal Shutdown

Ton

Gate Driver of

Power

PWM

Generator

COMP

Transistor

FB

GM Amplifier

RHVS

HVS

Vref

PGND

Figure 19. Boost converter block diagram

The boost converter is designed for output voltages up to 18 V with a switch peak current limit of 4.0 A minimum.

The device, which operates in a current mode scheme with quasi-constant frequency, is externally compensated

for maximum flexibility and stability. The switching frequency is selectable between 630 kHz and 1.2 MHz and

the minimum input voltage is 2.5 V. To limit the inrush current at start-up a soft-start pin is available.

TPS65148 boost converter’s novel topology using adaptive off-time provides superior load and line transient

responses and operates also over a wider range of applications than conventional converters.

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Boost Converter Design Procedure

The first step in the design procedure is to verify whether the maximum possible output current of the boost

converter supports the specific application requirements. A simple approach is to estimate the converter

efficiency, by taking the efficiency numbers from the provided efficiency curves or to use a worst case

assumption for the expected efficiency, e.g. 85%.

V_IN´h

D =

1. Duty Cycle:

V_S

V

_{IN_min}´ D

2.

Inductor ripple current:

ΔI_L=

f ´L

ΔI_L

2

æ

ö

Maximum output current:

3.

I_{OUT_max}

=

I_{LIM_min}

-

´ (1 -D)

ç

÷

è

ø

ΔI_L

I_OUT

Peak switch current:

I_swpeak

=

+

4.

2

1-D

I_swpeak= converter switch current (must be < I_{LIM_min}= 4.0 A)

ƒ = Converter switching frequency (typically 1.2 MHz or 630 kHz)

L = Selected inductor value (the Inductor Selection section)

η = Estimated converter efficiency (please use the number from the efficiency plots or 85% as an estimation)

ΔI_L= Inductor peak-to-peak ripple current

The peak switch current is the steady state current that the integrated switch, inductor and external Schottky

diode have to be able to handle. The calculation must be done for the minimum input voltage where the peak

switch current is highest.

Inductor Selection

The main parameter for the inductor selection is the saturation current of the inductor which should be higher

than the peak switch current as calculated above with additional margin to cover for heavy load transients. An

alternative, more conservative, is to choose the inductor with a saturation current at least as high as the

maximum switch current limit of 5.6 A. Another important parameter is the inductor DC resistance. Usually the

lower the DC resistance the higher the efficiency. It is important to note that the inductor DC resistance is not the

only parameter determining the efficiency. Especially for a boost converter where the inductor is the energy

storage element, the type and core material of the inductor influences the efficiency as well. At high switching

frequencies of 1.2 MHz inductor core losses, proximity effects and skin effects become more important. Usually

an inductor with a larger form factor gives higher efficiency. The efficiency difference between different inductors

can vary between 2% to 10%. For the TPS65148, inductor values between 3.3 µH and 6.8 µH are a good choice

with a switching frequency of 1.2 MHz. At 630 kHz we recommend inductors between 7 µH and 13 µH.

Isat > I_swpeakimperatively. Possible inductors are shown in Table 1.

Table 1. Inductor Selection

L

(µH)

COMPONENT SUPPLIER

COMPONENT CODE

SIZE

(LxWxH mm)

DCR TYP

(mΩ)

Isat

(A)

1.2 MHz

B82464-G4682-M

UP2B-4R7-R

CDRH124NP-4R7-M

CDRH127

6.8

4.7

Epcos

Coiltronics

Sumida

16 x 10.4 x 4.8

14 x 10.4 x 6

20

16.5

18

4.3

5.5

5.7

6.8

12.3 x 12.3 x 4.5

12.3 × 12.3 × 8

Sumida

11.7

630 kHz

10

Coilcraft

Sumida

DS3316P

12.95 × 9.4 × 5.08

8.3 × 8.3 × 4.5

12.3 × 12.3 × 8

80

29

16

15

3.5

4

CDRH8D43

CDRH127

5.4

6.7

CDRH127LD

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Rectifier Diode Selection

To achieve high efficiency a Schottky type should be used for the rectifier diode. The reverse voltage rating

should be higher than the maximum output voltage of the converter. The averaged rectified forward current I_F,

the Schottky diode needs to be rated for, is equal to the output current I_OUT

I_F= I_OUT

:

(1)

Usually a Schottky diode with 2 A maximum average rectified forward current rating is sufficient for most of the

applications. Also, the Schottky rectifier has to be able to dissipate the power. The dissipated power is the

average rectified forward current times the diode forward voltage V_F.

P_D= I_F× V_F

Typically the diode should be able to dissipate around 500mW depending on the load current and forward

voltage.

Table 2. Rectifier Diode Selection

CURRENT

RATING l_F

V_R

V_F/ I_F

COMPONENT SUPPLIER

COMPONENT CODE

PACKAGE TYPE

2 A

20 V

0.44 V/2 A

0.5 V/2 A

Vishay

SL22

SS22

SMA

Setting the Output Voltage

The output voltage is set by an external resistor divider. Typically, a minimum current of 50 µA flowing through

the feedback divider is enough to cover the noise fluctuation. The resistors are then calculated with 70 µA as:

V_S

R1

æ

ç

è

ö

÷

ø

V_FB

V_S

R2 =

»18 kΩ

R1= R2´

-1

V_FB

70 μA

V_FB

R2

(2)

with V_FB= 1.240 V

Soft-Start (Boost Converter)

To minimize the inrush current during start-up an external capacitor connected to the soft-start pin SS is used to

slowly ramp up the internal current limit of the boost converter by charging it with a constant current of typically

10 µA. The inductor peak current limit is directly dependent on the SS voltage and the maximum load current is

available after the soft-start is completed (V_SS= 0.8 V) or V_Shas reached its Power Good value, 90% of its

nominal value. The larger the capacitor, the slower the ramp of the current limit and the longer the soft-start time.

A 100-nF capacitor is usually sufficient for most of the applications. When the EN pin is pulled low, the soft-start

capacitor is discharged to ground.

Frequency Select Pin (FREQ)

The digital frequency select pin FREQ allows to set the switching frequency of the device to 630 kHz (FREQ =

'low') or 1.2 MHz (FREQ = 'high'). Higher switching frequency improves load transient response but reduces

slightly the efficiency. The other benefits of higher switching frequency are a lower output voltage ripple. Usually,

it is recommended to use 1.2 MHz switching frequency unless light load efficiency is a major concern.

Compensation (COMP)

The regulation loop can be compensated by adjusting the external components connected to the COMP pin. The

COMP pin is the output of the internal transconductance error amplifier. The compensation capacitor will adjust

the low frequency gain and the resistor value will adjust the high frequency gain. Lower output voltages require a

higher gain and therefore a lower compensation capacitor value. A good start, that will work for the majority of

the applications is R_COMP= 47 kΩ and C_COMP= 3.3 nF.

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Input Capacitor Selection

For good input voltage filtering low ESR ceramic capacitors are recommended. TPS65148 has an analog input

VIN. A 1-µF bypass is required as close as possible from VIN to GND.

Two 10-µF (or one 22-µF) ceramic input capacitor is sufficient for most of the applications. For better input

voltage filtering this value can be increased. Refer to Table 3 and typical applications for input capacitor

recommendations.

Output Capacitor Selection

For best output voltage filtering a low ESR output capacitor is recommended. Four 10-µF (or two 22-µF) ceramic

output capacitors work for most of the applications. Higher capacitor values can be used to improve the load

transient response. Refer to Table 3 for the selection of the output capacitor.

Table 3. Rectifier Input and Output Capacitor Selection

CAPACITOR

VOLTAGE

RATING

COMPONENT SUPPLIER COMPONENT CODE

COMMENTS

10 µF/0805

1 µF/0603

10 µF/1206

10 V

25 V

Taiyo Yuden

LMK212 BJ 106KD

EMK107 BJ 105KA

TMK316 BJ 106ML

C_IN

VIN bypass

C_OUT

To calculate the output voltage ripple, the following equations can be used:

V_S- V

I_OUT

IN

DV_C

=

´

DV_{C_ESR}= DI_L´R_{C_ESR}

V_S´ f

C

(3)

ΔV_{C_ESR}can be neglected in many cases since ceramic capacitors provide very low ESR.

Undervoltage Lockout (UVLO)

To avoid misoperation of the device at low input voltages an undervoltage lockout is included that disables the

device, if the input voltage falls below 2.0 V.

Gate Drive Pin (GD)

The Gate Drive (GD) allows controlling an external isolation P-channel MOSFET switch. Using a 1-nF capacitor

is recommned between the source and the gate of the FET to properly turn it on. GD pin is pulled low when the

input voltage is above the undervoltage lockout threshold (UVLO) and when enable (EN) is 'high'. The gate drive

has an internal pull up resistor to V_INof typically 5 kΩ. The external P-channel MOSFET must be chosen with

V_T< V_{IN_min}in order to be properly turned on.

Overvoltage Protection (OVP)

The main boost converter has an integrated overvoltage protection to prevent the Power Switch from exceeding

the absolute maximum switch voltage rating at pin SW in case the feedback (FB) pin is floating or shorted to

GND. In such an event, the output voltage rises and is monitored with the OVP comparator over the SUP pin. As

soon as the comparator trips at typically 19 V, the boost converter turns the N-Channel MOSFET off. The output

voltage falls below the overvoltage threshold and the converter starts switching again. If the voltage on FB pin is

below 90% of its typical value (1.240 V) for more than 55 ms, the device is latched down. The input voltage V_IN

needs to be cycled to restart the device. In order to detect the overvoltage, the SUP pin needs to be connected

to output voltage of the boost converter V_S. XAO output is independent from OVP.

Short Circuit Protection (SCP)

At start-up, as soon as the UVLO is reached and the EN signal is high, the GD pin is pulled 'low'. The feedback

voltage of the boost converter V_FBas well as the SUP pin voltage (V_S) are sensed. After 2ms, if the voltage on

SUP pin has not risen or the FB voltage is below 90% of its typical value (1.240 V), then the GD pin is pulled

high for 55ms. After 3 tries, if the device is still in short circuit, it is latched down. The input voltage V_INneeds to

be cycled to restart the device. The SCP is also valid during normal operation.

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Over Current Protection (OCP)

If the FB voltage is below 90% of its typical value (1.240 V) for more than 55 ms, the GD pin is pulled 'high' and

the device latched down. The input voltage V_INneeds to be cycled to restart the device.

HIGH VOLTAGE STRESS (HVS) FOR THE BOOST CONVERTER

The TPS65148 incorporates a High Voltage Stress test enabled by pulling the logic pin HVS 'high'. The output

voltage of the boost converter V_Sis then set to a higher output voltage compared to the nominal programmed

output voltage. If unregulated external charge pumps are connected via the boost converter, their outputs will

increase as V_Sincreases. This stressing voltage is flexible and set by the resistor connected to RHVS pin. With

HVS = 'high' the RHVS pin is pulled to GND. The external resistor connected between FB and RHVS (as shown

in Figure 19) is therefore put in parallel to the low-side resistor of the boost converter's feedback divider. The

output voltage for the boost converter during HVS test is calculated as:

V_S

R1+R2 ||R12

R2 ||R12

R1´R2

R1

R2

V_{S_HVS}= V_FB

´

R12 =

V

æ

ç

è

ö

S_HVS

V_FB

-1 ´R2 -R1

÷

V_FB

ø

R12

(4)

with V_FB= 1.240 V

If the V_GHvoltage needs to be set to a higher value by using the HVS test, V_GHmust be connected to VGH pin

without regulation stage. V_GHvoltage will then be equal to V_{S_HVS}times 2 or 3 (depending if a doubler or tripler

mode is used for the external positive charge pump). The same circuit changes can be held on the negative

charge pump as well if required.

CAUTION:

special caution must be taken in order to limit the voltage on VGH pin to 35V

(maximum recommended voltage)

VOLTAGE REGULATOR FOR GAMMA BUFFER

TPS65148 includes a voltage regulator (Low Dropout Linear Regulator, LDO) to supply the Gamma Buffer with a

very stable voltage. The LDO is designed to operate typically with a 4.7 µF ceramic output capacitor (any value

between 1 µF and 15 µF works properly) and a ceramic bypass capacitor of minimum 1 µF on its input REG_I

connected to ground. The output of the boost converter V_Sis usually connected to the input REG_I. The LDO

has an internal softstart feature of 2 ms maximum to limit the inrush current. As for the boost converter, a

minimum current of 50 µA flowing through the feedback divider is usually enough to cover the noise fluctuation.

The resistors are then calculated with 70 µA as:

V_{REG_O}

R10

æ

ç

è

ö

÷

ø

V_{REG_FB}

70 μA

V_{REG_O}

R11 =

» 18 kW

R10 = R11 ´

-1

V_{REG_FB}

R11

(5)

with V_{REG_FB}= 1.240 V

VCOM BUFFER

The VCOM Buffer power supply pin is the SUP pin connected to the boost converter V_S. To achieve good

performance and minimize the output noise, a 1-µF ceramic bypass capacitor is required directly from the SUP

pin to ground. The input positive pin OPI is either supply through a resistive divider from V_Sor with an external

PMIC. The buffer is not designed to drive high capacitive loads; therefore it is recommended to connect a series

resistor at the output to provide stable operation when driving high capacitive load. With a 3.3-Ω series resistor, a

capacitive load of 10 nF can be driven, which is usually sufficient for typical LCD applications.

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EXTERNAL CHARGE PUMPS

External Positive Charge Pump

The external positive charge pump provides with the below configuration (figure Figure 20) an output voltage V_GH

of maximum 3 times the output voltage of the Boost converter V_S. The first stage provides roughly 3*V_Sin that

configuration, and the second stage is used as regulation whose output voltage is selectable. The operation of

the charge pump driver can be understood best with Figure 20 which shows an extract of the positive charge

pump driver circuit out of the typical application. The voltage on the collector of the bipolar transistor is slightly

equal to 3*V_S-4*V_F. The next stage regulates the output voltage V_GH. A Zener diode clamps the voltage at the

desired output value and a bipolar transistor is used to provide better load regulation as well as to reduce the

quiescent current. Finally the output voltage on V_GHwill be equal to V_Z-V_be.

V_GH

T2

BC850B

~ 32V / 20mA

3. V_S

C23

C22

470 nF

D8

470 nF

R15

4.3 kW

BAT54S

C21

D9

1 mF/

50 V

2. V_S

C20

470 nF

BAT54S

C19

D5

D6

470 nF

D7

BZX84C

33V

BAT54S

V_IN

2.5 V to 6 V

L

V_S

13.6V / 500mA

D1

Q1

Figure 20. Positive Charge Pump

Doubler Mode: if the V_GHvoltage can be reached using doubler mode, then the configuration is the same than

the one shown inFigure 28.

External Negative Charge Pump

The external negative charge pump works also with two stages (charge pump and regulation). The charge pump

provides a negative regulated output voltage. Figure 21 shows the operation details of the negative charge

pump. With the first stage, the voltage on the collector of the bipolar transistor is equal to –V_S+V_F.

The next stage regulates the output voltage V_GL. A resistor and a Zener diode are used to clamp the voltage to

the desired output value. The bipolar transistor is used to provide better load regulation as well as to reduce the

quiescent current. The output voltage on V_GLwill be equal to -V_Z–V_be.

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V_GL

T1

BC857B

~ -7 V/20 mA

-V_S

D3

BAT54S

D4

C18

470 nF

R14

C17

470 nF

5.6 kW

C16

1 mF/

16 V

D2

BZX84C

7V5

V_IN

V_S

2.5 V to 6 V

13.6V / 500mA

D1

Q1

Figure 21. Partially Regulated External Negative

Components Selection

Capacitors (Charge Pumps)

For best output voltage filtering a low ESR output capacitor is recommended. Ceramic capacitors have a low

ESR value but depending on the application tantalum capacitors can be used as well. For every capacitor, the

reactance value has to be calculated as follows:

1

X_C

=

2 ´ p ´ f ´ C

(6)

This value should be as low as possible in order to reduce the voltage drop due to the current flowing through it.

The rated voltage of the capacitor has to be able to withstand the voltage across it. Capacitors rated at 50 V are

enough for most of the applications. Typically a 470-nF capacitance is sufficient for the flying capacitors whereas

bigger values like 1 µF or more can be used for the output capacitors to reduce the output voltage ripple.

CAPACITOR

100 nF/0603

470 nF/0805

1 µF/1210

COMPONENT SUPPLIER

Taiyo Yuden

COMPONENT CODE

UMK107 BJ 104KA

UMK212 BJ 474KG

UMK325 BJ 105KH

COMMENTS

Flying Cap

Taiyo Yuden

Output Cap 1

Output Cap 2

Taiyo Yuden

Diodes (Charge Pumps)

For high efficiency, one has to minimize the forward voltage drop of the diodes. Schottky diodes are

recommended. The reverse voltage rating must withstand the maximum output voltage V_Sof the boost converter.

Usually a Schottky diode with 200 mA average forward rectified current is suitable for most of the applications.

CURRENT

RATING I_F

V_R

V_F/ I_F

COMPONENT

SUPPLIER

COMPONENT

CODE

PACKAGE

TYPE

200 mA

30 V

0.5V / 30mA

International Rectifier

BAT54S

SOT 23

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GATE VOLTAGE SHAPING FUNCTION

External Positive

Charge Pump

V

S

IN

SW SW

SUP

Power Transistor

Boost Converter

VGH

M1

M2

VGHM

RE

Gate Voltage

Shaping

(GVS)

VFLK

VDPM

PGND

AGND

Figure 22. Gate Voltage Shaping Block Diagram

The Gate Voltage Shaping is controlled by the flicker input signal VFLK, except during start-up where it is kept at

low state, whatever the VFLK signal is. The VGHM output is enabled once VDPM voltage is higher than V_ref

=

1.240 V. The capacitor connected to VDPM (C13 on Figure 27) pin sets the delay from the boost converter

Power Good (90% of its nominal value).

I_DPM´ t_DPM

20 mA ´ t_DPM

C_VDPM

=

V

1.240 V

ref

(7)

VFLK = 'high' → V_GHM= V_GH

VFLK = 'low' → V_GHMdischarges through Re resistor

The slope at which V_GHMdischarges is set by the external resistor connected to RE, the internal MOSFET

R_DS(ON)(typically 13Ω for M2 – see Figure 22) and by the external gate line capacitance connected to VGHM pin.

Boost

Power Good

VFLK = “high”

VFLK

Unknown state

VFLK = “low”

Delay set by

VDPM

VGH

Slope set by

Re

VGHM

0V

Figure 23. Gate Voltage Shaping Timing

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If RE is connected with a resistor to ground (see Figure 23), when VFLK = 'low' V_GHMwill discharge from V_GH

down to 0V. Since 5*τ (τ = R*C) are needed to fully discharge C through R, we can define the time-constant of

the gate voltage shaping block as follow:

τ = (Re + R_DS(ON)M2) × C_VGHM

Therefore, if the discharge of C_VGHMshould finish during V_FLK= 'low':

t_V

_FLK='low '

t_discharge= 5 ´ t = t_V

Þ

RE =

-R_DS(ON)M2

_FLK='low '

5 ´ C_VGHM

(8)

NOTE:

C_VGHMand R_VGHMform the parasitic RC network of a pixel gate line of the panel. If

they are not known, they can be ignored at the beginning and estimated from the

discharge slope of V_GHMsignal.

V_S

VGHM

Re

Re’

M2

Option 2

RE

Option 3

Option 1

Re

Figure 24. Discharge Path Options for VGHM

Options 2 and 3 from Figure 24 work like option 1 explained above. When M2 is turned on, V_GHMdischarges with

a slope set by Re from V_GHlevel down to V_Sin option 2 configuration and down to the voltage set by the resistor

divider in option 3 configuration. The discharging slope is set by Re resistor(s).

NOTE:

when options 2 or 3 are used, V_GHMis not held to 0V at startup but to the voltage set

on RE pin by the resistors Re and Re’.

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RESET FUNCTION

The device has an integrated reset function with an open-drain output capable of sinking 1 mA. The reset

function monitors the voltage applied to its sense input VDET. As soon as the voltage on VDET falls below the

threshold voltage V_{DET_threshold}of typically 1.240 V, the reset function asserts its reset signal by pulling XAO low.

Typically, a minimum current of 50µA flowing through the feedback divider when VDET voltage trips the

reference voltage of 1.240 V is required to cover the noise fluctuation. Therefore, to select R4, one has to set the

input voltage limit (V_{IN_LIM}) at which the reset function will pull XAO to low state. V_{IN_LIM}must be higher than the

UVLO threshold. The resistors are then calculated with 70 µA as:

V_IN

R4

V

æ

ç

è

ö

V_DET

IN_LIM

R5 =

» 18 kW

R4 = R5 ´

-1

÷

V_DET

70 μA

V_DET

ø

R5

(9)

with V_DET= 1.240 V

The reset function is operational for V_IN≥ 1.6V:

V_DET

V_{DET_threshold}+ hys

V_{DET_threshold}

Min. Operating

voltage

V_IN= 1.6 V

GND

XAO

Unknown

state

GND

Figure 25. Voltage Detection and XAO Pin

The reset function is configured as a standard open-drain and requires a pull-up resistor. The resistor R_XAO(R3),

which must be connected between the XAO pin and a positive voltage V_Xgreater than 2V - 'high' logic level - e.g.

V_IN, can be chosen as follows:

V_X

V_X- 2 V

R_{XAO_min}

>

&

R_{XAO_max}<

1 mA

2 mA

(10)

THERMAL SHUTDOWN

A thermal shutdown is implemented to prevent damages because of excessive heat and power dissipation.

Typically the thermal shutdown threshold for the junction temperature is 150 °C. When the thermal shutdown is

triggered the device stops operating which until the junction temperature falls below typically 136 °C. Then the

device starts switching again. The XAO signal is independent of the thermal shutdown.

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POWER SEQUENCING

When EN is high and the input voltage V_INreaches the Under Voltage Lockout (UVLO), the device is enabled

and the GD pin is pulled low. The boost converter starts switching and the VCOM buffer is enabled. As soon as

V_Sof the boost converter reaches its Power Good, the voltage regulator for gamma is enabled and the delay

enabling the gate voltage shaping block starts. Once this delay has passed, the VGHM pin output is enabled.

1. GD

2. Boost converter & VCOM Buffer

3. Voltage regulator for Gamma Buffer

4. VGHM (after proper delay)

Device

ENABLED

Device

DISABLED

UVLO

VIN

V_{DET_THRESHOLD}

UVLO

EN

GD

BOOST

VCOM

VGH (external)

VGL (external)

REG_O

VDPM

Vref = 1.240 V

Unknown state

VFLK

Delay set

by VDPM

Slope set

by Re

VGHM

Figure 26. Sequencing TPS65148

Power off sequencing and LCD discharge function

When the input voltage V_INfalls below a predefined threshold (set by V_{DET_THRESHOLD}- see Figure 26 ), XAO is

driven low and V_GHMis driven to V_GH. (Note that when V_INfalls below the UVLO threshold, all IC functions are

disabled except XAO and V_GHM). Since VGHM is connected to VGH, it tracks the output of the positive charge

pump as it decays. This feature, together with XAO can be used to discharge the panel by turning on all the pixel

TFTs and discharging them into the gradually decaying V_GHMvoltage. V_GHMis held low during power-up.

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21

Product Folder Link(s) :TPS65148

TPS65148

SLVS904–MAY 2009........................................................................................................................................................................................................ www.ti.com

APPLICATION INFORMATION

V_S

13.6V / 500mA

L

4.7µH

D1

SL22

Q

FDS4435

V_IN

2.5V to 6.0V

C3

1nF

C5~8

4*10µF/

25V

C1~2

2*10µF/

10V

C4

10µF/

10V

C9

1µF/

25V

P

R1

180kW

EN

FREQ

FB

Boost Converter

(V_S)

R12

56kW

R2

18kW

RHVS

HVS

VIN

C10

1µF/

10V

High Voltage

Stress

P

V_S

Gate

Driver

REG_I

V_IN

C15

1µF/

25V

R3

2.7kW

V_IN

V_{REG_O}

12.5V /15mA

P

XAO

REG_O

R4

27kW

LDO

(V_{REG_O})

Reset Function

(XAO)

C14

4.7µF/

25V

VDET

R10

91kW

REG_FB

R5

18kW

R11

10kW

P

V_GH

VGH

V_S

VGHM

V_GHM

~ 23V / 20mA

Gate Voltage

Shaping

R6

30kW

RE

(V_GHM

)

OPI

R9

80kW

VCOM

(V_COM)

V_COM

5V / 100mA

VFLK

R7

18kW

OPO

P

VDPM

C13

100nF

R8

47kW

C12

100nF

P

C11

3.3nF

Figure 27. TPS65148 Typical Application

22

Submit Documentation Feedback

Product Folder Link(s) :TPS65148

TPS65148

www.ti.com ........................................................................................................................................................................................................ SLVS904–MAY 2009

V_GH

~ 23V / 20mA

T2

BC850B

V_GL

~ -7V / 20mA

C18

470nF

C19

470nF

T1

BC857B

D3

R15

2kW

C20

470nF

D5

C21

1µF/

50V

BAT54S

D7

BZX84C

24V

C17

470nF

BAT54S

D4

R14

5.6kW

D6

C16

1µF/

16V

P

D2

BZX84C

7V5

P

V_S

13.6V / 500mA

L

4.7µH

D1

SL22

V_IN

2.5V to 6.0V

Q

FDS4435

C3

1nF

C5~8

4*10µF/

25V

C1~2

2*10µF/

10V

C4

10µF/

10V

C9

1µF/

25V

P

R1

180kW

EN

FREQ

FB

Boost Converter

(V_S)

R12

56kW

R2

18kW

RHVS

HVS

VIN

C10

1µF/

10V

High Voltage

Stress

P

V_S

Gate

Driver

REG_I

V_IN

C15

1µF/

25V

R3

2.7kW

V_IN

V_{REG_O}

12.5V /15mA

P

XAO

REG_O

R4

27kW

LDO

(V_{REG_O})

Reset Function

(XAO)

C14

4.7µF/

25V

VDET

R10

91kW

REG_FB

R5

18kW

R11

10kW

P

V_GH

VGH

V_S

VGHM

V_GHM

~ 23V / 20mA

Gate Voltage

Shaping

R6

30kW

RE

(V_GHM

)

OPI

R9

80kW

VCOM

(V_COM)

V_COM

5V / 100mA

VFLK

R7

18kW

OPO

P

VDPM

C13

100nF

R8

47kW

C12

100nF

P

C11

3.3nF

Figure 28. TPS65148 Typical Application with Positive Charge Pump in Doubler Mode Configuration

Submit Documentation Feedback

23

Product Folder Link(s) :TPS65148

PACKAGE OPTION ADDENDUM

www.ti.com

2-Jun-2009

PACKAGING INFORMATION

Orderable Device

TPS65148RHBR

TPS65148RHBT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

QFN

RHB

32

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

QFN

RHB

32

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

8-Jun-2009

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) W1 (mm)

(mm) (mm) Quadrant

TPS65148RHBR

TPS65148RHBT

QFN

RHB

32

3000

250

330.0

180.0

12.4

5.3

1.5

8.0

12.0

Q2

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

8-Jun-2009

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS65148RHBR

TPS65148RHBT

QFN

RHB

32

3000

250

346.0

190.5

346.0

212.7

29.0

31.8

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are

sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should provide

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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,

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型号：	TPS65148
厂家：	TEXAS INSTRUMENTS
描述：	Compact TFT LCD Bias IC for Monitor with VCOM Buffer, Voltage Regulator for Gamma Buffer and Reset Function 紧凑型TFT LCD偏置IC，用于监控与VCOM缓冲器，电压调节器的伽玛缓冲器和复位功能调节器监控 CD
文件：	总30页 (文件大小：1185K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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