TPS79328-Q1 [TI]

ULTRALOW-NOISE HIGH-PSRR FAST-RF 200-mA LOW-DROPOUT LINEAR REGULATORS; 超低噪声,高PSRR FAST -RF 200 mA低压降线性稳压器
TPS79328-Q1
型号: TPS79328-Q1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

ULTRALOW-NOISE HIGH-PSRR FAST-RF 200-mA LOW-DROPOUT LINEAR REGULATORS
超低噪声,高PSRR FAST -RF 200 mA低压降线性稳压器

稳压器
文件: 总16页 (文件大小:308K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢈꢉ  
ꢈꢉ  
ꢈꢉ  
ꢉ ꢍ  
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢅ ꢈꢉ ꢇ ꢊ ꢋꢃ  
ꢎꢏ  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
ꢑ ꢗꢖ ꢘꢓ ꢒ ꢒꢘ ꢚ ꢐꢑꢓꢀꢔ ꢒꢂ  
FEATURES  
DESCRIPTION  
D
Qualified For Automotive Applications  
ESD Protection Exceeds 2000 V Per  
The TPS793xx family of low-dropout (LDO) low-power  
linear voltage regulators features high power-supply  
rejection ratio (PSRR), ultralow noise, fast start-up, and  
excellent line and load transient responses in a  
small-outline SOT23 package. Each device in the  
family is stable, with a small 2.2-µF ceramic capacitor  
on the output. The TPS793xx family uses an advanced,  
proprietary BiCMOS fabrication process to yield  
extremely low dropout voltages (e.g., 112 mV at  
200 mA, TPS79330). Each device achieves fast  
start-up times (approximately 50 µs with a 0.001-µF  
bypass capacitor) while consuming very low quiescent  
current (170 µA typical). Moreover, when the device is  
placed in standby mode, the supply current is reduced  
D
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
200-mA Low-Dropout Regulator With  
Enable (EN)  
Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V,  
3.3-V, 4.75-V, and Adjustable Options  
High Power-Supply Rejection Ratio (PSRR)  
(70 dB at 10 kHz)  
Ultralow Noise (32 µV)  
D
D
D
D
D
D
D
D
Fast Start-Up Time (50 µs)  
Stable With a 2.2-µF Ceramic Capacitor  
Excellent Load/Line Transient  
Very Low Dropout Voltage  
(112 mV at Full Load, TPS79330)  
5-Pin SOT23 (DBV) Package  
to less than  
approximately 32 µV  
1
µA. The TPS79328 exhibits  
of output voltage noise with a  
RMS  
0.1-µF bypass capacitor. Applications with analog  
components that are noise sensitive, such as portable  
RF electronics, benefit from the high PSRR and  
low-noise features as well as the fast response time.  
D
APPLICATIONS  
D
D
D
VCOs  
RF  
Bluetooth, Wireless LAN  
DBV PACKAGE  
(TOP VIEW)  
IN  
GND  
EN  
1
2
5
OUT  
3
4
BYPASS  
Fixed Option  
DBV PACKAGE  
(TOP VIEW)  
IN  
GND  
EN  
1
2
6
5
OUT  
FB  
3
4
BYPASS  
Adjustable Option  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Bluetooth is a trademark of Bluetooth SIG, Inc.  
ꢁꢒ ꢔ ꢝꢐ ꢞ ꢀꢗ ꢔꢖ ꢝ ꢓꢀꢓ ꢟꢠ ꢡꢢ ꢣ ꢜꢤ ꢥꢟꢢꢠ ꢟꢦ ꢧꢨ ꢣ ꢣ ꢩꢠꢥ ꢤꢦ ꢢꢡ ꢪꢨꢫ ꢬꢟꢧ ꢤꢥꢟ ꢢꢠ ꢭꢤ ꢥꢩꢮ ꢁꢣ ꢢꢭꢨ ꢧꢥꢦ  
ꢧ ꢢꢠ ꢡꢢꢣ ꢜ ꢥꢢ ꢦ ꢪꢩ ꢧ ꢟ ꢡꢟ ꢧ ꢤ ꢥꢟ ꢢꢠꢦ ꢪ ꢩꢣ ꢥꢯꢩ ꢥꢩ ꢣ ꢜꢦ ꢢꢡ ꢀꢩꢰ ꢤꢦ ꢗꢠꢦ ꢥꢣ ꢨꢜ ꢩꢠꢥ ꢦ ꢦꢥ ꢤꢠꢭ ꢤꢣ ꢭ ꢱ ꢤꢣ ꢣ ꢤ ꢠꢥꢲꢮ  
ꢁꢣ ꢢ ꢭꢨꢧ ꢥ ꢟꢢ ꢠ ꢪꢣ ꢢ ꢧ ꢩ ꢦ ꢦ ꢟꢠ ꢳ ꢭꢢ ꢩ ꢦ ꢠꢢꢥ ꢠꢩ ꢧꢩ ꢦꢦ ꢤꢣ ꢟꢬ ꢲ ꢟꢠꢧ ꢬꢨꢭ ꢩ ꢥꢩ ꢦꢥꢟ ꢠꢳ ꢢꢡ ꢤꢬ ꢬ ꢪꢤ ꢣ ꢤꢜ ꢩꢥꢩ ꢣ ꢦꢮ  
Copyright 2003−2007, Texas Instruments Incorporated  
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
TPS79328  
TPS79328  
RIPPLE REJECTION  
vs  
OUTPUT SPECTRAL NOISE DENSITY  
vs  
FREQUENCY  
FREQUENCY  
0.3  
100  
90  
V
= 3.8 V  
I
I
= 200 mA  
O
C
o
= 2.2 µF  
0.25  
0.2  
80  
C
(byp)  
= 0.1 µF  
70  
60  
0.15  
50  
40  
30  
I
= 1 mA  
O
I
= 10 mA  
O
0.1  
I
= 200 mA  
O
20  
10  
0
V
C
C
= 3.8 V  
= 10 µF  
0.05  
I
o
= 0.01 µF  
(byp)  
0
100  
1 k  
10 k  
100 k  
10  
100  
1 k  
10 k 100 k 1 M 10 M  
f − Frequency − Hz  
f − Frequency − Hz  
ORDERING INFORMATION  
§
T
J
VOLTAGE  
PACKAGE  
PART NUMBER  
SYMBOL  
1.2 to 5.5 V  
1.8 V  
TPS79301DBVRQ1  
TPS79318DBVRQ1  
TPS79325DBVRQ1  
PGV1  
PHH1  
PGW1  
PGX1  
PHI1  
2.5 V  
2.8 V  
TPS79328DBVRQ1  
SOT23  
(DBV)  
−40°C to 125°C  
2.85 V  
3 V  
TPS793285QDBVRQ1  
TPS79330DBVRQ1  
PGY1  
PHU1  
PHJ1  
3.3 V  
TPS793333DBVRQ1  
TPS793475DBVRQ1  
4.75 V  
For the most current package and ordering information, see the Package Option Addendum  
at the end of this document, or see the TI web site at www.ti.com.  
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
The DBVR indicates tape and reel of 3000 parts.  
§
Product preview  
2
ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢈꢉ ꢇ ꢊ ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢎ ꢈꢉ ꢇ ꢊ ꢋ  
www.ti.com  
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢅ ꢈꢉ ꢇ ꢊ ꢋꢃ  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Input voltage range ꢀ ꢁ ꢂꢂ ꢃ ꢄꢅꢂ ꢆ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V  
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (V + 0.3 V)  
I
Voltage range on OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V  
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited  
ESD rating, Human-Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV  
ESD rating, Charged-Device Model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C  
J
Operating ambient temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C  
A
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functionaloperation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.  
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(1)  
All voltage values are with respect to network ground terminal.  
DISSIPATION RATING TABLE  
DERATING FACTOR  
T
A
25°C  
T
A
= 70°C  
T = 85°C  
A
BOARD  
PACKAGE  
R
θJC  
R
θJA  
ABOVE T = 25°C  
POWER RATING POWER RATING POWER RATING  
A
§
Low K  
DBV  
DBV  
63.75°C/W  
63.75°C/W  
256°C/W  
3.906 mW/°C  
5.609 mW/°C  
391 mW  
561 mW  
215 mW  
308 mW  
156 mW  
224 mW  
High K  
178.3°C/W  
§
The JEDEC low K (1s) board design used to derive this data was a 3-in × 3-in, two-layer board with 2-oz copper traces on top of the board.  
The JEDEC high K (2s2p) board design used to derive this data was a 3-in × 3-in, multilayer board with 1-oz internal power and ground planes and  
2-oz copper traces on top and bottom of the board.  
3
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
electrical characteristics over recommended operating free-air temperature range EN = V  
I,  
T = −40°C to 125°C, V = V  
+ 1 V, I = 1 mA, C = 10 µF, C  
= 0.01 µF (unless otherwise noted)  
J
I
O(typ)  
O
o
(byp)  
PARAMETER  
TEST CONDITIONS  
MIN  
2.7  
0
TYP  
MAX  
UNIT  
V
I
Input voltage (see Note 1)  
5.5  
V
I
O
Continuous output current (see Note 2)  
Operating junction temperature  
200  
125  
mA  
°C  
T
J
−40  
0 µA < I < 200 mA,  
(see Note 4)  
1.22 V V 5.2 V  
O
O
TPS79301  
TPS79318  
TPS79325  
TPS79328  
0.98 V  
1.02 V  
O
O
T = 25°C  
J
1.8  
2.5  
2.8  
2.85  
3
0 µA < I < 200 mA,  
2.8 V < V < 5.5 V  
1.764  
2.45  
1.836  
2.55  
O
I
T = 25°C  
J
0 µA < I < 200 mA,  
3.5 V < V < 5.5 V  
I
O
T = 25°C  
J
0 µA < I < 200 mA,  
3.8 V < V < 5.5 V  
2.744  
2.793  
2.94  
2.856  
2.907  
3.06  
O
I
Output voltage  
V
T = 25°C  
J
TPS793285  
TPS79330  
TPS79333  
TPS793475  
0 µA < I < 200 mA,  
3.85 V < V < 5.5 V  
I
O
T = 25°C  
J
0 µA < I < 200 mA,  
4 V < V < 5.5 V  
I
O
T = 25°C  
J
3.3  
4.75  
170  
0 µA I < 200 mA,  
4.3 V < V < 5.5 V  
3.234  
4.655  
3.366  
4.845  
220  
O
I
T = 25°C  
J
0 µA < I < 200 mA,  
5.25 V < V < 5.5 V  
I
T = 25°C  
J
O
0 µA < I < 200 mA,  
O
Quiescent current (GND current)  
Load regulation  
µA  
mV  
%/V  
0 µA < I < 200 mA  
O
0 µA < I < 200 mA,  
T = 25°C  
5
O
J
V
O
V
O
+ 1 V < V 5.5 V,  
T = 25°C  
J
0.05  
Output voltage line regulation (V /V )  
(see Note 4)  
I
O
O
+ 1 V < V 5.5 V  
0.12  
I
C
(byp)  
C
(byp)  
C
(byp)  
C
(byp)  
C
(byp)  
C
(byp)  
C
(byp)  
= 0.001 µF  
= 0.0047 µF  
= 0.01 µF  
= 0.1 µF  
55  
36  
BW = 200 Hz to 100 kHz,  
Output noise voltage (TPS79328)  
µV  
RMS  
I
O
= 200 mA, T = 25°C  
33  
J
32  
= 0.001 µF  
= 0.0047 µF  
= 0.01 µF  
50  
R
L
C
o
= 14 ,  
= 1 µF, T = 25°C  
70  
Start-up time (TPS79328)  
µs  
J
100  
Output current limit  
V
= 0 V,  
See Note 3  
285  
2
600  
1
mA  
µA  
V
O
Standby current  
EN = 0 V, 2.7 V < V < 5.5 V  
0.07  
I
High-level enable input voltage  
Low-level enable input voltage  
Input current (EN)  
2.7 V < V < 5.5 V  
I
2.7 V < V < 5.5 V  
I
0.7  
1
V
EN = 0  
−1  
µA  
µA  
Input current (FB) (TPS79301)  
FB = 1.8 V  
1
(1)  
(2)  
(3)  
(4)  
To calculate the minimum input voltage for your maximum output current, use the following formula:  
V (min) = V (max) + V (max load)  
Continuousoutput current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device  
operate under conditions beyond those specified in this table for extended periods of time.  
I
O
DO  
The minimum IN operating voltage is 2.7 V or V  
is 200 mA.  
+ 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximum output current  
O(typ)  
If V 2.5 V, then V  
I(min)  
= 2.7 V, V  
I(max)  
= 5.5 V:  
O
OǒVI(max) * 2.7 VǓ  
  1000  
V
ǒ
Ǔ
 
Line Regulation (mV) + %ńV  
100  
If V 2.5 V, then V  
I(min)  
= V + 1 V, V = 5.5 V.  
I(max)  
O
O
4
ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢈꢉ ꢇ ꢊ ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢎ ꢈꢉ ꢇ ꢊ ꢋ  
www.ti.com  
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢅ ꢈꢉ ꢇ ꢊ ꢋꢃ  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
electrical characteristics over recommended operating free-air temperature range EN = V ,  
I
T = −40°C to 125°C, V = V  
+ 1 V, I = 1 mA, C = 10 µF, C  
= 0.01 µF (unless otherwise noted)  
J
I
O(typ)  
O
o
(byp)  
(continued)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
70  
MAX  
UNIT  
f = 100 Hz, T = 25°C,  
I
O
I
O
I
O
I
O
= 10 mA  
J
f = 100 Hz, T = 25°C,  
= 200 mA  
= 200 mA  
= 200 mA  
68  
J
Power-supply ripple rejection  
TPS79328  
dB  
f = 10 kHz, T = 25°C,  
70  
J
f = 100 kHz, T = 25°C,  
43  
J
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
= 200 mA,  
= 200 mA  
= 200 mA,  
= 200 mA  
= 200 mA,  
= 200 mA  
= 200 mA,  
= 200 mA  
= 200 mA,  
= 200 mA  
T = 25°C  
120  
J
TPS79328  
TPS793285  
TPS79330  
TPS79333  
TPS793475  
200  
200  
200  
180  
T = 25°C  
J
120  
112  
102  
77  
T = 25°C  
J
Dropout voltage (see Note 1)  
mV  
T = 25°C  
J
T = 25°C  
J
125  
UVLO threshold  
UVLO hysteresis  
V
rising  
2.25  
2.65  
V
CC  
T = 25°C,  
V
CC  
rising  
100  
mV  
J
(1)  
IN voltage equals V  
O(typ)  
− 100 mV. The TPS79325 dropout voltage is limited by the input voltage range limitations.  
5
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION  
V
OUT  
V
IN  
Current  
Sense  
UVLO  
SHUTDOWN  
ILIM  
R1  
_
GND  
EN  
+
FB  
R2  
UVLO  
Thermal  
External to  
the Device  
Shutdown  
250 kΩ  
V
ref  
Bandgap  
Reference  
Bypass  
V
IN  
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION  
V
IN  
V
OUT  
UVLO  
Current  
Sense  
GND  
EN  
SHUTDOWN  
ILIM  
R1  
R2  
_
+
UVLO  
Thermal  
Shutdown  
250 kΩ  
V
ref  
Bandgap  
Reference  
V
IN  
Bypass  
Terminal Functions  
TERMINAL  
NO.  
ADJ FIXED I/O  
I/O  
DESCRIPTION  
NAME  
BYPASS  
4
4
An external bypass capacitor connected to this terminal, in conjunction with an internal resistor, creates a  
low-pass filter to further reduce regulator noise.  
EN  
3
3
I
I
EN is an input that enables or shuts down the device. When EN goes to a logic high, the device will be enabled.  
When the device goes to a logic low, the device is in shutdown mode.  
FB  
5
2
1
6
N/A  
2
Feedback input voltage for the adjustable device.  
Regulator ground  
GND  
IN  
1
I
Input to the device.  
OUT  
5
O
Regulated output of the device.  
6
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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢅ ꢈꢉ ꢇ ꢊ ꢋꢃ  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
TYPICAL CHARACTERISTICS  
TPS79328  
TPS79328  
OUTPUT VOLTAGE  
vs  
TPS79328  
GROUND CURRENT  
vs  
OUTPUT VOLTAGE  
vs  
OUTPUT CURRENT  
JUNCTION TEMPERATURE  
JUNCTION TEMPERATURE  
2.805  
2.805  
2.804  
2.803  
2.802  
2.801  
2.8  
250  
V
= 3.8 V  
= 10 µF  
= 25° C  
I
V
= 3.8 V  
I
C
o
C
o
= 10 µF  
I
= 1 mA  
O
2.8  
T
J
200  
150  
I
= 1 mA  
O
2.795  
2.79  
I
= 200 mA  
O
2.799  
100  
50  
0
I
= 200 mA  
O
2.785  
2.798  
2.797  
2.78  
V
C
= 3.8 V  
= 10 µF  
I
o
2.796  
2.795  
2.775  
−40 −25 −10 5 20 35 50 65 80 95 110 125  
0
50  
100  
150  
200  
−40 −2510 5 20 35 50 65 80 95 110 125  
T
J
− Junction Temperature − °C  
I
− Output Current − mA  
T
J
− Junction Temperature − °C  
O
Figure 1  
Figure 2  
Figure 3  
TPS79328  
TPS79328  
TPS79328  
OUTPUT SPECTRAL NOISE DENSITY  
OUTPUT SPECTRAL NOISE DENSITY  
vs  
OUTPUT SPECTRAL NOISE DENSITY  
vs  
vs  
FREQUENCY  
FREQUENCY  
FREQUENCY  
0.3  
0.3  
1.6  
V
I
C
= 3.8 V  
V
C
C
= 3.8 V  
V
C
C
= 3.8 V  
I
I
O
I
1.4  
1.2  
1
= 200 mA  
= 10 µF  
= 2.2 µF  
= 10 µF  
o
o
0.25  
0.2  
0.25  
0.2  
0.15  
0.1  
0.05  
0
= 0.1 µF  
= 0.1 µF  
(byp)  
o
(byp)  
C
= 0.001 µF  
(byp)  
C
(byp)  
= 0.0047 µF  
I
= 1 mA  
C
= 0.01 µF  
O
0.8  
0.6  
0.4  
0.2  
0
(byp)  
0.15  
I
= 1 mA  
O
C
= 0.1 µF  
(byp)  
0.1  
I
= 200 mA  
I
= 200 mA  
O
O
0.05  
0
100  
1 k  
10 k  
100 k  
100  
1 k  
10 k  
100 k  
100  
1 k  
10 k  
100 k  
f − Frequency − Hz  
f − Frequency − Hz  
f − Frequency − Hz  
Figure 5  
Figure 6  
Figure 4  
TPS79328  
DROPOUT VOLTAGE  
vs  
ROOT MEAN SQUARED OUTPUT NOISE  
vs  
OUTPUT IMPEDANCE  
vs  
BYPASS CAPACITANCE  
JUNCTION TEMPERATURE  
FREQUENCY  
180  
160  
140  
120  
100  
80  
60  
2.5  
V
= 2.7 V  
V
= 3.8 V  
= 10 µF  
= 25° C  
I
V
= 2.8 V  
I
O
C
o
= 10 µF  
C
I
= 200 mA  
o
J
O
50  
40  
30  
20  
10  
T
C
o
= 10 µF  
2
I
= 200 mA  
O
1.5  
I
= 1 mA  
O
1
60  
I
= 100 mA  
O
40  
0.5  
I
= 10 mA  
O
20  
BW = 100 Hz to 100  
kHz  
0
0
10  
0
−40 −2510 5 20 35 50 65 80 95 110 125  
100  
1 k  
10 k 100 k 1 M  
10 M  
0.001  
0.01  
0.1  
T
J
− Junction Temperature − °C  
f − Frequency − Hz  
C
(byp)  
− Bypass Capacitance − µF  
Figure 7  
Figure 8  
Figure 9  
7
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
TYPICAL CHARACTERISTICS  
TPS79328  
RIPPLE REJECTION  
vs  
TPS79328  
RIPPLE REJECTION  
vs  
TPS79328  
RIPPLE REJECTION  
vs  
FREQUENCY  
FREQUENCY  
FREQUENCY  
100  
100  
90  
80  
70  
60  
50  
40  
100  
V
C
C
= 3.8 V  
V = 3.8 V  
I
I
90  
80  
70  
60  
50  
40  
30  
90  
80  
70  
I
= 200 mA  
= 2.2 µF  
C
= 2.2 µF  
O
o
o
C
= 0.01 µF  
= 0.1 µF  
(byp)  
(byp)  
I
= 200 mA  
O
I
= 200 mA  
O
60  
50  
40  
30  
I
= 10 mA  
O
I
= 10 mA  
O
I
= 10 mA  
O
30  
20  
20  
20  
10  
0
V
C
C
= 3.8 V  
= 10 µF  
I
o
10  
0
10  
0
= 0.01 µF  
(byp)  
10  
100  
1 k  
10 k 100 k 1 M 10 M  
10  
100  
1 k  
10 k 100 k 1 M 10 M  
10  
100  
1 k  
10 k 100 k 1 M 10 M  
f − Frequency − Hz  
f − Frequency − Hz  
f − Frequency − Hz  
Figure 10  
Figure 11  
Figure 12  
TPS79328  
OUTPUT VOLTAGE, ENABLE VOLTAGE  
TPS79328  
TPS79328  
vs  
LINE TRANSIENT RESPONSE  
LOAD TRANSIENT RESPONSE  
TIME (START-UP)  
V
C
= 3.8 V  
I
4.8  
3.8  
4
20  
= 10 µF  
o
2
0
V
V
= 3.8 V  
I
0
= 2.8 V  
O
−20  
I
= 200 mA  
= 2.2 µF  
= 25°C  
O
I
= 200 mA  
C
O
o
−40  
300  
C
C
= 2.2 µF  
T
J
o
C
(byp)  
= 0.001 µF  
= 0.01 µF  
dv  
dt  
0µ.4sV  
(byp)  
+
di  
dt  
0.02A  
µs  
20  
0
3
2
1
0
+
200  
100  
C
= 0.0047 µF  
= 0.01 µF  
(byp)  
1mA  
-20  
C
(byp)  
0
0
50 100 150200 250 300 350 400 450 500  
0
10 20 30 40 50 60 70 80 90 100  
0
20 40 60 80 100 120 140 160 180 200  
t − Time − µs  
t − Time − µs  
t − Time − µs  
Figure 15  
Figure 13  
Figure 14  
TPS79301  
DROPOUT VOLTAGE  
vs  
DC DROPOUT VOLTAGE  
vs  
OUTPUT CURRENT  
POWER UP / POWER DOWN  
INPUT VOLTAGE  
200  
250  
200  
150  
100  
V
= 3 V  
O
R
L
= 15 Ω  
T
= 125°C  
= 25°C  
J
150  
100  
T
J
= 125°C  
T
J
T
J
= 25°C  
V
I
V
O
50  
0
T
= −40°C  
T
J
= −55°C  
J
50  
0
I
= 200 mA  
3
O
1s/div  
2.5  
3.5  
4
4.5  
5
0
20 40 60 80 100 120 140 160 180 200  
V − Input Voltage − V  
I
I
− Output Current − mA  
O
Figure 16  
Figure 17  
Figure 18  
8
ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢈꢉ ꢇ ꢊ ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢎ ꢈꢉ ꢇ ꢊ ꢋ  
www.ti.com  
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢅ ꢈꢉ ꢇ ꢊ ꢋꢃ  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
TYPICAL CHARACTERISTICS  
TYPICAL REGIONS OF STABILITY  
EQUIVALENT SERIES RESISTANCE (ESR) EQUIVALENT SERIES RESISTANCE (ESR)  
TYPICAL REGIONS OF STABILITY  
MINIMUM REQUIRED INPUT VOLTAGE  
vs  
vs  
vs  
OUTPUT VOLTAGE  
OUTPUT CURRENT  
OUTPUT CURRENT  
4
100  
10  
100  
10  
I
= 200 mA  
C
o
I
= 2.2 µF  
= 5.5 V, V 1.5 V  
O
C
V
= 10 µF  
= 5.5 V  
= −40°C to 125°C  
o
I
T
J
= 125°C  
V
T
O
= −40°C to 125°C  
T
J
J
T
J
= 25°C  
Region of Instability  
Region of Instability  
T
J
= −40°C  
3
1
1
2.8  
0.1  
0.1  
Region of Stability  
Region of Stability  
2
0.01  
0.01  
1.5 1.75  
2
2.25 2.5 2.75  
3
3.25 3.5  
0
0.02  
0.04  
0.06  
0.08  
0.2  
0
0.02  
0.04  
0.06  
0.08  
0.2  
V
− Output Voltage − V  
I
− Output Current − A  
O
O
I
− Output Current − A  
O
Figure 19  
Figure 20  
Figure 21  
9
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
APPLICATION INFORMATION  
The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive battery-operated  
equipment. The device features low dropout voltages, high PSRR, ultralow output noise, low quiescent current (170 µA  
typical), and enable input to reduce supply currents to less than 1 µA when the regulator is turned off.  
A typical application circuit is shown in Figure 22.  
TPS793xx  
1
V
I
IN  
4
5
BYPASS  
OUT  
V
O
3
0.1 µF  
0.01 µF  
EN  
+
2.2 µF  
GND  
2
Figure 22. Typical Application Circuit  
EXTERNAL CAPACITOR REQUIREMENTS  
A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS793xx,  
is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value electrolytic  
input capacitor may be necessary if large, fast rise time, load transients are anticipated and the device is located several  
inches from the power source.  
Like all low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND to stabilize  
the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2-µF or larger ceramic capacitor is  
suitable, provided the capacitance does not vary significantly over temperature.  
The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has a BYPASS pin that is  
connected to the voltage reference through a 250-kinternal resistor. The 250-kinternal resistor, in conjunction with an  
external bypass capacitor connected to the BYPASS pin, creates a low-pass filter to reduce the voltage reference noise  
and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the  
BYPASS pin must be at a minimum, because any leakage current creates an IR drop across the internal resistor, thus  
creating an output error. Therefore, the bypass capacitor must have minimal leakage current.  
For example, the TPS79328 exhibits only 32 µV  
of output voltage noise using a 0.1-µF ceramic bypass capacitor and  
RMS  
a 2.2-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the  
RC time constant at BYPASS that is created by the internal 250-kresistor and external capacitor.  
BOARD LAYOUT RECOMMENDATION TO IMPROVE PSRR AND NOISE PERFORMANCE  
To improve ac measurements such as PSRR, output noise, and transient response, it is recommended that the board be  
designed with separate ground planes for V and V  
, with each ground plane connected only at the GND pin of the  
OUT  
IN  
device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device.  
10  
ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢈꢉ ꢇ ꢊ ꢋꢃ ꢄ ꢅ ꢍ ꢌ ꢎ ꢈꢉ ꢇ ꢊ ꢋ  
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
APPLICATION INFORMATION  
POWER DISSIPATION AND JUNCTION TEMPERATURE  
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be  
restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle  
in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable  
dissipation, P  
, and the actual dissipation, P , which must be less than or equal to P  
.
D(max)  
D
D(max)  
The maximum power dissipation limit is determined using the following equation:  
T max * T  
J
A
P
+
(1)  
D(max)  
R
θJA  
Where:  
T max = Maximum allowable junction temperature  
J
R
= Thermal resistance, junction-to-ambient, for the package (see the dissipation rating table)  
θJA  
T = Ambient temperature.  
A
The regulator dissipation is calculated using:  
+ ǒVI * V  
Ǔ
P
  I  
(2)  
D
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection  
circuit.  
PROGRAMMING THE TPS79301 ADJUSTABLE LDO REGULATOR  
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as shown in  
Figure 23. The output voltage is calculated using:  
R1  
R2  
  ǒ1 ) Ǔ  
(3)  
V
+ V  
O
ref  
Where:  
V
= 1.2246 V typ (internal reference voltage)  
ref  
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower-value resistors can be used for  
improved noise performance, but the solution consumes more power. Higher resistor values should be avoided, as leakage  
current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and,  
thus, erroneously decreases/increases V . The recommended design procedure is to choose R2 = 30.1 kto set the  
O
divider current at 50 µA, C1 = 15 pF for stability, and then calculate R1 using:  
V
O
R1 +  
* 1   R2  
ǒ Ǔ  
(4)  
V
ref  
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed  
between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages >1.8 V, the  
approximate value of this capacitor can be calculated as:  
*7  
(3 x 10 )   (R1 ) R2)  
C1 +  
(5)  
(R1   R2)  
The suggested value of this capacitor for several resistor ratios is shown in Figure 23. If this capacitor is not used (such  
as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, the minimum recommended output capacitor is  
4.7 µF instead of 2.2 µF.  
11  
www.ti.com  
SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007  
APPLICATION INFORMATION  
TPS79301  
OUTPUT VOLTAGE  
PROGRAMMING GUIDE  
V
I
IN  
1 µF  
OUTPUT  
VOLTAGE  
R1  
R2  
C1  
2 V  
EN  
OUT  
V
O
C1  
31.6 k30.1 k22 pF  
51 k30.1 k15 pF  
59 k30.1 k15 pF  
2.5 V  
3.3 V  
3.6 V  
R1  
R2  
0.7 V  
1 µF  
BYPASS FB  
GND  
0.01 µF  
Figure 23. TPS79301 Adjustable LDO Regulator Programming  
REGULATOR PROTECTION  
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops  
below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally  
limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate.  
The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx limits  
output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly until the  
overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to  
exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device. If the  
temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has  
cooled down to below approximately 140°C, regulator operation resumes.  
12  
PACKAGE OPTION ADDENDUM  
www.ti.com  
5-Nov-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TPS79301DBVRQ1  
TPS79318DBVRQ1  
TPS79325DBVRQ1  
TPS793285QDBVRQ1  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
6
5
5
5
3000  
3000  
3000  
TBD  
TBD  
TBD  
CU  
CU  
CU  
Level-1-220C-UNLIM  
Level-1-220C-UNLIM  
Level-1-220C-UNLIM  
DBV  
DBV  
DBV  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TPS79333DBVRQ1  
TPS793475DBVRQ1  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
TBD  
CU  
CU  
Level-1-220C-UNLIM  
Level-1-220C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
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Addendum-Page 1  
IMPORTANT NOTICE  
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ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA LOW-DROPOUT LINEAR REGULATORS IN NANOSTAR? WAFER CHIP SCALE AND SOT23
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