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TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

TPS92830-Q1 3 通道大电流线性 LED 控制器

1 特性

3 说明

1

•

符合 AEC-Q100 标准

在实现更佳的灯光均匀性的趋势下，高电流 LED 通常

用于汽车前灯和后灯（配备灯光扩散器和导光板）。同

时，为了满足严格的 EMC 和可靠性要求，线性 LED

驱动器广泛用于汽车应用。不过，通过集成功率晶体

管为线性 LED 驱动器提供高电流是一项挑战。

TPS92830-Q1 器件是一款先进的汽车级高侧恒定电流

线性 LED 控制器，通过使用外部 N 沟道 MOSFET 提

供高电流。该器件具有一整套用于汽车应用的功能，

并与各种 N 沟道 MOSFET 兼容。

–

器件温度等级 1：环境运行温度范围为 -40°C

至 125°C

器件人体放电模型 (HBM) 静电防护 (ESD) 分类

等级 H2

器件组件充电模型 (CDM) ESD 分类等级 C4B

•

4.5V 至 40V 的宽电压输入范围

3 通道高侧电流驱动和检测

–

通道独立的电流设置

通道独立的 PWM 输入

TPS92830-Q1 器件的每个通道可以通过感应电阻器值

独立设置通道电流。内部精密恒定电流调节环路通过感

应电阻器上的电压感应通道电流，并相应地控制 N 沟

道 MOSFET 的栅极电压。该器件还集成了一个两级电

荷泵，用于低压降运行。电荷泵电压足够高，可以支持

各种 N 沟道 iMOSFET。iPWM i调光i允许使用i多个

通过 PWM 输入和电源实现 PWM 调光

针对 EMC 优化的压摆率

•

高精度 LED 驱动

–

采用外部 N 沟道 MOSFET 的精密电流调节

（2.5% 容差）

–

具有非板载 Bin 电阻支持的 20:1 模拟调光配置

器件信息⁽¹⁾

具有全占空比屏蔽的精密 PWM 发生器（2% 容

差）

器件型号

封装

封装尺寸（标称值）

–

用于同步的开漏 PWM 输出

TPS92830-Q1

TSSOP (28)

9.70mm x 4.40mm

保护和诊断

(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。

–

用于外部 MOSFET 热保护的可调节输出电流降

额

简化原理图

Battery

–

具有自动恢复功能的 LED 灯串开路或短路诊断

TPS92830-Q1

针对低电压运行支持诊断并具有可调节阈值

CP1P

CP1N

GND

ISP

多达 15 个器件的故障总线，可配置为连带失效

或仅失效的通道关闭

ISN1

G1

SENSE1

CP2N

CP2P

CPOUT

IN

–

故障模式下具有较低的静态电流（每个器件小于

0.75mA）

ISN2

G2

•

工作结温范围：-40°C 至 150°C

TSSOP 28 封装 (PW)

SENSE2

DIAGEN

DERATE

ISN3

G3

2 应用

SENSE3

PWMOUT

FAULT

•

后灯 – 尾灯和制动灯、后转向灯、雾灯、倒车灯

前灯 – 位置灯、日间行车灯、前转向灯、近光灯

PWM1

PWM2

PWM3

FD

FAULT Bus

PWMCHG

IREF

Full Duty Cycle

ICTRL

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLIS178

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

8.2 Functional Block Diagram ....................................... 14

8.3 Feature Description................................................. 15

8.4 Device Functional Modes........................................ 29

Application and Implementation ........................ 30

9.1 Application Information............................................ 30

9.2 Typical Applications ................................................ 30

1

2

3

4

5

6

7

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

说明（续）.............................................................. 4

Pin Configuration and Functions......................... 4

Specifications......................................................... 6

7.1 Absolute Maximum Ratings ...................................... 6

7.2 ESD Ratings ............................................................ 6

7.3 Recommended Operating Conditions....................... 6

7.4 Thermal Information.................................................. 7

7.5 Electrical Characteristics........................................... 7

7.6 Timing Requirements................................................ 9

7.7 Typical Characteristics............................................ 11

Detailed Description ............................................ 14

8.1 Overview ................................................................. 14

9

10 Layout................................................................... 36

10.1 Layout Guidelines ................................................. 36

10.2 Layout Example .................................................... 36

11 器件和文档支持 ..................................................... 37

11.1 接收文档更新通知 ................................................. 37

11.2 社区资源................................................................ 37

11.3 商标....................................................................... 37

11.4 静电放电警告......................................................... 37

11.5 Glossary................................................................ 37

12 机械、封装和可订购信息....................................... 37

8

4 修订历史记录

注：之前版本的页码可能与当前版本有所不同。

Changes from Revision A (October 2017) to Revision B

Page

•

Changed timing specification for PWM duty cycle ................................................................................................................. 9

Changes from Original (July 2017) to Revision A

Page

•

在特性部分中更改了电流调节和 PWM 发生器的容差............................................................................................................ 1

Changed values for several parameters throughout the Electrical Characteristics table....................................................... 7

Changed parameter definitions for I_{(DRV_source)}and I_{(DRV_sink)}in the Electrical Chaaracteristics table ..................................... 7

Changed parameter symbols for analog dimming accuracy in the Electrical Characteristics table....................................... 8

Changed parameter descriptions for V_{(OPEN_th_rising)}, V_{(OPEN_th_falling)}, ....................................................................................... 8

Changed parameter descriptions for t_{(SG_retry_OFF)}and t_{(OPEN_retry_OFF)}in the Timing Requirements table............................... 9

Added a condition for Typical Characteristic 图 6 ............................................................................................................... 11

Deleted a condition from Typical Characteristic 图 8 .......................................................................................................... 12

Deleted a Fast Power Down and Slow Power Up typical characteristic graph.................................................................... 12

Added a Fast Power Down and Slow Power Up typical characteristic graph...................................................................... 13

Added a condition for Typical Characteristic 图 17 ............................................................................................................. 13

Added a condition for Typical Characteristic 图 18 .............................................................................................................. 13

Changed heat dissipation to current distribution in Parallel MOSFET Driving..................................................................... 17

Deleted a sentence from the PWM Dimming by Input section............................................................................................. 18

Added resistor and capacitor reference designators............................................................................................................ 19

Deleted percentage values for V_{(ICTRL_LIN_BOT)}and V_{(ICTRL_LIN_TOP)}in the Analog Dimming Topology section...................... 21

Changed V_{(SG_th_rising)}and V_{(SG_th_falling)}with each other in the LED Short-to-GND Detection section .................................. 25

Changed symbol of short-to-ground retry current to I_{(Retry_short)}............................................................................................ 26

Changed symbol of LED-open retry current to I_{(Retry_open)}in the LED Open-Circuit Auto Retry section............................... 26

Changed some FAULT TYPE names in 表 4....................................................................................................................... 29

Updated application schematic. ........................................................................................................................................... 30

Changed the value of R8 from 75 kΩ to 76 kΩ for the PWM threshold setting ................................................................... 31

Changed the equation for calculating K_{(RES_DiagEn)}................................................................................................................ 31

2

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

•

Changed the values of R13 and R6 for ............................................................................................................................... 31

Changed the equation for calculating K_{(RES_DERATE)}.............................................................................................................. 31

Changed component values inthe PWM equations of the Detailed Design Procedure ....................................................... 33

Added an application curve .................................................................................................................................................. 34

Added text in the Layout Guidelines for keeping LED ground separate from device ground .............................................. 36

3

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

5 说明（续）

源以实现灵活性 - 内部 PWM 发生器、外部 PWM 输入或电源调光。各种专为汽车应用设计的诊断和保护可帮助

提高系统稳健性和易用性。连带失效故障总线支持 TPS92830-Q1 与 TPS92630-Q1、TPS92638-Q1 和

TPS9261x-Q1 系列一同运行，以满足各种故障处理要求。

6 Pin Configuration and Functions

PW Package

28-Pin TSSOP

Top View

CP1P

CP1N

GND

1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

ISP

2

ISN1

3

G1

CP2N

CP2P

CPOUT

IN

4

SENSE1

ISN2

5

6

G2

7

SENSE2

ISN3

DIAGEN

DERATE

PWM1

PWM2

PWM3

FD

8

9

G3

10

11

12

13

14

SENSE3

PWMOUT

FAULT

PWMCHG

IREF

ICTRL

Not to scale

Pin Functions

I/O

DESCRIPTION

NAME

CP1N

NO.

2

Charge pump first-stage flying capacitor negative output, charge pump to provide gate-drive

voltage for external MOSFET. Connect a 10-nF flying capacitor between CP1P and CP1N.

O

CP1P

CP2N

1

Charge pump first-stage flying capacitor positive output

Charge pump second-stage flying capacitor negative output. Connect a 10-nF flying

capacitor between CP2P and CP2N.

4

CP2P

5

6

9

O

I

Charge pump second-stage flying capacitor positive output

CPOUT

DERATE

Charge-pump output voltage. Connect a 150-nF storage capacitor between CPOUT and IN.

Voltage input for current derating. Connect to GND to disable the derate feature.

Input pin with comparator to enable diagnostics to avoid false open-fault diagnostics when

the device works in low-dropout mode. Use a resistor divider to set a threshold according to

the LED forward voltage.

DIAGEN

8

I

Fault bus pin to support one-fails–all-fail feature. Float: one-fails–all-fail; strong pullup: only-

fails-off

FAULT

FD

17

13

I/O

I

Full duty-cycle input, HIGH: 100% PWM; LOW: using external resistor-capacitor network to

set PWM duty cycle

4

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

Pin Functions (continued)

I/O

DESCRIPTION

NAME

NO.

26

23

20

3

G1

G2

G3

O

Channel 1 gate driver output, connect to CH 1 N-channel MOSFET gate

Channel 2 gate driver output, connect to CH 2 N-channel MOSFET gate

Channel 3 gate driver output, connect to CH 3 N-channel MOSFET gate

GND

O

GND

—

Analog dimming input, modulates the regulation voltage across the current-sense resistor.

Apply a voltage source or connect a resistor between ICTRL and GND to set the analog

dimming ratio.

ICTRL

14

I

IN

7

I

Power supply for the device. LED current only flows from the external MOSFET to the LED.

Channel 1 current-sense negative input. Connect a current-sense resistor between ISP and

ISN1 to set the CH 1 current.

ISN1

27

Channel 2 current-sense negative input. Connect a current-sense resistor between ISP and

ISN2 to set the CH 2 current.

ISN2

ISN3

24

21

I

Channel 3 current-sense negative input. Connect a current-sense resistor between ISP and

ISN3 to set the CH 3 current.

IREF

15

28

10

11

12

O

I

Internal current reference. Connect an 8-kΩ resistor between IREF and GND,

Channel current-sense positive input. Kelvin-sense to LED sense-resistor positive node.

Channel 1 PWM input

ISP

PWM1

PWM2

PWM3

I

Channel 2 PWM input

I

Channel 3 PWM input

On-chip PWM generator pin for external R-C. Connect a resistor and a capacitor between

PWMCHG and GND to set the PWM duty cycle and frequency.

PWMCHG

16

I/O

PWMOUT

SENSE1

SENSE2

SENSE3

18

25

22

19

O

High-voltage PWM open-drain output. Connect a 10-kΩ resistor between IN and PWMOUT

Channel 1 diagnostics pin. Connect to the CH 1 MOSFET source terminal

Channel 2 diagnostics pin. Connect to the CH 2 MOSFET source terminal

Channel 3 diagnostics pin. Connect to the CH 3 MOSFET source terminal

I/O

5

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

7 Specifications

7.1 Absolute Maximum Ratings

over operating junction temperature range T_J= –40°C to 150°C (unless otherwise noted)⁽¹⁾

MIN

MAX

UNIT

Supply voltage

Input voltage

IN⁽²⁾

–0.3

45⁽³⁾

V

DERATE, DIAGEN, FD, ICTRL, ISN1, ISN2,

ISN3, ISP, PWM1, PWM2, PWM3, PWMOUT,

SENSE1, SENSE2, SENSE3⁽²⁾

–0.3

V_(IN)+ 0.3

V

Output voltage

CP1P, CP2P, CPOUT, G1, G2, G3⁽²⁾

–0.3

–1

V_(IN)+ 10

V

Current-sense voltage

Gate-source voltage

V_(ISP)– V_(ISNx)

1

12

V_(Gx)– V_(SENSEx)

V

FAULT⁽²⁾

CP1N, CP2N, IREF, PWMCHG⁽²⁾

–0.3

–65

-40

22

V

I/O

6

V

Storage temperature, T_stg

Junction temperature, T_J

150

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to GND.

(3) Absolute maximum voltage 45 V for 200 ms.

7.2 ESD Ratings

VALUE

UNIT

Human-body model (HBM), per AEC Q100-002⁽¹⁾

±2000

Corner pins (CP1P,

ICTRL, IREF, ISP)

V_(ESD)

Electrostatic discharge

±750

±500

V

Charged-device model (CDM), per AEC

Q100-011

Other pins

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 Recommended Operating Conditions

over operating junction temperature range T_J= –40°C to 150°C (unless otherwise noted)

MIN

4.5

0

MAX

UNIT

V

Device supply voltage

Sense voltage

IN

40

V_(IN)

1

ISP

V

PWM inputs

PWMx

DIAGEN

V_(ISP)– V_(ISNx)

FAULT

PWMOUT

ICTRL

DERATE

FD

0

V

Diagnostics enable pin

Current-sense voltage

Fault bus

0

V

0

V

0

20

V

PWM open-drain output

Analog dimming input

Current derating input

Full duty-cycle input

0

V_(IN)

V

0

V

0

V

0

V

6

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

7.4 Thermal Information

TPS92830-Q1

THERMAL METRIC⁽¹⁾

PW (TSSOP)

28 PINS

79.4

UNIT

R_θJA

Junction-to-ambient thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

20.1

37.4

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

0.5

ψ_JB

36.9

R_θJC(bot)

N/A

(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

7.5 Electrical Characteristics

V_IN= 5 V to 40 V, V_ICTRL= 3 V, V_DERATE= 0 V, T_J= –40°C to 150°C,⁽¹⁾(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

BIAS

Supply voltage POR, rising

threshold

V_{(POR_rising)}

4.5

V

I_(Quiescent)

I_(FAULT)

Device standby current

Device current in fault mode

Reference current

PWMx = HIGH, FD = HIGH

PWMx = HIGH, FAULT = LOW

R_(IREF)= 8 kΩ

3.5

0.5

99

mA

µA

nF

0.75

4.3

10

I_(IREF)

C_(IREF)

IREF loading capacitance

R_(IREF)= 8 kΩ

0

CHARGE PUMP

V_{(cp_drv)}

Charge-pump operating voltage

6.1

8.5

V

Charge-pump switching

frequency

f_{(cp_sw)}

2.65

MHz

C_{(cp_flying)}

Charge-pump flying capacitor

Charge-pump storage capacitor

10

nF

C_{(cp_storage)}

150

HIGH-PRECISION LOGIC INPUTS (DIAGEN, PWMx, FD)

V_IL(DIAGEN)

Input logic-low voltage, DIAGEN

1.105

1.193

1.145

1.224

1.185

1.255

V

Input logic-high voltage,

DIAGEN

V_IH(DIAGEN)

V_IL(PWMx)

V_IH(PWMx)

V_IL(FD)

Input logic-low voltage, PWMx

Input logic-high voltage, PWMx

Input logic-low voltage, FD

Input logic-high voltage, FD

1.094

1.176

1.105

1.186

1.128

1.212

1.133

1.216

1.161

1.248

1.161

1.246

V

V_IH(FD)

CONSTANT-CURRENT EXTERNAL N-CHANNEL MOSFET DRIVER

Current-sense-resistor

regulation voltage

V_{(CS_REG_FULL)}

V_(ICTRL)= 3 V, V_(DERATE)= 0 V

295

mV

V_(ICTRL)= 3 V, V_(DERATE)= 0 V,

channel accuracy

–1.5%

–2.5%

190

1.5%

2.5%

270

Current-sense-resistor

regulation-voltage accuracy

(2)(3)

∆V_(CS)

V_(ICTRL)= 3 V, V_(DERATE)= 0 V,

device accuracy

Gate-driver current-source

capability at Gx

I_{(DRV_source)}

230

µA

(1) External N-channel MOSFET C_iss= 200 pF, C_oss= 70 pF, at V_DS= 25 Vdc, V_GS= 0 Vdc, f = 1 MHz, V_th= 4 V, compensation capacitor

C_gs= 4 nF

3ì V _{CS _REG_ x}

(

)

DV _{CS _ Channel_ CHx}= 1-

,x = 1,2,3

(

)

V

+ V _{CS _REG_ 2}+ V _{CS _REG_ 3}

(

)

CS _REG_1

(

)

(

)

(

)

(2)

(3)

V _{CS _REG _ x}

(

DV _{CS _Device _ CHx}= 1-

⁾,x = 1,2,3

(

)

0.295

7

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

Electrical Characteristics (continued)

V_IN= 5 V to 40 V, V_ICTRL= 3 V, V_DERATE= 0 V, T_J= –40°C to 150°C,⁽¹⁾(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Gate-driver current-sink

capability at Gx

I_{(DRV_sink)}

190

230

270

–0.5

11.3

2.3

µA

Gate-source negative clamp

voltage

V_{(GS_clamp_neg)}

V_{(GS_clamp_pos)}

I_{(ISNx_leakage)}

–0.9

9.8

–0.7

10.4

1.3

V

Gate-source positive clamp

voltage

Leakage current sink on ISNx

pins

µA

INTERNAL PWM DIMMING

Internal PWM generator, rising

V_{(PWMCHG_th_rising)}

1.45

0.78

1.48

0.8

1.51

0.82

V

threshold

Internal PWM generator, falling

threshold

V_{(PWMCHG_th_falling)}

V_{(PWMCHG_th_hys)}

I_(PWMCHG)

Internal PWM generator

hysteresis

0.68

200

V

µA

V

PWM generator pullup current

V_(PWMCHG)= 0 V, FD = LOW

194

40

206

0.4

Open-drain PWMOUT pulldown V_(PWMCHG)= 3 V, I_(PWMOUT)pullup

voltage

V_OL(PWMOUT)

current = 4 mA

Open-drain PWMOUT pulldown

MOSFET r_DS(on)

r_{DS(on)(PWMOUT)}

55

90

Ω

ANALOG DIMMING

V_{(ICTRL_FULL)}

Full-range ICTRL voltage

1.65

V

Upper boundary for linear

ICTRL dimming

V_{(ICTRL_LIN_TOP)}

V_{(ICTRL_LIN_BOT)}

1.425

75

Lower boundary for linear

ICTRL dimming

mV

V_(ICTRL)= 1.35 V, V_(DERATE)= 0 V,

accuracy: 1 – (V_{(CS_REG_x)}/ 0.27), x =

1, 2, 3

∆V_{(CS_ ICTRL_H)}

∆V_{(CS_ ICTRL_M)}

∆V_{(CS_ ICTRL_L)}

Analog dimming accuracy

–2.5%

–4%

2%

4%

V_(ICTRL)= 0.75 V, V_(DERATE)= 0 V,

accuracy: 1 – (V_{(CS_REG_x)}/ 0.15), x =

1, 2, 3

V_(ICTRL)= 0.15 V, V_(DERATE)= 0 V,

accuracy: 1 –V_{(CS_REG_x)}/ 0.03, x =

1, 2, 3

Analog dimming accuracy

–18%

0.95

18%

1.02

I_{(ICTRL_pullup)}

ICTRL internal pullup current

0.985

mA

CURRENT DERATING

V_{(DERATE_FULL)}

Full-range DERATE voltage

Half-range DERATE voltage

1.83

2.38

87%

58%

V

V_{(DERATE_HALF)}

V_(DERATE)= 1.966 V

V_(DERATE)= 2.316 V

81%

51%

95%

65%

K_(DERATE)

Derate dimming ratio

DIAGNOSTICS

LED open rising threshold,

device triggers open-circuit

diagnostics V_{(SG_th_rising)}, and

V_{(SG_th_falling)}in the Electrical

Characteristics table

V_{(OPEN_th_rising)}

V_(ISNx)– V_(SENSEx), x = 1, 2, 3

100

145

280

190

mV

LED open falling threshold,

device releases from open-

circuit diagnostics

V_{(OPEN_th_falling)}

V_(ISNx)– V_(SENSEx), x = 1, 2, 3

240

8

320

12

V_{(OPEN_th_hyst)}

I_{(Retry_open)}

135

10

mV

mA

LED-open retry current

8

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

Electrical Characteristics (continued)

V_IN= 5 V to 40 V, V_ICTRL= 3 V, V_DERATE= 0 V, T_J= –40°C to 150°C,⁽¹⁾(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Channel output V_SENSExshort-

to-ground rising threshold,

device triggers short-to-ground

diagnostics

V_{(SG_th_rising)}

0.885

0.92

0.95

V

Channel output V_SENSExshort-

to-ground falling threshold,

device releases from short-to-

ground diagnostics

V_{(SG_th_falling)}

1.17

1.215

1.26

V

Channel output V_SENSExshort-

to-ground hysteresis

V_{(SG_th_hyst)}

I_{(Retry_short)}

295

1

mV

mA

Channel output V_SENSExshort-

to-ground retry current

0.75

2

1.25

0.7

FAULT

V_IL(FAULT)

V_IH(FAULT)

V_OL(FAULT)

V_OH(FAULT)

Logic-input low threshold

Logic-input high threshold

Logic-output low threshold

Logic-output high threshold

V

With 500-µA external pullup

With 1-µA external pulldown

0.4

3.4

2.7

650

6.5

FAULT internal pulldown

current

I_{(FAULT_pulldown)}

I_{(FAULT_pullup)}

750

7.6

800

9.5

µA

FAULT internal pullup current

THERMAL PROTECTION

T_(TSD)

Thermal shutdown threshold

Thermal shutdown hysteresis

176

15

ºC

T_{(TSD_HYS)}

7.6 Timing Requirements

MIN

NOM

MAX

UNIT

LED open-circuit deglitch time, described in LED open-circuit

diagnostics section

t_{(OPEN_deg)}

t_{(SG_deg)}

t_{(SG_retry_ON)}

t_{(SG_retry_OFF)}

100

125

150

µs

LED short-to-GND detection deglitch time, described in the LED short-

to-GND diagnostics section

100

Channel output SENSEx short-to-ground retry on-time, described in the

LED short-to-GND auto retry section

Channel output SENSEx short-to-ground retry off-time, described in

LED short-to-GND auto retry section

10.8

125

ms

µs

t_{OPEN_retry_ON)}Channel output SENSEx open-circuit retry on-time

100

150

t_{(OPEN_retry_OF}

F)

Channel output SENSEx open-circuit retry off-time

10.8

ms

PWM duty cycle generated internally, nominal 10% duty cycle, as

measured on output channel; see 图 1， T_(J)= 25ºC

9.8%

10%

25

10.2%

D_{(PWM_10)}

PWM duty cycle generated internally, nominal 10% duty cycle, as

measured on output channel; see 图 1， T_(J)= -40ºC to 150ºC

9.75%

10.25%

Derate current-response delay time when DERATE steps from 1.8 V to

2.4 V

t_d(DERATE)

µs

V_(IN)= 14 V, Cs = 150 nF, CPOUT voltage reaches 18 V as shown in

Device Start-Up Delay diagram

t_{(CP_STARTUP)}

25

µs

f_{(DRV_PWM)}

Recommended PWM driving-frequency range

2000

Hz

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Input On-Time

PWMx

90%

Channel

Current

I_OUTx

Output On-Time

10%

t1

10%

t6

t2

t3

t4

t5

图 1. Channel-Current Output Timing Diagram

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7.7 Typical Characteristics

T_A= 25 ºC unless otherwise noted

300

298

296

294

292

290

300

298

296

294

292

290

-40èC

25èC

125èC

-40 -25 -10

5

20 35 50 65 80 95 110 125

4

10

16

22

28

34

40

Temperature (èC)

Supply Voltage (V)

D001

D002

V_(IN)= 14 V

V_(ICTRL)= 1.8 V

图 2. Full-Range Current-Sense Voltage vs Ambient

图 3. Full-Range Current-Sense Voltage vs Supply Voltage

Temperature

0.35

0.3

5

-40èC

25èC

125èC

0.25

0.2

-40èC, I_(FAULT)

25èC, I_(FAULT)

125èC, I_(FAULT)

-40èC, I_(Quiescent)

25èC, I_(Quiescent)

0.15

0.1

1

125èC, I_(Quiescent)

0.05

0

0.4

4

10

16

22

28

34

40

0

0.2

0.4

0.6

0.8

V_(ICTRL)(V)

1

1.2

1.4

1.6

1.8

Supply Voltage (V)

D003

D001

V_(IN)= 14 V

图 5. Device Current vs Supply Voltage

图 4. Current-Sense Voltage vs ICTRL Input Voltage

100%

50%

102%

96%

90%

84%

78%

72%

66%

60%

54%

48%

30%

20%

10%

5%

3%

2%

1%

0.5%

0.3%

0.2%

1%

2% 3%

5% 7% 10%

20% 30% 50%

100%

1.7

1.8

1.9

2

2.1

2.2

2.3

2.4

2.5

Input Duty Cycle

Derate Voltage (V_(DERATE)

)

D002

D003

V_(IN)= 14 V

f_(PWM)= 200 Hz

V_(ICTRL)= 1.8 V

V_(IN)= 14 V

图 6. Duty Cycle of PWM Dimming-Current Output vs PWM

图 7. Current-Derating Profile; Output-Current Ratio vs

Input Duty Cycle

DERATE Voltage

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Typical Characteristics (接下页)

T_A= 25 ºC unless otherwise noted

Ch. 1 = PWMCHG

V_(IN)= 14 V

Ch. 2 = PWMOUT

Ch. 4 = I_(OUT1)

Ch. 1 = PWM1

Ch. 4 = I_(OUT1)

Ch. 2 = G1

V_(IN)= 14 V

Ch. 3 = SENSE1

图 9. PWM Generator

图 8. PWM Dimming

Ch. 1 = V_(IN)

Ch. 2 = G1

Ch. 3 = SENSE1

Ch. 1 = V_(IN)

Ch. 2 = G1

Ch. 3 = SENSE1

Ch. 4 = I_(OUT1)

图 10. Undervoltage

图 11. Transient Overvoltage

Ch. 1 = V_(IN)

Ch. 2 = G1

ƒ = 15 Hz

Ch. 3 = SENSE1

Ch. 1 = V_(IN)

Ch. 2 = G1

Ch. 3 = SENSE1

Ch. 4 = I_(OUT1)

图 13. Superimposed Alternating Voltage

图 12. Jump Start

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Typical Characteristics (接下页)

T_A= 25 ºC unless otherwise noted

Ch. 1 = V_(IN)

Ch. 2 = G1

Ch. 3 = SENSE1

Ch. 1 = V_(IN)

Ch. 2 = G1

Ch. 3 = SENSE1

Ch. 4 = I_(OUT1)

图 15. Slow Decrease, Quick Increase of Supply Voltage

图 14. Fast Power Down and Slow Power Up

Ch. 1 = FAULT

Ch. 2 = SENSE1

Ch. 3 = SENSE2

Ch. 1 = V_(IN)

Ch. 4 = I_(OUT1)

Ch. 2 = G1

Ch. 3 = SENSE1

Ch. 4 = SENSE3

LED open-circuit on SENSE1

图 16. Slow Decrease and Slow Increase of Supply Voltage

图 17. LED Open-Circuit Protection and One-Fails–All-Fail

Ch. 1 = V_(IN)

Ch. 2 = CP1N

Ch. 3 = CPOUT

Ch. 1 = FAULT

Ch. 4 = I_(OUT1)

Ch. 2 = SENSE1

Ch. 3 = G1

LED short-to-ground on SENSE1

图 19. Device Start-Up Delay

图 18. LED Hard Short Protection and One-Fails–All-Fail

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8 Detailed Description

8.1 Overview

The TPS92830-Q1 device is an advanced automotive-grade high-side constant-current linear LED controller for

delivering high current using external N-channel MOSFETs. The device has a full set of features for automotive

applications. Each channel of the TPS92830-Q1 device sets the channel current independently by the sense-

resistor value. An internal precision constant-current regulation loop senses the channel current by the voltage

across the sense resistor and controls the gate voltage of the N-channel MOSFET accordingly. The device also

integrates a two-stage charge pump for low-dropout operation. The charge-pump voltage is high enough to

support a wide selection of N-channel MOSFETs. PWM dimming allows multiple sources for flexibility—internal

PWM generator, external PWM inputs, or power-supply dimming. Various diagnostics and protection features

specially designed for automotive applications help improve system robustness and ease of use. A one-fails–all-

fail fault bus supports TPS92830-Q1 operation together with the TPS92630-Q1, TPS92638-Q1, and TPS9261x-

Q1 family to fulfill various fault-handling requirements.

8.2 Functional Block Diagram

SUPPLY

CP1N

CP1P CP2N

CP2P

CPOUT

TPS92830-Q1

CURRENT

REGULATION

DRIVER X3

IN

Charge Pump

ICTRL

ISP

Analog

Dimming

DERATE

R_SNSx

Current Sense

ISNx

DIAGEN

PWM1

PWM2

MNx

Gx

Gate Driver

Diagnostics

Clamp

Control

Logic

SENSEx

PWM3

IREF

PWMCHG

FD

PWM

Generator

Temperature

Sensor

PWMOUT

FAULT

FAULT Bus

Input / Output

GND

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8.3 Feature Description

The TPS92830-Q1 device uses IN voltage to generate device bias. A two-stage charge pump provides gate

driving voltage above the IN voltage for the high-side N-channel MOSFET. Each channel current is

independently set by sense resistors. The analog-dimming ICTRL input supports off-board resistors as bin-

setting resistors as well as direct voltage input. An integrated precision PWM generator could be used for PWM

dimming locally.

8.3.1 Device Bias

The TPS92830-Q1 device has internal bias-generation and power-on-reset circuits for internal bias.

8.3.1.1 Power-On-Reset (POR)

The TPS92830-Q1 device has an internal power-on-reset (POR) function. When power is applied to IN, the

internal POR holds the device in the reset condition until V_INreaches V_{(POR_rising)}

.

When the supply rises above POR threshold V_{(POR_rising)}, the charge pump starts working. The maximum gate-

drive voltage is determined by the charge-pump voltage between CPOUT and IN.

8.3.1.2 Current Reference (IREF)

The TPS92830-Q1 device has a constant reference-voltage output on the IREF pin and uses current I_(IREF)as

the internal current reference. The analog-dimming internal-pullup current on ICTRL, and the PWM-generator

internal charge current on PWMCHG, use I_(IREF)as a reference current. The recommended value of reference

resistor R_(IREF)for IREF is 8 kΩ.

8.3.1.3 Low-Current Fault Mode

The TPS92830-Q1 device consumes minimal quiescent current when it is in fault mode. If the FAULT voltage is

pulled low either by internal diagnostics or externally, the device performs as follows:

•

The charge pump is shut down.

All drivers are turned off with their gates internally pulled down.

The PWM generator and PWMOUT are turned off.

IREF current is turned off.

ICTRL current is turned off.

8.3.2 Charge Pump

8.3.2.1 Charge Pump Architecture

The TPS92830-Q1 device uses a two-stage charge pump to generate the high-side gate-drive voltage. The

charge pump is a voltage tripler using external flying and storage capacitors.

C_P1is the first-stage flying capacitor, connected between CP1P and CP1N, which are the positive and negative

nodes, respectively. C_P2is the second-stage flying capacitor, connected between CP2P and CP2N, which are

the positive and negative nodes, respectively. C_Sis the storage capacitor, connected between CPOUT and IN.

C_Sstores charge for the high-side gate driver.

The charge pump switches at frequency f_{(cp_sw)}to optimize EMI performance.

Negative nodes CP1N and CP2N are driven by a 5-V driver, thus the maximum voltage on charge-pump output

node CPOUT is approximately V_(IN)+ V_{(CP_drv)}. The charge pump voltage across storage capacitor C_Sis not

dependent on V_(IN)

.

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TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

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Feature Description (接下页)

V_IN

C_P1

C_P2

Cs

CP1N

CP1P CP2N

CP2P

CPOUT

TPS92830-Q1

IN

Charge Pump

图 20. Charge Pump

8.3.3 Constant-Current Driving

The TPS92830-Q1 device has three independent constant-current driving channels. Each channel sets channel

current with an external high-side current-sense resistor, R_SNSx. Channel current is set as V_{(CS_REG)}/ R_SNSx

.

Considering that both ICTRL and DERATE voltages reduce current-sense voltage V_{(CS_REG)}independently,

channel current can be calculated using the following equation. Each of the dimming ratios is described

separately in following sections.

V

_{(CS _REG _FULL)}´k_{(ICTRL _DIM)}´k_{(DERATE _DIM)}

I_(CHx)

=

R_SNSx

(1)

8.3.3.1 High-Side Current Sense

The sense voltage across external current-sense resistor R_SNSxfeeds back current information to the controller.

An internal feedback control loop within the TPS92830-Q1 device regulates the external gate-overdrive voltage of

the N-channel MOS transistor to keep the sense voltage at the desired level. By setting the external current-

sense resistance value, the output current can be set individually on each channel.

8.3.3.2 High-Side Current Driving

To regulate the output current, the gate-source voltage of the external MOSFET must be regulated accordingly.

The constant-current source is used to charge and discharge the N-channel MOSFET gate. During the current-

slewing period, constant-current sourcing and sinking ensures the smooth slewing of the output current. The

control loop requires sufficient MOSFET gate capacitance to ensure loop stability. In case the MOSFET gate

capacitance is insufficient, a capacitor C_GSmust be added across Gx and SENSEx. TI also recommends always

putting a C_SENSEof 10 nF from each of the SENSEx pins to GND, and close to the device for EMC.

When a channel is switched on, current source I_{(DRV_source)}charges the gate of the external N-channel MOSFET.

When a channel is switched off, current sink I_{(DRV_sink)}discharges the gate of the external MOSFET transistor

down to ground.

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Feature Description (接下页)

SUPPLY

STOP

TPS92830-Q1

IN

ISP

CPOUT

CP2P

R_SNS1

ISN1

CP2N

CP1P

MN1

G1

CP1N

FD

C_GS

IREF

SENSE1

C_SENSE

PWMCHG

PWMOUT

图 21. MOSFET Gate Capacitance Compensation

8.3.3.3 Gate Overdrive Voltage Protection

A bidirectional clamp is used to protect the gate-source path of the external N-channel MOSFETs from

overstress conditions. Gate-source voltage V_(GS)is clamped between V_{(GS_clamp_neg)}and V_{(GS_clamp_pos)}for

MOSFET protection.

8.3.3.4 High-Precision Current Regulation

The TPS92830-Q1 device has a high-precision current-regulation loop. Its precision is at the maximum when the

voltage across the current-sense resistor is set to maximum. The analog-dimming or current-derating function

reduces the current-sense voltage, thus decreasing current-regulation accuracy.

8.3.3.5 Parallel MOSFET Driving

The TPS92830-Q1 device is designed to support parallel N-channel MOSFETs driving within the same channel.

To balance heat dissipation, multiple MOSFETs could be paralleled together. A ballast resistor for each MOSFET

is recommended to balance current distribution among parallel MOSFETs.

Larger variation on threshold mismatches requires larger ballast resistors. V_{(TH_MISMATCH)}is the threshold for

mismatches within the same batch of MOSFETs. I_{(CH_MISMATCH)}is the allowed mismatch current between the

parallel channels. Typically, I_{(CH_MISMATCH)}can be set to 10% of full-range current. The ballast resistor value is set

as calculated in the following equation.

V

(TH_MISMATCH)

R_(Ballast)

=

I_{(CH_MISMATCH)}

(2)

The ballast resistor typically ranges from hundreds of milliohms to several ohms depending on the channel

current and MOSFET threshold-voltage variations.

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ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

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Feature Description (接下页)

SUPPLY

TPS92830-Q1

IN

ISP

R_SNSx

ISNx

Gx

MN1

MN2

MN3

FAULT

SENSEx

GND

图 22. Parallel MOSFET Driving

8.3.4 PWM Dimming

The TPS92830-Q1 device supports a variety of PWM dimming methods, including PWM supply dimming,

external PWM dimming by inputs, and internal PWM dimming by the internal PWM generator. Each PWM cycle

should allow enough positive cycle time for gate charging and enough negative cycle time for gate discharging in

order to achieve an accurate PWM dimming duty cycle.

8.3.4.1 Supply Dimming

In the case of supply dimming, the supply of the whole LED driver module is PWM dimmed, for example by

body-control-module (BCM) high-side switches. The TPS92830-Q1 device supports supply dimming with a short

power-on delay. Device supply V_INshould be always equal to V_(ISP)to ensure that the charge pump voltage is

high enough to turn on the MOSFET.

When supply dimming is used, it is recommended to be used together with PWM input, so that the channel is

only turned on when the input voltage is above the device UVLO threshold. By keeping enough delay time

between device power up and channel turnon, output current spikes can be avoided to ease EMC design.

8.3.4.2 PWM Dimming by Input

Each channel has individual PWM dimming by inputs.

The internal thresholds for PWM1–PWM3 are designed with high precision. With external resistor dividers, each

channel threshold can be set flexibly and independently.

8.3.4.3 Internal Precision PWM Generator

The TPS92830-Q1 device has an integrated precision PWM generator for on-chip PWM dimming as shown in .

The device supports open-drain PWMOUT for synchronization between devices. Each device can be connected

as a master, generating PWM, or as a slave, relying on external PWM sources. An external RC circuit precisely

sets the duty cycle of the PWM generator across a wide duty-cycle range. Variation of the capacitor value affects

the output frequency but not the duty cycle.

The PWM generator uses reference current 2 × I_(IREF)as the internal charge current, I_(PWMCHG)

.

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Feature Description (接下页)

When V_(PWMCHG)increases above rising threshold V_{(PWMCHG_th_rising)}, the constant-current source is turned off and

V_(PWMCHG)decays through the external resistor-capacitor circuit. The PWM output is set LOW. The PWMCHG

threshold is set to V_{(PWMCHG_th_falling)}. When V_(PWMCHG)decreases below falling threshold V_{(PWMCHG_th_falling)}, the

constant-current source is turned on again to charge up the external capacitor. The PWM output is HIGH and the

threshold is set to V_{(PWMCHG_th_rising)}

.

TAIL

STOP

TPS92830-Q1

IN

ISP

CPOUT

CP2P

R_SNS1

ISN1

CP2N

CP1P

MN1

G1

CP1N

FD

SENSE1

IREF

PWMCHG

PWMOUT

GND

图 23. PWM Generator Dual-Brightness Configuration

An external resistor R_(PWMEXT)and capacitor C_(PWMEXT)are used to set the PWM cycle time.

≈

∆

’

V _{PWMCHG _ th _ falling}-I₍_PWMCHGìR₍_PWMEXT

(

)

÷

t₍_{PWM_ ON}= R₍_PWMEXTìC₍_PWMEXT₎ìln

)

∆

«

÷

◊

V _{PWMCHG _ th _rising}-I₍_PWMCHGìR₍_PWMEXT

(

)

(3)

(4)

≈

∆

’

÷

V _{PWMCHG _ th _rising}

(

)

t₍_{PWM_ OFF}= R₍_PWMEXTìC₍_PWMEXT₎ìln

)

∆

«

÷

◊

V _{PWMCHG _ th _ falling}

(

1

f₍_PWMEXT

=

)

»

…

ÿ

Ÿ

⁄

≈

∆

’

÷

≈

’

÷

V _{PWMCHG_ th _ falling}-I₍_PWMCHGìR₍_PWMEXT

∆ V _{PWMCHG_ th _rising}-I₍_PWMCHGìR₍_PWMEXT

V _{PWMCHG_ th _rising}

(

)

(

)

∆

R₍_PWMEXTìC₍_PWMEXT₎ì ln

+ ln

)

…

÷

∆ V _{PWMCHG_ th _ falling}

÷

(

)

(

«

◊

(5)

≈

∆

’

÷

V _{PWMCHG _ th _ falling}-I₍_PWMCHGìR₍_PWMEXT

(

)

ln

∆ V _{PWMCHG _ th _rising}-I₍_PWMCHGìR₍_PWMEXT

÷

(

)

«

◊

D₍_PWMEXT

=

)

≈

∆

’

÷

≈

∆

’

÷

V _{PWMCHG _ th _ falling}-I₍_PWMCHGìR₍_PWMEXT

V₍_{PWMCHG _ th _rising}

∆ V₍_{PWMCHG _ th _ falling}

(

)

ln

+ ln

∆ V _{PWMCHG _ th _rising}-I₍_PWMCHGìR₍_PWMEXT

÷

(

)

«

◊

«

◊

(6)

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Feature Description (接下页)

PWM OFF

V_{(th_PWM_rising)}

V_{(th_PWM_falling)}

PWM ON

t

ON-time

t_{(PWM_ON)}

OFF-time

t_{(PWM_OFF)}

图 24. PWM Dimming Profile

8.3.4.4 Full Duty-Cycle Switch

The TPS92830-Q1 device can flexibly switch between the internal PWM modulation mode and the 100% duty-

cycle mode by using the FD input. Once V_(FD)is higher than threshold V_IH(FD), the internal PWM generator is

bypassed and output is merely controlled by the PWM inputs.

If FD is HIGH, the PWMCHG current source is turned off and V_(PWMCHG)decays to GND through the external

resistor-capacitor circuit. When FD falls below the threshold, V_(PWMCHG)increases from GND due to the internal

charge current.

If FD is HIGH, PWM generator oscillation stops, and PWMOUT is controlled by PWM1 only.

External PWM inputs and internal PWM inputs are combined together for channel PWM dimming, or external

PWM inputs can be used as channel enable inputs.

PWMx

FD

PWMx

FD

Channelx

PWM

PWMCHG

PWM

Generator

PWMOUT

PWM1

图 25. PWM Dimming Internal Block Diagram

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Feature Description (接下页)

表 1. Truth Table When Driving With PWM

PWMx

FD

PWMCHG

CHANNELx PWM

LOW

HIGH

X

LOW

HIGH

LOW

X

R-C

PWM generated with RC

表 2. Truth Table When Driving With PWMOUT

PWM1

FD

PWMCHG

PWMOUT

LOW

HIGH

X

HIGH

LOW

X

HIGH

R-C

PWM generated with RC

8.3.5 Analog Dimming

The TPS92830-Q1 device has a linear analog input pin, ICTRL, for output-current dimming. Voltage across the

sense resistors is linearly reduced if the ICTRL input voltage V_(ICTRL)decreases. Analog dimming can be used for

brightness control, LED bin brightness correction, and thermal protection with a thermistor. ICTRL also supports

off-board connection for LED binning and thermistor connection.

8.3.5.1 Analog Dimming Topology

Voltage at the ICTRL pin, V_(ICTRL), is used for analog dimming control. To set V_(ICTRL), either a reference input

voltage can be applied or a resistor between ICTRL and GND can be used.

When V_(ICTRL)is greater than V_{(ICTRL_FULL)}, analog dimming is not enabled; thus the analog dimming ratio is at

100%.

When V_(ICTRL)is between V_{(ICTRL_LIN_BOT)}and V_{(ICTRL_LIN_TOP)}, the analog dimming ratio is directly proportional to

V_(ICTRL). The analog dimming ratio can be calculated using the following equation. V_{(ICTRL_LIN_BOT)}and

V_{(ICTRL_LIN_TOP)}represent the ICTRL voltage boundaries of the linear region.

V _ICTRL

(

)

k₍_{ICTRL _DIM}

=

ì100%

)

1.475 V

(7)

When V_ICTRLis between V_{(ICTRL_LIN_TOP)}and V_{(ICTRL_FULL)}or between V_{(ICTRL_LIN_BOT)}and 0, analog dimming is in

a transition region, and linearity is not assured. Thus it is not recommended to use ICTRL in these regions.

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TPS92830-Q1

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k_{(DERATE_Dim)}

100%

Linear Region

Full Range Region

0%

0.075V

1.25V

1.475V V_{(ICTRL_FULL)}

V_{(ICTRL_MAX)}

V_(ICTRL)

图 26. Analog Dimming Ratio

8.3.5.2 Internal High-Precision Pullup Current Source

An internal precision pullup current I_{(ICTRL_pullup)}is provided within the device to minimize external component

count. I_{(ICTRL_pullup)}uses current reference I_(IREF)as reference. With the internal pullup current source, only an

external resistor between the ICTRL pin and GND is needed to set the ICTRL voltage and the analog dimming

ratio.

If a voltage source or resistor divider is used, the internal pullup current must be taken into account to set the

analog dimming ratio accurately.

The pullup current source pulls the ICTRL pin voltage up to input voltage V_(IN)if the ICTRL pin is unconnected.

When ICTRL is not used, it is recommended to leave the ICTRL pin floating.

I_{(ICTRL_pullup)}

ICTRL

Analog

Dimming

TPS92830-Q1

图 27. Internal High-Precision Pullup Current Source

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8.3.6 Output Current Derating

The TPS92830-Q1 device has an integrated output-current derating function. Voltage across the sensing

resistors is reduced if DERATE input voltage V_DERATEincreases. The output current derating function can be

used for supply overvoltage protection and thermal protection with a thermistor. The DERATE current curves are

divided into 32 steps between 100% and 50% with hysteresis.

In the case where DERATE is used for battery voltage sensing, the resistor-divider ratio can be set in a typical

application as follows.

•

In the normal supply-voltage range, for example, (9 V–16 V), the output-current-derating function is disabled.

In the overvoltage range, for example, (18 V–24 V), the output current starts to derate and reaches 50%

when V_INis at 24 V.

•

When the voltage is even higher, for example, (24 V–26 V), the output current is saturated at 50%.

8.3.6.1 Output-Current Derating Topology

Voltage at the DERATE pin, V_(DERATE), is used for output-current-derating control. To set the V_(DERATE)voltage, a

resistor divider on supply voltage V_INis typically used for supply overvoltage protection.

•

When V_DERATEis lower than V_{(DERATE_FULL)}, output current derating is not enabled; thus, output-current

derating ratio k_{(DERATE_Dim)}is at 100%.

When V_DERATEis higher than V_{(DERATE_HALF)}, output current derating is limited to 50%; thus, output-current

derating ratio k_{(DERATE_Dim)}is at 50%.

When V_(DERATE)is between V_{(DERATE_FULL)}and V_{(DERATE_HALF)}, the output-current-derating ratio is negatively

proportional to V_(DERATE)with 32 steps. Current derating is rounded to the next-lower step. The output-current-

derating ratio can be calculated using the following equations.

V _{DERATE _HALF}- V _{DERATE _FULL}

(

)

(

)

V _{DERATE _ STEP}

=

(

)

32

(8)

(9)

≈

∆

’

÷

V _DERATE- V _{DERATE _FULL}

50%

32

(

)

(

)

k

= 100% -

ì

DERATE _Dim

(

)

∆

«

÷

◊

V _{DERATE _ STEP}

(

)

23

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

Output Current Derating Ratio

100%

32 steps

50%

0%

V_{(DERATE_FULL)}

V_{(DERATE_HALF)}

V_(DERATE)

图 28. Output-Current Derating Profile

8.3.7 Diagnostics and Fault

The TPS92830-Q1 device provides advanced diagnostics and fault protection methods for automotive exterior

lighting systems. The device is able to detect and protect from LED output short-to-GND as well as from LED

output open-circuit scenarios. The device also supports a one-fails–all-fail fault bus that could flexibly fit different

legislative requirements.

24

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

SUPPLY

TPS92830-Q1

ISP

Rsnsx

MNx

ISNx

Gx

SENSEx

FAULT

GND

SUPPLY

TPS92830-Q1

ISP

R_SNSx

ISNx

MNx

Gx

SENSEx

FAULT

GND

图 29. LED Open and Short Scenarios

8.3.7.1 LED Short-to-GND Detection

The TPS92830-Q1 device has channel-independent LED short-to-GND detection. Short-to-GND detection is only

enabled during channel on-time. Once an LED short-to-GND failure is detected, the device turns off the faulty

channel and retries automatically. If the auto-retry mechanism detects that the LED short-to-GND fault has been

removed, the device resumes normal operation. section

The device monitors voltage V_(SENSEx)and compares it with the internal reference voltage to detect short-to-GND

failures. If the period during which V_(SENSEx)falls below V_{(SG_th_rising)}is longer than the deglitch time of t_{(SG_deg)}, the

device asserts a short-to-GND fault on this channel. During the deglitch time period, if V_SENSExrises above

V_{(SG_th_falling)}, the timer is reset.

If a fault is detected, a constant-current source pulls the fault bus down. If FAULT is low, all devices connected to

the fault bus are off in the fault mode.

25

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

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8.3.7.2 LED Short-to-GND Auto Retry

Once the channel has asserted a short-to-GND fault, it automatically retries periodically. In PWM mode, the

device sources I_{(Retry_short)}through the SENSEx pin to pull up the LED loads with a pulse duration of t_{(SG_retry_ON)}

The device waits for t_{(SG_retry_OFF)}until the next retry pulse. Once auto retry detects that the short-to-GND fault is

removed, the device resumes normal operation. During auto retry mode, the device ignores PWM inputs.

.

8.3.7.3 LED Open-Circuit Detection

The TPS92830-Q1 device has channel-independent LED open-circuit detection. Once an LED open-circuit failure

is detected, the device turns off the faulty channel and retries automatically. If the retry mechanism detects that

the LED open-circuit fault is removed, the device resumes normal operation.

The device monitors MOSFET dropout voltage differences between the ISNx and SENSEx pins. Voltage

difference V_(ISNx)– V_(SENSEx)is compared with internal reference voltage V_{(OPEN_th_rising)}to detect an LED open-

circuit failure. If V_(ISNx)– V_(SENSEx)falls below the V_{(OPEN_th_rising)}voltage and it stays there longer than the deglitch

time of t_{(OPEN_deg)}, the device asserts an open-load fault on this channel. During the deglitching time period, if

V_(ISNx)– V_(SENSEx)rises above V_{(OPEN_th_falling)}, the deglitch timer is reset.

In normal operation, the N-channel MOSFET operates in the saturation region with a gate-source voltage close

to its threshold voltage. In this case, the drain-source voltage of the N-channel MOSFET is typically much higher

than open-circuit threshold V_{(OPEN_th_rising)}. In the LED open-circuit condition, the N-channel MOSFET operates in

the linear region with a gate-source voltage much higher than its threshold voltage. The N-channel MOSFET is

fully on.

If a fault is detected, a constant-current source pulls the fault bus down. If the FAULT pin is low, all devices

connected to the fault bus are off in the fault mode.

8.3.7.4 LED Open-Circuit Auto Retry

Once the channel has asserted an open-circuit fault, it automatically retries periodically. The device sources

I_{(Retry_open)}through the SENSEx pin to pull up the LED loads with a pulse duration of t_{(OPEN_retry_ON)}. In PWM

mode, the device waits for t_{(OPEN_retry_OFF)}until the next retry pulse. Once auto retry detects that the open-circuit

fault has been removed, the device resumes normal operation. During auto retry mode, the device ignores PWM

inputs. In the open-circuit scenario, the retry current cannot find a path to ground; thus, total current consumption

does not increase.

8.3.7.5 Dropout-Mode Diagnostics

When the input voltage is not high enough to keep the external N-channel MOSFET in the constant-current

saturation region, the TPS92830-Q1 device tries to regulate current by driving the external N-channel MOSFET

in the linear region. This state is called the dropout mode, because voltage across the sense resistor is not able

to reach the regulation threshold.

In dropout mode, LED open-circuit detection must be disabled via the DIAGEN input. Otherwise, the dropout

mode would be treated as an LED open-circuit fault. The DIAGEN pin is used to avoid false diagnostics on an

output channel due to low supply voltage.

When the DIAGEN voltage is low, the LED open-circuit detection is ignored. When the DIAGEN voltage is high,

LED open-circuit detection resumes normal operation.

In dropout mode, the MOSFET is driven at maximum gate-source voltage to regulate current to the desired

value. When the supply voltage increases, the MOSFET gate voltage is pulled down internally by a control loop.

If the supply-voltage slew rate is fast, a high-current pulse can be observed on the LED for a short period of time.

At the same time, the current-sense voltage may exceed the normal operating range and damage internal

circuitry. A parallel diode or a current-limiting resistor less than 1 kΩ is recommended to clamp the voltage

across the sensing resistor in the case of a large pulse current.

26

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

SUPPLY

TPS92830-Q1

R_SNSx

ISP

ISNx

Gx

SENSEx

FAULT

GND

图 30. Resistor and Diode for Sense-Resistor Protection

8.3.7.6 Overtemperature Protection

The TPS92830-Q1 device monitors device junction temperature. When the junction temperature reaches the

thermal shutdown threshold T_(TSD), all outputs shut down and the charge pump also stops working. Once the

junction temperature falls below T_(TSD)

– T_{(TSD_HYS)}, the device resumes normal operation. During

overtemperature protection, the FAULT bus is pulled low.

8.3.7.7 FAULT Bus Output With One-Fails–All-Fail

The TPS92830-Q1 device has a FAULT bus for diagnostics output. It also supports a one-fails–all-fail function

with other TPS92830-Q1, TPS9261x-Q1, TPS92630-Q1, or TPS92638-Q1 devices.

In normal operation, FAULT is weakly pulled up by internal pullup current source I_{(FAULT_pullup)}to a voltage higher

than V_OH(FAULT). If any fault scenario occurs, the FAULT bus is strongly pulled low by internal pulldown current

source I_{(FAULT_pulldown)}. Once V_(FAULT)falls below V_IL(FAULT), all outputs are shut down for protection. The faulty

channel keeps retrying until the fault condition is removed. The charge pump is shut down, and current

consumption is also reduced to I_(FAULT)to save quiescent current.

If FAULT is externally pulled up with a current higher than I_{(FAULT_pulldown)}, the one-fails–all-fail function is disabled

̅

and only the faulty channel is turned off. The charge pump remains operating normally, and the device is in

normal operation mode. The FAULT bus is able to support up to 15 pieces of TPS92830-Q1, TPS92630-Q1,

TPS92638-Q1, or TPS9261x-Q1 devices.

27

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

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8.3.7.8 Fault Table

表 3. Fault Table With DIAGEN = HIGH

FAULT

HANDLING

ROUTINE

DETECTION

MECHANISM

CHANNEL

STATE

FAULT

RECOVERY

FAULT TYPE

DEGLITCH TIME

FAULT BUS

FAULT FLOATING

All channels

V_ISNx– V_SENSEx

V_{(OPEN_th_rising)}

<

turned off. Pulsed

pullup retry of

faulty channel.

LED open-circuit

On

t_{(OPEN_deg)}

All channels

LED short-to-

GND

turned off. Pulsed

pullup retry of

faulty channel.

V_SENSEx< V_{(SG_th_rising)}

t_{(SG_deg)}

Constant-current

pulldown

Auto recover

All channels

turned off. Faulty

channel pulsed

pullup retry of

faulty channel.

LED short-to-

battery

V_ISNx– V_SENSEx

V_{(OPEN_th_rising)}

<

On or off

t_{(OPEN_deg)}

All channels

turned off.

Overtemperature

T_J> T_(TSD)

FAULT EXTERNALLY PULLED UP

Only faulty

channel turned

off. Pulsed pullup

retry of faulty

channel.

V_ISNx– V _SENSEx

LED open-circuit

<

On

t_{(OPEN_deg)}

V_{(OPEN_th_rising)}

Only faulty

channel turned

off. Pulsed pullup

retry of faulty

channel.

LED short-to-

Externally pulled

up with internal

constant-current

pulldown

V _SENSEx< V_{(SG_th_rising)}

t_{(SG_deg)}

GND

Auto recover

Only faulty

channel turned

off. Pulsed pullup

retry of faulty

channel.

LED short-to-

battery

V _ISNx– V_(SENSEx)

V_{(OPEN_th_rising)}

<

On or off

t_{(OPEN_deg)}

All channels

turned off.

Overtemperature

T_J> T_(TSD)

FAULT EXTERNALLY PULLED DOWN

All outputs disabled

28

TPS92830-Q1

www.ti.com.cn

FAULT TYPE

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

表 4. Fault Table With DIAGEN = LOW

FAULT

HANDLING

ROUTINE

DETECTION

MECHANISM

CHANNEL

STATE

FAULT

RECOVERY

DEGLITCH TIME

FAULT BUS

FAULT FLOATING

LED open-circuit

Ignored

On

Ignored

t_{(SG_deg)}

Ignored

All channels

LED short-to-

GND

Constant current turned off. Pulsed

pull down

V_(SENSEx)< V_{(SG_th_rising)}

Auto recover

pullup retry of

faulty channel.

LED short-to-

battery

Ignored

Constant current All channels

pull down turned off.

Overtemperature

T_J> T_(TSD)

On or off

Auto recover

FAULT EXTERNALLY PULLED UP

LED open-circuit

Ignored

On

Ignored

t_{(SG_deg)}

Ignored

Only faulty

channel turned

off. Pulsed pullup Auto recover

retry of faulty

channel.

Externally pulled

up with internal

constant current

pulled down

LED short-to-

GND

V_(SENSEx)< V_{(SG_th_rising)}

LED short-to-

battery

Ignored

Externally pulled

up with internal

constant current

pulled down

All channels

turned off.

Overtemperature

T_J> T_(TSD)

On or off

Auto recover

FAULT EXTERNALLY PULLED LOW

All outputs

disabled

All outputs

disabled

All outputs

disabled

All outputs

disabled

All outputs

disabled

All outputs disabled

disabled

8.4 Device Functional Modes

8.4.1 Undervoltage Lockout, V_(IN)< V_(UVLO)

When the device is in undervoltage lockout mode, the TPS92830-Q1 device disables all functions until the supply

rises above the UVLO-rising threshold. The device pulls down the Gx outputs. Other outputs are in the high-

impedance state.

8.4.2 Normal Operation (V_(IN)≥ 4.5 V, V_(IN)> V_(LED)+ 0.5 V)

The device drives an LED string in normal operation. A 0.5-V minimal dropout voltage is typically more than

enough to maintain LED current regulation.

8.4.3 Low-Voltage Dropout

When the device drives an LED string in low-dropout mode, even with the MOSFETs fully turned on the output

current may not reach target value. The device reports an LED open-circuit failure if DIAGEN is HIGH.

8.4.4 Fault Mode (Fault Is Detected)

When the device detects an open or shorted LED, the device tries to pull down the FAULT pin with a constant

current. If the fault bus is pulled down, the device switches to fault mode and consumes a fault current of I_(FAULT)

.

29

TPS92830-Q1

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www.ti.com.cn

9 Application and Implementation

注

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

In automotive applications, linear LED drivers are preferable for various applications, especially exterior lighting,

for their simplicity and electromagnetic compatibility. This section provides a few examples to show the design

process for different features.

9.2 Typical Applications

9.2.1 Typical Application for Automotive Exterior Lighting With One-Fails–All-Fail

Various functions of exterior lighting may use the following circuit. Here is a typical application circuit for a turn

indicator. A TPS92830-Q1 drives a total of nine LEDs with 3s3p configuration at 300 mA each.

图 31. TPS92830-Q1 Typical Application Circuit For Automotive Exterior Lighting

9.2.1.1 Design Requirements

With the wide range of battery voltages in modern automotive systems, it is a common requirement among car

OEMs to turn LEDs off when the battery voltage is below the minimal voltage threshold, for example, 6 V.

When the battery voltage is between 6 V and 9 V, LEDs may not achieve full brightness due to low input voltage.

Although a linear LED driver may drive in low-dropout mode, it is required not to treat the low-dropout mode as

an open-circuit fault and to report a false error.

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ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

Typical Applications (接下页)

When battery voltage ranges between 9 V and 16 V, the LED driver works in normal mode with the one-fails–all-

fail feature. If any LED strings fail with an open circuit or short circuit, the TPS92830-Q1 device pulls down the

fault bus. All devices connected to the same fault bus turn off their outputs.

When the battery voltage is above 18 V, the TPS92830-Q1 device is able to detect the overvoltage and derate

the output current to reduce the power dissipation of the MOSFETs and prevent thermal damage.

9.2.1.2 Detailed Design Procedure

Fixed Parameters

•

Charge pump flying capacitor C6 = 10 nF

Charge pump flying capacitor C8 = 10 nF

R_(IREF)= 8 kΩ

Charge pump storage capacitor C10 = 150 nF

Current Setting

•

I_(LED)= 300 mA

R_(SNS)= V_{(CS_REG)}/ I_(LED)= 0.983 Ω

PWM Threshold Setting

•

PWM enables when V_(IN)> 6 V

K_{(RES_PWM)}= V_{IH(PWMx, max)}/ 6 V

K_{(RES_PWM)}= R15 / (R15 + R8)

Set R15 = 20 kΩ, R8 = 76 kΩ

DiagEN Setting (Enables LED-Open Detection When V_(IN)> 9 V

•

K_{(RES_DiagEN)}= V_{IH(DIAGEN, max)}/ 9 V

K_{(RES_DiagEn)}= R13 / (R6 + R13)

Set R13 = 10 kΩ, R6 = 62 kΩDiagEN setting

DERATE Setting (Reduces Current Output When V_(IN)> 18 V

•

K_{(RES_DERATE)}= V_{(DERATE_FULL, min)}/ 18 V

K_{(RES_DERATE)}= R7 / (R7+ R14)

Set R7 = 10 kΩ, R14 = 95 kΩ

To deliver 300 mA with a single MOSFET package, the designer must consider the maximum thermal-dissipation

condition. The power dissipation of a MOSFET is usually at its peak when input voltage is at 16 V in a full-

brightness condition. Assume the minimal LED forward voltage at 300 mA is 6 V.

P_MOSFET= I _LEDì V - V_{F Diode}- V_{F LED,min}- V _{CS _REG}= 300mA ì(16 - 0.7 - 6 - 0.295) = 2.702W

)

(

IN

(

)

(

)

(

)

(

)

(

)

(

)

(10)

MOSFET package and layout design must be considered to dissipate 2.702 W at maximum ambient

temperature, usually 85°C.

The TPS92830 device can support a variety of N-channel MOSFETs in the markets. Adding a capacitor between

the gate and source increases the loop phase margin. The recommended total capacitance at Gx is greater than

4 nF.

31

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

Typical Applications (接下页)

9.2.1.3 Application Curves

Ch. 1 = V_(IN)

Ch .2 = V_(FAULT)

Ch. 3 = V_(SENSE2)

Ch. 4 = I_(OUT2)

IN HIGH = 14 V, LOW = 0 V, with reverse

blocking diode

Pulse duration = 300 µs, period = 2 ms

图 32. BCM PWM Dimming Curve

9.2.2 High-Precision Dual-Brightness PWM Generation

9.2.2.1 Dual-Brightness Application

Automotive lighting often reuses the same LEDs for different functions with different brightness, for example,

daytime running lights (DRL) and position lights, or stop and tail lights. Analog dimming by changing the constant

current may affect LED color temperature. PWM dimming could easily achieve the dimming ratio with the same

color temperature.

The TPS92830-Q1 device provides a precision PWM generator with a synchronization PWMOUT output. Its

integrated high-precision PWM generator ensures homogeneity across different devices.

32

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

Typical Applications (接下页)

SUPPLY

TPS92830-Q1

IN

ISP

CPOUT

CP2P

CPOUT

CP2P

R_SNS1

ISN1

CP2N

CP1P

CP2N

CP1P

MN1

G1

CP1N

FD

CP1N

FD

SENSE1

FD

PWM

PWM1

PWMOUT

IREF

PWMx

IREF

PWMCHG

FAULT

PWMCHG

FAULT

R_PWM

C_PWM

图 33. PWM Generator Master-Slave Configuration

9.2.2.2 Design Requirements

When full duty-cycle (FD) is HIGH, the output is at 100% duty cycle.

When full duty-cycle (FD) is LOW, the output is at 10% duty cycle and 250 Hz.

9.2.2.3 Detailed Design Procedure

PWM Equations

•

R_PU= 10 kΩ

C_PWM= 105.5 nF

R_PWM= 55.5 kΩ

33

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

Typical Applications (接下页)

9.2.2.4 Application Curve

Ch. 1 = V_(PWMCHG)

Ch. 4 = I_{(OUT2_1)}

Ch. 2 = V_(PWMOUT)

Ch. 3 = I_{(OUT1_1)}

Ch. 1 = V_(PWMCHG)

Ch. 4 = I_{(OUT2_1)}

Ch. 2 = V_(PWMOUT)

Ch. 3 = I_{(OUT1_1)}

图 34. Dual Brightness With Integrated High-Precision

图 35. Dual Brightness With Integrated High-Precision

PWM Generator at Full Duty-cycle

PWM Generator at 10% Duty-cycle

9.2.3 Driving High-Current LEDs With Parallel MOSFETs

Thermal performance is one key consideration in automotive exterior driving, especially for a linear LED driver.

Due to large variations of automotive battery voltage, a linear LED driver must accommodate thermal dissipation

with a worst-case scenario, which is high ambient temperature and high battery voltage.

LED driver thermal dissipation performance merely depends on the package and PCB thermal dissipation area.

However, if the thermal dissipation performance of a single MOSFET is not able to support the required LED

string current, multiple MOSFETs in parallel are able to dissipate heat for high-current applications.

When a MOSFET is in the saturation region as a current-control device, its current output strongly depends on its

threshold. MOSFET threshold V_thcan vary from one device to another. When MOSFETs are in parallel, even a

small threshold mismatch could lead to imbalance of current distribution.

With an integrated charge pump, the TPS92830-Q1 device provides sufficient headroom even when the supply

voltage is as low as 5 V. Thus adding ballast resistors between the N-channel MOSFET source and the LED

string introduces negative feedback for each parallel MOSFET path to balance the current flows.

表 5. Thermal Measurement of Parallel MOSFETs

WITHOUT CURRENT BALLAST

WITH 1-Ω BALLAST RESISTOR

WITH 3-Ω BALLAST RESISTOR

Resistor

MOSFET1

Temperature (ºC)

105.7

85.3

82.8

87.6

85.9

84.2

85.3

MOSFET2

Temperature (ºC)

76.1

84.8

MOSFET3

Temperature (ºC)

34

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

V_(IN)= 16 V, I_(Total)= 964 mA, T_A= 25 ºC.

SUPPLY

TPS92830-Q1

IN

ISP

R_SNSx

ISNx

Gx

MN1

MN2

MN3

FAULT

SENSEx

GND

图 36. Parallel MOSFET Driving

9.2.3.1 Application Curves

Without Ballast Resistors

With 1-W Ballast Resistors

With 3-W Ballast Resistors

图 37. Thermal Images of Parallel MOSFETs With Various Ballast Resistors

35

TPS92830-Q1

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

www.ti.com.cn

10 Layout

10.1 Layout Guidelines

The TPS92830-Q1 device relies on external MOSFETs to dissipate heat for high-current applications. To

effectively dissipate heat on MOSFETs and LEDs, TI recommends to use 0.071-mm-thick (2-oz.) copper PCBs

or metal-based boards. Make the thermal dissipation area with copper as large as possible. Place thermal vias

on the thermal dissipation area to further improve the thermal dissipation capability. The current path starts from

IN through the sense-resistors, MOSFETs, and LEDs to GND. Wide traces are helpful to reduce parasitic

resistance along the current path as shown in the layout example below.

Place capacitors, especially charge pump capacitors, close to the device to make the current path as short as

possible. TI suggests keeping the LED high-current ground path separate from device ground. TI also

recommends kelvin-connection to the connector. The following layout example shows the recommended

guidelines.

10.2 Layout Example

IN

TPS92830-Q1

1

2

28

27

26

25

24

23

22

21

20

19

18

17

16

15

CP1P

CP1N

GND

ISP

ISN1

G1

GND

3

4

CP2N

CP2P

CPOUT

IN

SENSE1

ISN2

5

6

G2

SENSE2

ISN3

7

DIAGEN

8

DIAGEN

DERATE

PWM1

9

G3

10

11

12

13

14

SENSE3

PWM1

PWM2

PWM3

FD

PWM2

PWM3

FD

PWMOUT

FAULT

PWMCHG

IREF

ICTRL

图 38. TPS92830-Q1 Example Layout Diagram

36

TPS92830-Q1

www.ti.com.cn

ZHCSGY7B –OCTOBER 2017–REVISED JANUARY 2018

11 器件和文档支持

11.1 接收文档更新通知

要接收文档更新通知，请导航至TI.com 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品信

息更改摘要。

11.2 社区资源

下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，

并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。

TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在

e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。

设计支持

TI 参考设计支持可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。

11.3 商标

E2E is a trademark of Texas Instruments.

11.4 静电放电警告

这些装置包含有限的内置 ESD 保护。存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损

伤。

11.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 机械、封装和可订购信息

以下页面包含机械、封装和可订购信息。这些信息是针对指定器件提供的最新数据。本数据随时可能发生变更并且

不对本文档进行修订，恕不另行通知。要获得这份数据表的浏览器版本，请查阅左侧的导航窗格。

37

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jul-2019

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS92830QPWRQ1

TSSOP

PW

28

2000

330.0

16.4

6.9

10.2

1.8

12.0

16.0

Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jul-2019

*All dimensions are nominal

Device

Package Type Package Drawing Pins

TSSOP PW 28

SPQ

Length (mm) Width (mm) Height (mm)

350.0 350.0 43.0

TPS92830QPWRQ1

2000

Pack Materials-Page 2

重要声明和免责声明

TI 均以“原样”提供技术性及可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资

源，不保证其中不含任何瑕疵，且不做任何明示或暗示的担保，包括但不限于对适销性、适合某特定用途或不侵犯任何第三方知识产权的暗示

担保。

所述资源可供专业开发人员应用TI 产品进行设计使用。您将对以下行为独自承担全部责任：(1) 针对您的应用选择合适的TI 产品；(2) 设计、

验证并测试您的应用；(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。所述资源如有变更，恕不另行通知。TI 对您使用

所述资源的授权仅限于开发资源所涉及TI 产品的相关应用。除此之外不得复制或展示所述资源，也不提供其它TI或任何第三方的知识产权授权

许可。如因使用所述资源而产生任何索赔、赔偿、成本、损失及债务等，TI对此概不负责，并且您须赔偿由此对TI 及其代表造成的损害。

TI 所提供产品均受TI 的销售条款 (http://www.ti.com.cn/zh-cn/legal/termsofsale.html) 以及ti.com.cn上或随附TI产品提供的其他可适用条款的约

束。TI提供所述资源并不扩展或以其他方式更改TI 针对TI 产品所发布的可适用的担保范围或担保免责声明。IMPORTANT NOTICE

邮寄地址：上海市浦东新区世纪大道 1568 号中建大厦 32 楼，邮政编码：200122


型号：	TPS92830QPWRQ1
厂家：	TEXAS INSTRUMENTS
描述：	汽车类 3 通道高侧、高功率、恒流线性 LED 控制器 \| PW \| 28 \| -40 to 125 驱动控制器光电二极管接口集成电路
文件：	总43页 (文件大小：2568K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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