TS5A6542_14 [TI]
0.75-Ω SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION;
| 型号： | TS5A6542_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 0.75-Ω SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION 输入元件 光电二极管 |
| 文件： | 总22页 (文件大小：409K) |
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TS5A6542
www.ti.com
SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
0.75-Ω SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION
Check for Samples: TS5A6542
1
FEATURES
•
•
•
•
•
•
•
•
•
Specified Break-Before-Make Switching
•
COM Port to GND
Low ON-State Resistance (0.75 Ω Max)
Control Inputs Referenced to VIO
Low Charge Injection
–
8000-V Human-Body Model
(A114-B, Class II)
–
±15-kV Contact Discharge (IEC 61000-4-2)
Excellent ON-State Resistance Matching
Low Total Harmonic Distortion (THD)
2.25-V to 5.5-V Power Supply (V+)
1.65-V to 1.95-V Logic Supply (VIO)
APPLICATIONS
•
•
•
Cell Phones
PDAs
Portable Instrumentation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
YZP PACKAGE
(BOTTOM VIEW)
•
ESD Performance Tested Per JESD 22
D1
C1
D2
C2
4
3
2
1
5
V
IO
V
+
–
4000-V Human-Body Model
(A114-B, Class II)
6
NC
GND
NO
IN
B1
A1
B2
A2
7
8
COM
GND
–
–
1000-V Charged-Device Model (C101)
400-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
The TS5A6542 is a single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to
5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance
matching, and the break-before-make feature to prevent signal distorion during the transferring of a signal from
one path to another. The device has excellent total harmonic distortion (THD) performance and consumes very
low power. These features make this device suitable for portable audio applications.
The TS5A6542 has a separate logic supply pin (VIO) that is characterized to operate from 1.65 V to 1.95 V. VIO
powers the control circuitry, which allows the TS5A6542 to be controlled by 1.8-V signals.
Table 1. ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
_ _ _ JH7
NanoFree™ – WCSP (DSBGA)
–40°C to 85°C 0.23-mm Large Bump – YZP
(Pb-free)
Tape and reel TS5A6542YZPR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TS5A6542
SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
www.ti.com
SUMMARY OF CHARACTERISTICS(1)
2:1 Multiplexer/Demultiplexer
(1 × SPDT)
Configuration
Number of channels
1
ON-state resistance (ron
)
0.75 Ω max
0.1 Ω max
0.1 Ω max
25 ns/20 ns
15 pC
ON-state resistance match (Δron
)
ON-state resistance flatness (ron(flat)
)
Turn-on/turn-off time (tON/tOFF
Charge injection (QC)
Bandwidth (BW)
)
43 MHz
OFF isolation (OISO
Crosstalk (XTALK
)
–63 dB at 1 MHz
–63 dB at 1 MHz
0.004%
)
Total harmonic distortion (THD)
Leakage current (INO(OFF)/INC(OFF)
Package option
)
20 nA
8-pin WCSP
(1) V+ = 5 V, TA = 25°C
FUNCTION TABLE
NC TO COM, NO TO COM,
COM TO NC COM TO NO
IN
L
ON
OFF
ON
H
OFF
2
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TS5A6542
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
ABSOLUTE MAXIMUM RATINGS(1) (2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V+
VIO
Supply voltage range(3)
–0.5
6.5
V
VNC
VNO
Analog voltage range(3) (4) (5)
–0.5
V+ + 0.5
V
VCOM
II/OK
Analog port diode current(6)
On-state switch current
VNO, VCOM < 0 or VNO, VCOM > V+
VNO, VCOM = 0 to V+
–50
50
mA
mA
INC
INO
ICOM
–450
450
On-state peak switch current(7)
–700
700
6.5
VI
Digital input voltage range(3) (4)
Digital input clamp current
–0.5
–50
V
IIK
VI < 0
mA
I+
IGND
Continuous current through V+ or GND
Storage temperature range
–100
–65
100
150
mA
°C
Tstg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 5.5 V maximum.
(6) Requires clamp diodes on analog port to V+
(7) Pulse at 1-ms duration < 10% duty cycle
THERMAL IMPEDANCE RATINGS
UNIT
θJA
Package thermal impedance(1)
YZP package
102
°C/W
(1) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2006–2009, Texas Instruments Incorporated
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TS5A6542
SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
www.ti.com
ELECTRICAL CHARACTERISTICS FOR 5-V SUPPLY(1)
V+ = 4.5 V to 5.5 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
Analog Switch
SYMBOL
TEST CONDITIONS
TA
V+
MIN TYP MAX
UNIT
VCOM
VNO
,
Analog signal range
ON-state resistance
0
V+
V
25°C
Full
0.5 0.75
0.8
VNO or VNC = 2.5 V, Switch ON,
ron
4.5 V
4.5 V
Ω
ICOM = –100 mA,
See Figure 14
ON-state resistance
match between
channels
25°C
0.05
0.1
0.1
VNO or VNC = 2.5 V, Switch ON,
Δron
Ω
Ω
ICOM = –100 mA,
See Figure 14
Full
0 ≤ (VNO or VNC) ≤
V+,
ICOM = –100 mA,
Switch ON,
See Figure 14
25°C
0.1
ON-state resistance
flatness
ron(flat)
4.5 V
5.5 V
VNO or VNC = 1 V,
1.5 V, 2.5 V,
ICOM = –100 mA,
25°C
Full
0.1 0.25
0.25
Switch ON,
See Figure 14
VNO = 1 V, 4.5 V,
VCOM = 4.5 V, 1 V,
VNC = Open,
25°C
–20
2
20
NO, NC
OFF leakage current
INO(OFF), INC
Switch OFF,
See Figure 15
or
nA
(OFF)
Full
–100
100
VNC = 1 V, 4.5 V,
VCOM = 4.5 V, 1 V,
VNO = Open,
VNO = 1 V, 4.5 V,
VCOM, VNC = Open,
or
VNC = 1 V, 4.5 V,
VCOM, VNO = Open,
25°C
Full
–20
–200
–20
2
2
20
200
20
NC, NO
ON leakage current
Switch ON,
See Figure 16
INO(ON)
5.5 V
5.5 V
nA
nA
VCOM = 1 V, 4.5 V,
25°C
VNO and VNC
Open,
=
COM
ON leakage current
ICOM(ON)
See Figure 16
or
Full
–200
200
VIO
VCOM = 1 V, 4.5 V,
VNO or VNC = Open,
Digital Control Input (IN)(2)
0.65
× VIO
Input logic high
VIH
VIL
VIO = 1.65 V to 1.95 V
VIO = 1.65 V to 1.95 V
Full
Full
V
V
0.35
× VIO
Input logic low
0
25°C
Full
–2
2
Input leakage current
IIH, IIL
VI = VIO or 0
5.5 V
nA
–20
20
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at VIO or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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Product Folder Link(s): TS5A6542
TS5A6542
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS FOR 5-V SUPPLY (1) (continued)
V+ = 4.5 V to 5.5 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
Dynamic
SYMBOL
TEST CONDITIONS
TA
V+
MIN TYP MAX
UNIT
25°C
Full
5 V
4.5 V
5 V
1
1
12.5
9.5
5
25
30
20
25
10
12
VCOM = V+,
RL = 50 Ω,
CL= 35 pF,
See Figure 18
Turn-on time
Turn-off time
tON
tOFF
tBBM
ns
ns
ns
25°C
Full
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 18
4.5 V
5 V
25°C
Full
1
1
Break-before-make
time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
See Figure 19
4.5 V
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 23
Charge injection
QC
25°C
25°C
5 V
5 V
15
37
pC
pF
NO
VNO = V+ or GND,
Switch OFF,
CNO(OFF)
See Figure 17
See Figure 17
OFF capacitance
VNC or VNO = V+ or
GND,
Switch ON,
NC, NO
ON capacitance
CNC(ON),
25°C
5 V
130
pF
CNO(ON)
CCOM(ON)
CI
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 17
See Figure 17
See Figure 20
See Figure 21
See Figure 22
25°C
25°C
25°C
25°C
25°C
25°C
5 V
5 V
5 V
5 V
5 V
5 V
130
6.5
43
pF
pF
Digital input
capacitance
VI = VIO or GND,
RL = 50 Ω,
Switch ON,
Bandwidth
OFF isolation
Crosstalk
BW
MHz
dB
RL = 50 Ω,
f = 1 MHz,
OISO
–63
–63
RL = 50 Ω,
f = 1 MHz,
XTALK
THD
dB
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 24
0.00
4
%
Supply
25°C
Full
5.5 100
750
Positive supply
current
I+
VI = VIO or GND
5.5 V
nA
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
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ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY(1)
V+ = 3 V to 3.6 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
Analog Switch
SYMBOL
TEST CONDITIONS
TA
V+
MIN TYP MAX
UNIT
VCOM
VNO
,
Analog signal range
ON-state resistance
0
V+
V
25°C
Full
0.75
0.9
1.2
VNO or VNC = 2 V,
ICOM = –100 mA,
Switch ON,
See Figure 14
ron
3 V
3 V
Ω
ON-state resistance
match between
channels
25°C
0.1 0.15
0.15
VNO or VNC = 2 V, 0.8 V, Switch ON,
ICOM = –100 mA,
Δron
Ω
Ω
See Figure 14
Full
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –100 mA,
Switch ON,
See Figure 14
25°C
0.2
ON-state resistance
flatness
ron(flat)
3 V
25°C
Full
0.1
2
0.3
0.3
20
VNO or VNC = 0.8 V, 2 V, Switch ON,
ICOM = –100 mA,
See Figure 14
VNO = 1 V, 3 V,
VCOM = 3 V, 1 V,
VNC = Open,
or
VNC = 1 V, 3 V,
VCOM = 3 V, 1 V,
VNO = Open,
25°C
–20
–50
NO, NC
OFF leakage current
INO(OFF), INC
Switch OFF,
See Figure 15
3.6 V
nA
(OFF)
Full
50
VNO = 1 V, 3 V,
VNC and VCOM = Open,
or
VNC = 1 V, 3 V,
VNO and VCOM = Open,
25°C
Full
–10
–30
–10
–30
2
2
10
30
10
30
NC, NO
ON leakage current
Switch ON,
See Figure 16
INO(ON)
3.6 V
3.6 V
nA
nA
VCOM = 1 V,
VNO and VNC = Open,
or
25°C
Full
COM
ON leakage current
ICOM(ON)
See Figure 16
VCOM = 3 V,
VNO and VNC = Open,
Digital Control Input (IN)(2)
0.65
× VIO
Input logic high
VIH
VIL
VIO = 1.65 V to 1.95 V
VIO = 1.65 V to 1.95 V
Full
Full
VIO
V
V
0.35
× VIO
Input logic low
0
25°C
Full
–2
2
Input leakage current
IIH, IIL
VI = VIO or 0
3.6 V
nA
–20
20
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at VIO or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6
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Product Folder Link(s): TS5A6542
TS5A6542
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY (1) (continued)
V+ = 3 V to 3.6 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
Dynamic
SYMBOL
TEST CONDITIONS
TA
V+
MIN TYP MAX
UNIT
25°C
Full
3.3 V
3 V
5
3
1
1
1
1
15
9
30
35
20
25
13
15
VCOM = V+,
RL = 50 Ω,
CL= 35 pF,
See Figure 18
Turn-on time
Turn-off time
tON
tOFF
tBBM
ns
ns
ns
25°C
Full
3.3 V
3 V
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 18
25°C
Full
3.3 V
3 V
8
Break-before-make
time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
See Figure 19
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 23
Charge injection
QC
25°C
25°C
3.3V
6.5
38
pC
pF
NO
VNO = V+ or GND,
Switch OFF,
CNO(OFF)
See Figure 17
See Figure 17
3.3 V
OFF capacitance
VNC or VNO = V+ or
GND,
Switch ON,
NC, NO
ON capacitance
CNC(ON),
25°C
3.3 V
133
pF
CNO(ON)
CCOM(ON)
CI
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 17
See Figure 17
See Figure 20
See Figure 21
See Figure 22
25°C
25°C
25°C
25°C
25°C
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
133
6.5
42
pF
pF
Digital input
capacitance
VI = VIO or GND,
RL = 50 Ω,
Switch ON,
Bandwidth
OFF isolation
Crosstalk
BW
MHz
dB
RL = 50 Ω,
f = 1 MHz,
OISO
–63
–63
RL = 50 Ω,
f = 1 MHz,
XTALK
dB
f = 20 Hz to 20
kHz,
See Figure 24
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
0.00
4
THD
25°C
3.3 V
3.6 V
%
Supply
25°C
Full
10
50
Positive supply
current
I+
VI = VIO or GND
nA
300
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ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY(1)
V+ = 2.25 V to 2.75 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
Analog Switch
SYMBOL
TEST CONDITIONS
TA
V+
MIN TYP MAX
UNIT
VCOM
VNO
,
Analog signal range
ON-state resistance
0
V+
V
25°C
Full
1
1.3
1.6
0.2
VNO or VNC = 1.8 V,
ICOM = –100 mA,
Switch ON,
See Figure 14
ron
2.25 V
2.25 V
Ω
ON-state resistance
match between
channels
VNO or VNC = 1.8 V,
0.8 V,
ICOM = –100 mA,
25°C
0.15
Switch ON,
See Figure 14
Δron
Ω
Ω
Full
0.2
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –100 mA,
Switch ON,
See Figure 14
25°C
0.5
ON-state resistance
flatness
ron(flat)
2.25 V
2.75 V
VNO or VNC = 0.8 V, 1 V,
1.8 V,
ICOM = –100 mA,
25°C
Full
0.25
0.5
0.6
20
Switch ON,
See Figure 14
VNO = 0.5 V, 2.2 V,
VCOM = 2.2 V, 0.5 V,
VNC = Open,
25°C
–20
–50
2
NO, NC
OFF leakage current
INO(OFF), INC
Switch OFF,
See Figure 15
or
nA
(OFF)
Full
50
VNC = 0.5 V, 2.2 V,
VCOM = 2.2 V, 0.5 V,
VNO = Open,
VNO = 0.5 V, 2.2 V,
VNC and VCOM = Open,
or
VNC = 2.2 V, 0.5 V,
VNO and VCOM = Open,
25°C
Full
–10
–20
–10
–20
2
2
10
20
10
20
NC, NO
ON leakage current
Switch ON,
See Figure 16
INO(ON)
2.75 V
2.75 V
nA
nA
VCOM = 0.5 V,
VNO and VNC = Open,
or
VCOM = 2.2 V,
VNO and VNC = Open,
25°C
Full
COM
ON leakage current
Switch ON,
See Figure 16
ICOM(ON)
Digital Control Input (IN)(2)
0.65
× VIO
Input logic high
VIH
VIL
VIO = 1.65 V to 1.95 V
VIO = 1.65 V to 1.95 V
Full
Full
VIO
V
V
0.35
× VIO
Input logic low
0
25°C
Full
–2
2
Input leakage current
IIH, IIL
VI = VIO or 0
2.75 V
nA
–20
20
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at VIO or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
8
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Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): TS5A6542
TS5A6542
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY (1) (continued)
V+ = 2.25 V to 2.75 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
Dynamic
SYMBOL
TEST CONDITIONS
TA
V+
MIN TYP MAX
UNIT
25°C
Full
2.5 V
2.25 V
2.5 V
5
5
2
2
1
1
20
10
11
35
40
20
25
20
25
VCOM = V+,
RL = 50 Ω,
CL= 35 pF,
See Figure 18
Turn-on time
Turn-off time
tON
tOFF
tBBM
ns
ns
ns
25°C
Full
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 18
2.25 V
2.5 V
25°C
Full
Break-before-make
time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
See Figure 19
2.25 V
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 23
Charge injection
QC
25°C
25°C
2.5 V
2.5 V
5
pC
pF
NO
VNO = V+ or GND,
Switch OFF,
CNO(OFF)
See Figure 17
See Figure 17
38
OFF capacitance
VNC or VNO = V+ or
GND,
Switch ON,
NC, NO
ON capacitance
CNC(ON),
25°C
2.5 V
135
pF
CNO(ON)
CCOM(ON)
CI
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 17
See Figure 17
See Figure 20
See Figure 21
See Figure 22
25°C
25°C
25°C
25°C
25°C
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
135
6.5
40
pF
pF
Digital input
capacitance
VI = VIO or GND,
RL = 50 Ω,
Switch ON,
Bandwidth
OFF isolation
Crosstalk
BW
MHz
dB
RL = 50 Ω,
f = 1 MHz,
OISO
–63
–63
RL = 50 Ω,
f = 1 MHz,
XTALK
dB
f = 20 Hz to 20
kHz,
See Figure 24
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
0.00
8
THD
25°C
2.5 V
%
Supply
25°C
Full
10
25
Positive supply
current
I+
VI = VIO or GND
2.75 V
nA
100
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TS5A6542
SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
www.ti.com
TYPICAL PERFORMANCE
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
0.0
0.5
1.0
1.5
(V)
2.0
2.5
3.0
V
IN
(V)
V
IN
Figure 1. ron vs VCOM (V+ = 2.5 V)
Figure 2. ron vs VCOM (V+ = 3.3 V)
60
50
40
30
20
10
0
1.0
0.8
0.6
0.4
0.2
0.0
COM (ON)
NC (OFF)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
−60 −40
−20
0
20
(5C)
40
60
80
100
V
IN
(V)
T
A
Figure 3. ron vs VCOM (V+ = 5 V)
Figure 4. Leakage Current vs Temperature (V+ = 5 V)
60
50
40
30
20
10
0
20
10
0
−10
−20
−30
−40
−50
−60
−70
−80
V = 2.5 V
+
V = 5 V
+
V = 3.3 V
+
−60 −40
−20
0
20
(°C)
40
60
80
100
0
1
2
3
4
5
6
T
A
V
(V)
COM
Figure 5. I+ vs Temperature (V+ = 5 V)
Figure 6. Charge Injection (QC) vs VCOM
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
TYPICAL PERFORMANCE (continued)
16
14
12
10
8
25
20
15
10
5
t
ON
t
ON
t
OFF
t
OFF
6
0
−60 −40
−20
0
20
T – Temperature 5C
A
40
60
80
100
2.0
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
6.0
V
+
Figure 7. tON/tOFF vs Supply Voltage
Figure 8. tON/tOFF vs Temperature (V+ = 5 V)
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−5
−10
−15
−20
−25
0.01
1
10
100
1000
0.01
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure 9. Gain vs Frequency (V+ = 5 V)
Figure 10. Crosstalk vs Frequency (V+ = 5 V)
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
0.006
0.005
0.004
0.003
0.002
0.01
1
10
100
1000
10
1k
10k
100k
1M
Frequency (MHz)
Frequency (MHz)
Figure 11. OFF Isolation vs Frequency (V+ = 5 V)
Figure 12. Total Harmonic Distortion vs Frequency
(V+ = 2.5 V)
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
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TYPICAL PERFORMANCE (continued)
6
5
4
3
2
1
0
V
= 1.65 V, V = 5.5 V
+
IO
IO
V
= 1.95 V, V = 5.5 V
+
V
IO
V
IO
V
IO
= 1.65 V, V = 3.6 V
+
= 1.95 V, V = 3.6 V
+
= 1.65 V, V = 2.25 V
+
V
IO
= 1.95 V, V = 2.25 V
+
0.2 0.4
0.6 0.8
1.0 1.2
(V)
1.4 1.6
V
IN
Figure 13. VIO Thresholds
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
PARAMETER MEASUREMENT INFORMATION
V
+
V
NO
NO
IN
COM
V
COM
+
Channel ON
COM * VNO
W
V
r
+
on
ICOM
I
COM
V
I
V = V or V
I
IH
IL
+
GND
Figure 14. ON-State Resistance (ron)
V
+
V
NO
NO
IN
OFF-State Leakage Current
Channel OFF
COM
V
COM
+
+
V = V or V
IL
I
IH
V
I
+
GND
Figure 15. OFF-State Leakage Current (ICOM(OFF), INC(OFF), ICOM(PWROFF), INC(PWR(FF)
)
V
+
V
NO
NO
IN
COM
ON-State Leakage Current
Channel ON
V
COM
+
V = V or V
IL
I
IH
V
I
+
GND
Figure 16. ON-State Leakage Current (ICOM(ON), INC(ON)
)
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
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PARAMETER MEASUREMENT INFORMATION (continued)
V
+
V
NO
NO
Capacitance
Meter
V
BIAS
= V , V , or GND and
+ IO
V = V or GND
I
IO
COM COM
IN
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
V
BIAS
V
I
GND
Figure 17. Capacitance (CI, CCOM(OFF), CCOM(ON), CNC(OFF), CNC(ON)
)
V
+
TEST
R
L
C
L
V
COM
V
NO
NO
t
50 Ω
50 Ω
35 pF
35 pF
V
ON
+
COM
IN
V
COM
(2)
C
L
R
L
t
V
+
OFF
V
I
V
0
Logic
Input
(V )
I
IO
50%
50%
Logic
GND
(1)
Input
t
ON
t
OFF
Switch
Output
90%
90%
(V
NO
)
(1)
(2)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t < 5 ns, t < 5 ns.
C includes probe and jig capacitance.
L
O
r
f
Figure 18. Turn-On (tON) and Turn-Off Time (tOFF
)
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
PARAMETER MEASUREMENT INFORMATION (continued)
V
+
V
0
Logic
Input
(V )
I
IO
V
NC
or V
NO
50%
90%
NC or NO
NC or NO
V
COM
COM
Switch
Output
90%
(2)
C
R
L
L
(V
)
COM
IN
V
I
t
BBM
Logic
Input
V
or V = V /2
NO +
NC
(1)
GND
R = 50 Ω
L
C = 35 pF
L
(1)
(2)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t < 5 ns, t < 5 ns.
C includes probe and jig capacitance.
L
O
r
f
Figure 19. Break-Before-Make Time (tBBM
)
V
+
Network Analyzer
50 W
V
NO NO
Channel ON: NO to COM
V = V or V
V
COM
COM
I
IH
IL
Source
Signal
Network Analyzer Setup
V
IN
Source Power = 0 dBm
(632-mV P-P at 50-W load)
I
50 W
+
GND
DC Bias = 350 mV
Figure 20. Bandwidth (BW)
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
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PARAMETER MEASUREMENT INFORMATION (continued)
V
+
Network Analyzer
Channel OFF: NO to COM
V = V or GND
50 W
V
NO
IN
NO
I
IO
V
COM
COM
Source
Signal
50 W
Network Analyzer Setup
Source Power = 0 dBm
(632-mV P-P at 50-W load)
V
I
50 W
+
GND
DC Bias = 350 mV
Figure 21. OFF Isolation (OISO
)
V
+
Network Analyzer
50 W
V
NO1
NO1
NO2
Channel ON: NO to COM
Network Analyzer Setup
COM1
COM2
Source
Signal
V
NO2
50 W
Source Power = 0 dBm
(632 mV P-P at 50 W load)
V
IN
I
50 W
+
DC Bias = 350 mV
GND
Figure 22. Crosstalk (XTALK
)
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SCDS211C –AUGUST 2006–REVISED DECEMBER 2009
PARAMETER MEASUREMENT INFORMATION (continued)
V
IH
V
+
Logic
Input
OFF
ON
OFF
V
(V
I)
IL
R
GEN
NO
IN
COM
V
COM
+
V
COM
∆V
COM
V
GEN
(1)
C
L
V
= 0 to V
= 0
GEN
+
V
I
R
GEN
C = 1 nF
L
Logic
Input
GND
Q = C × ∆V
C L COM
(2)
V = V or V
IL
I
IH
(1)
(2)
C includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t < 5 ns, t < 5 ns.
L
O
r
f
Figure 23. Charge Injection (QC)
V = (V – V /2) or −V /2
Channel ON: COM to NO
= V P-P
R = 600 Ω
I
IO
+
+
L
V
f = 20 Hz to 20 kHz
SOURCE
C = 50 pF
L
SOURCE
+
V /2
+
Audio Analyzer
NO
Source
Signal
COM
IN
(1)
C
L
600 W
V
I
600 W
−V /2
+
(1)
C includes probe and jig capacitance.
L
Figure 24. Total Harmonic Distortion (THD)
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PACKAGE OPTION ADDENDUM
www.ti.com
7-May-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TS5A6542YZPR
ACTIVE
DSBGA
YZP
8
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TS5A6542YZPR
DSBGA
YZP
8
3000
180.0
8.4
1.02
2.02
0.63
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
DSBGA YZP
SPQ
Length (mm) Width (mm) Height (mm)
220.0 220.0 34.0
TS5A6542YZPR
8
3000
Pack Materials-Page 2
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