TUSB216RWBT [TI]
具有直流升压、集成式 CDP、宽电源和直通封装的 USB 2.0 高速信号调节器 | RWB | 12 | 0 to 70;
| 型号： | TUSB216RWBT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有直流升压、集成式 CDP、宽电源和直通封装的 USB 2.0 高速信号调节器 | RWB | 12 | 0 to 70 CD 调节器 |
| 文件： | 总32页 (文件大小：3095K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TUSB216
ZHCSKJ7C –FEBRUARY 2019 –REVISED OCTOBER 2020
TUSB216 具有BC 1.2 控制器的USB 2.0 高速信号调节器
• 背板
1 特性
3 说明
• 宽电源电压范围：2.3V 至6.5V
• 超低USB 断开和关断功耗
• 可提供USB 2.0 高速信号调节
• 与USB 2.0、OTG 2.0 和BC 1.2 兼容
• 支持低速、全速和高速信号传输
• 集成了BC 1.2 CDP 电池充电控制器
• 主机/器件无关
TUSB216 是第三代 USB 2.0 高速信号调节器，旨在补
偿传输通道中的交流损失（由于电容性负载）和直流损
失（由于电阻性负载）。
TUSB216 采用了专利设计，可通过边缘加速器来对
USB 2.0 高速信号的传输边缘进行加速，并通过直流升
压功能来提高静态电平。此外，TUSB216 还具有预均
衡功能，可提高接收器的灵敏度并补偿较长线缆应用中
的码间串扰 (ISI) 抖动。USB 低速和全速信号特征不受
TUSB216 的影响。
• 支持长达5m 的电缆
– 通过外部下拉电阻器值实现四种可选的信号增强
（边沿升压与直流升压）设置
– 通过上拉或下拉实现三种可选的RX 灵敏度设
TUSB216 可在不改变数据包计时或不增加传播延迟的
情况下提高信号质量。
置，以补偿高损耗应用中的ISI 抖动
• 支持长达10m 的电缆和两台TUSB216 器件
• 可扩展解决方案- 器件可通过菊花链连接，以用于
高损耗应用
TUSB216 可使用长达 5 米的线缆帮助系统通过 USB
2.0 高速近端眼图合规性测试。
• 与TUSB211/212/214 引脚兼容(3.3V)
TUSB216 与 USB On-The-Go (OTG) 和电池充电 (BC
1.2) 协议兼容。集成的 BC 1.2 电池充电控制器可通过
控制引脚启用。
2 应用
• 笔记本电脑/台式机/扩展坞
• 便携式电子产品
• 平板电脑
器件信息
• 手机
• 电视
• 有源电缆、电缆延长器
OP TEMP (TA) 封装尺寸（标
器件型号
TUSB216
封装
°C
称值）
1.60mm x
1.60mm
X2QFN (12)
0 至70
2.3 œ 6.5V
VCC
USB
USB
Cable
D2
D1
Host
Connector
GND
简化原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLLSEZ6
TUSB216
www.ti.com.cn
ZHCSKJ7C –FEBRUARY 2019 –REVISED OCTOBER 2020
Table of Contents
7.4 Device Functional Modes............................................9
7.5 TUSB216 Registers.................................................. 10
8 Application and Implementation..................................14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
9 Power Supply Recommendations................................22
10 Layout...........................................................................23
10.1 Layout Guidelines................................................... 23
10.2 Layout Example...................................................... 23
11 Device and Documentation Support..........................24
11.1 接收文档更新通知................................................... 24
11.2 支持资源..................................................................24
11.3 Trademarks............................................................. 24
11.4 静电放电警告...........................................................24
11.5 术语表..................................................................... 24
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 绝对最大额定值...........................................................5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................5
6.5 电气特性......................................................................5
6.6 Switching Characteristics............................................7
6.7 Timing Requirements..................................................8
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram...........................................9
7.3 Feature Description.....................................................9
Information.................................................................... 24
4 Revision History
Changes from Revision B (January 2020) to Revision C (October 2020)
Page
• Corrected the thermal information for RWB package instead of RGY................................................................5
• Added a note to place an option to add a decoupling cap on CDP_ENZ.........................................................14
Changes from Revision A ( February 2019) to Revision B (January 2020)
Page
• 已将 100m 更正为 10m...................................................................................................................................... 1
• 删除了汽车应用以推迟到未来的Q100 版本.......................................................................................................1
• Changed to correct typo from 100m to 10-m .....................................................................................................5
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLLSEZ6
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ZHCSKJ7C –FEBRUARY 2019 –REVISED OCTOBER 2020
5 Pin Configuration and Functions
图5-1. TUSB216 RWB 12-Pin X2QFN Top View
表5-1. Pin Functions
PIN
INTERNAL
PULLUP/PULLDOWN
I/O
DESCRIPTION
NAME
NO.
6
USB High-speed boost select via external pull down resistor.
Both edge boost and DC boost are controlled by a single pin in non-
I2C mode. In I2C mode edge boost and DC boost can be individually
controlled.
Sampled upon power up. Does not recognize real time adjustments.
Auto selects BOOST LEVEL = 3 when left floating.
BOOST
I
I
N/A
CDP_ENZ
11
Set CDP_ENZ is low to enable BC 1.2 CDP controller
500 kΩ PU
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English Data Sheet: SLLSEZ6
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ZHCSKJ7C –FEBRUARY 2019 –REVISED OCTOBER 2020
表5-1. Pin Functions (continued)
PIN
INTERNAL
PULLUP/PULLDOWN
I/O
DESCRIPTION
NAME
NO.
In I2C mode:
Reserved for TI test purpose.
In non-I2C mode:
At reset: 3-level input signal RX_SEN. USB High-speed RX
Sensitivity Setting to Compensate ISI Jitter
H (pin is pulled high) –high RX sensitivity (high loss channel)
M (pin is left floating) –medium RX sensitivity (medium loss
channel)
L (pin is pulled low) –low RX sensitivity (low loss channel)
After reset: Output signal ENA_HS. Flag indicating that channel is in
High-speed mode. Asserted upon:
RX_SEN2/ENA_HS
9
I/O
N/A
1. Detection of USB-IF High-speed test fixture from an unconnected
state followed by transmission of USB TEST_PACKET pattern.
2. Squelch detection following USB reset with a successful HS
handshake [HS handshake is declared to be successful after single
chirp J chirp K pair where each chirp is within 18 μs –128 μs].
D2P
D2M
GND
D1M
D1P
7
8
I/O
I/O
P
N/A
N/A
N/A
N/A
N/A
USB High-speed positive port.
USB High-speed negative port.
Ground
10
1
I/O
I/O
USB High-speed negative port..
USB High-speed positive port.
2
I2C Mode:
500 kΩ PU
1.8 MΩ PD
Bidirectional I2C data pin [7-bit I2C slave address = 0x2C].
In non I2C mode:
Reserved for TI test purpose.
SDA1
VCC
3
I/O
P
12
N/A
Supply power
Device disable/enable.
Low –Device is at reset and in shutdown, and
High - Normal operation.
Recommend 0.1-µF external capacitor to GND to ensure clean
power on reset if not driven. If the pin is driven, it must be held low
until the supply voltage for the device reaches within specifications.
500 kΩ PU
1.8 MΩ PD
RSTN
5
4
I
In I2C mode:
I2C clock pin [I2C address = 0x2C].
Non I2C mode:
After reset: Output CD. Flag indicating that a USB device is attached
(connection detected). Asserted from an unconnected state upon
detection of DP or DM pull-up resistor. De-asserted upon detection of
disconnect.
When RSTN asserted there is
SCL1/CD
I/O
a 500 kΩ PD
1. Pull-up resistors for SDA and SCL pins in I2C mode should be RPull-up (depending on I2C bus voltage). If
both SDA and SCL are pulled up at power-up the device enters into I2C mode.
2. Pull-down and pull-up resistors for RX_SEN pin must follow RRXSEN1 and RRXSEN2 resistor recommendations
in non I2C mode.
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English Data Sheet: SLLSEZ6
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6 Specifications
6.1 绝对最大额定值
在自然通风条件下的工作温度范围内测得（除非另有说明）(1)
最小值
–0.3
–0.3
-0.3
最大值
单位
VCC
7
V
电源电压范围
5.5
1.98
5.5
V
V
电压范围USB 数据
BOOST 引脚上的电压范围
电压范围其他引脚
存储温度，Tstg
DxP、DxM
BOOST
-0.3
V
RX_SEN、CDP_ENZ、SCL、RSTN
-65
150
125
°C
°C
最大结温，TJ (max)
(1) 应力超出绝对最大额定值下所列的值可能会对器件造成永久损坏。这些列出的值仅仅是应力等级，这并不表示器件在这些条件下以及在
建议运行条件以外的任何其他条件下能够正常运行。长时间处于绝对最大额定条件下可能会影响器件的可靠性。
6.2 ESD Ratings
VALUE
±2000
±750
UNIT
Human-body model (HBM), per
Charged-device model (CDM), per
V(ESD)
Electrostatic discharge
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.3
1.62
0
NOM
MAX
UNIT
VCC
Supply voltage
5
6.5
3.6
V
V
V
V
V
VI2C_BUS
DxP, DxM
BOOST
Digital
I2C Bus Voltage
Voltage range USB data
3.6
Voltage range BOOST pin
0
1.98
3.6
Voltage range other pins (SCL, SDA, RX_SEN, CDP_ENZ, RSTN)
0
6.4 Thermal Information
RWB (X2QFN)
THERMAL METRIC (1)
UNIT
12 PINS
137.4
62
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-board thermal resistance
67.2
1.9
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJT
67.3
N/A
ψJB
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 电气特性
在自然通风条件下的工作温度范围内测得（除非另有说明）
参数
典型值(1)
测试条件
最小值
最大值
单位
POWER
USB 通道= HS 模式。480Mbps 流量。
IACTIVE_HS
22
36
mA
高速有功电流
V
CC 电源稳定，升压= 最大值
USB 通道= HS 模式，无流量。VCC 电源
稳定，升压= 最大值
IIDLE_HS
22
36
mA
mA
高速空闲电流
高速挂起电流
IHS_SUPSPEND
0.75
1.4
USB 通道= HS 挂起模式。VCC 电源稳定
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English Data Sheet: SLLSEZ6
TUSB216
www.ti.com.cn
ZHCSKJ7C –FEBRUARY 2019 –REVISED OCTOBER 2020
在自然通风条件下的工作温度范围内测得（除非另有说明）
参数
典型值(1)
测试条件
最小值
最大值
单位
USB 通道= FS 模式，12Mbps 流量，Vcc
电源稳定
IFS
0.75
1.4
mA
全速电流
IDISCONN
0.80
60
1.4
mA
µA
断开电源
关断电源
主机端应用。未连接器件。
ISHUTDN
115
RSTN 驱动为低电平，VCC 电源稳定
控制引脚漏电流
SDA、RSTN 的引脚失效防护漏
电流
ILKG_FS
10
6
15
µA
VCC = 0V，VIH, max 的引脚
ILKG_FS
ILKG_FS
15
70
µA
nA
RX_SEN 的引脚失效防护漏电流 VCC = 0V，VIH, max 的引脚
SCL 的引脚失效防护漏电流
VCC = 0V，VIH, max 的引脚
输入RSTN
VIH
VIL
IIH
1.5
0
3.6
0.5
V
V
高电平输入电压
低电平输入电压
高电平输入电流
低电平输入电流
±15
±20
µA
µA
VIH = 3.6V、RPU 被启用
VIL = 0V、RPU 被启用
IIL
输入数字
VIH
1.5
0
3.6
0.5
V
V
高电平输入电压（CDP_ENZ）
低电平输入电压（CDP_ENZ）
低电平输入电流
VIL
IIL
VIL = 0V
±20
±15
µA
µA
IIH
VIH = 3.6V
高电平输入电流
INPUT RX_SEN（三电平输入，中电平保持引脚悬空）
最大高电平输入电压
RRXSEN1=37.5kΩ、
RRXSEN2=12.5kΩ
VIH(Max)
5.5
V
VCC = 2.3V 至6.5V
最小高电平输入电压
RRXSEN1=37.5kΩ、
RRXSEN2=12.5kΩ
VCC = 2.3V 至6.5V
（VCC 的百分比）
VIH(Min)
75
%
V
低电平输入电压
22kΩ <= RRXSEN1 <= 40kΩ
VIL
0.75
输入升压
RBOOST_LVL0
160
2
升压电平0 的外部下拉电阻器
升压电平1 的外部下拉电阻器
升压电平2 的外部下拉电阻器
升压电平3 的外部下拉电阻器
Ω
RBOOST_LVL1
1.5
3.4
7.5
1.8
3.6
kΩ
kΩ
kΩ
RBOOST_LVL2
3.96
11
RBOOST_LVL3
输出CD、ENA_HS
CD 和ENA_HS 的高电平输出电
压
VOH
2.5
V
IO = –50µA，VCC >= 3.0V
VOH
VOH
1.7
1.8
V
V
CD 的高电平输出电压
IO = –25µA，VCC = 2.3V
IO = –25µA，VCC = 2.3V
ENA_HS 的高电平输出电压
CD 和ENA_HS 的低电平输出电
压
VOL
IO = 50µA
0.3
V
I2C
I2C 总线电容
CI2C_BUS
IOL
4
150
pF
I2C 开漏输出电流
VOL = 0.4V
1.5
mA
2.3V<= VCC<= 4.3V，VI2C_BUS
=
RPull-up =1.6kΩ 至2.5kΩ，VI2C_BUS 的百
分比
VIL
VIL
VIH
25
25
%
%
%
1.8V +/-10%
RPull-up =2.8kΩ 至7kΩ，VI2C_BUS 的百分
比
VI2C_BUS = 3.3V +/-10%
2.3V<= VCC<= 4.3V，VI2C_BUS
1.8V +/-10%
=
RPull-up =1.6kΩ 至2.5kΩ，VI2C_BUS 的百
分比
80
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English Data Sheet: SLLSEZ6
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在自然通风条件下的工作温度范围内测得（除非另有说明）
参数
典型值(1)
测试条件
最小值
最大值
单位
RPull-up =2.8kΩ 至7kΩ，VI2C_BUS 的百分
比
VIH
VI2C_BUS = 3.3V +/-10%
75
%
RPull-up
VI2C_BUS = 1.8V +/-10%
VI2C_BUS = 3.3V +/-10%
1.6
2.8
2
2.5
7
kΩ
kΩ
RPull-up
4.7
100
kHz
SCL 频率
DxP、DxM
在240MHz、VCC 电源稳定、转接驱动器
关闭时使用VNA 测得
CIO_DXX
2.5
pF
接地电容
(1) VCC=5V、TA = 25°C 时所有的典型值。
6.6 Switching Characteristics
Over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
DxP, DxM USB Signals
USB channel = HS mode. 480 Mbps
traffic. VCC supply stable
FBR_DXX
tR/F_DXX
Bit Rate
Rise/Fall time
480
Mbps
ps
100
(1) All typical values are at VCC = 5 V, and TA = 25°C.
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6.7 Timing Requirements
MIN
NOM
MAX
UNIT
POWER UP TIMING
Minimum width to detect a valid RSTN signal assert when the pin is actively
driven low
TRSTN_PW
TSTABLE
TREADY
100
300
µs
µs
µs
VCC must be stable before RSTN de-assertion
Maximum time needed for the device to be ready after RSTN is de-
asserted.
500
100
TRAMP
VCC ramp time
VCC ramp time
ms
ms
TRAMP
0.2
I2C (STD)
Stop setup time, SCL (Tr=600ns-1000ns), SDA (Tf=6.5ns-106.5ns), 100kHz
STD
tSUSTO
tHDSTA
tSUSTA
tSUDAT
tHDDAT
4
4
µs
µs
µs
ns
µs
Start hold time, SCL (Tr=600ns-1000ns), SDA (Tf=6.5ns-106.5ns), 100kHz
STD
Start setup time, SCL (Tr=600ns-1000ns), SDA (Tf=6.5ns-106.5ns),
100kHz STD
4.7
250
5
Data input or False start/stop, setup time, SCL (Tr=600ns-1000ns), SDA
(Tf=6.5ns-106.5ns), 100kHz STD
Data input or False start/stop, hold time, SCL (Tr=600ns-1000ns), SDA
(Tf=6.5ns-106.5ns), 100kHz STD
tBUF
tLOW
tHIGH
tF
Bus free time between START and STOP conditions
Low period of the I2C clock
4.7
4.7
4
µs
µs
µs
ns
ns
High period of the I2C clock
Fall time of both SDA and SCL signals
Rise time of both SDA and SCL signals
300
tR
1000
tRSTN_PW
RSTN
VIL(MAX)
tSTABLE
VCC(MIN)
VCC
tRAMP
图6-1. Power On and Reset Timing
70%
30%
SDA
t
t
R
t
F
HDSTA
tHIGH
t
t
LOW
BUF
70%
30%
SCL
S
P
P
S
t
t
SUSTO
t
t
SUDAT
HDDAT
HDSTA
t
SUSTA
图6-2. I2C Timing
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7 Detailed Description
7.1 Overview
The TUSB216 is a USB High-Speed (HS) signal conditioner designed to compensate for ISI signal loss in a
transmission channel. TUSB216 has a patented design for USB Low Speed (LS) and Full Speed (FS) signals. It
does not alter the signal characteristics. HS signals are compensated. The design is compatible with USB On-
The-Go (OTG) and Battery Charging (BC) specifications.
Programmable signal gain through an external resistor permits fine tuning device performance to optimize
signals. This helps pass USB HS electrical compliance tests at the connector. Additional RX sensitivity, tuned by
external pull-up resistor and pull-down resistor, allows to overcome attenuation in cables. The TUSB216 allows
application in series to cover longer distances, or high loss transmission paths. A maximum of 4 devices can be
daisy-chained.
7.2 Functional Block Diagram
Low and Full
Speed Bypass
D2P
D1P
USB
TRANSCEIVER
High Speed
Compensation
ESD
PROTECTION
USB
CONNECTOR
D1M
D2M
CD
OPTIONAL
PLD
ENA_HS
Status flags
Copyright © 2018, Texas Instruments Incorporated
7.3 Feature Description
7.3.1 High-speed Boost
The high-speed booster (combination of edge boost and DC boost) improves the eye width for USB2.0 high-
speed signals. It is direction independent and by that is compatible to OTG systems. The BOOST pin is
configuring the booster strength with different values of pull down resistors to set 4 levels of boosts, alternatively
the boost level can be set via I2C register according to 节 7.4.6. Internal circuitry of the signal conditioner
reduces possible overshoot.
7.3.2 RX Sensitivity
The RX_SEN pin is a tri-level pin. It is used to set the gain of the device according to system channel loss. RX
sensitivity can be increased to recover incoming signals with low vertical eye opening to be able to boost weak
signals and helps overcoming high attenuation.
7.4 Device Functional Modes
7.4.1 Low-speed (LS) Mode
TUSB216 automatically detects a LS connection and does not enable signal compensation. CD pin is asserted
high but ENA_HS will be low.
7.4.2 Full-speed (FS) Mode
TUSB216 automatically detects a FS connection and does not enable signal compensation. CD pin is asserted
high but ENA_HS will be low
7.4.3 High-speed (HS) Mode
TUSB216 automatically detects a HS connection and will enable signal compensation as determined by the
configuration of the RX_SEN pin and the external pull down resistance on its BOOST pin.
CD pin and ENA_HS pin are asserted high when high-speed boost is active.
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7.4.4 高速下行端口电气合规性测试模式
TUSB216 将检测 HS 合规性测试装置并进入下行端口高速眼图测试模式。当 TUSB216 处于 HS 眼图合规性测试
模式时，CD 引脚将为低电平并且ENA_HS 引脚被置为高电平。
如果当TUSB216 在HS 功能模式下运行时 RSTN 引脚置为低电平并在高电平下无效，TUSB216 将过渡至HS 眼
图合规性测试模式，CD 置为低电平且ENA_HS 保持高电平。发生这种情况时，启用信号补偿。
7.4.5 Shutdown Mode
TUSB216 can be disabled when its RSTN pin is asserted low. DP, DM traces are continuous through the device
in shutdown mode. The USB channel is still fully operational, but there is neither signal compensation, nor any
indication from the CD pin as to the status of the channel.
表7-1. CD and ENA_HS Pins in Different Modes
MODE
CD
ENA_HS
LOW
Low-speed
Full-speed
HIGH
HIGH
HIGH
LOW
LOW
LOW
High-speed
HIGH
HIGH
LOW
High-speed downstream port electrical test
Shutdown
7.4.6 I2C Mode
TUSB216 supports 100 KHz I2C for device configuration, status read back and test purposes. For detail
electrical and functional specifications refer to I2C Bus Specification 2.1, 2001 – STANDARD MODE. This
controller is enabled after SCL and SDA pins are sampled high shortly after return from shutdown. In this mode,
the CSR can be accessed by I2C read/write transaction to 7-bit slave address 0x2C. It is advised to set
CFG_ACTIVE bit before changing values. This halts the FSM, and reset it after all changes are made. This
ensure proper startup into high-speed mode.
7.4.7 BC 1.2 Battery Charging Controller
The TUSB216 main function is a signal conditioner offering the boost and pre-equalization features to the
incoming DP/DM signals. For applications in which USB host or hub does not provide USB BC charging
controller functionality, the TUSB216 can perform this task when CDP_ENZ is low and BC 1.2 CDP Controller is
enabled. When battery charging CDP controller feature is enabled (CDP_ENZ=low) TUSB216 supports CDP
charging downstream port functionality. CDP_ENZ has an internal pull up when the pin is left unconnected CDP
controller will be disabled.
表7-2. TUSB216 Battery Charging Controller Modes
Pin 11 (CDP_ENZ)
CDP
High
Low
NO
YES
7.5 TUSB216 Registers
表7-3 lists the memory-mapped registers for the TUSB216 registers. All register offset addresses not listed in 表
7-3 should be considered as reserved locations and the register contents should not be modified.
表7-3. TUSB216 Registers
Offset
0x1
Acronym
Register Name
Section
Go
EDGE_BOOST
CONFIGURATION
DC_BOOST
RX_SEN
This register is setting EDGE BOOST level.
This register is selecting device mode.
This register is setting DC BOOST level.
This register is setting RX Sensitivity level.
0x3
Go
0xE
Go
0x25
Go
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Complex bit access types are encoded to fit into small table cells. 表 7-4 shows the codes that are used for
access types in this section.
表7-4. TUSB216 Access Type Codes
Access Type
Read Type
RH
Code
Description
H
R
Set or cleared by hardware
Read
Write Type
W
W
Write
Reset or Default Value
-n
Value after reset or the default
value
7.5.1 EDGE_BOOST Register (Offset = 0x1) [reset = X]
EDGE_BOOST is shown in 图7-1 and described in 表7-5.
Return to Summary Table.
This register is setting EDGE BOOST level.
图7-1. EDGE_BOOST Register
7
6
5
4
3
2
1
0
ACB_LVL
RH/W-X
RESERVED
RH/W-X
表7-5. EDGE_BOOST Register Field Descriptions
Bit
7-4
Field
Type
Reset
Description
ACB_LVL
RH/W
X
XXXXb (sampled at startup from BOOST pin)
0000b to 1111b range
0x0 = BOOST PIN LEVEL 0 (lowest edge boost setting)
0x3 = BOOST PIN LEVEL 1
0x6 = BOOST PIN LEVEL 2
0xA = BOOST PIN LEVEL 3
0xF = (highest edge boost setting)
3-0
RESERVED
RH/W
X
These bits are reserved bits and set by hardware at reset.
When this register is modified the software should first read these
reserved bits and rewrite with the same values
7.5.2 CONFIGURATION Register (Offset = 0x3) [reset = X]
CONFIGURATION is shown in 图7-2 and described in 表7-6.
Return to Summary Table.
This register is selecting device mode.
图7-2. CONFIGURATION Register
7
6
5
4
3
2
1
0
RESERVED
CFG_ACTIVE
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图7-2. CONFIGURATION Register (continued)
RH/W-X
RH/W-0x1
表7-6. CONFIGURATION Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
RH/W
X
These bits are reserved bits and set by hardware at reset.
When this register is modified the software should first read these
reserved bits and rewrite with the same values
0
CFG_ACTIVE
RH/W
0x1
Configuration mode
After reset, if I2C mode is true (SCL and SDA are both pulled high)
set the bit to get into configuration mode and clear to return to
normal mode.
0x0 = NORMAL MODE
0x1 = CONFIGURATION MODE
7.5.3 DC_BOOST Register (Offset = 0xE) [reset = X]
DC_BOOST is shown in 图7-3 and described in 表7-7.
Return to Summary Table.
This register is setting DC BOOST level.
图7-3. DC_BOOST Register
7
6
5
4
3
2
1
0
RESERVED
RH/W-X
DCB_LVL
RH/W-X
表7-7. DC_BOOST Register Field Descriptions
Bit
Field
Type
Reset
Description
7-4
RESERVED
RH/W
X
These bits are reserved bits and set by hardware at reset.
When this register is modified the software should first read these
reserved bits and rewrite with the same values
3-0
DCB_LVL
RH/W
X
XXXXb (sampled at startup from BOOST pin)
0000b to 1111b range
0x0 = BOOST PIN LEVEL 0 (lowest dc boost setting)
0x2 = BOOST PIN LEVEL 1 and 2
0x6 = BOOST PIN LEVEL 3
0xF = (highest dc boost setting)
7.5.4 RX_SEN Register (Offset = 0x25) [reset = X]
RX_SEN is shown in 图7-4 and described in 表7-8.
Return to Summary Table.
This register is setting RX Sensitivity level.
图7-4. RX_SEN Register
7
6
5
4
3
2
1
0
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图7-4. RX_SEN Register (continued)
RX_SEN
RH/W-X
表7-8. RX_SEN Register Field Descriptions
Bit
Field
RX_SEN
Type
Reset
Description
7-0
RH/W
X
XXXXb (sampled at startup from RX_SEN pin)
00000000b to 11111111b range
0x0 = RX_SEN LEVEL LOW
0x33 = RX_SEN LEVEL MID
0x66 = RX_SEN LEVEL HIGH
0xFF = (highest setting)
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The purpose of the TUSB216 is to re-store the signal integrity of a USB High-speed channel up to the USB
connector. The loss in signal quality stems from reduced channel bandwidth due to high loss PCB trace and
other components that contribute a capacitive load. This can cause the channel to fail the USB near end eye
mask. Proper use of the TUSB216 can help to pass this eye mask.
A secondary purpose is to use the CD pin of the TUSB216 to control other blocks on the customer platform, if so
desired.
8.2 Typical Application
A typical application for TUSB216 is shown in 图 8-1. In this setup, D2P and D2M face the USB connector while
D1P and D1M face the USB host. The orientation may be reversed [that is, D2 faces transceiver and D1 faces
connector].
RBOOST
100 nF
BOOST
RSTZ
Connect
D1P and D2P
D1P
D2P
CON_D2P
CON_D2N
USB_D1P
USB_D1N
USB
Host or Hub
D2M
D1M
Connect
D1M and D2M
VCC
Supply
+3.3V or +5 V
GND
Ferrite Bead
Vcc
100Q@100MHz
1uF
(optional)
100 nF
RRXSEN2
RX_SEN/ENA_HS
RRXSEN1
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图8-1. TUSB216 Reference Schematic (Design Example with CDP disabled), CDP_ENZ can be left
floating but an option for a decoupling capacitor of 0.1uF is recommended so the design is compatible
with older devices: TUSB211, TUSB212, TUSB214
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8.2.1 Design Requirements
TUSB216 requires a valid reset signal as described in the power supply recommendations section. The
capacitor at RSTN pin is not required if a micro controller drives the RSTN pin according to recommendations.
For this design example, use the parameters shown in 表8-1, 表8-2 and 表8-3
表8-1. Design Parameters for 5-V Supply With High Loss System
PARAMETER
VALUE(1)
5 V ±10%
No
VCC
I2C support required in system (Yes/No)
RBOOST
0-Ω
BOOST Level
0
Boost Level 1:
RBOOST = 1.8 kΩ
Edge and DC Boost
1
1.8 kΩ±1%
3.6 kΩ± 1%
2
3
Do Not Install (DNI)
RRXSEN2
RRXSEN1
RX_SEN Level
Low
High RX
Sensitivity Level:
RRXSEN1 = 37.5
kΩ
Do Not Install (DNI)
Do Not Install (DNI)
22 kΩ- 40 kΩ(27 kΩtypical)
RX Sensitivity
Do Not Install (DNI)
Medium
RRXSEN2 = 12.5
37.5 kΩ(2)
12.5 kΩ
High
kΩ
(1) These parameters are starting values for a high loss system. Further tuning might be required based on specific host and/or device as
well as cable length and loss profile. These settings are not specific to a 5V supply system could be applicable to 3.3V supply system
as well.
(2) This resistor is needed for a 5V supply to divide the voltage down so the BOOST pin voltage does not exceed 3.6V
表8-2. Design Parameters for 3.3-V Supply With Low to Medium Loss System
PARAMETER
VALUE(1)
3.3 V ±10%
No
VCC
I2C support required in system (Yes/No)
RBOOST
0-Ω
BOOST Level
0
Boost Level 0:
RBOOST = 0-Ω
Edge and DC Boost
1
1.8 kΩ±1%
3.6 kΩ±1%
2
3
Do Not Install (DNI)
RRXSEN2
RRXSEN1
RX_SEN Level
Low
Medium RX
Sensitivity Level:
RRXSEN1 = DNI
RRXSEN2 = DNI
Do Not Install (DNI)
Do Not Install (DNI)
22 kΩ- 40 kΩ(27 kΩtypical)
22 kΩ- 40 kΩ(27 kΩtypical)
Do Not Install (DNI)
RX Sensitivity
Medium
High
Do Not Install (DNI)
(1) These parameters are starting values for a low to medium loss system. Further tuning might be required based on specific host and/or
device as well as cable length and loss profile. These settings are not specific to a 3.3V supply system could be applicable to 5V
supply system as well.
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表8-3. Design Parameters for 2.3-V to 4.3-V VBAT Supply With Low to Medium Loss System
PARAMETER
VALUE(1)
VCC
2.3 V to 4.3V
No
I2C support required in system (Yes/No)
RBOOST
0-Ω
BOOST Level
0
Boost Level 0:
RBOOST = 0-Ω
Edge and DC Boost
1
1.8 kΩ±1%
3.6 kΩ±1%
2
3
Do Not Install (DNI)
RRXSEN2
RRXSEN1
RX_SEN Level
Low
Medium RX
Sensitivity Level:
RRXSEN1 = DNI
RRXSEN2 = DNI
Do Not Install (DNI)
Do Not Install (DNI)
12.5 kΩ
22 kΩ- 40 kΩ(27 kΩtypical)
Do Not Install (DNI)
37.5 kΩ(2)
RX Sensitivity
Medium
High
(1) These parameters are starting values for a low to medium loss system. Further tuning might be required based on specific host and/or
device as well as cable length and loss profile. These settings are not specific to a 2.3V-4.3V supply system could be applicable to 5V
supply system as well.
(2) This resistor is needed for a VBAT supply (2.3V - 4.3V) to divide the voltage down so the BOOST pin voltage does not exceed 3.6V
8.2.2 Detailed Design Procedure
The ideal BOOST setting is dependent upon the signal chain loss characteristics of the target platform. The
recommendation is to start with BOOST level 0, and then increment to BOOST level 1, and so on. if permissible.
Same applies to the RX sensitivity setting where it is recommended to plan for the required pads or connections
to change boost settings, but to start with RX sensitivity level 1.
In order for the TUSB216 to recognize any change to the BOOST setting, the RSTN pin must be toggled. This is
because the BOOST pin is latched on power up and the pin is ignored thereafter.
备注
The TUSB216 compensates for extra attenuation in the signal path according to the configuration of
the RX_SEN pin. This pin is not 5 V tolerant and therefore when selecting the highest RX sensitivity
level, the voltage level at RX_SEN pin must be less than 3.6V.
Placement of the device is also dependent on the application goal. 表8-4 summarizes our recommendations.
表8-4. Platform Placement Guideline
PLATFORM GOAL
Pass USB Near End Mask at the receptacle
Pass USB Far End Eye Mask at the plug
SUGGESTED TUSB216 PLACEMENT
Close to measurement point (connector)
Close to USB PHY
Cascade multiple TUSB216s to improve device enumeration
Midway between each USB interconnect
表8-5. Table of Recommended Settings
BOOST and RX_SEN settings (1)for channel loss
Pre-channel cable length (Between USB
PHY and TUSB216)
BOOST
RX_SEN
0-3 meter
2-5 meter
Level 0
Level 1
Medium or High
Medium or High
Post-channel cable length (Between
TUSB216 and inter-connect)
BOOST
RX_SEN
0-2 meter
Level 0
Medium or High
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表8-5. Table of Recommended Settings (continued)
BOOST and RX_SEN settings (1)for channel loss
1-4 meter
Level 1
Medium or High
(1) These parameters are starting values for different cable lengths. Further tuning might be required based on specific host and/or device
as well as cable length and loss profile.
8.2.2.1 Test Procedure to Construct USB High-speed Eye Diagram
备注
USB-IF certification tests for High-speed eye masks require the mandated use of the USB-IF
developed test fixtures. These test fixtures do not require the use of oscilloscope probes. Instead they
use SMA cables. More information can be found at the USB-IF Compliance Updates Page. It is
located under the Electrical Specifications section, ID 86 dated March 2013.
The following procedure must be followed before using any oscilloscope compliance software to construct a USB
High-speed Eye Mask:
8.2.2.1.1 For a Host Side Application
1. Configure the TUSB216 to the desired BOOST setting
2. Power on (or toggle the RSTN pin if already powered on) the TUSB216
3. Using SMA cables, connect the oscilloscope and the USB-IF host-side test fixture to the TUSB216
4. Enable the host to transmit USB TEST_PACKET
5. Execute the oscilloscope USB compliance software.
6. Repeat the above steps in order to re-test TUSB216 with a different BOOST setting (must reset to change)
8.2.2.1.2 For a Device Side Application
1. Configure the TUSB216 to the desired BOOST setting
2. Power on (or toggle the RSTN pin if already powered on) the TUSB216
3. Connect a USB host, the USB-IF device-side test fixture, and USB device to the TUSB216. Ensure that the
USB-IF device test fixture is configured to the ‘INIT’position
4. Allow the host to enumerate the device
5. Enable the device to transmit USB TEST_PACKET
6. Using SMA cables, connect the oscilloscope to the USB-IF device-side test fixture and ensure that the
device-side test fixture is configured to the ‘TEST’position.
7. Execute the oscilloscope USB compliance software.
8. Repeat the above steps in order to re-test TUSB216 with a different BOOST setting (must reset to change)
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8.2.3 Application Curves
Redriver-EVM
Various
cable
lengths
图8-2. Near End Eye Measurement Set-Up With Pre-Channel Cable
图8-3. 2 Meter Pre-Channel Without TUSB216
图8-4. 2 Meter Pre-Channel With TUSB216 BOOST=1
RX_SEN=MED
图8-5. 2 Meter Pre-Channel With TUSB216 BOOST=0
图8-6. 3 Meter Pre-Channel Without TUSB216
RX_SEN=HIGH
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8.2.3 Application Curves (continued)
图8-7. 3 Meter Pre-Channel With TUSB216 BOOST=0
图8-8. 5 Meter Without TUSB216
RX_SEN=HIGH
图8-9. 5 Meter Pre-Channel With TUSB216 BOOST=1
图8-10. 5 Meter Pre-Channel With TUSB216 BOOST=2
RX_SEN=MED
RX_SEN=MED
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8.2.3 Application Curves
Redriver-EVM
Various
cable
lengths
图8-11. Near End Eye Measurement Set-Up With Post-Channel Cable
图8-12. 6 Inches Post Channel Without TUSB216
图8-13. 6 Inches Post-Channel With TUSB216 BOOST=0
RX_SEN=HIGH
图8-14. 1 Meter Post-Channel Without TUSB216
图8-15. 1 Meter Post-Channel With TUSB216 BOOST=0
RX_SEN=MED
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8.2.3 Application Curves (continued)
图8-16. 1 Meter Post-Channel With TUSB216 BOOST=0
图8-17. 2 Meter Post-Channel Without TUSB216
RX_SEN=HIGH
图8-18. 2 Meter Post-Channel With TUSB216 BOOST=1
图8-19. 2 Meter Post-Channel With TUSB216 BOOST=1
RX_SEN=MED
RX_SEN=HIGH
图8-20. 4 Meter Post-Channel Without TUSB216
图8-21. 4 Meter Post-Channel With TUSB216 BOOST=2
RX_SEN=MED
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9 Power Supply Recommendations
On power up, the interaction of the RSTN pin and power on ramp could result in digital circuits not being set
correctly. The device should not be enabled until the power on ramp has settled to minimum recommended
supply voltage or higher to ensure a correct power on reset of the digital circuitry. If RSTN cannot be held low by
microcontroller or other circuitry until the power on ramp has settled, then an external capacitor from the RSTN
pin to GND is required to hold the device in the low power reset state.
The RC time constant should be larger than five times of the power on ramp time (0 to VCC). With a typical
internal pullup resistance of 500 kΩ, the recommended minimum external capacitance is calculated as:
[Ramp Time x 5] ÷ [500 kΩ]
(1)
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10 Layout
10.1 Layout Guidelines
Although the land pattern has matched trace width to pad width, optimal impedance control is based on the
user's own PCB stack-up. The recommendation is to maintain 90 Ω differential routing underneath the device.
10.2 Layout Example
图10-1. Layout Example
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11 Device and Documentation Support
11.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.4 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
11.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TUSB216RWBR
TUSB216RWBT
ACTIVE
ACTIVE
X2QFN
X2QFN
RWB
RWB
12
12
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
0 to 70
0 to 70
26
26
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TUSB216RWBR
TUSB216RWBT
X2QFN
X2QFN
RWB
RWB
12
12
3000
250
180.0
180.0
9.5
9.5
1.8
1.8
1.8
1.8
0.45
0.45
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TUSB216RWBR
TUSB216RWBT
X2QFN
X2QFN
RWB
RWB
12
12
3000
250
189.0
189.0
185.0
185.0
36.0
36.0
Pack Materials-Page 2
PACKAGE OUTLINE
RWB0012A
X2QFN - 0.4 mm max height
SCALE 6.500
PLASTIC QUAD FLATPACK - NO LEAD
1.65
1.55
B
A
PIN 1 INDEX AREA
1.65
1.55
C
0.4 MAX
SEATING PLANE
0.05 C
2X 1.2
SYMM
(0.13)
TYP
0.05
0.00
6X 0.4
3
6
2
1
7
8
SYMM
2X
0.4
0.4
8X
0.2
12
9
0.25
0.15
12X
0.6
4X
0.4
0.07
0.05
C B A
C
4221631/B 07/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RWB0012A
X2QFN - 0.4 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(1.3)
6X (0.4)
9
12
4X (0.7)
2X (0.4)
1
8
SYMM
(1.5)
7
2
8X (0.5)
3
6
SYMM
(R0.05) TYP
12X (0.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:30X
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4221631/B 07/2017
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
RWB0012A
X2QFN - 0.4 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(1.3)
6X (0.4)
12
9
4X (0.67)
2X (0.4)
1
2
8
SYMM
(1.5)
7
8X
METAL
8X (0.5)
3
6
(R0.05) TYP
SYMM
12X (0.2)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
PADS 1,2,7 & 8
96% PRINTED SOLDER COVERAGE BY AREA
SCALE:50X
4221631/B 07/2017
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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