TUSB551RWBR [TI]

具有 1.8V 电源的 USB 3.0 单通道转接驱动器 | RWB | 12 | -40 to 85;
TUSB551RWBR
型号: TUSB551RWBR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有 1.8V 电源的 USB 3.0 单通道转接驱动器 | RWB | 12 | -40 to 85

驱动 驱动器
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TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
TUSB551 1.8V USB 3.0 单通道转接驱动器,具有均衡功能  
1 特性  
3 说明  
1
1.8V 电源供电运行的 USB 3.0 超高速  
(SuperSpeed) 转接驱动器  
TUSB551 是一款第四代 USB 3.0 SuperSpeed (SS)  
转接驱动器,此转接驱动器特有低功耗 1.8V 电源,出  
色输出驱动性能,以及针对完全 USB3.0 兼容性的自  
LFPS 去加重控制。 此转接驱动器在均衡器中提供  
可选增益设置,以解决通道损耗问题。 这些设置由  
EQ 端子控制。 为了补偿下行传输线路损耗,此输出  
驱动器支持去加重和输出摆动(端子 DE OS)。  
这些设置可实现最佳性能、增加信号传输距离,以及在  
SuperSpeed USB 路径上灵活放置 TUSB551。  
超低功率架构:  
有源时:< 130mW  
U2/U3< 22mW  
无连接时 < 8mW  
最优接收器均衡:  
3/6/9dB  
出色的驱动性能  
自动低频率周期信号 (LFPS) 去加重控制,以满足  
USB 3.0 技术规格要求  
器件信息  
订货编号  
封装  
封装尺寸  
对主机/器件端没有要求  
小封装选项  
TUSB551RWBR  
X2QFN (12)  
1.6mm x 1.6mm  
支持热插拔  
静电放电 (ESD) 保护超过 ±4kV 人体模型 (HBM)  
-40°C 85°C 工业温度范围  
2 应用范围  
手机  
平板电脑  
扩展坞  
电视  
通电的线缆  
背板  
4 简化电路原理图  
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.  
English Data Sheet: SLLSEJ1  
 
 
 
 
TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
www.ti.com.cn  
目录  
1
2
3
4
5
6
7
特性.......................................................................... 1  
应用范围................................................................... 1  
说明.......................................................................... 1  
简化电路原理图........................................................ 1  
修订历史记录 ........................................................... 2  
Terminal Configuration and Functions................ 3  
Specifications......................................................... 4  
7.1 Absolute Maximum Ratings ...................................... 4  
7.2 Handling Ratings....................................................... 4  
7.3 Recommended Operating Conditions....................... 4  
7.4 Thermal Information.................................................. 4  
7.5 Power Supply Electrical Characteristics ................... 5  
7.6 DC Electrical Characteristics .................................... 5  
7.7 AC Electrical Characteristics..................................... 5  
7.8 Timing Requirements/Timing Diagrams.................... 6  
7.9 Switching Characteristics.......................................... 8  
7.10 Typical Characteristics............................................ 8  
8
9
Detailed Description .............................................. 9  
8.1 Overview ................................................................... 9  
8.2 Functional Block Diagram ......................................... 9  
8.3 Feature Description................................................... 9  
8.4 Device Functional Modes........................................ 10  
Applications and Implementation ...................... 11  
9.1 Application Information............................................ 11  
9.2 Typical Application .................................................. 11  
10 Power Supply Recommendations ..................... 13  
11 Layout................................................................... 13  
11.1 Layout Guidelines ................................................. 13  
11.2 Layout Example .................................................... 14  
12 器件和文档支持 ..................................................... 15  
12.1 Trademarks........................................................... 15  
12.2 Electrostatic Discharge Caution............................ 15  
12.3 Glossary................................................................ 15  
13 机械封装和可订购信息 .......................................... 15  
5 修订历史记录  
Changes from Original (March 2014) to Revision A  
Page  
已更改 从产品预览更改为生产数据......................................................................................................................................... 1  
2
版权 © 2014, Texas Instruments Incorporated  
 
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
6 Terminal Configuration and Functions  
RWB Package  
1.6 mm x 1.6 mm  
(Top View)  
GND VCC  
RXP  
RXN  
NC  
3
4
5
6
12 TXP  
2
1
11 TXN  
10 NC  
7
8
OS  
9
NC  
EQ  
DE  
Terminal Functions  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
VCC  
NO.  
1
Power  
GND  
1.8 V Power Supply.  
Ground.  
GND  
2
Differential  
input  
RXP  
RXN  
3
4
Differential input for 5Gbps SuperSpeed positive signals.  
Differential  
input  
Differential input for 5Gbps SuperSpeed negative signals.  
Not internally connected  
NC  
OS  
EQ  
5, 9, 10  
6
7
CMOS Input Sets output swing on the TX. 2-state input with integrated pull-up and pull-down resistors.  
CMOS Input Sets equalizer gain on the RX. 3-state input with integrated pull-up and pull-down resistors.  
Sets output de-emphasis on the TX. 3-state input with integrated pull-up and pull-down  
DE  
8
CMOS Input  
resistors.  
Differential  
TXN  
TXP  
11  
12  
Differential output for 5Gbps SuperSpeed negative signals.  
output  
Differential  
Differential output for 5Gbps SuperSpeed positive signals.  
output  
Copyright © 2014, Texas Instruments Incorporated  
3
TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
www.ti.com.cn  
7 Specifications  
7.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.3  
–0.3  
–0.3  
MAX  
UNIT  
VCC Supply voltage range  
2.3  
1.5  
V
Differential I/O  
Voltage range at any input or output terminal  
CMOS Inputs  
V
2.3  
TJ  
Maximum junction temperature  
105  
°C  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions  
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
7.2 Handling Ratings  
MIN  
MAX UNIT  
TSTG  
ESD  
Storage temperature  
Electrostatic discharge  
–65  
150  
±4  
°C  
kV  
V
Human Body Model (all terminals)(1)  
Charged-device model (all terminals)(2)  
±1250  
(1) Tested in accordance with JEDEC Standard 22, Test Method A114-B.  
(2) Tested in accordance with JEDEC Standard 22, Test Method C101-A.  
7.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
1.62  
–40  
75  
NOM  
MAX  
1.98  
85  
UNIT  
V
VCC  
TA  
Main power supply  
1.8  
Operating free-air temperature  
AC coupling capacitor  
°C  
CAC  
100  
200  
nF  
7.4 Thermal Information  
TUSB551  
THERMAL METRIC(1)  
RWB PACKAGE  
UNIT  
12 TERMINALS  
θJA  
Junction-to-ambient thermal resistance(2)  
Junction-to-case (top) thermal resistance(3)  
Junction-to-board thermal resistance(4)  
Junction-to-top characterization parameter(5)  
Junction-to-board characterization parameter(6)  
175.2  
71.5  
40.5  
2.5  
θJCtop  
θJB  
°C/W  
ψJT  
ψJB  
40.5  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as  
specified in JESD51-7, in an environment described in JESD51-2a.  
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-  
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.  
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB  
temperature, as described in JESD51-8.  
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted  
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).  
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted  
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).  
4
Copyright © 2014, Texas Instruments Incorporated  
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
7.5 Power Supply Electrical Characteristics  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Link in U0 with SuperSpeed data  
transmission; OS = Low; DE = Low  
71.65  
ICC-ACTIVE Average active current  
mA  
Link in U0 with SuperSpeed data  
transmission; OS = Floating; DE =  
Low  
82.35  
Link has some activity, not in U1;  
OS = Low  
ICC-IDLE  
ICC-U2U3  
ICC-NC  
Average current in idle state  
Average current in U2/U3  
35  
12.20  
4.3  
mA  
mA  
mA  
Link in U2 or U3  
No SuperSpeed device is connected  
to TXP/TXN  
Average current with no connection  
7.6 DC Electrical Characteristics  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
VCC * 0.2  
26  
UNIT  
3-State CMOS Inputs (EQ, DE)  
VIH  
VIM  
VIL  
VF  
High-level input voltage  
Mid-level input voltage  
Low-level input voltage  
Floating voltage  
VCC * 0.8  
V
V
VCC / 2  
V
VIN = High impedance  
VCC / 2  
105  
V
RPU  
RPD  
IIH  
Internal pull-up resistance  
Internal pull-down resistance  
High-level input current  
Low-level input current  
kΩ  
kΩ  
µA  
µA  
105  
VIN = 1.98V  
VIN = GND  
IIL  
–26  
2-State CMOS Inputs (OS)  
VIL  
VIM  
VF  
Low-level input voltage  
VCC * 0.8  
V
V
Mid-level input voltage  
Floating voltage  
VCC/2  
VCC/2  
105  
VIN = High Impedance  
VIN = GND  
V
RPD  
IIM  
Internal pull-down resistance  
Mid-level input current  
Low-level input current  
Ω
26  
µA  
µA  
IIL  
-26  
7.7 AC Electrical Characteristics  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Differential Receiver (RXP, RXN)  
VCM-RX  
Common-mode voltage bias in the  
receiver (DC)  
0
91  
24  
V
Ω
Ω
Present after a SuperSpeed device  
is detected on TXP/TXN  
ZRX-DIFF  
ZRX-CM  
Differential input impedance (DC)  
72  
18  
120  
30  
Common-mode input impedance  
(DC)  
Present after a SuperSpeed device  
is detected on TXP/TXN  
Present when no SuperSpeed  
device is detected on TXP/TXN.  
Measured over the range of 0-  
500mV with respect to GND.  
ZRX-HIGH-  
IMP-DC-POS  
Common-mode input impedance  
with termination disabled (DC)  
25  
150  
400  
kΩ  
VRX-LFPS-  
DET-DIFF-PP  
CRX  
Low Frequency Periodic Signaling  
(LFPS) detect threshold  
Below the minimum is squelched.  
100  
300  
mVpp  
fF  
RX input capacitance to GND  
At 2.5GHz  
Copyright © 2014, Texas Instruments Incorporated  
5
TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
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AC Electrical Characteristics (continued)  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Differential Transmitter (TXP, TXN)  
OS = Low, DE=Low  
1050  
1200  
Transmitter differential voltage swing  
VTX-DIFF-PP  
mVpp  
mVpp  
(transition-bit)(1)  
OS = Floating, DE=Low  
VTX-DIFF-  
PP-LFPS  
LFPS differential voltage swing  
OS = Low, Floating  
800  
–3  
1200  
–4  
DE = Low, OS = Floating  
DE = Floating, OS = Floating  
DE = High, OS = Floating  
At 2.5GHz  
0
–3.5  
–6  
VTX-DE-  
RATIO  
Transmitter de-emphasis  
dB  
CTX  
TX input capacitance to GND  
1.25  
120  
pF  
ZTX-DIFF  
Differential impedance of the driver  
80  
20  
Ω
Common-mode impedance of the  
driver  
Measured with respect to AC ground  
over 0-500mV  
ZTX-CM  
ITX-SC  
30  
60  
Ω
mA  
V
TX short circuit current  
TX+/- shorted to GND  
Common-mode voltage bias in the  
transmitter (DC)  
VCM-TX  
0.6  
0
0.8  
AC common-mode voltage swing in  
active mode  
VCM-TX-AC  
Within U0 and within LFPS  
Tested with a high-pass filter  
100  
10  
mVpp  
mVpp  
mV  
VTX-IDLE-  
DIFF -AC-PP  
VTX-CM-  
ΔU1-U0  
Differential voltage swing during  
electrical idle  
Absolute delta of DC CM voltage  
during active and idle states  
100  
10  
VTX-IDLE-  
DIFF-DC  
DC electrical idle differential output  
voltage  
Voltage must be low pass filtered to  
remove any AC component  
0
mV  
Voltage change to allow receiver  
detect  
Positive voltage to sense receiver  
termination  
Vdetect  
600  
mV  
(1) VTX-DIFF-PP is measured at the TX output with no load and no trace.  
7.8 Timing Requirements/Timing Diagrams  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Apply 0V to VCC, connect  
Time from power applied until RX  
termination  
SuperSpeed termination to TX±,  
apply 1.8V to VCC, and measure  
when ZRX-DIFF is enabled.  
tREADY  
52  
ms  
Differential Transmitter (TXP, TXN)  
20%-80% of differential voltage  
tr, tf  
Output rise/fall times (see Figure 3) measured 1 inch from the output  
terminal  
56  
ps  
ps  
20%-80% of differential voltage  
tRF-MM  
Output rise/fall time mismatch  
measured 1 inch from the output  
terminal  
2.6  
6
Copyright © 2014, Texas Instruments Incorporated  
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
IN  
Tdiff_HL  
Tdiff_LH  
OUT  
Figure 1. Propagation Delay Timing  
IN+  
VEID_TH  
Vcm  
IN-  
tidleExit  
tidleEntry  
OUT+  
Vcm  
OUT-  
Figure 2. Electrical Idle Mode Exit and Entry Delay Timing  
80%  
20%  
tr  
tf  
Figure 3. Output Rise and Fall Times  
Copyright © 2014, Texas Instruments Incorporated  
7
 
 
TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
www.ti.com.cn  
7.9 Switching Characteristics  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Differential Transmitter (TXP, TXN)  
De-Emphasis = –3.5dB Propagation  
delay between 50% level at input  
and output  
Tdiff-LH  
Tdiff-HL  
,
Differential propagation delay times  
(see Figure 1)  
278  
6
ps  
ns  
tidleEntry  
tidleExit  
,
Idle entry and exit times (see  
Figure 2)  
7.10 Typical Characteristics  
Figure 5. After Re-Driver EQ(3dB), Input = 12”,  
Output = 4”+3m Cable  
Figure 4. No Re-Driver, Trace Length = 16”+3m Cable  
Figure 7. After Re-Driver EQ(6dB), Input = 20”,  
Output = 4”+3m Cable  
Figure 6. No Re-Driver, Trace Length = 24”+3m Cable  
Figure 9. After Re-Driver De = 3.5dB, EQ = 3dB, Input = 16",  
Output = 20"+3m Cable  
Figure 8. No Re-Driver, Trace Length = 36"+3m Cable  
8
Copyright © 2014, Texas Instruments Incorporated  
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
8 Detailed Description  
8.1 Overview  
When 5Gbps SuperSpeed USB signals travel across a PCB or cable, signal integrity degrades due to loss and  
inter-symbol interference. The TUSB551 recovers incoming data by applying equalization that compensates for  
channel loss, and drives out signals with a high differential voltage. This extends the possible channel length,  
and enables systems to pass USB 3.0 compliance.  
The TUSB551 advanced state machine makes it transparent to hosts and devices. After power up, the TUSB551  
periodically performs receiver detection on the TX pair. If it detects a SuperSpeed USB receiver, the RX  
termination is enabled, and the TUSB551 is ready to re-drive.  
The device’s ultra low-power architecture operates at a 1.8V power supply and achieves enhanced performance.  
The receiver equalizer has three gain settings that are controlled by terminal EQ: 3 dB, 6 dB, and 9 dB. The  
equalization should be set based on amount of insertion loss in the channel before the TUSB551. Likewise, the  
output driver supports configuration of De-Emphasis and Output Swing (terminals DE and OS). The automatic  
LFPS De-Emphasis control further enables the system to be USB3.0 compliant.  
The TUSB551 operates over the industrial temperature range of -40ºC to 85ºC in the 1.6mm x 1.6mm X2QFN  
package.  
8.2 Functional Block Diagram  
EQ  
DE OS  
Driver  
RX+  
RX-  
TX+  
TX-  
Receiver  
/
Equalizer  
VCC  
GND  
Advanced  
State Machine  
LFPS  
Controller  
8.3 Feature Description  
8.3.1 Receiver Equalization  
The purpose of receiver equalization is to compensate for channel insertion loss and inter-symbol interference in  
the system before the input of the TUSB551. The receiver overcomes these losses by attenuating the low  
frequency components of the signals with respect to the high frequency components. The proper gain setting  
should be selected to match the channel insertion loss before the input of the TUSB551.  
8.3.2 De-Emphasis Control and Output Swing  
The differential driver output provides selectable de-emphasis and output swing control in order to achieve  
USB3.0 compliance. The TUSB551 offers a unique way to adjust output de-emphasis and transmitter swing  
based on the OS and DE terminals. The level of de-emphasis required in the system depends on the channel  
length after the output of the re-driver.  
Copyright © 2014, Texas Instruments Incorporated  
9
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www.ti.com.cn  
Feature Description (continued)  
Figure 10. Transmitter Differential Voltage, OS=Floating  
8.3.3 Automatic LFPS Detection  
The TUSB551 features an intelligent low frequency periodic signaling (LFPS) controller. The controller senses  
the low frequency signals and automatically disables the driver de-emphasis, for full USB3.0 compliance.  
8.4 Device Functional Modes  
8.4.1 Receiver Equalization Settings  
TERMINAL  
DESCRIPTION  
LOGIC STATE  
Low  
GAIN  
3 dB  
6 dB  
9 dB  
EQ  
Equalization amount  
Floating (NC)  
High  
8.4.2 De-Emphasis Control Settings  
DE-EMPHASIS RATIO  
TERMINAL  
INTERNAL TIE  
LOGIC STATE  
FOR OS = LOW  
FOR OS = FLOATING  
Low  
Floating (NC)  
High  
0 dB  
-2 dB  
-4 dB  
0 dB  
-3.5 dB  
-6 dB  
DE  
De-emphasis amount  
8.4.3 Output Swing Control Settings  
TERMINAL  
INTERNAL TIE  
LOGIC STATE  
OUTPUT DIFFERENTIAL VOLTAGE  
1050 mVpp  
Low  
Output swing amplitude,  
DE = Low  
OS  
Floating (NC)  
1200 mVpp  
10  
Copyright © 2014, Texas Instruments Incorporated  
 
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
9 Applications and Implementation  
9.1 Application Information  
One example of the TUSB551 used in a Host application on transmit and receive channels is shown below. The  
re-driver is needed on the transmit path to pass transmitter compliance due to loss between the Host and  
connector. The re-driver uses it’s equalization to recover the insertion loss and re-drive the signal with boosted  
swing down the remaining channel, through the USB3.0 cable, and into the device PCB. Additionally, the  
TUSB551 is needed on the receive channel for the Host to pass receiver jitter tolerance. The re-driver recovers  
the loss from the Device PCB, connector, and USB 3.0 cable and re-drives the signal going into the Host  
receiver. The equalization, output swing, and de-emphasis settings are dependent upon the type of USB3.0  
signal path and end application.  
Figure 11. Application for Host Systems  
9.2 Typical Application  
9.2.1 Transmit and Receive Channels  
The TUSB551 is placed in the transmitter channel and connected to a USB3 Type-A connector. This particular  
example shows the polarity swapped on the RXP/N and TXP/N differential pairs. The positive signal may be  
routed to RXN as long as the corresponding output, TXN, is routed to the positive terminal on the connector  
(SSTXP). This allows routing to be done without crossing the differential pair signals and using extra vias. The  
EQ and DE terminals must be pulled up, pulled down, or left floating depending on the amount of equalization or  
de-emphasis that is desired. The OS terminal must be pulled down or left floating depending on the required  
output swing. In this example, the EQ terminal is pulled low through a resistor and the OS and DE terminals are  
left floating.  
Figure 12. Transmitter Channel Implementation with Differential Pair Polarity Swapped  
Copyright © 2014, Texas Instruments Incorporated  
11  
TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
www.ti.com.cn  
Typical Application (continued)  
The TUSB551 is placed in the receiver channel and connected to a USB3 Type-A connector. This example  
shows the polarity matched, and the TUSB551 footprint is rotated so the trace routing of the differential pairs will  
not overlap. The EQ and DE terminals must be pulled up, pulled down, or left floating depending on the amount  
of equalization or de-emphasis that is desired. The OS terminal must be pulled down or left floating depending  
on the required output swing. In this example, the EQ and OS terminals are left floating and the DE terminal is  
pulled up through a resistor.  
Figure 13. Receive Channel Implementation  
9.2.1.1 Design Requirements  
DESIGN PARAMETER  
Input Voltage Range  
Output Voltage Range  
Equalization  
EXAMPLE VALUE  
100 mV to 1200 mV  
1050 mV to 1200 mV  
3, 6, 9 dB  
De-Emphasis  
0, –3.5, –6 dB (OS Floating)  
1.8 V nominal supply  
VCC  
9.2.1.2 Detailed Design Procedure  
To begin the design process, determine the following:  
Equalization (EQ) setting  
De-Emphasis (DE) setting  
Output Swing Amplitude (OS) setting  
The equalization should be set based on the insertion loss in the pre-channel (channel before the TUSB551  
device). The input voltage to the device is able to have a large range because of the receiver sensitivity and the  
available EQ settings. The EQ terminal can be pulled high through a resistor to VCC, low through a resistor to  
ground, or left floating. The application schematic above shows the implementation. See Device Functional  
Modes section for EQ values.  
The De-Emphasis setting should be set based on the length and characteristics of the post channel (channel  
after the TUSB551 device). Output de-emphasis can be tailored using the DE terminal. This terminal should be  
pulled high through a resistor to VCC, low through a resistor to ground, or left floating. The application schematic  
above shows the implementation. See Device Functional Modes section for DE values.  
12  
Copyright © 2014, Texas Instruments Incorporated  
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
The output swing setting can also be configured based on the amplitude needed to pass the compliance test.  
This setting will also be based on the length of interconnect or cable the TUSB551 is driving. This terminal  
should be pulled low through a resistor to ground or left floating. The application schematic above shows the  
implementation. See Device Functional Modes section for OS values.  
9.2.1.3 Application Performance Plot  
Figure 14. TX Compliance Test with TUSB551 EQ = 3dB OS = 1050mV DE = 0dB  
10 Power Supply Recommendations  
This device is designed to operate with a 1.8V supply. If using a higher voltage system power supply such as  
VBUS, a voltage regulator can be used to step down to 1.8V. Decoupling capacitors may be used to reduce  
noise and improve power supply integrity.  
11 Layout  
11.1 Layout Guidelines  
The 100nF capacitors on the TXP and SSTXN nets should be placed close to the USB connector (Type A,  
Type B, and so forth).  
The ESD and EMI protection devices (if used) should also be placed as close as possible to the USB  
connector.  
Place voltage regulators as far away as possible from the differential pairs.  
In general, the large bulk capacitors associated with each power rail should be placed as close as possible to  
the voltage regulators.  
It is recommended that small decoupling capacitors for the 1.8V power rail be placed close to the TUSB551  
as shown below.  
The SuperSpeed differential pair traces for RXP/N and TXP/N must be designed with a characteristic  
impedance of 90±10%. The PCB stack-up and materials will determine the width and spacing needed for a  
characteristic impedance of 90.  
The SuperSpeed differential pair traces should be routed parallel to each other as much as possible. It is  
recommended the traces be symmetrical.  
In order to minimize cross talk, it is recommended to keep high speed signals away from each other. Each  
pair should be separated by at least 5 times the signal trace width. Separating with ground will also help  
Copyright © 2014, Texas Instruments Incorporated  
13  
TUSB551  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
www.ti.com.cn  
Layout Guidelines (continued)  
minimize cross talk.  
Route all differential pairs on the same layer adjacent to a solid ground plane.  
Do not route differential pairs over any plane split.  
Adding test points will cause impedance discontinuity and will therefore negatively impact signal performance.  
If test points are used, they should be placed in series and symmetrically. They must not be placed in a  
manner that causes stub on the differential pair.  
Avoid 90 degree turns in traces. The use of bends in differential traces should be kept to a minimum. When  
bends are used, the number of left and right bends should be as equal as possible and the angle of the bend  
should be 135 degrees. This will minimize any length mismatch caused by the bends and therefore  
minimize the impact bends have on EMI.  
Match the etch lengths of the differential pair traces. There should be less than 5 mils difference between a  
SS differential pair signal and its complement. The USB 2.0 differential pairs should not exceed 50 mils  
relative trace length difference.  
The etch lengths of the differential pair groups do not need to match (i.e. the length of the RXP/N pair to that  
of the TXP/N pair), but all trace lengths should be minimized.  
Minimize the use of vias in the differential pair paths as much as possible. If this is not practical, make sure  
that the same via type and placement are used for both signals in a pair. Any vias used should be placed as  
close as possible to the TUSB551 device.  
To ease routing, the polarity of the SS differential pairs can be swapped. This means that TXP can be routed  
to TXN or RXN can be routed to RXP.  
Do not place power fuses across the differential pair traces.  
11.2 Layout Example  
Figure 15. TUSB551 PCB Layout Example  
14  
Copyright © 2014, Texas Instruments Incorporated  
TUSB551  
www.ti.com.cn  
ZHCSC54A MARCH 2014REVISED MARCH 2014  
12 器件和文档支持  
12.1 Trademarks  
All trademarks are the property of their respective owners.  
12.2 Electrostatic Discharge Caution  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
12.3 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms and definitions.  
13 机械封装和可订购信息  
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。 要获得这份数据表的浏览器版本,请查阅左侧的导航栏。  
Copyright © 2014, Texas Instruments Incorporated  
15  
重要声明  
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都遵循在订单确认时所提供的TI 销售条款与条件。  
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TI 已明确指定符合 ISO/TS16949 要求的产品,这些产品主要用于汽车。在任何情况下,因使用非指定产品而无法达到 ISO/TS16949 要  
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IMPORTANT NOTICE  
邮寄地址: 上海市浦东新区世纪大道1568 号,中建大厦32 楼邮政编码: 200122  
Copyright © 2014, 德州仪器半导体技术(上海)有限公司  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TUSB551RWBR  
ACTIVE  
X2QFN  
RWB  
12  
3000 RoHS & Green  
NIPDAU  
Level-2-260C-1 YEAR  
-40 to 85  
51  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TUSB551RWBR  
X2QFN  
RWB  
12  
3000  
180.0  
8.4  
1.8  
1.8  
0.61  
4.0  
8.0  
Q2  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
X2QFN RWB 12  
SPQ  
Length (mm) Width (mm) Height (mm)  
213.0 191.0 35.0  
TUSB551RWBR  
3000  
Pack Materials-Page 2  
PACKAGE OUTLINE  
RWB0012A  
X2QFN - 0.4 mm max height  
SCALE 6.500  
PLASTIC QUAD FLATPACK - NO LEAD  
1.65  
1.55  
B
A
PIN 1 INDEX AREA  
1.65  
1.55  
C
0.4 MAX  
SEATING PLANE  
0.05 C  
2X 1.2  
SYMM  
(0.13)  
TYP  
0.05  
0.00  
6X 0.4  
3
6
2
1
7
8
SYMM  
2X  
0.4  
0.4  
8X  
0.2  
12  
9
0.25  
0.15  
12X  
0.6  
4X  
0.4  
0.07  
0.05  
C B A  
C
4221631/B 07/2017  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
RWB0012A  
X2QFN - 0.4 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(1.3)  
6X (0.4)  
9
12  
4X (0.7)  
2X (0.4)  
1
8
SYMM  
(1.5)  
7
2
8X (0.5)  
3
6
SYMM  
(R0.05) TYP  
12X (0.2)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:30X  
0.05 MAX  
ALL AROUND  
0.05 MIN  
ALL AROUND  
METAL  
SOLDER MASK  
OPENING  
EXPOSED METAL  
EXPOSED METAL  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4221631/B 07/2017  
NOTES: (continued)  
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
RWB0012A  
X2QFN - 0.4 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(1.3)  
6X (0.4)  
12  
9
4X (0.67)  
2X (0.4)  
1
2
8
SYMM  
(1.5)  
7
8X  
METAL  
8X (0.5)  
3
6
(R0.05) TYP  
SYMM  
12X (0.2)  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
PADS 1,2,7 & 8  
96% PRINTED SOLDER COVERAGE BY AREA  
SCALE:50X  
4221631/B 07/2017  
NOTES: (continued)  
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
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Copyright © 2021 德州仪器半导体技术(上海)有限公司  

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