UC2525ADWG4 [TI]
REGULATING PULSE WIDTH MODULATORS; 调节脉冲宽度调制器
| 型号： | UC2525ADWG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | REGULATING PULSE WIDTH MODULATORS |
| 文件： | 总17页 (文件大小：747K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
REGULATING PULSE WIDTH MODULATORS
1
FEATURES
DESCRIPTION
•
8-V to 35-V Operation
•
•
•
•
•
•
•
•
•
5.1-V Reference Trimmed to 1%
100-Hz to 500-kHz Oscillator Range
Separate Oscillator Sync Terminal
Adjustable Deadtime Control
Internal Soft-Start
The UC1525A/1527A series of pulse width modulator
integrated circuits are designed to offer improved
performance and lowered external parts count when
used in designing all types of switching power
supplies. The on-chip +5.1-V reference is trimmed to
1% and the input common-mode range of the error
amplifier includes the reference voltage, eliminating
external resistors. A sync input to the oscillator allows
multiple units to be slaved or a single unit to be
synchronized to an external system clock. A single
resistor between the CT and the discharge terminals
provides a wide range of dead-time adjustment.
These devices also feature built-in soft-start circuitry
with only an external timing capacitor required. A
shutdown terminal controls both the soft-start circuitry
and the output stages, providing instantaneous turn
off through the PWM latch with pulsed shutdown, as
well as soft-start recycle with longer shutdown
commands.
Pulse-by-Pulse Shutdown
Input Undervoltage Lockout With Hysteresis
Latching PWM to Prevent Multiple Pulses
Dual Source/Sink Output Drivers
BLOCK DIAGRAM
OSC
OUT
VREF
16
4
13
11
VC
NOR
NOR
UVLO
Reference
Regulator
+VIN 15
Lockout
OUTPUT A
GROUND 12
To Internal
Circutry
SYNC
RT
3
6
5
7
Flip
Flop
OSC
14
OUTPUT B
CT
DISCHARGE
UC1525A
Output Stage
13
11
VC
R
COMP
S
OR
COMPENSATION 9
PWM
Latch
Error
Amp
V
OUTPUT A
REF
INV INPUT
NI INPUT
1
2
8
S
A
50 m
SOFTSTART
OR
3 kW
SHUTDOWN 10
14
OUTPUT B
5 kW
UC1527A
Output Stage
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2008, Texas Instruments Incorporated
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (continued)
These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start
capacitor discharged for sub-normal input voltages. This lockout circuitry includes approximately 500 mV of
hysteresis for jitter- free operation. Another feature of these PWM circuits is a latch following the comparator.
Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period.
The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking
in excess of 200 mA. The UC1525A output stage features NOR logic, giving a LOW output for an OFF state. The
UC1527A utilizes OR logic which results in a HIGH output level when OFF.
ABSOLUTE MAXIMUM RATINGS(1)
UCx52xA
40
UNIT
+VIN
VC
Supply voltage
Collector supply voltage
Logic inputs
40
V
–0.3 to +5.5
–0.3 to +VIN
500
Analog inputs
Output current, source or sink
Reference output current
Oscillator charging current
Power dissipation at TA = +25°C(2)
Power dissipation at TC = +25°C(2)
Operating junction temperature
Storage temperature range
Lead temperature (soldering, 10 seconds)
50
mA
mW
°C
5
1000
2000
–55 to 150
–65 to 150
300
(1) Values beyond which damage may occur.
(2) See Thermal Characteristics table.
RECOMMENDED OPERATING CONDITIONS(1)
MIN
8
MAX
UNIT
+VIN
VC
Input voltage
35
35
V
Collector supply voltage
Sink/source load current (steady state)
Sink/source load current (peak)
Reference load current
4.5
0
100
400
20
0
mA
0
Oscillator frequency range
Oscillator timing resistor
Oscillator timing capacitorm
Dead time resistor range
100
2
400
150
0.01
500
125
85
Hz
kΩ
µF
Ω
0.001
0
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
–55
–25
0
Operating ambient temperature range
°C
70
(1) Range over which the device is functional and parameter limits are assured.
2
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Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
THERMAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PACKAGE
J-16
θJA
80-120
90
θJC
28
45
25
34
20
N-16
DW-16
PLCC-20
LCC-20
45-90
43-75
70-80
PLCC-20, LCC-20
Q AND L PACKAGES
(TOP VIEW)
CONNECTION DIAGRAMS
DIL-16
J or N PACKAGE
(TOP VIEW)
INV Input
NI Input
SYNC
VREF
+VIN
1
2
3
4
5
6
7
8
16
15
14
13
3
2
1
20 19
18
Output B
VC
SYNC
Output B
VC
4
5
6
7
8
OSC Output
OSC Output
CT
17
16
15
NC
Ground
NC
CT
RT
12 Ground
RT
11
10
9
Output A
14 Output A
9 10 11 12 13
Discharge
Soft Start
Shutdown
Compensation
NC − No internal connection
Copyright © 1997–2008, Texas Instruments Incorporated
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UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
ELECTRICAL CHARACTERISTICS
+VIN = 20 V, and over operating temperature, unless otherwise specified, TA = TJ
PARAMETER
REFERENCE
TEST CONDITIONS
MIN
TYP
MAX UNIT
UC152xA, UC252xA
UC352xA
5.05
5.0
5.10
5.1
10
5.15
V
Output voltage
TJ = 25°C
5.2
Line regulationg
VIN = 8 V to 35 V
20
Load regulationg
Temperature stability(1)
IL = 0 mA to 20 mA
Over operating range
20
50
50
mV
20
UC152xA, UC252xA
UC352xA
5.0
5.2
Total output variation(1)
Line, load, and temperature
V
4.95
5.25
100
Shorter circuit current
Output noise Voltage(1)
VREF = 0, TJ = 25°C
10 Hz ≤ 10 kHz, TJ = 25°C
TJ = 125°C
80
40
20
mA
200 µVrms
(1)
Long term stability
50
mV
OSCILLATOR SECTION(2)
Initial accuracy(1) (2)
TJ = 25°C
2%
0.3%
1%
6%
1%
2%
6%
120
UC152xA, UC252xA
UC352xA
Voltage stability(1) (2)
VIN = 8 V to 35 V
Temperature stability(1)
Minimum frequency
Maximum frequency
Current mirror
Clock amplitude(1) (2)
Clock width(1) (2)
Over operating range
RT = 200 kΩ, CT = 0.1 µF
RT = 2 kΩ, CT = 470 pF
IRT = 2 mA
3%
Hz
kHz
mA
V
400
1.7
3.0
0.3
1.2
2.0
3.5
0.5
2.0
1.0
2.2
TJ = 25°C
1.0
2.8
2.5
µs
Syncronization threshold(1) (2)
V
Sync input current
Sync voltage = 3.5 V
mA
ERROR AMPLIFIER SECTION (VCM = 5.1 V)
UC152xA, UC252xA
UC352xA
0.5
2
5
10
10
1
mV
Input offset voltage
Input bias current
Input offset current
1
µA
DC open loop gain
R
L ≥ 10 MΩ
60
1
75
2
dB
MHz
mS
Gain-bandwidth product(1)
DC transconductanc(1) (3)
Low-level output voltage
High-level output voltage
Common mode rejection
Supply voltage rejection
AV = 0 dB, TJ = 25°C
TJ = 25°C, 30 kΩ ≤ RL ≤ 1 MΩ
1.1
1.5
0.2
5.6
75
60
0.5
V
3.8
60
50
VCM = 1.5 V to 5.2 V
VIN = 8 V to 35 V
dB
(1) These parameters, although ensured over the recommended operating conditions, are not 100% tested in production.
(2) Tested at fOSC = 40 kHz (RT = 3.6 kΩ, CT = 0.01 µF, RD = 0. Approximate oscillator frequency is defined by:
1
f +
ǒ
DǓ
C 0.7R ) 3R
T
T
(3) DC transconductance (gM) relates to DC open-loop voltage gain (AV) according to the following equation: AV = gMRL where RL is the
resistance from pin 9 to ground. The minimum gM specification is used to calculate minimum AV when the error amplifier output is
loaded.
4
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Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
ELECTRICAL CHARACTERISTICS (continued)
+VIN = 20 V, and over operating temperature, unless otherwise specified, TA = TJ
PARAMETER
PWM COMPARATOR
Minimum duty-cycle
TEST CONDITIONS
MIN
TYP
MAX UNIT
0%
Maximum duty-cycle
45%
0.7
49%
0.9
Zero duty-cycle
Input threshold(4)
V
Maximum duty-cycle
3.3
3.6
Input bias current(4)
SHUTDOWN
0.05
1.0
µA
Soft-start current
VSD = 0 V, VSS = 0 V
VSD = 2.5 V
25
50
0.4
0.8
0.4
0.2
80
0.7
1.0
1.0
0.5
µA
Soft-start low level
Shutdown threshold
Shutdown input current
Shutdown Delay(5)
V
To outputs, VSS = 5.1 V, TJ = 25°C
VSD = 2.5 V
0.6
mA
VSD = 2.5 V, TJ = 25°C
µs
OUTPUT DRIVERS (each output) (VC = 20 V)
ISINK = 20 mA
0.2
1.0
19
18
7
0.4
2.0
Low-level output voltage
High-level output voltage
ISINK = 100 mA
ISOURCE = 20 mA
ISOURCE = 100 mA
VCOMP and VSS = High
VC = 35 V
18
17
6
V
Undervoltage lockout
VC OFF Current(6)
Rise Time(5)
8
200
600
300
µA
CL = 1 nF, TJ = 25°C
CL = 1 nF, TJ = 25°C
100
50
ns
Fall Time(5)
TOTAL STANDBY CURRENT
Supply Current
VIN = 35 V
14
20
mA
(4) Tested at fOSC = 40 kHz (RT = 3.6 kΩ, CT = 0.01 µF, RD = 0 Ω.
(5) These parameters, although ensured over the recommended operating conditions, are not 100% tested in production.
(6) Collector off-state quiescent current measured at pin 13 with outputs low for UC1525A and high for UC1527A.
UC1525A Error Amplifier
+V
IN
15
Q3
Q4
Q1
Q2
Inv Input
NI Input
1
2
to PWM
Comparator
100 W
5.8 V
200 mA
100 mA
Comp
9
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UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS
+V
IN
+V
C
13
Q7
Q5
Q9
Q10
Q11
Q4
11
14
Output
+V
REF
Q8
Q6
Q3
Q6 Ommitted
In UC1527A
2 kW
Q1
5 kW
Clock
Q2
10 kW 10 kW
F/F PWM
Figure 1. UC1525A Output Circuit (1/2 circuit shown)
Q1
+V
SUPPLY
To Output Filter
R1
R2
13
+V
C
A
11
14
UC1525A
B
GND
12
Return
Figure 2. Grounded Driver Outputs For Single-Ended Supplies
For single-ended supplies, the driver outputs are grounded. The VC termainal is switched to ground by the
totem-pole source transistors on alternate oscillator cycles.
6
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UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
+15 V
13
+V
Q1
30 W
T1
C
11
D1
A
UC1525A
Q2
30 W
B
14
D2
GND
12
D1, D2: UC3611
Return
Figure 3. Output Drivers With Low Source Impedance
The low source impedance of the output drivers provides rapid charging of power FET input capacitance while
minimizing external components.
V
T
= 20 V,
IN
= 25°C
4
3
A
2
Source = V − V
OH
1
0
O
Sink = V
OL
0.1
.1
.2
1
Output Current, Source or Sink − A
Figure 4. UC1525A Output Saturation Characteristics.
+V
SUPPLY
R1
C1
R2
C2
R3
13
+V
C
Q1
Q2
A
T1
11
14
UC1525A
B
GND
12
Return
Figure 5. Conventional Push-Pull Bipolar Design
In conventional push-pull bipolar designs, forward base drive is controlled by R1–R3. Rapid turn-off times for the
power devices are achieved with speed-up capacitors C1 and C2.
Copyright © 1997–2008, Texas Instruments Incorporated
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UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
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SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
+V
SUPPLY
Q1
R1
T1
C1
13
+V
C
A
11
14
UC1525A
Q2
30 W
B
C2
GND
R2
12
Return
D1, D2: UC3611
Figure 6. Low Power Transformers
Low power transformers can be driven by the UC1525A. Automatic reset occurs during dead time, when both
ends of the primary winding are switched to ground.
V
REF
16
Q1
Q5 Q8
7.4 kW
R
6
5
Q3
T
C
T
Q6 Q9
2 kW
14 kW
Ramp To PWM
Q14
Q10
Q11
25 kW
2 kW
400 mA
23 kW
3
7
SYNC
DISCHARGE
Blanking To Outout
5 pF
Q4
Q2
1 kW
Q7
3 kW
250 kW
Q12
Q13
1 kW
GND 12
Clock
Figure 7. UC1525A Oscillator Schematic
8
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Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
Shutdown Options (See Block Diagram)
Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either can
readily accept a pull-down signal which only has to sink a maximum of 100 A to turn off the outputs. This is
subject to the added requirement of discharging whatever external capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the
available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions;
the PWM latch is immediately set providing the fastest turn-off signal to the outputs; and a 150-A current sink
begins to discharge the external soft-start capacitor. If the shutdown command is short, the PWM signal is
terminated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient
implementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will
ultimately discharge this external capacitor, recycling slow turn-on upon release.
Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation. All transitions of
the voltage on pin 10 should be within the time frame of one clock cycle and not repeated at a frequency higher
than 10 clock cycles.
Oscillator Charge Time vs RT and CT
Oscillator Discharge Time vs RT CT
200
500
C
C
= 1 nF
= 2 nF
= 5 nF
C
= 1 nF
= 2 nF
= 5 nF
T
T
C
T
T
100
50
C
T
C
T
400
300
200
C
T
T
= .01 µF
= .02 µF
C
= 0.1 µF
T
C
C
C
C
T
= .02 µF
= .05 µF
= .01 µF
= .05 µF
= 0.1 µF
T
C
T
T
T
C
20
10
5
2
6
5
7
D
100
0
R
R
T
C
T
R
= 0
5
D
1
2
10 20 50 100 200 1ms 2ms 5ms10ms
0.2 0.5
1
2
5
10 20
50 100 200
Charge Time − ms
Charge Time − ms
Figure 8.
Figure 9.
Maximum Value RD vs Minimum Value RT
Error Amplifier Voltage Gain and Phase vs Frequency
500
V
= 20 V,
125°C
IN
R
=∞
L
80
60
T = 25°C
J
R
L
= 1 MΩ
400
25°C
R
L
= 300 kΩ
Voltage Gain
−55°C
R
L
= 100 kΩ
300
40
20
0
R
= 30 kΩ
L
200
100
0
Max R For a Given R ,
D T
−180°
Min R For a Given R
Phase
10 k
T
D
−270°
−360°
10 M
100
1 k
100 k
1 M
2
4
6
8
10
12
f − Frequency − Hz
Minimum Recommended R − kW
T
Figure 10.
Figure 11.
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UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
www.ti.com
SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
V
REF
Reference
Regulator
+V
16
4
15
13
IN
Clock
0.1
0.1
0.1
V
C
Flip/
Flop
3 kW
SYNC
PWM
Adj.
A
B
11
3
6
Out A
10 kW
R
T
1 k, 1 W
(2)
Deadtime
3.6 kW
1.5 kW
.009
Ramp
7
5
100 W
14
Out B
Comp
.001
0.1
PWM
9
Gnd
12
8
1 = VOS
0.1
10 kW
2 = I(+)
3 = I(−)
50 mA
Soft-Start
1
1
2
2
3
5 mF
1
2
−
3
E/A
5 kW
5 kW
V/I Meter
+
1
1
10
V
REF
5 kW
2
2
3
3
Shutdown
D.U.T.
Figure 12. Lab Test Fixture
10
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Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
5962-89511012A
5962-89511032A
ACTIVE
LCCC
LCCC
FK
20
20
1
1
TBD
TBD
POST-PLATE
Call TI
N / A for Pkg Type
Call TI
-55 to 125 5962-89511012A
ACTIVE
FK
-55 to 125 5962-
89511032A
UC1525AL/
883B
5962-8951103EA
5962-89511042A
ACTIVE
ACTIVE
CDIP
J
16
20
1
1
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-55 to 125 5962-8951103EA
UC1525AJ/883B
LCCC
FK
-55 to 125 5962-89511042A
UC1527AL/
883B
5962-8951104EA
ACTIVE
CDIP
J
16
1
TBD
Call TI
Call TI
-55 to 125 5962-8951104EA
UC1527AJ/883B
UC1525AJ
ACTIVE
ACTIVE
CDIP
CDIP
J
J
16
16
25
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125 UC1525AJ
UC1525AJ883B
-55 to 125 5962-8951103EA
UC1525AJ/883B
UC1525AL
ACTIVE
ACTIVE
LCCC
LCCC
FK
FK
20
20
1
1
TBD
TBD
POST-PLATE
POST-PLATE
N / A for Pkg Type
N / A for Pkg Type
-55 to 125 UC1525AL
UC1525AL883B
-55 to 125 5962-
89511032A
UC1525AL/
883B
UC1527AJ
ACTIVE
ACTIVE
CDIP
CDIP
J
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125 UC1527AJ
UC1527AJ883B
-55 to 125 5962-8951104EA
UC1527AJ/883B
UC1527AL883B
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125 5962-89511042A
UC1527AL/
883B
UC2525ADW
UC2525ADWG4
UC2525ADWTR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
DW
DW
DW
16
16
16
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-25 to 85
-25 to 85
-25 to 85
UC2525ADW
UC2525ADW
UC2525ADW
Green (RoHS
& no Sb/Br)
2000
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
UC2525ADWTRG4
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-25 to 85
UC2525ADW
UC2525AJ
UC2525AN
ACTIVE
ACTIVE
CDIP
PDIP
J
16
16
1
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-25 to 85
-25 to 85
UC2525AJ
UC2525AN
N
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
UC2525ANG4
UC2525BDW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
SOIC
PDIP
PDIP
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
N
DW
DW
N
16
16
16
16
16
16
16
16
16
16
16
25
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
N / A for Pkg Type
-25 to 85
-25 to 85
-25 to 85
-25 to 85
-25 to 85
-40 to 85
-40 to 85
0 to 70
UC2525AN
Green (RoHS
& no Sb/Br)
UC2525BDW
UC2525BDW
UC2525BN
UC2525BDWG4
UC2525BN
40
Green (RoHS
& no Sb/Br)
25
Green (RoHS
& no Sb/Br)
UC2525BNG4
UC2527AN
N
25
Green (RoHS
& no Sb/Br)
N / A for Pkg Type
UC2525BN
N
25
Green (RoHS
& no Sb/Br)
N / A for Pkg Type
UC2527AN
UC2527ANG4
UC3525ADW
N
25
Green (RoHS
& no Sb/Br)
N / A for Pkg Type
UC2527AN
DW
DW
DW
DW
40
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UC3525ADW
UC3525ADW
UC3525ADW
UC3525ADW
UC3525ADWG4
UC3525ADWTR
UC3525ADWTRG4
40
Green (RoHS
& no Sb/Br)
0 to 70
2000
2000
Green (RoHS
& no Sb/Br)
0 to 70
Green (RoHS
& no Sb/Br)
0 to 70
UC3525AJ
UC3525AN
ACTIVE
ACTIVE
CDIP
PDIP
J
16
16
1
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
0 to 70
0 to 70
UC3525AJ
UC3525AN
N
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
UC3525ANG4
UC3525AQ
ACTIVE
ACTIVE
PDIP
N
16
20
25
46
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU SN
N / A for Pkg Type
0 to 70
0 to 70
UC3525AN
UC3525AQ
PLCC
FN
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
UC3525AQG3
ACTIVE
PLCC
FN
20
46
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
0 to 70
UC3525AQ
UC3527AJ
UC3527AN
ACTIVE
ACTIVE
CDIP
PDIP
J
16
16
1
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
0 to 70
0 to 70
UC3527AJ
UC3527AN
N
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
UC3527ANG4
ACTIVE
PDIP
N
16
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
UC3527AN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1525A, UC1527A, UC2525A, UC2525AM, UC3525A, UC3525AM, UC3527A, UC3527AM :
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Catalog: UC3525A, UC3527A, UC2525A, UC3525AM, UC3525A, UC3527AM, UC3527A
•
Military: UC2525AM, UC1525A, UC1525A, UC1527A, UC1527A
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UC2525ADWTR
SOIC
DW
16
2000
330.0
16.4
10.75 10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 16
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 38.0
UC2525ADWTR
2000
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
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endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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Copyright © 2013, Texas Instruments Incorporated
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