UC2578DP [TI]
Buck Pulse Width Modulator Stepdown Voltage Regulator; 降压型脉宽调制器的降压型稳压器
| 型号： | UC2578DP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Buck Pulse Width Modulator Stepdown Voltage Regulator |
| 文件： | 总7页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
application
INFO
UC2578
UC3578
available
Buck Pulse Width Modulator Stepdown Voltage Regulator
FEATURES
DESCRIPTION
• Provides Simple Single Inductor Buck The UC3578 is a PWM controller with an integrated high side floating gate
PWM Step-Down Voltage Regulation
driver. It is used in buck step down converters and regulates a positive
output voltage. Intended to be used in a distributed power system, the IC
allows operation from 14V to 72V input voltage which range includes the
prevalent telecomm bus voltages. The output duty cycle of the UC3578
can vary between 0% and 90% for operation over the wide input voltage
and load conditions.
• Drives External High Side NMOS
Switch
• 14V to 72V Input Voltage Operating
Range
• Contains 100kHz Internal Oscillator,
2V Reference and UVLO
The UC3578 simplifies the design of the single switch PWM buck converter
by incorporating a floating high side driver for an external N-channel
MOSFET switch. It also features a 100kHz fixed frequency oscillator, an
internal 2V precision reference, an error amplifier configured for voltage
mode operation, and a PWM comparator with latching logic. Comple-
menting the traditional voltage mode control block, the UC3578 incorpo-
rates an overcurrent shutdown circuit with full cycle soft re-start to limit the
input current to a user defined maximum value during overload operation.
Additional functions include an under voltage lockout circuit to insure that
sufficient input supply voltage is present before any switching activity can
occur.
• Soft Start on Power Up
• Overcurrent Shutdown Followed by
Soft Start
The UC2578 and the UC3578 are both available in surface mount and
thru-hole power packages.
ORDERING INFORMATION
TEMPERATURE RANGE
PACKAGE
Power SOIC
Power PDIP
Power SOIC
Power PDIP
UC2578DP
UC2578N
UC3578DP
UC3578N
–40°C to +85°C
0°C to +70°C
TYPICAL APPLICATION DIAGRAM
R
L
SENSE
0.12
OUT
15-40 V
V
IN
OUT
IRFZ34
40µH
C
S
R
1k
S
C
220µF
1µF
1000pF
OUT
RECTIFIER
MBR 3100
15
C
GG
1µF
47µF
1N4148
5k
11
DIODE CS
14 VCC
15
10
7
6
10
C
VGG OUT
SRC
EAINV
2
50k
R1
220pF
CC
UC3578
1µF
2200pF
100k
16 SS
GND GND GND GND
EAOUT
3
1k
4
5
12
13
C
SS
UDG-99064
05/99
UC2578
UC3578
CONNECTION DIAGRAM
ABSOLUTE MAXIMUM RATINGS
VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +72V
EAINV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +10V
EAOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +10V
SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +10V
DIODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VCC
VGG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VCC +14V
CS. . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC – 5V to VCC +0.6V
DIL-16, SOIC-16 (Top View)
N or DP Packages
I
OUT Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.8A to +0.6A
SRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.6V to VCC
Storage Temperature . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations
and considerations of packages.
Note: The four GND pins are internally connected.
ELECTRICAL CHARACTERISTICS: Unless otherwise specified VCC = 14V, VGG = 14V, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
Oscillator Section
Frequency
VCC = 14V to 72V, EAINV = 1.9V, TJ = 25°C
VCC = 11V to 14V, Over Temperature
100
90
110
120
120
kHz
kHz
Error Amplifier Section
EAINV
EAOUT = EAINV
1.97
2
100
80
6.2
0.8
1
2.03
300
V
nA
dB
V
IEAINV
EAOUT = EAINV
EAVOL
EAOUT/EAINV, 25°C
70
EAOUT High
EAINV ≤ 1.9V, IEAOUT = –100µA
EAINV ≥ 2.1V, IEAOUT = 100µA
TJ = 25°C, F = 100kHz
EAOUT = EAINV, VCC = 14V
5.5
EAOUT Low
1.1
V
Unity Gain Bandwidth
PSRR, EAOUT
Current Sense Comparator Section
Threshold (Referred to VCC)
Input Bias Current
Propagation Delay
Blanking Time
0.85
80
MHz
dB
90
0.4
0.5
0.2
0.7
200
0.6
1
V
CS = VCC – 0.4V
µA
µs
ns
VOVERDRIVE = 250mV
VOVERDRIVE = 250mV
1.2
300
75
Gate Drive Output Section
VOH
IOUT = –200mA
IOUT = 20mA
9.5
11
0.2
1.5
40
V
V
VOL
0.36
2
I
OUT = 200mA
V
Rise Time
TJ = 25°C, CLOAD = 1nF
TJ = 25°C, CLOAD = 1nF
70
70
ns
ns
Fall Time
40
Pulse Width Modulator Section
Maximum Duty Cycle
Minimum Duty Cycle
Modulator Gain
EAINV ≤ 1.9V
85
90
0
%
%
EAINV ≥ 2.1V
EAOUT = 2.5V to 3.5V
30
%/V
Undervoltage Lockout Section
Start Threshold
OUT – SRC, EAINV ≤ 1.9V, SRC = 0V
10
11
2
12
V
V
UVLO Hysteresis
1.5
2.5
2
UC2578
UC3578
ELECTRICAL CHARACTERISTICS: Unless otherwise specified VCC = 14V, VGG = 14V, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
VGG Regulator Section
VGG – SRC
VCC = 72V, SRC = 0V, IVGG = –7mA
VCC = 50V, SRC = 0V, IVGG = –7mA
VCC = 15V, SRC = 0V, IVGG = –7mA
VCC = 11V, SRC = 0V, IVGG = –7mA
14.5 15.25
17
16
V
V
V
V
14
13
14.75
13.75 14.5
9.5
10
10.5
Soft Start Ramp Section
Soft Start Ramp Current
Supply Current Section
IVCC
–30
–45
µA
EAINV ≥ 2.1V, SRC = 0V
EAINV ≥ 2.1V, SRC = 0V
10
7
14
mA
mA
IVGG
10.5
PIN DESCRIPTIONS
CS: Peak current limit sense pin. Senses the current OUT: Gate drive for the external NMOS switch
across a current sense resistor placed between VCC and connected between VCC and the buck inductor.
the drain of the NMOS buck switch. OUT will be held low
SRC: This pin is connected to the junction of the external
(NMOS buck switch off) if VCC – CS exceeds 0.5V.
NMOS switch source, the floating voltage source
DIODE: An external small signal diode (1N4148 typical)
is connected here, anode to VCC and cathode to
DIODE, to implement the VGG regulator function.
capacitor, the free-wheeling diode cathode, and buck
inductor.
SS: The external soft start capacitor is connected to this
pin.
EAINV: Inverting input to error amplifier. V
sense
OUT
feedback is connected to this pin. The non-inverting input
of the error amplifier is internally connected to 2V.
VGG: An external capacitor connected from VGG to
SRC completes the floating voltage source for the
floating gate driver. A 1µF capacitor is recommended.
EAOUT: Output of the error amplifier. Use EAOUT and
EAINV for loop compensation components.
VCC: Input supply voltage. This pin supplies an internal
ground referenced voltage regulator that supplies the IC
and an on-chip regulated floating voltage source (VGG –
SRC) used by the floating driver to drive the external
NMOS buck switch. This pin should be bypassed with a
high quality ceramic capacitor.
GND: Circuit Ground. The four ground pins are internally
connected together by the fused leadframe of the
package. They provide the primary thermal conduction
path for dissipating junction heat.
APPLICATION INFORMATION
The UC3578 Floating Buck Controller is a high frequency through a small resistor, as shown in the typical applica-
switching regulator with a floating driver which provides tion diagram and in Fig 2. This capacitor provides the en-
PWM control for non-isolated buck converters. The con- ergy for the high side driver. The gate drive voltage to
troller operates at a fixed 100 kHz switching frequency, the MOSFET is internally regulated to 14V. A diode
and in voltage mode control. The duty cycle range of the (1N4148) is required from the input voltage to DIODE.
PWM output is 0% to 90% allowing for a wide range of This allows the floating drive capacitor to charge during
input voltages (14V minimum with transients to 72V). conduction of the output rectifier but prevents its dis-
The regulator features an undervoltage lockout threshold
of 11V with approximately 2V hysterisis as well as soft
start capability. The typical application circuit shown is for
a 15V to 40V input and a 12V at 3A output.
charge back into the supply rail. A 1µF ceramic capacitor
is recommended from VCC to ground to provide high fre-
quency decoupling. Additional decoupling of this pin
could be accomplished by a low value resistor between
VCC and V and a 1µF capacitor from VCC to GND as
shown in the schematic.
IN
To ensure proper operation of the floating driver, an ex-
ternal capacitor (1µF ceramic) must be connected from
VGG to SRC, and to the source of the external MOSFET
3
UC2578
UC3578
APPLICATION INFORMATION (cont.)
UDG-97006
Figure 1. Block diagram.
Current Limit
Error Amplifier
The current sense pin provides overcurrent shutdown. The onboard error amplifier of the UC3578 is a voltage
As can be seen from the block diagram, the overcurrent amplifier with its non-inverting input tied to an internal 2V
comparator is wire ANDed with the oscillator after an in- reference. As usual, loop compensation can be added
ternally set blanking time. The I
threshold level is set from the inverting input of EAINV to the error amplifier
LIMIT
by the current sense resistor from R
.
output at EAOUT. Consideration must be given when
choosing the values of the compensation components
around the amplifier so that the output swing of the am-
plifier is not restricted. The output of the amplifier can
source 100µA typically.
SENSE
0.5V
ILIMIT
=
RSENSE
An optional filter can be added (R C ) from the current
S
S
sense resistor to CS to provide high frequency filtering of
the current sense signal if necessary.
General
As in any buck converter, when the switch is off, the
source flies low due to the conduction of the
free-wheeling rectifier. The source (SRC) is pulled below
ground by an amount determined by the forward voltage
drop of the rectifier and by any transient voltage spike
from inductance in this path. The occurrence of this con-
dition could result in erratic operation of the IC during this
period if the negative excursion is not limited. This is be-
cause of conduction of current in the substrate of the IC
due to the source pin being pulled below ground and for-
ward biasing the internal substrate PN junction. To limit
this effect, a small resistor (15Ω) can be placed in series
between the MOSFET source and the SRC pin as shown
in Fig. 1. Too large a resistor will limit the drive to the
During a current limit condition, the soft start capacitor on
SS is discharged until its voltage level reaches 1.2V. Dur-
ing this time, a duty cycle clamp is activated to approxi-
mately 0.6V above the voltage level on the SS capacitor.
This condition persist until the SS capacitor is discharged
to 1.2V, thus disabling the output driver. At this time, the
SS capacitor is allowed to charge to 5V through the 50µA
current source and normal operation resumes when the
SS capacitor reaches 5V. During the condition described,
the regulator enters a hiccup current limit mode of opera-
tion which limits the power dissipation in the MOSFET
and output rectifier under a short circuit condition.
4
UC2578
UC3578
APPLICATION INFORMATION (cont.)
HS1
IRF530
30µH
HS2
MBR10100
2
3
V
(+)
V
(+)
IN
1
OUT
220µF
680pF
1
2200µF 2200µF
0.1µF 0.1µF
8.25k
5.62k
1
3
220µF
200
330
1N4148
5
2
51
10
15k
1
V
(–)
V
(–)
IN
OUT
2
HS3
470
TIP47
0.01µF
3
UC3578
47µF
1
2
3
4
5
6
7
8
N/C
SS 16
1N4745A
470pF
EAINV
CS 15
VCC 14
GND 13
GND 12
2200pF
100pF
0.1µF
47k
EAOUT
GND
GND
SRC
OUT
N/C
1N4148
DIODE 11
VGG 10
N/C
9
1µF
HS1, HS2, HS3: HEATSINKS
UDG-99100
Figure 2. Detailed application schematic for the UC3578 evaluation board.
MOSFET and result in startup problems with the regula- of the thermal management system. Worst case junc-
tor. A Schottky rectifier is used for the free-wheeling di- tion-to-ambient thermal resistance for different package
ode to limit the negative excursion of the source. This will configurations are given in a table in the data book in the
also limit the reverse recovery current thus limiting the in- package information section.
ductive voltage spike.
The maximum ambient operating temperature is an im-
In applications where transient load excursions may re- portant factor in determining what the maximum operat-
sult in a no load condition, it is necessary that the output ing voltage can be for a particular application. For
of the regulator be loaded with a small load current example, if we assume a maximum operating ambient
(10mA to 15mA). This will prevent the output voltage temperature of 70°C we can determine what the maxi-
from going unregulated at no load. This small load cur- mum allowable input voltage can be given other parame-
rent is necessary for proper operation of the floating ters such as package thermal impedance and MOSFET
driver since the source must fly low to charge up the total gate charge by following the procedure outlined be-
floating driver capacitance.
low;
Thermal Considerations
TJ max –TA =125°C – 70°C =55°C.
(1)
(2)
(
)
For proper operation and reliability of the UC3578,
proper thermal management is essential. It is important
that the designer keep in mind that with surface mount
packages, a significant amount of the heat that the de-
vice generates is conducted out through the lead frame.
Because of this, the PCB design becomes a critical part
55°C
58°C / W
Pd =
= 0.95W,
where 58°C/W is the worst case theta j-a for the 16 pin
DP package and Pd is the package power dissipation.
5
UC2578
UC3578
APPLICATION INFORMATION (cont.)
(3) j-a of the package by improving the PCB mounting
method. It is recommended that the four GND pins (4, 5,
12 and 13) be connected to a ground plane to provide a
Pd = Qg • 100kHz +19mA • V ,
(
)
IN
where Qg is the total MOSFET gate charge and 19mA is
the maximum quiescent current for the UC3578 (I
low resistance thermal path. If a ground plane is not
available, a heat spreader on a double sided PC board is
recommended.
+
CC
I
) from the data sheet. The switching frequency of the
GG
buck converter is 100kHz.
Note: Thermal impedance number is based on device
mounted to 5 square inch FR4 PC board with one ounce
copper. From Unitrode 95-96 data book Table 1, page
9-8, when resistance range is given, lower thermal im-
pedance values are for 5 square inch aluminum PC
board.
The gate charge can be determined from the MOSFET
data sheet. As an example, for a IRFZ34 which has a to-
tal gate charge of 46nC, substituting for Pd in equation 3:
(
)
0.95W = 46nC • 100kHz +19mA • VIN , and
0.95W
V
=
)
= 40V.
(
IN max
0.0236A
ADDITIONAL INFORMATION
Therefore, at 70°C using a IRFZ34 MOSFET the maxi-
mum input voltage is limited to 40V to maintain a maxi-
mum junction temperature of 125°C in the 16 pin DP
package.
Please refer to the following Unitrode topic for additional
application information.
[1] Application Note U-167, Design and Evaluation of a
48V to 5V Telecom Buck Converter using the UC3578
Control IC by Mark Dennis.
Higher input voltages can be achieved by choosing a
MOSFET with a lower total gate charge or by a reduced
ambient operating temperature or by reducing the theta
30
25
20
15
10
5
-55°C
-25°C
25°C
125°C
85°C
0
0
10
20
30
40
50
60
70
80
VCC (V)
Figure 3. I vs. VCC vs. temperature.
CC
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 FAX (603) 424-3460
6
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