UCC1806J/883B [TI]
IC 0.5 A SWITCHING REGULATOR, CDIP16, DIP-16, Switching Regulator or Controller;
| 型号： | UCC1806J/883B |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC 0.5 A SWITCHING REGULATOR, CDIP16, DIP-16, Switching Regulator or Controller CD 开关 |
| 文件： | 总32页 (文件大小：1400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
LOW-POWER, DUAL-OUTPUT,
CURRENT-MODE PWM CONTROLLER
for applications ranging from off-line power
FEATURES
supplies to battery operated portable equipment.
Dual high-current, MOSFET driving outputs and a
fast current sense loop further enhance device
versatility.
D
D
D
D
D
D
D
BiCMOS Version of UC3846 Family
1.4-mA Maximum Operating Current
100-μA Maximum Startup Current
±0.5-A Peak Output Current
125-ns Circuit Delay
All the benefits of current mode control including
simpler loop closing, voltage feed-forward,
parallelability with current sharing, pulse-by-pulse
current limiting, and push/pull symmetry
correction are readily achievable with the
UCC3806 series.
Easier Parallelability
Improved Benefits of Current Mode Control
DESCRIPTION
These devices are available in multiple package
options for both through-hole and surface mount
applications; and in commercial, industrial, and
military temperature ranges.
The UCC3806 family ofBiCMOS PWMcontrollers
offers exceptionally improved performance with a
familiar architecture. With the same block diagram
and pinout of the popular UC3846 series, the
UCC3806 line features increased switching
frequency capability while greatly reducing the
bias current used within the device. With a typical
startup current of 50 μA and a well defined voltage
threshold for turn-on, these devices are favored
The UCC1806 is specified for operation from
-- 5 5 °C to 125°C, the UCC2806 is specified for
operation from --40°C to 85°C, and the UCC3806
is specified for operation from 0°C to 70°C.
SIMPLIFIED APPLICATION DIAGRAM
+V
OUT
+V
IN
UC39431
15
13
VIN
VC
UCC3806
2
VREF
INV
6
7
COMP
8
5
1
CT
NI
AOUT 11
BOUT 14
CURLIM
SHUT
16
10 SYNC
DOWN
9
RT
CS-- GND
12
CS+ 4
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1999 -- 2006, Texas Instruments Incorporated
1
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range unless otherwise noted
UCx806
UNIT
V
Supply voltage, V
VIN, low impedance
VIN, high impedance
VC
15
IN
Supply current, I
25
mA
V
IN
Output supply voltage
18
Continuous source or sink
Gate drive
± 200
± 500
Output current
mA
SYNC
± 30
COMP
± 10 to --(self-limiting)
Analog input voltage range
CS--, CS+, NI, INV, SHUTDOWN
--0.3 to (V + 0.3)
V
IN
Storage temperature, T
--65 to 150
--55 to 150
300
°C
°C
°C
stg
Operating temperature, T
J
Lead temperature, T 1,6 mm (1/16 inch) from case for 10 seconds
sol,
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is
not implied. Exposuretoabsolute-maximum-ratedconditions forextendedperiods may affect device reliability. All voltages are with respect to
GND. Currents are positive into and negative out of, the specified terminal.
RECOMMENDED OPERATING CONDITIONS
MIN
8.0
-- 5 5
-- 4 0
0
NOM
MAX UNIT
Input voltage, V
14.5
125
85
V
IN
UCC1806
UCC2806
UCC3806
Operating junction temperature, T
°C
J
70
PACKAGE DESCRIPTION
Q OR L PACKAGE
(TOP VIEW)
D, DW, J, M, N OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CURLIM
VREF
CS--
CS+
NI
INV
COMP
CT
SHUTDOWN
VIN
BOUT
VC
3
2
1
20 19
18
BOUT
VC
N/C
GND
AOUT
CS--
CS+
N/C
NI
4
5
6
7
8
GND
17
16
15
14
AOUT
SYNC
RT
INV
9
10 11 12 13
N/C -- No connection
2
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
ORDERING INFORMATION
PACKAGED DEVICES
T = T
A J
DESIGNATOR
TYPE
OPTION
QUANTITY
40
-- 5 5 °C to 125°C
-- 4 0 °C to 85°C
UCC2806D
0°C to 70°C
–
Tube
Reeled
Tube
–
D
SOIC--16
2,500
40
–
UCC2806DTR
UCC2806DW
UCC2806DWTR
UCC2806J
–
–
UCC3806DW
UCC3806DWTR
UCC3806J
–
DW
SOICW--16
Reeled
Tube
2,000
25
–
J
L
CDIP--16
CLCC--20
SSOP--16
PDIP--16
UCC1806J
Tube
55
UCC1806L
–
M
N
Reeled
Tube
2,500
25
–
–
–
–
–
–
UCC2806MTR
UCC2806N
–
UCC3806N
UCC3806PW
UCC3806PWTR
UCC3806Q
UCC3806QTR
Tube
90
UCC2806PW
UCC2806PWTR
UCC2806Q
PW
Q
TSSOP--16
PLCC--20
Reeled
Tube
2,000
46
Reeled
1,000
UCC2806QTR
ELECTRICAL CHARACTERISTICS
V
= 12 V, R = 33 kΩ, C = 330 pF, C
on V
= 0.01 μF, -- 55°C < T < 125°C for the UCC1806, --40°C < T < 85°C for the
IN
T
T
BYPASS
REF
A
A
UCC2806, 0°C < T < 70°C for the UCC3806, and T = T (unless otherwise noted)
A
A
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
REFERENCE
UCC1806
UCC2806
5.02
5.00
5.10
5.17
V
Supply, UVLO, turn-on
Load regulation
V
REF
UCC3806
5.10
3
5.20
25
0.2 mA ≤ I
≤ 5 mA
OUT
mV
(1)(2)
Total output variation
Line, load, temperature
10 Hz ≤ f ≤ 10 kHz,
--150
150
(2)
Output noise voltage
T = 25°C
J
70
5
μV
mV
mA
OSC
(2)
Long term stability
T
A
= 125°C,
1000 hours
25
Output short circuit
-- 1 0
42
-- 3 0
OSCILLATOR
Initial accuracy
Temperature stability
Amplitude
T = 25°C
J
47
2%
52
kHz
V
(2)
T(min) ≤ T ≤ T(max)
A
2.35
UCC1806
UCC2806 0.8 V ≤ V
V
= 0 V,
V
= V
= V
CT
RT
REF
50
50
125
100
≤ 2.0 V
SYNC
t
Delay-to-output time, SYNC
ns
DELAY
V
= 0 V,
V
RT
≤ 2.0 V
CT
REF
UCC3806
0.8 V ≤ V
SYNC
3
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
ELECTRICAL CHARACTERISTICS
V
= 12 V, R = 33 kΩ, C = 330 pF, C
on V
= 0.01 μF, -- 55°C < T < 125°C for the UCC1806, --40°C < T < 85°C for the
IN
T
T
BYPASS
REF
A
A
UCC2806, 0°C < T < 70°C for the UCC3806, and T = T (unless otherwise noted)
A
A
J
PARAMETER
OSCILLATOR (continued)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
Discharge current
T = 25°C,
J
V
= 2.0 V
2.5
mA
DCHG
CT
V
V
V
V
Low-level output voltage, SYNC
High-level output voltage, SYNC
Low-level input voltage, SYNC
High-level input voltage, SYNC
Input current, SYNC
I
I
= 1 mA
= --4 mA
= 0 V,
0.4
0.8
1
OL
OH
IL
OUT
OUT
2.4
V
V
V
V
V
= V
= V
CT
CT
RT
RT
REF
REF
= 0 V,
2.0
-- 1
IH
I
μA
SYNC
ERROR AMPLIFIER
UCC1806
UCC2806
5
Input offset voltage
mV
UCC3806
10
-- 1
I
I
Input bias current
Input offset current
Common mode range
Open loop gain
μA
nA
BIAS
500
OFSET
(1)
CMR
0
80
1
V
-- 2
V
IN
A
1 V ≤ V
≤ 4 V
OUT
100
dB
VOL
GBW
bandwidth
MHz
mA
μA
I
I
Output sink current
Output source current
V
V
V
V
< --20 mV,
< 20 mV,
= --50 mV
= --50 mV
V
V
= 1 V
= 3 V
1
COMP_SINK
COMP_SRC
ID
ID
ID
ID
COMP
-- 8 0
--120
COMP
V
V
Low-level output voltage
High-level output voltage
0.5
COMP_L
COMP_H
V
4.5
CURRENT SENSE AMPLIFIER
(3)(4)
A
Amplifier gain
V
= 0 V,
V
= V
REF
2.75
1.1
3.00
3.35
V/V
V
CS--
CURLIM
Maximum differential input signal (V
V
V
= V = V
CS+
CURLIM
NI
REF,
-- V
)
= 0V
CS--
INV
UCC1806
UCC2806
V
V
= 0.5 V,
= 0.5 V,
V
V
= OPEN
= OPEN
10
10
30
50
mV
CURLIM
CURLIM
COMP
COMP
Input offset voltage
UCC3806
mV
dB
dB
μA
μA
CMRR
PSRR
Common mode rejection ratio
Power supply rejection ratio
0 V ≤ V
≤ (V -- 3 . 5 V )
60
56
CM
IN
(3)
I
Input bias current
V
V
= 0.5 V,
V
V
V
= OPEN
= OPEN
-- 1
1
BIAS
CURLIM
CURLIM
COMP
COMP
(3)
Input offset current
= 0.5 V,
V
V
(V
= V
= 0 V,
INV
NI
REF,
= 2.75 V,
(5)
Delay-to-output time
125
0.5
175
ns
CURLIM
-- V
) = 0 V to 1.5 V step
CS+
CS--
CURRENT LIMIT ADJUST
Current limit offset
V
= V
= 0 V, V
= OPEN
0.4
0.6
1
V
CS--
CS+
COMP
I
Input bias current
BIAS
Minimum latching current
Maximum non-latching current
300
200
200
μA
80
(1)
(2)
Line range = 10 V to 15 V, load range = 0.2 mA to 5 mA
Ensured by design. Not production tested.
4
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
ELECTRICAL CHARACTERISTICS
V
= 12 V, R = 33 kΩ, C = 330 pF, C
on V
= 0.01 μF, -- 55°C to 125°C for the UCC1806, --40°C < T < 85°C for the UCC2806,
REF A
IN
T
T
BYPASS
0°C < T < 70°C for the UCC3806, and T = T (unless otherwise noted)
A
A
J
SHUTDOWN TERMINAL
UCC1806
UCC2806
0.94
1.00
1.0
1.06
1.1
Threshold voltage
Input voltage range
V
UCC3806
0.9
0
V
IN
t
Delay-to-output time
0 V ≤ V
≤ 1.3 V
SHUTDOWN
75
150
ns
DLY
OUTPUT
Output supply voltage
2.5
15.0
300
1.1
I
I
I
I
I
I
= 20 mA
= 100 mA
= 20 mA
100
0.4
SINK
SINK
SINK
SINK
SRC
SRC
UCC1806
UCC2806
Low-level output voltage
High-level output voltage
100
0.4
200
1.1
V
UCC3806
= 100 mA
= --20 mA
= --100 mA
11.6
11.0
11.9
11.6
35
t
t
Rise time
Fall time
T = 25°C,
C
C
= 1000 pF
= 1000 pF
65
65
RISE
FALL
J
LOAD
ns
T = 25°C,
35
J
LOAD
UNDERVOLTAGE LOCKOUT (UVLO)
V
Startup threshold voltage
Threshold hysteresis
Startup current
6.5
7.5
0.75
50
8.0
V
V
START
I
I
V
< V
100
1.4
μA
mA
START
IN
START
Operating supply current
1.0
V
shunt voltage
I
= 10 mA
15.0
17.5
IN
VIN
(1)
(2)
(3)
(4)
(5)
Line range = 10 V to 15 V, load range = 0.2 mA to 5 mA
Ensured by design. Not production tested.
Parameters measured at trip point of latch with V = VREF , V
= 0V.
NI
INV
Amplifier gain defined as: G = delta change at COMP /delta change forced at CS+ delta voltage at CS+ = 0 to 1V
Current-sense amplifier output is slew rate limited to provide noise immunity.
THERMAL RESISTANCE TABLE
PACKAGE
θJC
(°C/W)
θJA
(°C/W)
PACKAGE TYPE
DESIGNATOR
(1)
(1)
D
DW
J
SOIC--16
SOICW--16
CDIP--16
35
27
28
20
38
45
15
34
50 to 120
50 to 100
80 to 120
70 to 80
L
CLCC--20
SSOP--16
PDIP--16
(2)
M
144 to 172
(1)
N
90
(2)
PW
Q
TSSOP--16
PLCC--20
123 to 147
(1)
43 to 75
(1)
(2)
2
Specified θ (junction to ambient) is for devices mounted to 5 in FR4 PC board
JA
with one ounce copper where noted. When resistance range is given, lower values
are for 5 in aluminum PC board. Test PWB was 0.062 in thick and typically used
0.635 mm trace widths for power packages and 1.3 mm trace widths for non-power
packages with a 100x100 mil probe land area at the end of each trace.
Modeled data. If value range given for θ , the lower value is for 3x3 inch1 oz
2
JA
internal copper ground plane, and the higher value is for 1x1 inch ground plane. All
model data assumes only one trace for each non-fused lead.
5
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
TERMINAL FUNCTIONS
TERMINAL
PACKAGES
I/O
DESCRIPTION
NAME
AOUT
D/DW/J/M
/N/PW
L,Q
11
14
7
14
18
9
O
High-current gate drive for the external MOSFETs
BOUT
COMP
CS--
O
I
Output of the error amplifier
3
4
Inverting input of the 3×, differential current sense amplifier
Non-inverting input of the 3×, differential current sense amplifier
Oscillator timing capacitor connection point
CS+
4
5
I
CT
8
10
I
Programs the primary current limit threshold that determins latching or retry after an
overcurrent situation
CURLIM
1
2
I
GND
INV
NI
12
6
15
8
--
I
Reference ground and power ground for all functions of this device
Inverting input of the error amplifier.
5
7
I
Non-nverting input of the error amplifier.
RT
9
12
I
Connection point for the oscillator timing resistor
Provided for enhanced protection. When SHUTDOWN is driven above 1 V, AOUT and
BOUT are forced low.
SHUTDOWN
16
20
I
SYNC
VC
10
13
15
2
13
17
19
3
I/O
Allows providing external synchronization with TTL compatible thresholds.
Input supply connection for the FET drive outputs.
Input supply connection for this device.
I
I
VIN
VREF
O
Reference output.
DETAILED PIN DESCRIPTIONS
AOUT and BOUT: AOUT and BOUT provide alternating high current gate drive for the external MOSFETs. Duty
cycle can be varied from 0% to 50% where minimum dead time is a function of CT. Both outputs use MOS
transistor switches with inherent anti-parallel body diodes to clamp voltage swings to the supply rails, allowing
operation without the use of clamp diodes.
COMP: COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier is
a low output impedance, 2-MHz operational amplifier which allows sinking or sourcing of current at the COMP
pin. The error amplifier is internally current limited, so that zero duty cycle can be commanded by externally
forcing COMP to GND.
CS--: CS-- is the inverting input of the 3× differential current sense amplifier.
CS+: CS+ is the non-inverting input of the 3× differential current sense amplifier.
CT: CT is the oscillator timing capacitor connection point, which is charged by the current set by RT. CT is
discharged to GND through a 2.5-mA current sink. This causes a linear discharge of CT to 0 V which then
initiates the next switching cycle. Dead time occurs during the discharge of CT, forcing AOUT and BOUT low.
Switching frequency (fS) and dead time (tD) are approximated by:
1
fS =
and tD = 956 × CT
1.96 × RT × CT + tD
(1)
6
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
DETAILED PIN DESCRIPTIONS (continued)
CURLIM: CURLIM programs the primary current limit threshold and determines whether the device latches off
or retries after an overcurrent condition. When a shutdown signal is generated, a 200-μA current source to
ground pulls down on CURLIM. If the voltage on the pin remains above 350 mV the device remains latched and
the power must be cycled to restart. If the voltage on the pin falls below 350 mV, the device attempts a restart.
The voltage threshold is typically set by a resistor divider from VREF to ground. To calculate the current limit
adjust voltage threshold the following equations can be used.
Current limit adjust latching mode voltage is calculated in equation (2)
(
)
VREF − R1 × 300 mA
V =
> 350 mV
R1
1 + R2
(2)
(3)
Current limit adjust non-latching mode voltage is calculated in equation (3)
(
)
VREF − R1 × 80 mA
V =
< 350 mV
R1
1 + R2
where
D
R1 is the resistance from the VREF to CURLIM
R2 is the resistance from CURLIM to GND
D
GND: GND is the reference ground and power ground for all functions of this part. Bypass and timing capacitors
should be connected as close as possible to GND.
RT: RT is the connection point for the oscillator timing resistor. It has a low impedance input and is nominally
at 1.25 V. The current through RT is mirrored to the timing capacitor pin, CT. This causes a linear charging of
CT from 0 V to 2.35 V. Note that the current mirror is limited to a maximum of 100 μA so RT must be greater
than 12.5 kΩ.
SYNC: SYNC is a bi-directional pin, allowing or providing external synchronization with TTL compatible
thresholds. In a typical application RT is connected through a timing resistor to GND which allows the internal
oscillator to free run. In this mode SYNC outputs a TTL compatible pulse during the oscillator dead time (when
CT is being discharged). If RT is forced above 4.4 V, SYNC acts as an input with TTL compatible thresholds
and the internal oscillator is disabled. When SYNC is high, greater than 2 V the outputs are held active low.
When SYNC returns low, the outputs may be high until the on--time is terminated by the normal peak current
signal, a fault seen at SHUTDOWN or the next high assertion of SYNC. Multiple UCC3806s can be
synchronized by a single master UCC3806 or external clock.
VC: VC is the input supply connection for the FET drive outputs and has an input range from 2.5 V to 15 V. VC
should be capacitively bypassed for proper operation.
VIN: VIN is the input supply connection for this device. The UCC1806 has a maximum startup threshold of 8 V
and internally limited by means of a 15 V shunt regulator. The shunted supply current must be limited to 25 mA.
For proper operation, VIN must be bypassed to GND with at least a 0.01-μF ceramic capacitor
VREF: VREF is a 5.1 V ±1% trimmed reference output with a 5 mA maximum available current. VREF must be
bypassed to GND with at least a 0.1-μF ceramic capacitor for proper operation.
7
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
FUNCTIONAL BLOCK DIAGRAM
SYNC 10
13 VC
4.4V
1.5 V
--
--
+
RT
9
11 AOUT
+
OSC
LO
Q
CT
CS--
CS+
8
3
4
14 BOUT
12 GND
T
R
QB
Comparator
QB
--
3X
S
1
+
--
+
S
2
Shutdown
Lockout
--
120 μA
0.5 V
+
NI
5
1
CURLIM
+
EA
--
--
INV
6
7
R
S
0.35 V
+
S
1
COMP
Q
Q
16 SHUT
DOWN
+
--
S
2
7.0 V
+
R
200 μA
1.0 V
S
--
VIN 15
200kΩ
Q
Current Limit
Restart
+
--
R
7.5 V
UVLO
15 V
4.25 V
+
--
2
VREF
5.1 V
Reference
Regulator
Reference Low
UDG--99035
8
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
TYPICAL APPLICATION DIAGRAM
UDG--99036
TYPICAL CHARACTERISTICS
Design equations for oscillator are described in the following equations.
1
fOSC
=
tRAMP + tFALL
(4)
(5)
tRAMP = 1.92 × RT × CT
2.4 × CT
tFALL
=
1.25
0.002 −
RT
(6)
(7)
tDEAD = tFALL
9
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
OSCILLATOR FREQUENCY
vs
JUNCTION TEMPERATURE
ERROR AMPLIFIER GAIN AND PHASE
vs
60
58
FREQUENCY
80
60
40
180
135
90
56
54
52
50
48
Phase
20
0
45
0
46
44
Gain
42
40
--55
-- 2 0
-- 4 5
10 M
--25
0
25
50
75
100
125
1 k
10 k
100 k
1 M
f
-- Oscillator Frequency -- Hz
T
J
-- Junction Temperature -- °C
OSC
Figure 1.
Figure 2.
10
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UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
OSCILLATOR FREQUENCY
vs
TIMING RESISTANCE
1 M
C
T
= 220 pF
C
T
= 100 pF
100 k
10 k
0
C = 47 pF
T
C
= 330 pF
T
C
T
= 470 pF
C
= 1.0 nF
T
C
= 2.2 nF
T
10 k
100 k
1 M
R
T
-- Timing Resistance -- Ω
Figure 3.
REVISION HISTORY
DATE
REVISION
DESCRIPTION
Updated Equation 2 and 3 to remove x3 factor.
3/11/05
SLUS272D (Rev. D)
Adjusted the factors of the switching frequency, Equation 1 and modified the typical
discharge current from 2.0 mA to 2.5 mA.
5/3/05
SLUS272E (Rev. E)
11
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
LCCC
CDIP
CDIP
LCCC
LCCC
SOIC
Drawing
5962-9457501MEA
5962-9457501Q2A
UCC1806J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
J
FK
J
16
20
16
16
20
20
16
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
UCC1806J883B
UCC1806L
J
FK
FK
D
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
UCC1806L883B
UCC2806D
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2806DG4
UCC2806DTR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
D
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2806DTRG4
UCC2806DW
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
DW
DW
DW
DW
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2806DWG4
UCC2806DWTR
UCC2806DWTRG4
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2806J
UCC2806M
ACTIVE
ACTIVE
J
16
16
1
TBD
A42
N / A for Pkg Type
SSOP/
QSOP
DBQ
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2806MG4
UCC2806MTR
UCC2806MTRG4
UCC2806N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP/
QSOP
DBQ
DBQ
DBQ
N
16
16
16
16
16
16
16
16
16
20
20
16
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SSOP/
QSOP
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SSOP/
QSOP
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
PDIP
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
UCC2806NG4
UCC2806PW
PDIP
N
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
PLCC
PW
PW
PW
PW
FN
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2806PWG4
UCC2806PWTR
UCC2806PWTRG4
UCC2806Q
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
46 Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
UCC2806QG3
UCC3806DW
PLCC
FN
46 Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
SOIC
DW
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
UCC3806DWG4
UCC3806DWTR
UCC3806DWTRG4
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
DW
DW
DW
16
16
16
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC3806J
UCC3806N
ACTIVE
ACTIVE
CDIP
PDIP
J
16
16
1
TBD
A42
N / A for Pkg Type
N
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
UCC3806NG4
UCC3806PW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
TSSOP
TSSOP
PLCC
PLCC
PLCC
PLCC
N
16
16
16
20
20
20
20
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
PW
PW
FN
FN
FN
FN
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC3806PWG4
UCC3806Q
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
46 Green (RoHS &
no Sb/Br)
CU SN
CU SN
CU SN
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UCC3806QG3
UCC3806QTR
UCC3806QTRG3
46 Green (RoHS &
no Sb/Br)
1000 Green (RoHS &
no Sb/Br)
1000 Green (RoHS &
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC1806, UCC2806, UCC2806M, UCC3806, UCC3806M :
Space: UCC1806-SP
•
NOTE: Qualified Version Definitions:
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
•
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9457501MEA
ACTIVE
CDIP
J
16
20
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9457501ME
A
UCC1806J/883B
5962-9457501Q2A
ACTIVE
LCCC
FK
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9457501Q2A
UCC1806L/
883B
UCC1806J
ACTIVE
ACTIVE
CDIP
CDIP
J
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
UCC1806J
UCC1806J883B
5962-9457501ME
A
UCC1806J/883B
UCC1806L
ACTIVE
ACTIVE
LCCC
LCCC
FK
FK
20
20
1
1
TBD
TBD
POST-PLATE
POST-PLATE
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
UCC1806L
UCC1806L883B
5962-
9457501Q2A
UCC1806L/
883B
UCC2806D
UCC2806DG4
UCC2806DTR
UCC2806DTRG4
UCC2806DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
D
D
16
16
16
16
16
16
16
16
16
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
A42
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
UCC2806D
UCC2806D
UCC2806D
UCC2806D
UCC2806DW
UCC2806DW
UCC2806DW
UCC2806DW
UCC2806J
Green (RoHS
& no Sb/Br)
D
2500
2500
40
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
DW
DW
DW
DW
J
Green (RoHS
& no Sb/Br)
UCC2806DWG4
UCC2806DWTR
UCC2806DWTRG4
UCC2806J
40
Green (RoHS
& no Sb/Br)
2000
2000
1
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TBD
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
UCC2806M
UCC2806MG4
UCC2806MTR
UCC2806MTRG4
UCC2806N
ACTIVE
SSOP
SSOP
SSOP
SSOP
PDIP
DBQ
16
16
16
16
16
16
16
16
16
16
20
20
16
16
16
16
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
N / A for Pkg Type
UCC2806M
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBQ
DBQ
DBQ
N
75
2500
2500
25
Green (RoHS
& no Sb/Br)
UCC2806M
UCC2806M
UCC2806M
UCC2806N
UCC2806N
2806
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
UCC2806NG4
UCC2806PW
PDIP
N
25
Green (RoHS
& no Sb/Br)
N / A for Pkg Type
TSSOP
TSSOP
TSSOP
TSSOP
PLCC
PLCC
SOIC
PW
PW
PW
PW
FN
90
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UCC2806PWG4
UCC2806PWTR
UCC2806PWTRG4
UCC2806Q
90
Green (RoHS
& no Sb/Br)
2806
2000
2000
46
Green (RoHS
& no Sb/Br)
2806
Green (RoHS
& no Sb/Br)
2806
Green (RoHS
& no Sb/Br)
UCC2806Q
UCC2806Q
UCC3806DW
UCC3806DW
UCC3806DW
UCC3806DW
UCC2806QG3
UCC3806DW
FN
46
Green (RoHS
& no Sb/Br)
CU SN
DW
DW
DW
DW
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
UCC3806DWG4
UCC3806DWTR
UCC3806DWTRG4
SOIC
40
Green (RoHS
& no Sb/Br)
0 to 70
SOIC
2000
2000
Green (RoHS
& no Sb/Br)
0 to 70
SOIC
Green (RoHS
& no Sb/Br)
0 to 70
UCC3806J
UCC3806N
ACTIVE
ACTIVE
CDIP
PDIP
J
16
16
1
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
0 to 70
0 to 70
UCC3806J
UCC3806N
N
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
UCC3806NG4
UCC3806PW
ACTIVE
PDIP
TSSOP
TSSOP
PLCC
PLCC
PLCC
PLCC
N
16
16
16
20
20
20
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
N / A for Pkg Type
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
0 to 70
UCC3806N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PW
PW
FN
FN
FN
FN
90
90
Green (RoHS
& no Sb/Br)
3806
UCC3806PWG4
UCC3806Q
Green (RoHS
& no Sb/Br)
3806
46
Green (RoHS
& no Sb/Br)
0 to 70
0 to 70
0 to 70
0 to 70
UCC3806Q
UCC3806Q
UCC3806Q
UCC3806Q
UCC3806QG3
UCC3806QTR
UCC3806QTRG3
46
Green (RoHS
& no Sb/Br)
CU SN
1000
1000
Green (RoHS
& no Sb/Br)
CU SN
Green (RoHS
& no Sb/Br)
CU SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC1806, UCC2806, UCC2806M, UCC3806, UCC3806M :
Catalog: UCC3806, UCC2806, UCC3806M, UCC3806
•
Military: UCC2806M, UCC1806
•
Space: UCC1806-SP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
•
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
29-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UCC2806DTR
UCC2806MTR
UCC2806PWTR
UCC3806DWTR
SOIC
SSOP
TSSOP
SOIC
D
16
16
16
16
2500
2500
2000
2000
330.0
330.0
330.0
330.0
16.4
12.4
12.4
16.4
6.5
6.4
6.9
10.3
5.2
2.1
2.1
1.6
2.7
8.0
8.0
16.0
12.0
12.0
16.0
Q1
Q1
Q1
Q1
DBQ
PW
DW
5.6
8.0
10.75 10.7
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-May-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
UCC2806DTR
UCC2806MTR
UCC2806PWTR
UCC3806DWTR
SOIC
SSOP
TSSOP
SOIC
D
16
16
16
16
2500
2500
2000
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
35.0
35.0
38.0
DBQ
PW
DW
Pack Materials-Page 2
MECHANICAL DATA
MPLC004A – OCTOBER 1994
FN (S-PQCC-J**)
PLASTIC J-LEADED CHIP CARRIER
20 PIN SHOWN
Seating Plane
0.004 (0,10)
0.180 (4,57) MAX
0.120 (3,05)
D
0.090 (2,29)
D1
0.020 (0,51) MIN
3
1
19
0.032 (0,81)
0.026 (0,66)
4
18
D2/E2
D2/E2
E
E1
8
14
0.021 (0,53)
0.013 (0,33)
0.050 (1,27)
9
13
0.007 (0,18)
M
0.008 (0,20) NOM
D/E
D1/E1
D2/E2
NO. OF
PINS
**
MIN
0.385 (9,78)
MAX
MIN
MAX
MIN
MAX
0.395 (10,03)
0.350 (8,89)
0.356 (9,04)
0.141 (3,58)
0.191 (4,85)
0.291 (7,39)
0.341 (8,66)
0.169 (4,29)
0.219 (5,56)
0.319 (8,10)
0.369 (9,37)
20
28
44
52
68
84
0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58)
0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66)
0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20)
0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91)
1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45)
4040005/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-018
1
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