UCC1807-1 [TI]
Programmable Maximum Duty Cycle PWM Controller; 可编程最大占空比的PWM控制器型号: | UCC1807-1 |
厂家: | TEXAS INSTRUMENTS |
描述: | Programmable Maximum Duty Cycle PWM Controller |
文件: | 总11页 (文件大小:312K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
application
INFO
UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
available
Programmable Maximum Duty Cycle PWM Controller
FEATURES
DESCRIPTION
User Programmable Maximum PWM
Duty Cycle
The UCC3807 family of high speed, low power integrated circuits contains
all of the control and drive circuitry required for off-line and DC-to-DC fixed
frequency current mode switching power supplies with minimal external
parts count.
100mA Startup Current
Operation to 1MHz
These devices are similar to the UCC3800 family, but with the added fea-
ture of a user programmable maximum duty cycle. Oscillator frequency and
maximum duty cycle are programmed with two resistors and a capacitor.
The UCC3807 family also features internal full cycle soft start and internal
leading edge blanking of the current sense input.
Internal Full Cycle Soft Start
Internal Leading Edge Blanking of
Current Sense Signal
1A Totem Pole Output
The UCC3807 family offers a variety of package options, temperature
range options, and choice of critical voltage levels. The family has UVLO
thresholds and hysteresis levels for off-line and battery powered systems.
Thresholds are shown in the table below.
Part Number
UCCx807-1
UCCx807-2
UCCx807-3
Turn-on Threshold
Turn-off Threshold
Packages
J
N, D
7.2V
12.5V
4.3V
6.9V
8.3V
4.1V
N, D, PW
BLOCK DIAGRAM
UDG-95001-1
SLUS163 - JUNE 1997
1
UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (IDD 10mA). . . . . . . . . . . . . . . . . . . . . . . 13.5V
Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
OUT Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A
Analog Inputs (FB, CS) . . . . . . . . . . . . . –0.3V to (VDD + 0.3V)
Power Dissipation at TA +25°C (N or J packages) . . . . . . . . 1W
Power Dissipation at TA +25°C (D package) . . . . . . . . . . 0.65W
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
DIL-8, SOIC-8, TSSOP-8 (Top View)
J, N, D or PW Packages
All currents are positive into, negative out of the specified ter-
minal. Consult Packaging Section of Databook for thermal limi-
tations and considerations of packages.
ORDERING INFORMATION
UCC
807
–
UVLO Threshold
Package
Temperature Range
ELECTRICAL CHARACTERISTICS:Unless otherwise stated these specifications apply for TA = –55°C to +125°C for
UCC1807-1/-2/-3; –40°C to +85°C for UCC2807-1/-2/-3; and 0°C to +70°C for UCC3807-1/-2/-3; VDD = 10V (Note 6), RA = 12kW,
RB = 4.7kW, CT = 330pF, 1.0mF capacitor from VDD to GND, TA = TJ.
PARAMETER
Oscillator Section Section
Frequency
TEST CONDITIONS
MIN
TYP
MAX UNITS
175
202
2.5
228
kHz
%
Temperature Stability
Amplitude
(Note 5)
(Note 1)
1/3VDD
V
Error Amplifier Section
Input Voltage
COMP = 2.0V
1.95
–1
2.00
2.05
1
V
Input Bias Current
Open Loop Voltage Gain
COMP Sink Current
COMP Source Current
PWM Section
mA
dB
mA
mA
60
80
2.5
FB = 2.2V, COMP = 1.0V
FB = 1.3V, COMP = 4.0V
0.3
–0.2
–0.5
Maximum Duty Cycle
Minimum Duty Cycle
Current Sense Section
Gain
75
78
81
0
%
%
COMP = 0V
(Note 2)
1.1
0.9
1.65
1.0
1.8
1.1
V/V
V
Maximum Input Signal
Input Bias Current
CS Blank Time
COMP = 5.0V (Note 3)
–200
50
200
150
1.6
nA
ns
V
100
1.5
1.1
Overcurrent Threshold
COMP to CS Offset
Output Section
1.4
CS = 0V
0.55
1.65
V
OUT Low Level
I = 100mA
0.4
0.4
20
1
1
V
V
OUT High Level
I = –100mA, VDD - OUT
CL = 1nF (Note 5)
Rise/Fall Time
100
ns
Undervoltage Lockout Section
2
UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
ELECTRICAL CHARACTERISTICS:Unless otherwise stated these specifications apply for TA = –55°C to +125°C for
UCC1807-1/-2/-3; –40°C to +85°C for UCC2807-1/-2/-3; and 0°C to +70°C for UCC3807-1/-2/-3; VDD = 10V (Note 6), RA = 12kW,
RB = 4.7kW, CT = 330pF, 1.0mF capacitor from VDD to GND, TA = TJ.
PARAMETER
Start Threshold
TEST CONDITIONS
UCCx807-1 (Note 4)
MIN
6.6
11.5
4.1
6.3
7.6
3.9
0.1
3.5
0.1
TYP
7.2
12.5
4.3
6.9
8.3
4.1
0.3
4.2
0.2
MAX UNITS
7.8
13.5
4.5
7.5
9.0
4.3
0.5
5.1
0.3
V
V
V
V
V
V
V
V
V
UCCx807-2
UCCx807-3
UCCx807-1 (Note 4)
UCCx807-2
UCCx807-3
UCCx807-1
UCCx807-2
UCCx807-3
Minimum Operating Voltage After Start
Hysteresis
Soft Start Section
COMP Rise Time
Overall Section
Startup Current
FB = 1.8V, From 0.5V to 4.0V
4
ms
VDD < Start Threshold (UCCx807-1,-3)
VDD < Start Threshold (UCCx807-2)
FB = 0V, CS = 0V, No Load (Note 7)
0.1
0.15
1.3
0.2
0.25
2.1
mA
mA
mA
V
Operating Supply Current
VDD Zener Shunt Voltage
Shunt to Start Difference
I
DD = 10mA
12.0
0.5
13.5
1.0
15.0
V
Note 1: Measured at TRIG; signal minimum = 1/3 VDD, maximum = 2/3 VDD.
V
Note 2: Gain is defined by: A
COMP , 0 VCS 0.8V
V
CS
Note 3: Parameter measured at trip point of latch with FB at 0V.
Note 4: Start Threshold and Zener Shunt thresholds track one another.
Note 5: Ensured by design. Not 100% tested in production.
Note 6: Adjust VDD above the start threshold before setting at 10V for UCC3807-2.
Note 7: Does not include current in external timing RC network.
PIN DESCRIPTIONS
COMP: COMP is the output of the error amplifier and the affected by the leading edge blanking and the CS to
input of the PWM comparator. The error amplifier in the OUT propagation delay.
UCC3807 is a low output impedance, 2MHz operational
The overcurrent comparator is only intended for fault
amplifier. COMP can both source and sink current. The
sensing. Exceeding the overcurrent threshold causes a
error amplifier is internally current limited, which allows
soft start cycle.
zero duty cycle by externally forcing COMP to GND.
FB: The inverting input to the error amplifier. For best
The UCC3807 family features built-in full cycle soft start.
stability, keep connections to FB as short as possible and
Soft start is implemented as a clamp on the maximum
stray capacitance as small as possible.
COMP voltage.
GND: Reference ground and power ground for all func-
tions of the part.
CS: Current sense input. There are two current sense
comparators on the chip, the PWM comparator and an
OUT: The output of a high current power driver capable
of driving the gate of a power MOSFET with peak cur-
rents exceeding 1A. OUT is actively held low when VDD
is below the UVLO threshold.
overcurrent comparator.
The UCC3807 also contains a leading edge blanking cir-
cuit, which disconnects the external CS signal from the
current sense comparator during the 100ns interval im-
mediately following the rising edge of the signal at the
OUT pin. In most applications, no analog filtering is re-
quired on CS. Compared to an external RC filtering tech-
nique, leading edge blanking provides a smaller effective
CS to OUT propagation delay. Note, however, that the
minimum non-zero on-time of the OUT signal is directly
The high current power driver consists of MOSFET out-
put devices in a totem pole configuration. This allows the
output to switch from VDD to GND. The output stage
also provides a very low impedance which minimizes
overshoot and undershoot. In most cases, external
Schottky clamp diodes are not required.
3
UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
PIN DESCRIPTIONS (cont.)
TRIG/DISCH: Oscillator control pins. Trig is the oscillator For best performance, keep the lead from CT to GND as
timing input, which has an RC-type charge/discharge sig- short as possible. A separate ground connection for CT is
nal controlling the chip’s internal oscillator. DISCH is the
pin which provides the low impedance discharge path for
the external RC network during normal operation. Oscil-
lator frequency and maximum duty cycle are computed
as follows:
desirable. The minimum value of RA is 10kW, the mini-
mum value of RB is 2.2kW, and the minimum value of CT
is 47pF.
VDD: The power input connection for this device. Total
VDD current is the sum of quiescent current and the av-
erage OUT current. Knowing the operating frequency
and the MOSFET gate charge (Qg), average OUT cur-
rent can be calculated from
1.4
frequency
RA 2RB CT
RA RB
duty cycle
RA 2RB
IOUT = Qg F, where F is frequency.
To prevent noise problems, bypass VDD to GND with a
ceramic capacitor as close to the chip as possible in par-
allel with an electrolytic capacitor.
as shown in Figure 1.
UDG-95002-1
Figure 1. Oscillator Block Diagram
APPLICATIONS INFORMATION
The circuit shown in Fig. 2 illustrates the use of the
UCC3807 in a typical off-line application. The 100W,
200kHz, universal input forward converter produces a
regulated 12VDC at 8 Amps. The programmable maxi-
mum duty cycle of the UCC3807 allows operation down
to 80VRMS and up to 265VRMS with a simple RCD
clamp to limit the MOSFET voltage and provide core re-
set. In this application the maximum duty cycle is set to
about 65%. Another feature of the design is the use of a
flyback winding on the output filter choke for both boot-
strapping and voltage regulation. This method of loop clo-
sure eliminates the optocoupler and secondary side
regulator, common to most off-line designs, while provid-
ing good line and load regulation.
T1:
Core
Primary:
Secondary:
L1:
Magnetics Inc. #P-42625-UG (ungapped)
28 turns of 2x #26AWG
6 turns of 50x0.2mm Litz wire
Core:
Magnetics Inc. #P-42625-SG-37 (0.020”
gap)
13 turns of 2x #18AWG
Main Winding:
Second Winding: 11 turns of #26AWG
Magnetics Inc.
900 E. Butler Road
P.O. Box 391
Butler, PA 16003
Tel: (412) 282-8282
Fax: (412) 282-6955
4
UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
APPLICATIONS INFORMATION (cont.)
UDG-96174
Figure 2. Typical Off-line Application Using UCC3807-2
5
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2005
PACKAGING INFORMATION
Orderable Device
UCC2807D-1
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
8
8
8
8
8
8
8
14
14
8
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2807D-2
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
TSSOP
TSSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
PDIP
D
D
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2807D-3
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC2807DTR-1
UCC2807DTR-1G4
UCC2807DTR-2
UCC2807DTR-2G4
UCC2807DTR-3
UCC2807DTR-3G4
UCC2807N-1
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
P
50 Green (RoHS & CU NIPDAU Level-NC-NC-NC
no Sb/Br)
UCC2807N-2
P
50 Green (RoHS & CU NIPDAU Level-NC-NC-NC
no Sb/Br)
UCC2807PW-3
UCC2807PWTR-3
UCC3807D-1
PW
PW
D
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC3807D-2
D
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC3807D-2G4
UCC3807D-3
D
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
UCC3807DTR-1
UCC3807DTR-2
UCC3807DTR-2G4
UCC3807DTR-3
UCC3807DTR-3G4
UCC3807N-1
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
P
50 Green (RoHS & CU NIPDAU Level-NC-NC-NC
no Sb/Br)
UCC3807N-2
P
50 Green (RoHS & CU NIPDAU Level-NC-NC-NC
no Sb/Br)
UCC3807N-3
P
50 Green (RoHS & CU NIPDAU Level-NC-NC-NC
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2005
Orderable Device
UCC3807N-3G4
UCC3807PWTR-3
Status (1)
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
P
8
50 Green (RoHS & CU NIPDAU Level-NC-NC-NC
no Sb/Br)
PREVIEW
TSSOP
PW
14
2000
TBD
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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