UCC1913N [TI]
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDIP8, PLASTIC, DIP-8;
| 型号： | UCC1913N |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDIP8, PLASTIC, DIP-8 信息通信管理 光电二极管 |
| 文件： | 总9页 (文件大小：121K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UCC1913
UCC2913
UCC3913
Negative Voltage Hot Swap Power Manager
FEATURES
DESCRIPTION
• Precision Fault Threshold
The UCC1913 family of negative voltage circuit breakers provides com-
plete power management, hot swap, and fault handling capability. The IC is
referenced to the negative input voltage and is driven through an external
resistor connected to ground, which is essentially a current drive as op-
posed to the traditional voltage drive. The on-board 10V shunt regulator
protects the IC from excess voltage and serves as a reference for program-
ming the maximum allowable output sourcing current during a fault. All
control and housekeeping functions are integrated, and externally program-
mable. These include the fault current level, maximum output sourcing cur-
rent, maximum fault time, soft start time, and average power limiting. In the
event of a constant fault, the internal timer will limit the on-time from less
than 0.1% to a maximum of 3%. The duty cycle modulates depending on
the current into the PL pin, which is a function of the voltage across the
FET, and will limit average power dissipation in the FET. The fault level is
fixed at 50mV across the current sense amplifier to minimize total dropout.
The fault current level is set with an external current sense resistor. The
maximum allowable sourcing current is programmed with a voltage divider
from VDD to generate a fixed voltage on the IMAX pin. The current level,
• Programmable Average Power
Limiting
• Programmable Linear Current Control
• Programmable
• Overcurrent Limit
• Programmable Fault Time
• Fault Output Indication
• Shutdown Control
• Undervoltage Lockout
• 8-Pin SOIC
when the output appears as a current source, is equal to V
R
. If
IMAX/ SENSE
desired, a controlled current startup can be programmed with a capacitor
on the IMAX pin.
When the output current is below the fault level, the output device is
switched on. When the output current exceeds the fault level, but is less
than the maximum sourcing level programmed by the IMAX pin, the output
remains switched on, and the fault timer starts charging CT. Once CT
charges to 2.5V, the output device is turned off and performs a retry some
time later. When the output current reaches the maximum sourcing current
level, the output appears as a current source, limiting the output current to
the set value defined by IMAX.
Other features of the UCC1913 family include undervoltage lockout, and
8-pin small outline (SOIC) and Dual-In-Line (DIL) packages.
BLOCK DIAGRAM
VDD
3
IMAX
2
UVLO
1=
8
7
PL
LOGIC
SUPPLY
5.0V
REF
V
DD
V
DD
UNDERVOLTAGE
9.5V SHUNT REGULATOR
0.2V
5.0V
V
DD
OUT
LINEAR
CURRENT
AMPLIFIER
50Ω
OVERLOAD COMPARATOR
DISABLE
SD/FLT
1
6
5
SENSE
VSS
ON-TIME
CONTROL
50mV
SOURCE
ONLY
20µA
OVERCURRENT
COMPARATOR
4
CT
UDG-99001
SLUS274 - J ANUARY 1999
UCC1913
UCC2913
UCC3913
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
IVCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
SHUTDOWN Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
PL Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
IMAX Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
DIL-8, SOIC-8 (Top View)
N or J, D Package
SD/FLT
IMAX
VDD
1
2
3
4
8
7
6
5
PL
OUT
SENSE
VSS
All voltages are with respect to VSS (The most negative volt-
age). All currents are positive into, negative out of the specified
terminal. Consult Packaging Section of Databook for thermal
limitations and considerations of packages.
CT
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for TA = –55°C to +125°C for
UCC1913; –40°C to +85°C for UCC2913; 0°C to +70°C for UCC3913; IVDD = 2mA, CT = 4.7pF, TA = TJ
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
VDD Section
IDD
1.0
9.5
7
2.0
10.5
8
mA
V
Regulator Voltage
UVLO Off Voltage
ISOURCE = 2mA to 10mA
8.5
6
V
Fault Timing Section
Overcurrent Threshold
TJ = 25°C
47.5
46
50
50
53
53.5
500
–22
–0.7
1.5
mV
mV
nA
µA
mA
µA
V
Over Operating Temperature
Overcurrent Input Bias
CT Charge Current
50
VCT = 1.0V, IPL = 0
–50
–1.7
0.6
–36
–1.2
1
Overload Condition, VSENSE – VIMAX = 300mV
VCT = 1.0V, IPL = 0
CT Discharge Current
CT Fault Threshold
CT Reset Threshold
Output Duty Cycle
Output Section
2.2
2.4
0.5
2.7
2.6
0.32
1.7
0.62
3.7
V
Fault Condition, IPL = 0
%
Output High Voltage
IOUT = 0A
8.5
6
10
8
V
V
V
V
IOUT = –1mA
Outut Low Voltage
IOUT = 0A; VSENSE – VIMAX = 100mV
IOUT = 2mA; VSENSE – VIMAX = 100mV
0
0.01
0.6
0.2
Linear Amplifier Section
Sense Control Voltage
IMAX = 100mV
IMAX = 400mV
85
100
400
50
115
430
500
mV
mV
nA
370
Input Bias
Shutdown/Fault Section
Shutdown Threshold
Input Current
1.4
15
6
1.7
25
2.0
45
V
µA
V
Shutdown = 5V
Fault Output High
Fault Output Low
Delay to Output
7.5
0
9
0.01
300
V
(Note 1)
150
ns
2
UCC1913
UCC2913
UCC3913
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for TA = –55°C to +125°C for
UCC1913; –40°C to +85°C for UCC2913; 0°C to +70°C for UCC3913; IVDD = 2mA, CT = 4.7pF, TA = TJ
PARAMETER
Power Limiting Section
TEST CONDITIONS
MIN
TYP
MAX UNITS
VSENSE Regulator Voltage
Duty Cycle Control
IPL = 64 A
4.35
0.6
4.85
1.2
5.35
1.7
V
%
%
IPL = 64µA
I
PL = 1mA
0.045
0.1
0.17
Overload Section
Delay to Output
Output Sink Current
Threshold
(Note 1)
300
100
200
500
260
ns
VSENSE = VIMAX = 300mV
Relative to IMAX
40
mA
mV
140
Note 1: Guaranteed by design. Not 100% tested in production.
PIN DESCRIPTIONS
CT: A capacitor is connected to this pin in order to set the from this pin to the drain of the NMOS pass element.
maximum fault time. The maximum fault time must be When the voltage across the NMOS exceeds 5V, current
more than the time to charge external load capacitance. will flow into the PL pin which adds to the fault timer
The maximum fault time is defined as:
charge current, reducing the duty cycle from the 3%
level. When I >>36µA then the average MOSFET
power dissipation is given by:
(
)
PL
2• CT
TFAULT
=
ICH
PFET (avg) =IMAX • 1• 10−6 • RPL
where
ICH =36µA+IPL
SENSE: Input voltage from the current sense resistor.
When there is greater than 50mV across this pin with re-
spect to VSS, then a fault is sensed, and CT starts to
charge.
,
and I is the current into the power limit pin. Once the
fault time is reached the output will shutdown for a time
given by:
PL
SD/FLT: This pin provides fault output indication and
shutdown control. Interface into and out of this pin is usu-
ally performed through level shift transistors. When 20µA
is sourced into this pin, shutdown drives high causing the
output to disable the NMOS pass device. When opened,
and under a non-fault condition, the SD/FLT pin will pull
to a low state. When a fault is detected by the fault timer,
or undervoltage lockout, this pin will drive to a high state,
indicating the output FET is off.
TSD = 2• 106 • CT
IMAX: This pin programs the maximum allowable sour-
cing current. Since VDD is a regulated voltage, a voltage
divider can be derived from VDD to generate the pro-
gram level for the IMAX pin. The current level at which
the output appears as a current source is equal to the
voltage on the IMAX pin over the current sense resistor.
If desired, a controlled current startup can be pro-
grammed with a capacitor on the imax pin, and a pro-
grammed start delay can be achieved by driving the
shutdown with an open collector/drain device into an RC
network.
VDD: Current driven with a resistor to a voltage at least
10V more positive than VSS. Typically a resistor is con-
nected to ground. The 10V shunt regulator clamps VDD
at 10V above the VSS pin, and is also used as an output
reference to program the maximum allowable sourcing
current.
OUT: Output drive to the MOSFET pass element.
PL: This feature ensures that the average MOSFET
power dissipation is controlled. A resistor is connected
VSS: Ground reference for the IC and the most negative
voltage available.
3
UCC1913
UCC2913
UCC3913
APPLICATION INFORMATION
LOAD
0.2V
OVERLOAD COMPARATOR
I3
V
PL
DD
SENSE
IMAX
R
PL
8
I1
36µA
1mA
5.0V
OUTPUT
OVERCURRENT
COMPARATOR
SENSE
6
2.5V
H=CLOSE
50mV
TO OUTPUT
DRIVE
H=OFF
S
Q
H=CLOSE
R
S
VSS
I2
1µA
R
Q
5
0.5V
VSS
INPUT VOLTAGE
CT
FAULT TIMING CIRCUITRY
4
C
T
UDG-99004
VSS
Figure 1. Fault timing circuitry for the UCC1913, including power limit overload.
Figure 1 shows the detailed circuitry for the fault timing During a fault, CT will charge at a rate determined by the
function of the UCC1913. For the time being, we will dis- internal charging current and the external timing capaci-
cuss a typical fault mode, therefore, the overload com- tor. Once CT charges to 2.5V, the fault comparator
parator, and current source I3 does not work into the switches and sets the fault latch. Setting of the fault latch
operation. Once the voltage across the current sense re- causes both the output to switch off and the charging
sistor, R , exceeds 50mV, a fault has occurred. This
switch to open. CT must now discharge with the 1µA cur-
S
causes the timing capacitor to charge with a combination
rent source, I2, until 0.5V is reached. Once the voltage at
of 36µA plus the current from the power limiting amplifier. CT reaches 0.5V, the fault latch resets, which re-enables
The PL amplifier is designed to only source current into the output and allows the fault circuitry to regain control
the CT pin and to begin sourcing current once the volt- of the charging switch. If a fault is still present, the fault
age across the output FET exceeds 5V. The current I
comparator will close the charging switch causing the cy-
is related to the voltage across the FET with the following cle to begin. Under a constant fault, the duty cycle is
expression: given by:
PL
VFET −5V
1µA
DutyCycle =
IPL
=
IPL +36 µA
RPL
Average power dissipation in the pass element is given
by:
Where V
vice.
is the voltage across the NMOS pass de-
FET
1µA
PFET (avg) =VFET • IMAX •
IPL +36 µA
Later it will be shown how this feature will limit average
power dissipation in the pass device. Note that under a
condition where the output current is more than the fault
VFET
level, but less than the max level, V
~ VSS (input
where V
>> 5V I can be approximated as :
PL
OUT
FET
RPL
voltage), I = 0, the CT charging current is 36µA.
PL
and where I >>36µA, the duty cycle can be approxi-
PL
mated as :
4
UCC1913
UCC2913
UCC3913
APPLICATION INFORMATION (cont.)
IOUT
IMAX
IFAULT
Output
Current
Io(nom)
t
t
t
0A
VCT
2.5V
CT
Voltage
(w/respect to VSS)
0.5V
0V
VOUT
0V
Output
Voltage
(w/respect to GND)
VSS
t0
t1 t2
t3
t4
t5 t6 t7 t8
t9 t10
t0: safe condition – output current is nominal, output
voltage is at the negative rail, VSS.
t5: t5 = t3: illustrates 3%duty cycle.
t6: t6 = t4
t1: fault control reached – output current rises above
t7: output short circuit - if V
is short circuited to
OUT
the programmed fault value, CT begins to charge at
36µA.
ground, CT charges at a higher rate depending
upon the values for VSS and R
.
PL
t2: max current reached – output current reaches the
programmed maximum level and becomes a con-
t8: fault occurs – output is still short circuited, but the
occurrence of a fault turns the FET off so no current
is conducted.
stant current with value I
.
MAX
t3: fault occurs – CT has charged to 2.5V, fault output
goes high, the FET turns off allowing no output cur-
t9: t9 = t4; output short circuit released, still in fault
mode.
rent to flow, V
floats up to ground.
OUT
t10: t10 = t0; fault released, safe condition – return to
normal operaton of the circuit breaker.
t4: retry – CT has discharged to 0.5V, but fault current
is still exceeded, CT begins charging again, FET is
on, V
pulled down to VSS.
OUT
Figure 2. Typical timing diagram.
5
UCC1913
UCC2913
UCC3913
APPLICATION INFORMATION (cont.)
1µA• RPL
VFET
Therefore, the maximum average power dissipation in
the MOSFET can be approximated by:
PFET (avg)
=
1µA• RPL
VFET • IMAX •
=IMAX • 1µA• RPL
cancels. therefore,
VFET
Notice that in the approximation, V
FET
average power dissipation is limited in the NMOS pass
element.
Overload Comparator
Figure 3.
The linear amplifier in the UCC1913 ensures that the
output NMOS does not pass more than I
(which is
MAX
V
R ). In the event the output current exceeds the
S
IMAX/
programmed I
by 0.2V/R , which can only occur if
S
MAX
∞
the output FET is not responding to a command from the
IC, the CT pin will begin charging with I3, 1mA, and con-
tinue to charge to approximately 8V. This allows a con-
stant fault to show up on the SD/FLT pin, and also since
the voltage on CT will only charge past 2.5V in an over-
load fault mode, it can be used for detection of output
FET failure or to build in redundancy in the system.
Determining External Component Values
Referring now to Figure 3. To set R
must be achieved:
the following
VDD
VIN min
10V
(
)
>
+ 2mA
(
)
RVDD
R1+R2
In order to estimate the minimum timing capacitor, C ,
T
several things must be taken into account. For example,
given the schematic below as a possible (and at this
point, a standard) application, certain external compo-
Figure 4. Plot average power vs. FET voltage for
nent values must be known in order to estimate C
.
increasing values of R
.
T(min)
PL
Now, given the values of C
, Load, R
OUT
, VSS, and
SENSE
the resistors determining the voltage on the IMAX pin,
the user can calculate the approximate startup time of
LOCAL VDD
the node V
. This startup time must be faster than the
OUT
R3
R4
time it takes for CT to charge to 2.5V (relative to VSS),
and is the basis for estimating the minimum value of CT.
In order to determine the value of the sense resistor,
SHUTDOWN
FAULT OUT
R
SENSE
, assuming the user has determined the fault cur-
LOCAL GND
rent, R
can be calculated by:
SENSE
50mV
LEVEL SHIFT
7
SD/FLT
RSENSE
=
IFAULT
VSS
Figure 5. Possible level shift circuitry to interface to
the UCC1913.
6
UCC1913
UCC2913
UCC3913
APPLICATION INFORMATION (cont.)
COUT • VSS
IMAX −ILOAD
Next, the variable I
must be calculated. I
is the
MAX
MAX
TSTART
=
maximum current that the UCC1913 will allow through
the transistor, M1, and it can be shown that during
startup with an output capacitor the power MOSFET, M1,
can be modeled as a constant current source of value
Resistive Load:
IMAX • ROUT
IMAX • ROUT − VSS
TSTART =COUT • ROUT
•
n
I
where:
MAX
VIMAX
IMAX
=
Once T
is calculated, the power limit feature of the
START
RSENSE
UCC1913 must be addressed and component values de-
rived. Assuming the user chooses to limit the maximum
allowable average power that will be associated with the
circuit breaker, the power limiting resistor, R , can be
easily determined by the following:
where V
= voltage on pin IMAX.
IMAX
Given this information, calculation of the startup time is
now possible via the following:
PL
Current Source Load:
C
VDD
R1
R2
VSS
R
VDD
CSS
VDD
3
IMAX
OUTPUT
2
PL
R
T
UVLO
8
7
LOGIC
SUPPLY
5.0V
REF
1=
V
DD
V
DD
UNDERVOLTAGE
9.5V SHUNT REGULATOR
OUT
V
DD
LINEAR
CURRENT
AMPLIFIER
50Ω
DISABLE
SD/FLT
1
SENSE
VSS
6
5
ON-TIME
CONTROL
SOURCE
ONLY
FAULT=
50mV
20µA
R
S
C
T
CT
4
VSS
UDG-99002
Figure 6. Typical application diagram.
7
UCC1913
UCC2913
UCC3913
APPLICATION INFORMATION (cont.)
PFET avg
Resistive Load:
CT min
(
)
RPL
=
=
)
1µA• IMAX
(
(
)
3 • TSTART 31µA• RPL + VSS −5V −IMAX • ROUT
VSS
5mA
+
where a minimum R exists defined by R
=
)
PL
(
PL min
5 • RPL
3 • ROUT • VSS • COUT
5 • RPL
Finally, after computing the aforementioned variables,
the minimum timing capacitor can be derived as such:
Current Source Load:
(
)
3 • TSTART • 62µA• RPL + VSS −10V
CT min
=
)
(
10 • RPL
SAFETY RECOMENDATION
Although the UCC3913 is designed to provide system safety device such as a fuse should be placed in series
protection for all fault conditions, all integrated circuits with the device. The UCC3913 will prevent the fuse from
can ultimately fail short. For this reason, if the UCC3913 blowing for virtually all fault conditions, increasing system
is intended for use in safety critical applications where reliability and reducing maintenance cost, in addition to
UL or some other safety rating is required, a redundant providing the hot swap benefits of the device.
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 FAX (603) 424-3460
8
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明