UCC3941DTR-ADJ_技术文档

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SLUS242B – JANUARY 1999 – REVISED JUNE 2001

D OR N PACKAGE

(TOP VIEW)

D

1-V Input Voltage Operation Start-up

Ensured Under Full Load on Main Output

With Operation Down to 0.4 V

VOUT

VGD

VIN

SW

1

2

3

4

8

7

6

5

D

Input Voltage Range of 1 V to V

+ 0.5 V

OUT

PGND

SGND

PLIM

500-mW Output Power at Battery Voltages

as Low as 0.8 V

SD

D

Secondary 9-V Supply From a Single

Inductor

UCC3941–ADJ ONLY

(TOP VIEW)

Adjustable Output Power Limit Control

Output Fully Disconnected in Shutdown

VOUT

VGD

VIN

SW

1

2

3

4

8

7

6

5

Adaptive Current-Mode Control for

Optimum Efficiency

PGND

FB

D

8-µA Shutdown Supply Current

SD

PLIM

description

The UCC3941 family of low-input-voltage single-inductor boost-converters are optimized to operate from a

single- or dual-alkaline cell, and step up to a 3.3-V, 5-V, or an adjustable output at 500 mW. The UCC3941 family

also provides an auxiliary 9-V, 100-mW output, primarily for the gate drive supply, which can be used for

applications requiring an auxiliary output such as a 5-V supply by linear regulating. The primary output starts

up under full load at input voltages typically as low as 0.8 V, with a guaranteed maximum of 1 V, and operates

down to 0.4 V once the converter is operating, maximizing battery utilization.

Demanding applications such as pagers and personal digital assistants require high efficiency from several

milliwatts to several hundred milliwatts, and the UCC3941 family accommodates these applications with > 80%

typical efficiencies over the wide range of operation. The high-efficiency at low-output current is achieved by

optimizing switching and conduction losses along with low-quiescent current. At higher output current the

0.25-Ω charge switch, and the 0.4-Ω synchronous rectifier, along with continuous-mode conduction, provide

high efficiency. The wide input-voltage range on the UCC3941 family can accommodate other power sources

such as NiCd and NiMH.

Other features include maximum power control and shutdown control. The device is available in 8-pin SOIC (D)

and 8-pin DIP (N).

AVAILABLE OPTIONS

PACKAGED DEVICES

†

SOIC (D)

DIP (N)

5.0

T

A

V

(V)

OUT

Adjustable

(1.3 V to 6 V)

Adjustable

(1.3 V to 6 V)

3.3

5.0

3.3

–40_C to 85_C

0_C to 70_C

UCC2941D–3 UCC2941D–5 UCC2941D–ADJ UCC2941N–3 UCC2941N–5 UCC2941N–ADJ

UCC3941D–3 UCC3941D–5 UCC3941D–ADJ UCC3941N–3 UCC3941N–5 UCC3941N–ADJ

†

The SOIC (D) package is available left end taped and reeled. Add an R suffix to the device type (e.g., UCC2941DR–3) to order

quantities of 2500 devices per reel.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

functional block diagram

+

µ

F

10

0.8 V TO VOUT+0.5 V

µ

H

22

VIN

SW

UCC3941–3 = 3.3 V

UCC3941–5 = 5.0 V

3

8

UCC3941–ADJ = 1.30 V TO 6 V

VOUT

8.5 V

VGD

Ω

0.4

STARTUP

CIRCUITRY

2

1

µ

10

F

Ω

0.25

µ

100 F

MODULATOR CONTROL CIRCUIT

S SYNCHRONOUS RECTIFICATION CIRCUITRY

S ANTI–CROSS CONDUCTION STARTUP

S MULTIPLEXING LOGIC

S MAXIMUM INPUT POWER CONTROL

S ADAPTIVE CURRENT CONTROL

PLIM

SD

5

6

7

4

{SGND/FB

UCC3941–ADJ

OPEN = SD

1.25 V

+

PGND

UDG–98147

†

For UCC3941–ADJ only: Pin 7 = SGND & PGND, Pin 6 = output sense feedback, FB

2

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ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

Terminal Functions

TERMINAL

NO.

UCC2941–3

UCC2941–5

UCC3941–3

UCC3941–5

I/O

DESCRIPTION

NAME

UCC2941–ADJ

UCC3941–ADJ

FB

–

6

7

I

Feedback control pin used in the UCC3941–ADJ version only. The internal

reference for this comparator is 1.25V and external resistors provide the gain to

the output voltage.

PGND

7

–

Power ground of the IC. The inductor charging current flows through this pin. For

the UCC3941–ADJ signal ground and power ground lines are tied to a common

pin.

PLIM

5

6

5

I

Peak current limit

SGND

–

Signal ground of the IC. For the UCC3941–ADJ signal ground and power ground

lines are tied to a common pin

SD

4

8

2

3

4

8

2

3

I

Shutdown pin

SW

VGD

VIN

Inductor connection

Gate drive supply

O

I

Input voltage to supply the IC during startup. After the output is running the IC

draws power from VOUT or VGD

VOUT

1

O

Main output voltage

detailed description

peak limit (PLIM)

The PLIM pin is programmed to set the maximum input power for the converter. For example a 1-A current limit

at 1 V would have a 333-mA limit at 3 V input keeping the input power constant at 1 W. The peak current at

VIN = 1 V is programmed to 1.5 A (1.5 W) when this pin is grounded. The power limit is given by:

11.8 n

₎ǒ_{V 0.26}Ǔ

) 6.7

PL

+

ǒ Ǔ

W

IN

R

PL

(1)

where R is equal to the external resistor from the PLIM pin to ground and n is the expected efficiency of the

PL

converter. The peak current limit is given by:

11.8 n

I

+

) 0.26

PK(A)

ǒ_RPL

Ǔ

V

) 6.7

IN

(2)

Constant power gives several advantages over constant current such as lower output ripple.

shutdown (SD)

When the SD pin is open, the built-in 7-µA current source pulls up on the pin and programs the IC to go into

shutdown mode. This pin requires an open circuit for shutdown and does not operate correctly when driven to

a logic level high with TTL or CMOS logic. When this pin is connected to ground, (either directly or with a

transistor) the IC is enabled and both output voltages regulate.

3

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ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

detailed description (continued)

needs a name (SW)

The SW pin inductor is connected between this node and VIN. The VGD (gate drive supply) flyback diode is

also connected to this pin. When servicing the 3.3-V supply, this pin goes low charging the inductor, then shut

off, dumping the energy through the synchronous rectifier to the output. When servicing the VGD supply, the

internal synchronous rectifier stays off, and the energy is diverted to VGD through the flyback diode. During

discontinuous portions of the inductor current a MOSFET resistively connects VIN to SW damping excess

circulating energy to eliminate undesired high frequency ringing.

gate drive supply (VGD)

The VGD pin is coarsely regulated around 9 V, and is primarily used for the gate drive supply for the power

switches in the IC. This pin can be loaded with up to 10 mA as long as it does not present a load at voltages

below 2 V. This ensures proper startup of the IC. The VGD supply can go as low as 7.5 V without interfering

with the servicing of the 3.3-V output. Below 7.5 V, VGD has the highest priority, although in practice the voltage

should not decay to that level if the output capacitor is sized properly.

output voltage (VOUT)

Main output voltage (3.3 V, 5 V, or adjustable) which has highest priority in the multiplexing scheme, as long

as VGD is above the critical level of 7.5 V. Loads over 150 mA are achievable at an input voltage of 1-V. This

output starts up with 1-V input at full load.

†

absolute maximum ratings over operating free–air temperature range (unless otherwise noted)

Input voltage VIN, PLIM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 10 V

Voltage range, VGD, SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 15 V

Voltage range, SD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VIN

Output voltage range, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 10 V

Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55_C to 150_C

J

Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65_C to 150_C

stg

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 300_C

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. Currents are positive into, negative

out of the specified terminal.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CDM 1 kV

†

DISSIPATION RATING TABLE

PACKAGE

T

A

≤ 25_C

DERATING FACTOR

T

= 85_C

A

POWER RATING

ABOVE T = 25_C

POWER RATING

A

D

N

760 mW

6.1 mW/_C

7.9 mW/_C

390 mW

980 mW

510 mW

recommended operating conditions

MIN

0.8

1.8

0

MAX

5.0

UNIT

V

Input voltage

Output voltage

Output current

5.5

V

200

mA

4

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ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

electrical characteristics over recommended operating junction temperature range, for UCC3941,

T = 0_C to 70_C, for UCC2941, T = –40_C to 85_C, VIN = 1.25 V, T = T (unless otherwise noted)

A

J

input voltage

PARAMETER

TEST CONDITIONS

MIN

TYP

0.8

MAX

1.0

UNIT

T

= 25_C,

No external VGD load,

= 100 mA, See Note 1

J

V

I

OUT

T

= 0_C to 85_C, No external VGD load,

J

0.9

1.1

1.5

0.5

V

Minumum startup voltage

I

= 100 mA, See Note 1

OUT

T

= –40_C to 0_C, No external VGD load,

J

I

= 100 mA, See Note 1

OUT

I

= 0 mA,

No external VGD load,

OUT

Minumum dropout voltage

Input voltage range

VGD = 6.3 V

VOUT

+ 0.5

1

Quiescent supply current

Shutdown supply current

See note 2

SD = open

13

8

25

20

µA

output voltage

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

80

UNIT

µA

Quiescent supply current

Shutdown supply current

See note 2

SD = open

32

6

15

µA

1 V < VIN < 3 V

3.18

3.17

4.85

4.8

3.25

3.37

V

UCC3941–3

UCC3941–5

1 V < VIN < 3 V,

See Note 1

0 mA < I

< 150 mA,

< 100 mA,

OUT

3.30

5.00

5.0

3.43

5.15

5.2

V

Regulation voltage

1 V < VIN < 5 V

1 V < VIN < 5 V,

See Note 1

OUT

Feedback voltage

UCC3941–ADJ 1 V < VIN < 3 V

1.212

1.250

1.288

VGD output

PARAMETER

Quiescent supply current

Shutdown supply current

TEST CONDITIONS

MIN

TYP

25

MAX

60

UNIT

µA

See note 2

SD = open

8

20

µA

1 V < VIN < 3 V

7.5

7.4

8.7

9.2

V

Regulation voltage

1 V < VIN < 3 V,

See Note 1

0 mA < I < 10 mA,

OUT

87

9.3

V

NOTE 1: Performance from application circuit shown in Figures 3, 4, and 5. Ensured by design. Not 100% production tested.

NOTE 2: For the UCC3941–3, VOUT = 3.47 V and VGD = 9.3 V. For the UCC3941–5, VOUT = 5.25 V, VGD = 9.3 V. For the UCC3941–ADJ,

FB = 1.315 V, VGD = 9.3 V.

5

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ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

electrical characteristics over recommended operating junction temperature range, for UCC3941,

T = 0_C to 70_C, for UCC2941, T = –40_C to 85_C, VIN = 1.25 V, T = T (unless otherwise noted)

A

J

(continued)

inductor charging (L = 22 µH)

PARAMETER

Peak discontinuous current

Peak continuous current

TEST CONDITIONS

Over operating range

= 6.2 Ω, See Note 1

MIN

TYP

0.05

MAX

0.85

UNIT

A

R

0.5

0.9

0.25

50

1.3

A

PLIM

Charge switch R

DS(on)

N and D package, I = 200 mA

See Note 1

0.40

Ω

Current limit delay

ns

synchronous rectifier

PARAMETER

TEST CONDITIONS

= 3.3 V

MIN

TYP

MAX

UNIT

UCC3941N–ADJ

UCC3941D–ADJ

I = 200 mA,

I = 200 mA

V

0.35

0.5

0.6

0.8

Ω

OUT

UCC3941N–3

UCC3941D–3

Ω

Rectifier R

DS(on)

UCC3941N–5

UCC3941D–5

shutdown

PARAMETER

Shutdown bias current

NOTE 1: Performance from application circuit shown in Figures 3, 4, and 5. Ensured by design. Not 100% production tested.

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SD = 0 V

–10

–7

µA

NOTE 2: For the UCC3941–3, VOUT = 3.47 V and VGD = 9.3 V. For the UCC3941–5, VOUT = 5.25 V, VGD = 9.3 V. For the UCC3941–ADJ,

FB = 1.315 V, VGD = 9.3 V.

6

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ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

A detailed block diagram of the UCC3941 is shown in Figure 1. Unique control circuitry provides high-efficiency

power conversion for both light and heavy loads by transitioning between discontinuous and continuous

conduction based on load conditions. Figure 2 depicts converter waveforms for the application circuit shown

in Figure 3. A single 22-µH inductor provides the energy pulses required for a highly efficient 3.3-V converter

at up to 500 mW output power.

VIN

3

SW

8

ANTI–RINGING

SWITCH

VOUT

1

VGD ZERO

DETECT

VOUT ZERO

DETECT

200 kHz

STARTUP

VGD

2

OSCILLATOR

AND CONTROL

VGD

+

µ

1.7

S

+

OFF TIME

CONTROLLER

5V

VGD

FROM

SD

RECTIFIER

CONTROL

FROM SD

1.1 A

MAX

Ω

5

PLIM

5

CLK

D

CURRENT

LIMIT

Q

L1

+

50 mV

MAXIMUM

R

Q

VSAT

SD

VIN

ON TIME

CONTROLLER

50 mV

VIN

SD

4

SD

BOOST

LATCH

µ

VIN

11 SEC

T

=

ON

FB

6

(UCC3941–ADJ

ONLY)

+

*

Q

R

VGD

SGND

(UCC3941–3/–5

ONLY)

SD

6

7

**

***

THERMAL

SHUTDOWN

PGND

* 3.3 V FOR UCC3941–3

5.0 V FOR UCC3941–5

1.25 V FOR UCC3941–ADJ

** 8.7 V FOR UCC3941–3

9.6 V FOR UCC3941–5/–ADJ

*** 7.7 V FOR UCC3941–3

8.8 V FOR UCC3941–5/–ADJ

UDG–98146

NOTE: Switches are shown in the logic low state; external R

= 6.2 Ω

PLIM

Figure 1. 1–V Synchronous Boost

7

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ꢅꢍ ꢎ ꢏꢐ ꢑꢁ ꢒ ꢓ ꢔꢑ ꢔꢀ ꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑꢎ ꢗ ꢓꢖꢗꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

UDG–96117

Figure 2. Inductor Current and Output Ripple Waveforms

At time t1, the 3.3-V output drops below its lower threshold, and the inductor is charged with an on time

determined by:

12 ms

VIN

t

+

ON

(3)

For a 1.25-V input, and a 22-µH inductor, the resulting peak current is approximately 500 mA. At time t2, the

inductor begins to discharge with a minimum off time of 1.7 µs. Under lightly loaded conditions, the amount of

energy delivered in this single pulse satisfies the voltage-control loop, and the converter does not command

any more energy pulses until the output again drops below the lower voltage threshold.

At time t3, the VGD supply has dropped below its lower threshold, but the output voltage is still above its

threshold point. This results in an energy pulse to the gate drive supply at t4. However, while the gate drive is

being serviced, the output voltage has dropped below its lower threshold, so the state machine commands an

energy pulse to the output as soon as the gate drive pulse is completed.

Time t6, represents a transition between light and heavy load. A single energy pulse is not sufficient to force

the output voltage above its upper threshold before the minimum off-time has expired, and a second charge

cycle is commanded. Since the inductor current does not reach zero in this case, the peak current is greater

than 0.5 A at the end of the next charge on time. This results in a ratcheting of the inductor current until either

the output voltage is satisfied, or the converter reaches its programmed current limit. At time t7, the gate drive

voltage has dropped below its threshold but the converter continues to service the output because it has highest

priority, unless VGD drops below 7.5 V.

Between t7 and t8, the converter reaches its peak current limit which is determined by R and VIN. Once the

PL

limit is reached, the converter operates in continuous mode with approximately 200 mA of ripple current. At time

t8, the output voltage is satisfied, and the converter can service VGD, which occurs at t9.

8

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ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢉ ꢈ ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇꢃ ꢄꢅ ꢆꢊ ꢋꢌ

ꢅ ꢍꢎ ꢏꢐ ꢑꢁꢒꢓꢔ ꢑꢔ ꢀꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑ ꢎꢗ ꢓꢖ ꢗ ꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

programming the power limit

The UCC3941 incorporates an adaptive power limit control that modifies the converter current limit as a function

of input voltage. In order to program the function, the user simply determines the output power requirements

and makes an initial converter efficiency estimate. The programming resistor is chosen by:

11.8 n

R

+

* 6.7

PL

ǒ

Ǔ

BAT

P

* 0.26 n V

OUT

(4)

Where n is the initial efficiency estimate. For 500 mW of output power, with a 1.0 V input, and an efficiency

estimate of 0.75:

11.8 0.75

0.5 * 0.26 0.75 1.0

R

+

* 6.7 + 22 W

PL

(

)

(5)

For decreasing values of R , the power limit increases. Therefore, to ensure that the converter can supply

PL

500 mW of output power, a power limiting resistor of less than 22 Ω must be chosen.

11.8

22 ) 6.7

_{I +}ǒ

Ǔ_{) 1.0 0.26 + 0.67 W}

(

)

P + V

L

BAT

L

(6)

1 V TO 3.5 V

+

MMSZ5240BT1

10 V

DT3316P–223

µ

10

F

µ

22 H

3

8

VIN

SW

3.3 V AT 500 mW

10SN100M

8.5 V

2

VGD

VOUT

PLIM

1

µ

100

F

µ

10

F

UCC3941–3

5

Ω

6.2

R

PL

4

SD

WCR0805–6R207

SGND

PGND

6

7

OPEN = SD

UDG–98163

Figure 3. Dual Output Synchronous Boost, 3.3-V Version

9

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ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢇ

ꢈ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢉ

ꢈ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢊ

ꢋ

ꢌ

ꢈ

ꢅꢍ ꢎ ꢏꢐ ꢑꢁ ꢒ ꢓ ꢔꢑ ꢔꢀ ꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑꢎ ꢗ ꢓꢖꢗꢓ

ꢀ

ꢁ

ꢇ

ꢃꢄ

ꢅ

ꢆ

ꢇꢈ

ꢀ

ꢁ

ꢇ

ꢃꢄ

ꢅ

ꢆ

ꢉꢈ

ꢀ

ꢁ

ꢇ

ꢃꢄ

ꢅ

ꢆ

ꢊ

ꢋ

ꢌ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

programming the power limit (continued)

1 V TO 5.5 V

+

MMSZ5240BT1

10 V

DT3316P–223

µ

F

10

µ

22

H

3

8

VIN

SW

5.0 V AT 500 mW

10SN100M

8.5 V

2

4

VGD

VOUT

1

µ

F

100

µ

F

10

UCC3941–5

PLIM

5

Ω

R

6.2

SD

PL

WCR0805–6R207

SGND

PGND

6

7

OPEN = SD

UDG–98159

Figure 4. Dual Output Synchronous Boost, 5-V Version

1 V TO VOUT + 0.5 V

+

DT3316P–223

22 µH

MMSZ5240BT1

10 V

10µF

3

8

VIN

SW

R1

R2

ǒ_{1 )}Ǔ_{AT 500 mA}

VOUT + 1.25

8.5 V

2

4

VGD

VOUT

1

10SN100M

10µF

100µF

R1

UCC3941–ADJ

V

REF

= 1.25 V

FB

6

5

SD

PLIM

R

6.2Ω

OPEN = SD

PL

WCR0805–6R207

R2

(SGND)

PGND

7

UDG–98164

Figure 5. Dual Output Synchronous Boost, Adjustable Version

10

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ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢉ ꢈ ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇꢃ ꢄꢅ ꢆꢊ ꢋꢌ

ꢅ ꢍꢎ ꢏꢐ ꢑꢁꢒꢓꢔ ꢑꢔ ꢀꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑ ꢎꢗ ꢓꢖ ꢗ ꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

programming the power limit (continued)

This power limiting setting supports 0.5 W of output power. It should be noted that the power limit equation

contains an approximation which results in slightly less actual input power than the equation predicts. This

discrepancy results from the fact that the average current delivered to the load is less than the peak current set

by the power limit function due to current ripple. However, if the ripple component of the current is kept low, the

power limit equation can be used as an adequate estimate of input power. Furthermore, since an initial efficiency

estimate was required, sufficient margin can be built into this estimate to ensure proper converter operation.

The 6.2-Ω external power limit resistor (shown in Figures 3, 4, and 5) results in approximately 700 mW of power

capability with a 1.0-V input.

inductor selection

An inductor value of 22 µH works well in most applications, but values between 10 µH and 100 µH are also

acceptable. Lower-value inductors typically offer lower ESR and smaller physical size. Due to the nature of the

bang–bang controllers, larger inductor values typically results in larger overall voltage ripple, because once the

output voltage level is satisfied the converter goes discontinuous, resulting in the residual energy of inductor

causing overshoot.

It is recommended to keep the ESR of the inductor below 0.15 Ω for 500-mW applications. A Coilcraft

DT3316P–223 surface mount inductor is one choice since it has a current rating of 1.5 A and an ESR of 84 mΩ.

Other choices for surface mount inductors are shown in Table 1.

Table 1. Inductor Suppliers

MANUFACTURER

CONTACT INFORMATION

PART NUMBERS

Cary, Illinois

Tel: (708) 639–2361 Fax: (708) 639–1469

Coilcraft

DT Series

Boca Raton, Florida

Tel: (407) 241–7878

Coiltronics

CTX Series

11

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ꢀ ꢁꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢊ ꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ

ꢅꢍ ꢎ ꢏꢐ ꢑꢁ ꢒ ꢓ ꢔꢑ ꢔꢀ ꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑꢎ ꢗ ꢓꢖꢗꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

output capacitor selection

Once the inductor value is selected, the capacitor value determines the ripple of the converter. The worst case

peak-to-peak ripple of a cycle is determined by two components, one is due to the charge storage characteristic,

and the other is the ESR of the capacitor. The worst-case ripple occurs when the inductor is operating at

maximum current and is expressed as follows:

ǒ_IǓ²

L

CL

₎ǒ_{ICL ESR}Ǔ

DV +

C

_{2 C}ǒ_VO_* VǓ

I

(7)

where

Power Limit

D

I

= the peak inductor current

ǒ

I

+

Ǔ

CL

V

IN

D

∆V = output ripple

= output voltage

V

O

V = input voltage

I

C

= ESR of the output capacitor

ESR

A Sanyo OS–CON series surface mount capacitor (10SN100M) is one recommendation. This part has an ESR

rating of 90 µW at 100 µF. Other potential capacitor sources are shown in Table 2.

Table 2. Capacitor Suppliers

MANUFACTURER

CONTACT INFORMATION

PART NUMBERS

San Diego, California

Tel: (619) 661–6322

Fax: (619) 661–1055

Sanyo Video Components

OS–CON Series

Sanford, Maine

Tel: (207) 282–5111

Fax: (207) 283–1941

AVX

TPS Series

695D Series

Concord, New Hampshire

Sprague

Tel: (603) 224–1961

input capacitor selection

Since the UCC3941 family does not require a large decoupling capacitor on the input voltage to operate

properly, a 10-µF capacitor is sufficient for most applications. Optimum efficiency occurs when the capacitor

value is large enough to decouple the source impedance. This usually occurs for capacitor values in excess

of 100 µF.

12

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ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢉ ꢈ ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇꢃ ꢄꢅ ꢆꢊ ꢋꢌ

ꢅ ꢍꢎ ꢏꢐ ꢑꢁꢒꢓꢔ ꢑꢔ ꢀꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑ ꢎꢗ ꢓꢖ ꢗ ꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

system shutdown

The UCC3941 is enabled by shorting the SD pin to ground either directly or through a transistor.The UCC3941

is shut down when the SD pin is floated (an internal current source pulls up on the SD pin). Since the SD pin

is not TTL compatible, 0 V enables the part but 3 V or even 5 V does not properly shut down the device.

The recommended circuit for a system requiring shutdown control is shown below. The enable line is driven from

a microprocessor or system logic. If enable is low, the SD pin is floated since Q1 base voltage is too low to turn

on. If enable is high, Q1 turns on and SD is grounded, enabling the UCC3941. A 1-MΩ resistor to VGD allows

Q1 to turn on if the enable pin is high impedance during startup. If shutdown control is not required for the

application, SD should be grounded directly.

CAUTION:

The UCC3941 should be allowed sufficient time to properly shutdown in a controlled

manner. This is accomplished by ensuring that enable is held low at least 500 µs before

subsequently being brought high. Not adhering to the timings in Figure 7 can result in

DEVICE FAILURE.

PROPOGATION DELAY AND RISE TIME

SHUTDOWN INTERFACE CIRCUIT

10

8

6

VGD

2

4

2

Ensure 500 µs

Ω

1 M

0

4

SD

~

Ω

20 k

ENABLE

6

4

2

0

500

1000

t – Time – µs

Figure 6

Figure 7. SD Timings

13

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ꢀ ꢁꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢊ ꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ

ꢅꢍ ꢎ ꢏꢐ ꢑꢁ ꢒ ꢓ ꢔꢑ ꢔꢀ ꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑꢎ ꢗ ꢓꢖꢗꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

APPLICATION INFORMATION

SD interface circuit

reducing inrush current

A switch mode boost converter requires V to be less than V

in order to control current in the inductor.

IN

OUT

Forward voltage is applied across the inductor during the t

time (increasing current) while reverse voltage

ON

is applied during the t

time (decreasing current). During startup, V

is less than V , resulting in inrush

OFF

OUT IN

current until the output is charged.

The UCC3941 has two outputs; VGD and V

than with a single cell and should be minimized to reduce peak currents in the controller. The VGD inrush current

. Inrush current in a two cell alkaline application is typically higher

OUT

can be minimized by reducing the value of the VGD capacitor. For example a 10-µF capacitor may cause a 3-A

inrush where a 1-µF capacitor results in less than 1-A of inrush. Reducing the V

difficult since the output capacitance may need to be large to minimize output ripple. In a two cell application,

inrush current is more

OUT

a diode from V to V

(shown In Figure 8) precharges the V

capacitor and reduces inrush.

IN

OUT

PRECHARGE DIODE

3

22 µH

VIN

8

2

SW

VOUT

1

+

2 CELL

INPUT

10 V

ZENER

100 µF

220 µF

VGD

1 µF

UDG–00155

Figure 8. Optional Precharge Diode for V

for 2-Cell Input

OUT

avoiding inductor saturation

Inductor selection should take into account size, on resistance, and the current capabilities of the part. Inductor

ratings include both saturation current and maximum operating current for the device. The R resistor and

PLIM

inductor should be selected to guarantee the inductor does not saturate during normal operation. A saturated

inductor can cause excessive peak currents and δi/δt slopes which may result in part failure. Inrush and normal

operating current should be viewed with a current probe and oscilloscope to ensure the inductor current is linear

and controlled.

14

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ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢉ ꢈ ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇꢃ ꢄꢅ ꢆꢊ ꢋꢌ

ꢅ ꢍꢎ ꢏꢐ ꢑꢁꢒꢓꢔ ꢑꢔ ꢀꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑ ꢎꢗ ꢓꢖ ꢗ ꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

TYPICAL CHARACTERISTICS

EFFICIENCY

vs.

OUTPUT CURRENT

EFFICIENCY

vs.

OUTPUT CURRENT

100

80

100

VIN = 1.5 V

VIN = 2 V

80

60

VIN = 1.25 V

VIN = 3 V

VIN = 2.5 V

VIN = 1 V

40

20

40

20

V

OUT

= 3.3 V

V

OUT

= 3.3 V

0

0.1

1

OUT

10

– Output Current – mA

100

0.1

1

10

– Output Current – mA

100

I

OUT

Figure 9

Figure 10

STARTUP CHARACTERISTICS

PSUEDO CONTINUOUS MODE OPERATION

R

V

= 6Ω

= 1.25 V

= 100 mA

L = 22 µH

C = 100 µF

PL

IN

VOUT

1 V/div

I

C

= 22 µH

OUT

VGD

3.3 V

VOUT

RIPPLE

20 mV/div

VGD

5 V/div

I

L

I

0.5 A/div

L

0.2 A/div

t0

t1 t2 t3t4

2 ms/ div

20 µs/div

Figure 11

Figure 12

15

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ꢀ ꢁꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢊ ꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ

ꢅꢍ ꢎ ꢏꢐ ꢑꢁ ꢒ ꢓ ꢔꢑ ꢔꢀ ꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑꢎ ꢗ ꢓꢖꢗꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

startup characteristics timing sequence (for single output mode)

(see Figure 11)

D

t0

t1

t2

t3

t4

the 200-kHz srartup oscillator starts VGD rising

VGD reaches sufficient voltage (5 V) to run in normal operating mode

VGD reaches sufficient voltage (7.5 V) to start VOUT

VOUT is serviced and starts up

VOUT reaches sufficient voltage and VGD is serviced until it reaches 8.5 V

VGD LOAD = 10 mA

VOUT LOAD = 50 mA

VOUT

AC COUPLED

50 mV/DIV

VGD

AC COUPLED

100 mV/DIV

INDUCTOR

CURRENT

200 mA/DIV

t1 t2

t3 t4

t5

Figure 13.

startup characteristics timing sequence (for dual output mode)

(see Figure 13)

D

t1

t2

t3

VOUT is serviced and inductor current goes continuous

VGD is serviced with discontinuous operation and reaches its first threshold (7.5 V)

VOUT requires servicing and because VGD has reached its minimum threshold of 7.5 V, VOUT

takes priority

D

t4

t5

VOUT is satisfied and VGD is serviced until the second threshold (8.7 V) is reached

Both outputs are satisfied

16

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ꢀ ꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢉ ꢈ ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢊꢋꢌ ꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢀꢁꢁ ꢇ ꢃꢄ ꢅ ꢆ ꢉꢈ ꢀꢁꢁ ꢇꢃ ꢄꢅ ꢆꢊ ꢋꢌ

ꢅ ꢍꢎ ꢏꢐ ꢑꢁꢒꢓꢔ ꢑꢔ ꢀꢏ ꢕꢔ ꢔ ꢏꢖ ꢁꢔ ꢑ ꢎꢗ ꢓꢖ ꢗ ꢓ

ꢘ

SLUS242B – JANUARY 1999 – REVISED JUNE 2001

TYPICAL CHARACTERISTICS

UCC3941–3 DROPOUT VOLTAGE

MINIMUM STARTUP VOLTAGE

vs.

OUTPUT CURRENT

1.2

1.20

1.16

1.12

1.0

0.8

0.6

0.4

1.08

1.04

1.00

0.96

0.92

0.88

0.2

0

0.84

0.80

0

50

OUT

100

150

0

50

100

150

I

– Output Current – mA

I

OUT

– Output Current – mA

Figure 14

Figure 15

UCC3941–ADJ (N and D PACKAGES) CURRENT LIMIT

STARTUP VOLTAGE

vs.

TEMPERATURE

vs.

PROGRAMMING RESISTANCE

2.1

1.2

1.9

VIN = 1 V

1.0

0.8

1.7

VIN = 1.25 V

1.5

VIN = 1.5 V

1.3

VIN = 1.75 V

0.6

0.4

1.1

VIN = 2 V

0.9

VIN = 3 V

0.7

0.5

0.2

0

0.3

0

2

4

6

8

10 12 14 16 18 20

–40

–20

0

20

40

60

80

100

R

– Programming Resistance – Ω

P

Temperature – _C

11.5

IL

+

) 0.26

(Rp)

ǒ

Ǔ

ǒ _{6.7 ) R}

Ǔ

V

P

BAT

Figure 16

Figure 17

17

www.ti.com

PACKAGE OPTION ADDENDUM

www.ti.com

26-Mar-2007

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

SOIC

PDIP

SOIC

PDIP

Drawing

UCC2941D-3

UCC2941D-5

OBSOLETE

LIFEBUY

NRND

D

P

D

P

8

TBD

Call TI

UCC2941D-5G4

UCC2941D-ADJ

UCC2941D-ADJG4

UCC2941N-5

LIFEBUY

NRND

LIFEBUY

OBSOLETE

LIFEBUY

NRND

UCC2941N-ADJG4

UCC3941D-5

UCC3941D-ADJ

UCC3941D-ADJG4

UCC3941DTR-3

UCC3941DTR-ADJ

UCC3941DTR-ADJG4

UCC3941N-3

LIFEBUY

NRND

LIFEBUY

NRND

UCC3941N-3G4

UCC3941N-5

LIFEBUY

NRND

UCC3941N-ADJ

UCC3941N-ADJG4

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

18-Sep-2008

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

SOIC

PDIP

SOIC

PDIP

Drawing

UCC2941D-3

UCC2941D-3G4

UCC2941D-5

OBSOLETE

LIFEBUY

D

P

D

P

8

TBD

Call TI

UCC2941D-5G4

UCC2941D-ADJ

UCC2941D-ADJG4

UCC2941N-5

UCC2941N-5G4

UCC3941D-5

UCC3941D-5G4

UCC3941D-ADJ

UCC3941D-ADJG4

UCC3941DTR-3

UCC3941DTR-3G4

UCC3941DTR-ADJ

UCC3941DTR-ADJG4

UCC3941N-3

UCC3941N-3G4

UCC3941N-5

UCC3941N-5G4