V62/03671-01XE [TI]
DIFFERENTIAL BUS TRANSCEIVER; 差动总线收发器
| 型号： | V62/03671-01XE |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DIFFERENTIAL BUS TRANSCEIVER |
| 文件： | 总17页 (文件大小：410K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
D Package
(TOP VIEW)
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
R
RE
DE
D
V
B
A
1
2
3
4
8
7
6
5
CC
D
D
Extended Temperature Performance of
−40°C to 125°C and −55°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
GND
D
D
D
Enhanced Product Change Notification
logic diagram (positive logic)
†
Qualification Pedigree
3
High-Speed Low-Power LinBiCMOS
DE
‡
Circuitry Designed for Signaling Rates Up
4
to 30 Mbps
D
2
D
D
Bus-Pin ESD Protection Exceeds 12-kV
HBM
RE
6
7
A
B
1
Bus
R
Compatible With ANSI Standard
TIA/EIA-485-A and ISO 8482:1987(E)
D
Low Skew
Function Tables
D
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
DRIVER
INPUT
D
H
L
X
ENABLE
OUTPUTS
D
D
Low Disabled Supply Current
Requirements . . . 700 µA Maximum
Common-Mode Voltage Range of −7 V
to 12 V
DE
H
H
L
H
A
H
L
Z
H
B
L
H
Z
L
Open
D
Thermal-Shutdown Protection
D
Driver Positive and Negative Current
Limiting
RECEIVER
DIFFERENTIAL INPUTS
ENABLE
OUTPUT
D
D
D
D
Open-Circuit Fail-Safe Receiver Design
Receiver Input Sensitivity . . . 200 mV Max
Receiver Input Hysteresis . . . 50 mV Typ
V
−V
≥ 0.2 V
ID
≤ −0.2 V
RE
L
L
L
H
L
R
H
?
L
Z
H
A
B
V
ID
−0.2 V < V < 0.2 V
V
ID
X
Glitch-Free Power-Up and Power-Down
Protection
Open
†
‡
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
Signaling rate by TIA/EIA-485-A definition restrict transition times
to 30% of the bit length, and much higher signaling rates may be
achieved without this requirement as displayed in the TYPICAL
CHARACTERISTICS of this device.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS and LinASIC are trademarks of Texas Instruments.
ꢍ
ꢍ
ꢑ
ꢕ
ꢥ
ꢎ
ꢠ
ꢓ
ꢇ
ꢞ
ꢒ
ꢟ
ꢏ
ꢙ
ꢕ
ꢗ
ꢂ
ꢘ
ꢎ
ꢊ
ꢒ
ꢊ
ꢖ
ꢗ
ꢡ
ꢘ
ꢙ
ꢟ
ꢚ
ꢛ
ꢜ
ꢜ
ꢝ
ꢝ
ꢖ
ꢖ
ꢙ
ꢙ
ꢗ
ꢗ
ꢖ
ꢞ
ꢞ
ꢢ
ꢟ
ꢠ
ꢚ
ꢚ
ꢡ
ꢡ
ꢗ
ꢝ
ꢜ
ꢛ
ꢞ
ꢞ
ꢙ
ꢘ
ꢢ
ꢒꢡ
ꢠ
ꢣ
ꢞ
ꢤ
ꢖ
ꢟ
ꢜ
ꢞ
ꢝ
ꢖ
ꢝ
ꢙ
ꢚ
ꢗ
ꢠ
ꢥ
ꢜ
ꢗ
ꢝ
ꢝ
ꢡ
ꢞ
ꢦ
Copyright 2004, Texas Instruments Incorporated
ꢚ
ꢙ
ꢟ
ꢝ
ꢙ
ꢚ
ꢛ
ꢝ
ꢙ
ꢞ
ꢢ
ꢖ
ꢘ
ꢖ
ꢟ
ꢡ
ꢚ
ꢝ
ꢧ
ꢝ
ꢡ
ꢚ
ꢙ
ꢘ
ꢨ
ꢜ
ꢏ
ꢗ
ꢛ
ꢡ
ꢞ
ꢝ
ꢜ
ꢗ
ꢥ
ꢜ
ꢚ
ꢥ
ꢩ
ꢜ
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ
ꢚ
ꢚ
ꢜ
ꢗ
ꢝ
ꢪ
ꢦ
ꢍ
ꢚ
ꢙ
ꢥ
ꢠ
ꢟ
ꢝ
ꢖ
ꢙ
ꢗ
ꢢ
ꢚ
ꢙ
ꢟ
ꢡ
ꢞ
ꢞ
ꢖ
ꢗ
ꢫ
ꢥ
ꢙ
ꢡ
ꢞ
ꢗ
ꢙ
ꢝ
ꢗ
ꢡ
ꢟ
ꢡ
ꢞ
ꢞ
ꢜ
ꢚ
ꢖ
ꢤ
ꢪ
ꢖ
ꢗ
ꢟ
ꢤ
ꢠ
ꢥ
ꢡ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁ ꢂꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢃꢊ ꢋ ꢌꢍ
ꢎ ꢏꢐ ꢐ ꢌꢑ ꢌꢂ ꢒ ꢏ ꢊꢅ ꢆꢓ ꢁ ꢒꢑ ꢊꢂ ꢁꢇ ꢌꢏ ꢔ ꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
description/ordering information
The SN65LBC176A-EP differential bus transceiver is a monolithic, integrated circuits designed for bidirectional
data communication on multipoint bus-transmission lines. The SN65LBC176A-EP is designed for balanced
transmission lines and is compatible with ANSI standard TIA/EIA-485-A and ISO 8482. The SN65LBC176A-EP
offers improved switching performance over its predecessors without sacrificing significantly more power.
The SN65LBC176A-EP combines a 3-state, differential line driver and a differential input line receiver, both of
which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables,
respectively, which can externally connect together to function as a direction control. The driver differential
outputs and the receiver differential inputs connect internally to form a differential input/output (I/O) bus port that
is designed to offer minimum loading to the bus whenever the driver is disabled or V
= 0. This port features
CC
wide positive and negative common-mode voltage ranges, making the device suitable for party-line
applications. Low device supply current can be achieved by disabling the driver and the receiver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
−40°C to 125°C
−55°C to 125°C
SOIC − D
SOIC − D
Tape and Reel SN65LBC176AQDREP
Tape and Reel SN65LBC176AMDREP
176AEP
176MEP
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
schematics of inputs and outputs
A Input
V
CC
D, DE, and RE Inputs
V
CC
16 V
100 kΩ
4 kΩ
100 kΩ
18 kΩ
1 kΩ
Input
Input
16 V
4 kΩ
8 V
B Input
R Output
V
CC
V
CC
16 V
4 kΩ
40 Ω
Output
18 kΩ
Input
100 kΩ
4 kΩ
8 V
16 V
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
†
absolute maximum ratings
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
CC
Voltage range at any bus terminal (A or B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to 15 V
Input voltage, V (D, DE, R, or RE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V + 0.5 V
I
CC
Electrostatic discharge:Bus terminals and GND, Class 3, A: (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . 12 kV
Bus terminals and GND, Class 3, B: (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . 400 V
All terminals, Class 3, A: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 kV
All terminals, Class 3, B: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 V
Continuous total power dissipation (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Storage temperature range, T (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
2. The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
3. Tested in accordance with MIL−STD−883C, Method 3015.7
4. Long-term, high-temperature storage and/or extended use at maximum recommended operating conditions may result in a
reduction of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.
DISSIPATION RATING TABLE
‡
T
≤ 25°C
DERATING FACTOR
T
A
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D
725 mW
5.8 mW/°C
464 mW
377 mW
145 mW
‡
This is the inverse of the junction-to-ambient thermal resistance when the board is mounted and with no air flow.
OPERATING LIFE DERATING TABLE − SN65LBC176AMDREP
1/t vs 1/T in °K
f
J
0.0001
140°C (29.1k Hrs, 3.3 Yrs)
135°C (51.0k Hrs, 5.8 Yrs)
130°C (90.1k Hrs, 10.3 Yrs)
0.00001
125°C (161.8 kHrs, 18.5 Yrs)
R = 0.9881
0.000001
1/T in °K
J
NOTES: A. See the data sheet for absolute maximum and maximum recommended operating conditions.
B. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
C. Attached enhanced plastic product disclaimer applies.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁ ꢂꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢃꢊ ꢋ ꢌꢍ
ꢎ ꢏꢐ ꢐ ꢌꢑ ꢌꢂ ꢒ ꢏ ꢊꢅ ꢆꢓ ꢁ ꢒꢑ ꢊꢂ ꢁꢇ ꢌꢏ ꢔ ꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
recommended operating conditions
MIN NOM
MAX
5.25
12
UNIT
Supply voltage, V
CC
4.75
5
V
Voltage at any bus terminal (separately or common mode), V or V
IC
V
I
−7
2
High-level input voltage, V (output recessive)
IH
D, DE, and RE
V
CC
0.8
V
V
V
Low-level input voltage, V (output dominant)
IL
D, DE, and RE
0
§
−12
Differential input voltage, V (see Note 5)
ID
12
Driver
−60
−8
High-level output current, I
mA
mA
°C
OH
Receiver
Driver
60
8
Low-level output current, I
OL
Receiver
SN65LBC176AQ-EP
SN65LBC176AM-EP
−40
−55
125
125
Operating free-air temperature, T
A
§
The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet.
NOTE 5: Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
driver electrical characteristics over recommended operating conditions (unless otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
Input clamp voltage
I = −18 mA
−1.5
1.5
−0.8
4
V
IK
I
I
O
= 0
6
6
6
R
= 54 Ω,
See Figure 1
0.9
1.5
1.5
| V
OD
|
Differential output voltage
V
L
V
test
= −7 V to 12 V, See Figure 2
0.9
Change in magnitude of
differential output voltage
∆| V
|
See Figure 1 and Figure 2
See Figure 1
−0.2
1.8
0.2
3
V
V
OD
Steady-state common-mode
output voltage
V
2.4
OC(SS)
Change in steady-state
common-mode output
voltage
∆ V
OC(SS)
See Figure 1
−0.2
0.2
V
†
High-impedance output
current
I
I
See receiver input currents
OZ
High-level enable input
current
V = 2 V
I
−100
µA
IH
Low-level enable input
current
I
I
V = 0.8 V
−100
−250
µA
IL
I
Short-circuit output current
−7 V ≤ V ≤ 12 V
70
5
250
9
mA
OS
O
Receiver disabled and driver enabled
Receiver disabled and driver disabled
Receiver enabled and driver enabled
V = 0 or V
I
No load
,
CC
0.4
8.5
0.7
15
I
Supply current
mA
CC
†
All typical values are at V
CC
= 5 V, T = 25°C.
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
driver switching characteristics over recommended operating conditions (unless otherwise
noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
12
12
2
UNIT
t
t
t
t
t
t
t
t
t
Propagation delay time, low-to-high level output
Propagation delay time, high-to-low level output
2
2
PLH
PHL
sk(p)
r
R
= 54 Ω, C = 50 pF,
L
See Figure 3
L
Pulse skew (| t
− t |)
PLH PHL
ns
Differential output signal rise time
1.2
1.2
11
Differential output signal fall time
11
f
Propagation delay time, high-impedance to high-level output
Propagation delay time, high-impedance to low-level output
Propagation delay time, high-level to high-impedance output
Propagation delay time, low-level to high-impedance output
R
R
R
R
= 110 Ω, See Figure 4
= 110 Ω, See Figure 5
= 110 Ω, See Figure 4
= 110 Ω, See Figure 5
22
25
22
22
ns
ns
ns
ns
PZH
PZL
PHZ
PLZ
L
L
L
L
†
All typical values are at V
CC
= 5 V, T = 25°C.
A
receiver electrical characteristics over recommended operating conditions (unless otherwise
noted)
†
TYP
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
V
Positive-going input threshold voltage
I
I
= −8 mA
= 8 mA
0.2
V
IT+
O
Negative-going input threshold
voltage
−0.2
V
IT−
O
V
V
V
V
Hysteresis voltage (V
IT+
− V
)
50
−0.8
4.9
mV
V
hys
IT−
Enable-input clamp voltage
High-level output voltage
Low-level output voltage
I = −18 mA
−1.5
4
IK
I
V
V
V
V
V
V
V
V
V
= 200 mV,
= 200 mV,
I
I
= −8 mA, See Figure 6
V
OH
OL
ID
ID
O
OH
= 8 mA,
See Figure 6
0.1
0.8
10
1
V
OL
I
High-impedance-state output current
= 0 to V
= 12 V,
= 12 V,
= −7 V,
= −7 V,
= 2 V
−10
µA
OZ
CC
V
V
V
V
= 5 V
= 0
0.4
0.5
IH
IH
IH
IH
IH
IL
CC
CC
CC
CC
1
I
I
Bus input current
Other input at 0 V
mA
= 5 V
= 0
−0.8
−0.8
−0.4
−0.3
I
I
High-level enable-input current
Low-level enable-input current
−100
−100
µA
µA
IH
= 0.8 V
IL
Receiver enabled and driver disabled
Receiver disabled and driver disabled
Receiver enabled and driver enabled
4
0.4
8.5
7
0.7
15
V = 0 or V
I
,
CC
I
Supply current
mA
CC
No load
†
All typical values are at V
CC
= 5 V, T = 25°C.
A
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁ ꢂꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢃꢊ ꢋ ꢌꢍ
ꢎ ꢏꢐ ꢐ ꢌꢑ ꢌꢂ ꢒ ꢏ ꢊꢅ ꢆꢓ ꢁ ꢒꢑ ꢊꢂ ꢁꢇ ꢌꢏ ꢔ ꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
receiver switching characteristics over recommended operating conditions (unless otherwise
noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
30
30
6
UNIT
ns
t
t
t
t
t
t
t
t
t
Propagation delay time, output↑
Propagation delay time, output↓
7
7
PLH
PHL
sk(p)
r
ns
V
ID
= −1.5 V to 1.5 V, See Figure 7
Pulse skew (| t
− t
PHL PLH
|)
ns
Rise time, output
Fall time, output
5
ns
See Figure 7
5
ns
f
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
50
50
60
40
ns
PZH
PZL
PHZ
PLZ
ns
C
= 10 pF, See Figure 8
L
ns
ns
†
All typical values are at V
CC
= 5 V, T = 25°C.
A
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
PARAMETER MEASUREMENT INFORMATION
V
test
R1
375 Ω
Y
Z
27 Ω
27 Ω
D
R
= 60 Ω
V
OD
L
V
OD
0 V or 3 V
0 or 3 V
V
OC
R2
375 Ω
−7 V < V
test
< 12 V
Figure 1. Driver V
and V
OC
OD
V
test
Figure 2. Driver V
OD3
3 V
0 V
Input
1.5 V
1.5 V
C
= 50 pF
L
(see Note B)
R
= 54 Ω
L
t
t
PHL
PLH
Generator
(see Note A)
V
O
50 Ω
≈ 1.5 V
90%
50%
Output
10%
≈ − 1.5 V
t
r
t
f
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: D. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
E.
includes probe and jig capacitance.
Figure 3. Driver Test Circuit and Voltage Waveforms
Output
3 V
S1
Input
1.5 V 1.5 V
3 V
0 V
0.5 V
t
PZH
R
= 110 Ω
C
= 50 pF
L
L
V
OH
(see Note B)
Generator
(see Note A)
Output
50 Ω
2.3 V
V
off
≈ 0 V
t
PHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 4. Driver Test Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁ ꢂꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢃꢊ ꢋ ꢌꢍ
ꢎ ꢏꢐ ꢐ ꢌꢑ ꢌꢂ ꢒ ꢏ ꢊꢅ ꢆꢓ ꢁ ꢒꢑ ꢊꢂ ꢁꢇ ꢌꢏ ꢔ ꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
PARAMETER MEASUREMENT INFORMATION
5 V
3 V
0 V
Input
t
1.5 V
1.5 V
R
= 110 Ω
L
S1
0 V
Output
PZL
t
PLZ
C
= 50 pF
L
5 V
0.5 V
Generator
(see Note A)
(see Note B)
50 Ω
2.3 V
Output
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 5. Driver Test Circuit and Voltage Waveforms
I
O
V
ID
V
O
Figure 6. Receiver V
and V
OL
OH
3 V
0 V
Input
1.5 V
1.5 V
Output
Generator
(see Note A)
50 Ω
t
1.5 V
0 V
t
PHL
PLH
C
= 10 pF
(see Note B)
L
V
OH
90%
Output
1.3 V
1.3 V
10%
V
OL
t
t
R
F
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
VOLTAGE WAVEFORMS
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 7. Receiver Test Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
PARAMETER MEASUREMENT INFORMATION
S1
1.5 V
S2
2 kΩ
−1.5 V
5 V
C
= 10 pF
5 kΩ
L
(see Note B)
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3 V
S1 to 1.5 V
S2 Open
3 V
S1 to −1.5 V
S2 Closed
S3 Open
Input
Input
1.5 V
1.5 V
S3 Closed
0 V
0 V
t
PZH
t
PZL
V
OH
≈ 4.5 V
1.5 V
Output
Output
Input
1.5 V
0 V
V
OL
3 V
3 V
S1 to 1.5 V
S2 Closed
S3 Closed
S1 to −1.5 V
S2 Closed
S3 Closed
1.5 V
1.5 V
Input
0 V
0 V
t
PHZ
t
PLZ
≈ 1.3 V
V
OH
0.5 V
Output
0.5 V
Output
V
OL
≈ 1.3 V
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 8. Receiver Test Circuit and Voltage Waveforms
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁ ꢂꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢃꢊ ꢋ ꢌꢍ
ꢎ ꢏꢐ ꢐ ꢌꢑ ꢌꢂ ꢒ ꢏ ꢊꢅ ꢆꢓ ꢁ ꢒꢑ ꢊꢂ ꢁꢇ ꢌꢏ ꢔ ꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
TYPICAL CHARACTERISTICS
Receiver Output
Driver Input
120 Ω
120 Ω
Driver Input
Receiver Output
Figure 9. Typical Waveform of Non-Return-To-Zero (NRZ), Pseudorandom Binary Sequence (PRBS) Data
at 100 Mbps Through 15m, of CAT 5 Unshielded Twisted Pair (UTP) Cable
TIA/EIA-485-A defines a maximum signaling rate as that in which the transition time of the voltage transition
of a logic-state change remains less than or equal to 30% of the bit length. Transition times of greater length
perform quite well, even though they do not meet the standard by definition.
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
TYPICAL CHARACTERISTICS
AVERAGE SUPPLY CURRENT
LOGIC INPUT CURRENT
vs
vs
FREQUENCY
INPUT VOLTAGE
40
35
30
−30
−25
−20
Driver
25
20
−15
−10
15
10
5
Receiver
−5
0
0
0.05
0.5
1
2
5
10
20
30
0
1
2
3
4
5
f − Frequency − MHz
V − Input Voltage − V
I
Figure 10
Figure 11
INPUT CURRENT
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
INPUT VOLTAGE
LOW-LEVEL OUTPUT CURRENT
800
600
400
200
0
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
V
CC
= 5
−200
−400
−600
Bus Input Current
−8 −6 −4 −2
0
2
4
6
8
10 12
0
10
I
20
30
40
50
60
70
80
V − Input Voltage − V
I
− Low-Level Output Current − mA
OL
Figure 12
Figure 13
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁ ꢂꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢃꢊ ꢋ ꢌꢍ
ꢎ ꢏꢐ ꢐ ꢌꢑ ꢌꢂ ꢒ ꢏ ꢊꢅ ꢆꢓ ꢁ ꢒꢑ ꢊꢂ ꢁꢇ ꢌꢏ ꢔ ꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
TYPICAL CHARACTERISTICS
DRIVER HIGH-LEVEL OUTPUT VOLTAGE
DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
HIGH-LEVEL OUTPUT CURRENT
AVERAGE CASE TEMPERATURE
5
4.5
4
2
V
CC
= 5.25 V
1.5
3.5
3
2.5
1
0.5
0
V
= 5 V
CC
2
V
CC
= 4.75 V
1.5
1
0.5
0
0
−10 −20 −30 −40 −50 −60 −70 −80
−40
0
25
70
85
°
I
− High-Level Output Current − (mA)
Average Case Temperature − C
OH
Figure 14
Figure 15
RECEIVER PROPAGATION TIME
DRIVER PROPAGATION DELAY TIME
vs
vs
CASE TEMPERATURE
CASE TEMPERATURE
13.8
13.7
13.6
7.4
7.2
7
13.5
13.4
6.8
6.6
13.3
13.2
6.4
6.2
6
13.1
13
5.8
5.6
12.9
−40
0
25
70
80
−40
0
25
70
85
°
°
C
Case Temperature − C
Case Temperature −
Figure 16
Figure 17
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢃꢊ ꢋꢌ ꢍ
ꢎꢏ ꢐꢐ ꢌꢑ ꢌꢂꢒ ꢏꢊ ꢅ ꢆꢓꢁ ꢒ ꢑꢊꢂꢁ ꢇꢌ ꢏ ꢔꢌ ꢑ
ꢀ
ꢀ
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
TYPICAL CHARACTERISTICS
DRIVER OUTPUT CURRENT
vs
SUPPLY VOLTAGE
90
65
40
15
I
OH
−10
−35
−60
−85
−110
−135
−160
−185
I
OL
−210
0
3
4
5
6
V
CC
− Supply Voltage − V
Figure 18
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN65LBC176AMDREP
SN65LBC176AQDREP
V62/03671-01XE
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
D
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/03671-02XE
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN65LBC176A-EP :
Catalog: SN65LBC176A
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN65LBC176AMDREP
SN65LBC176AQDREP
SOIC
SOIC
D
D
8
8
2500
2500
330.0
330.0
12.4
12.4
6.4
6.4
5.2
5.2
2.1
2.1
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jul-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN65LBC176AMDREP
SN65LBC176AQDREP
SOIC
SOIC
D
D
8
8
2500
2500
346.0
346.0
346.0
346.0
29.0
29.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
Logic
Military
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2008, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明