VCA2615PFBT [TI]
Dual, Low-Noise; 双通道，低噪声
| 型号： | VCA2615PFBT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Dual, Low-Noise |
| 文件： | 总33页 (文件大小：1253K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VCA2615
SBOS316D − JULY 2005 − REVISED OCTOBER 2008
Dual, Low-Noise
Variable-Gain Amplifier with Preamp
FD EATURES
DESCRIPTION
VERY LOW NOISE: 0.7nV//Hz
The VCA2615 is a dual-channel, variable gain amplifier
consisting of a Low-Noise Preamplifier (LNP) and a Variable-
Gain Amplifier (VGA). This combination along with the device
features makes it well-suited for a variety of ultrasound
systems.
D
LOW-NOISE PREAMP (LNP)
− Active Termination
− Programmable Gains: 3, 12, 18, 22dB
− Programmable Input Impedance (R )
F
− Buffered, Differential Outputs for CW
Processing
− Excellent Input Signal Handling
Capabilities
The LNP offers a high level of flexibility to adapt to a wide range
of systems and probes. The LNP gain can be programmed to
one of four settings (3dB, 12dB, 18dB, 22dB), while
maintaining excellent noise and signal handling
characteristics. The input impedance of the LNP can be
controlled by selecting one of the built-in feedback resistors.
This active termination allows the user to closely match the
LNP to a given source impedance, resulting in optimized
overall system noise performance. The differential LNP
outputs are provided either as buffered outputs for further CW
processing, or fed directly into the variable-gain amplifier
(VGA). Alternatively, an external signal can be applied to the
differential VGA inputs through a programmable switch.
D
LOW-NOISE VARIABLE-GAIN AMPLIFIER
− High/Low-Mode (0/+6dB)
− 52dB Gain Control Range
− Linear Control Response: 22dB/V
− Switchable Differential Inputs
− Adjustable Output Clipping-Level
D
D
D
D
D
BANDWIDTH: 42MHz
HARMONIC DISTORTION: −55dB
5V SINGLE SUPPLY
Following a linear-in-dB response, the gain of the VGA can be
varied over a 52dB range with a 0.2V to 2.5V control voltage
common to both channels of the VCA2615. In addition, the
overall gain can be switched between a 0dB and +6dB
postgain, allowing the user to optimize the output swing of
VCA2615 for a variety of high-speed Analog-to-Digital
Converters (ADCs). As a means to improve system overload
recovery time, the VCA2615 provides an internal clipping
function where an externally applied voltage sets the desired
clipping level.
LOW-POWER: 154mW/Channel
POWER-DOWN MODES
AD PPLICATIONS
MEDICAL AND INDUSTRIAL ULTRASOUND
SYSTEMS
− Suitable for 10-Bit and 12-Bit Systems
The VCA2615 operates on a single +5V supply and is
available in a small QFN-48 (7x7mm) or TQFP package.
D
TEST EQUIPMENT
−
−
FB1 FB2 FB3 FB4 LNPOUT
LNPOUT
+
VCAIN
+
VCAIN
H/L
(0dB or
+6dB)
Feedback
Resistors
+1
+1
LNPIN
+
VCAOUT
VCAOUT
+
LNP
VGA
MUX
−
−
LNPIN
(3, 12, 18, 22dB)
1/2 VCA2615
52dB
Range
G1 G1
VCAINSEL
VCNTL VCLMP
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆꢇ ꢂꢈ ꢃ ꢉꢆꢉ ꢊꢋ ꢌꢍ ꢎ ꢏꢐ ꢑꢊꢍꢋ ꢊꢒ ꢓꢔ ꢎ ꢎ ꢕꢋꢑ ꢐꢒ ꢍꢌ ꢖꢔꢗ ꢘꢊꢓ ꢐꢑꢊ ꢍꢋ ꢙꢐ ꢑꢕꢚ ꢀꢎ ꢍꢙꢔ ꢓꢑꢒ
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ꢀꢎ ꢍ ꢙꢔꢓ ꢑ ꢊꢍ ꢋ ꢖꢎ ꢍ ꢓ ꢕ ꢒ ꢒ ꢊꢋ ꢟ ꢙꢍ ꢕ ꢒ ꢋꢍꢑ ꢋꢕ ꢓꢕ ꢒꢒ ꢐꢎ ꢊꢘ ꢞ ꢊꢋꢓ ꢘꢔꢙ ꢕ ꢑꢕ ꢒꢑꢊ ꢋꢟ ꢍꢌ ꢐꢘ ꢘ ꢖꢐ ꢎ ꢐꢏ ꢕꢑꢕ ꢎ ꢒꢚ
Copyright 2005−2008, Texas Instruments Incorporated
www.ti.com
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
(1)
This integrated circuit can be damaged by ESD.
Texas Instruments recommends that all
integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and
installation procedures can cause damage.
ABSOLUTE MAXIMUM RATINGS
Power Supply (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V
DD
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . −0.3V to (+V + 0.3V)
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3V to (+V + 0.3V)
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +100°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −40°C to +150°C
S
S
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
(1)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
(1)
PACKAGE/ORDERING INFORMATION
SPECIFIED
PACKAGE
DESIGNATOR
PACKAGE
MARKING
TRANSPORT MEDIA,
QUANTITY
TEMPERATURE
RANGE
PRODUCT
PACKAGE-LEAD
ORDERING NUMBER
VCA2615RGZR
VCA2615RGZT
VCA2615PFBR
VCA2615PFBT
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 1000
Tape and Reel, 250
QFN-48
RGZ
PFB
−40°C to +85°C
−40°C to +85°C
VCA2615
VCA2615
VCA2615
TQFP-48
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website
at www.ti.com.
FUNCTIONAL BLOCK DIAGRAM
−
−
VCAIN A
LNPOUT
A
LNPOUT+A VCAIN+A
Buffer
VCAOUT+A
INPUTA
Buffer
LNP
VGA
−
VCAOUT
A
CEXTA1
CEXTA2
Gain
Control
Logic
Feedback
Network
FB1
FB2
FB3
FB4
G1
VCAINSEL
G2
Feedback
Network
Gain
Control
Logic
CEXTB1
CEXTB2
−
VCAOUT
B
LNP
VGA
Buffer
INPUTB
VCAOUT+B
Buffer
LNPOUT−B VCAIN−B LNPOUT+B VCAIN+B
H/L VCLMP VCNTL
2
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
ELECTRICAL CHARACTERISTICS
All specifications at T = +25°C, V
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
DD
f
IN
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
VCA2615
MIN
TYP
MAX
PARAMETER
PREAMPLIFIER (LNP and Buffer)
CONDITIONS
UNIT
(1)
Input Resistance, R
Input Resistance
Input Capacitance
With Active Feedback Termination
Feedback Termination Open
See Note
100
45
kΩ
kΩ
pF
IN
(2)
(2)
(2)
Maximum Input Voltage
LNP Gain (G1, G2) = 00 − Linear Operation
LNP Gain (G1, G2) = 01 − Linear Operation
LNP Gain (G1, G2) = 10 − Linear Operation
2.3
V
V
V
V
V
PP
PP
PP
PP
PP
0.78
0.39
0.23
5
(2)
LNP Gain (G1, G2) = 11 − Linear Operation
Maximum Input Voltage
Input Voltage Noise
Any LNP Gain − Overload (symmetrical clipping)
R
= 0Ω; Includes Buffer Noise, LNP Gain = 11
0.8
nV/√Hz
pA/√Hz
MHz
dBc
S
Input Current Noise
1
Bandwidth
50
2nd-Harmonic Distortion
3rd-Harmonic Distortion
LNP Gain Change Response Time
f
f
= 5MHz
= 5MHz
−55
−55
0.1
IN
IN
dBc
LNP Gain 00 to 11; to 90% Signal Level
µs
BUFFER (LNP
A/B, LNP A/B)
(2)
OUT+ OUT−
Output Signal Range
R
> = 500Ω
3.3
1.85
60
V
L
PP
V
Output Common-Mode Voltage
Output Short-Circuit Current
Output Impedance
mA
3
Ω
ACTIVE TERMINATION
(3)
Feedback Resistance , R
FB (1-4) = 0111
FB (1-4) = 1011
FB (1-4) = 1101
FB (1-4) = 1110
FB (1-4) = 0000
1500
1000
500
Ω
Ω
Ω
Ω
Ω
F
250
130
VARIABLE-GAIN AMPLIFIER (VGA)
Peak Input Voltage
(2)
Linear Operation , V
= 0.7V
2
V
PP
CNTL
Upper −3dB Bandwidth
2nd-Harmonic Distortion
3rd-Harmonic Distortion
Slew-Rate
50
MHz
V
V
= 2.5V, 1V Differential Output
−60
−63
100
dBc
dBc
V/µs
CNTL
PP
= 2.5V, 1V Differential Output
CNTL
PP
PREAMPLIFIER AND VARIABLE-GAIN
AMPLIFIER (LNP AND VGA)
Input Voltage Noise
0.7
nV/√Hz
V
Clipping Voltage Range (V
Clipping Voltage Variation
Output Impedance
)
0.25 to 2.6
CLMP
V
= 0.5V, VCA
= 1.0V
PP
50
3
mV
Ω
CLMP
OUT
f
= 5MHz, Single-Ended, Either Output
IN
Output Short-Circuit Current
60
mA
dBc
dBc
ns
Overload Distortion (2nd-Harmonic)
Crosstalk
V
= 250mV
= 5MHz
−44
−70
1
IN
PP
f
IN
Delay Matching
Overload Recovery Time
Maximum Output Load
Maximum Capacitive Output Loading
25
ns
100
80
Ω
pF
50Ω in Series
(2)
Maximum Output Signal
6
V
PP
Output Common-Mode Voltage
2nd-Harmonic Distortion
3rd-Harmonic Distortion
Upper −3dB Bandwidth
2.5
−55
−55
42
V
dB
Input Signal = 5MHz, V
Input Signal = 5MHz, V
= 1V
= 1V
−45
−45
CNTL
dB
CNTL
V
CNTL
= 2.5V
MHz
(1)
RF
RIN
+
ALNP
(1 )
)
2
(2)
(3)
(4)
(5)
(6)
2nd−harmonic, 3rd-harmonic distortion less than or equal to −30dBc.
See Table 5.
Referred to best-fit dB linear curve.
Parameters ensured by design; not production tested.
Do not leave inputs floating; no internal pull-up/pull-down resistors.
3
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
ELECTRICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
DD
f
IN
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
VCA2615
MIN
TYP
MAX
PARAMETER
CONDITIONS
UNIT
ACCURACY
Gain Slope
V
CNTL
V
CNTL
V
CNTL
V
CNTL
= 0.4V to 2.0V
22
0.9
dB/V
dB
(4)
Gain Error
= 0.4V to 2.0V
= 0.2V to 2.5V
= 0.4V to 2.0V
−1.5
+1.5
Gain Range
52
dB
Gain Range
36.5
dB
Gain Range (H/L)
H/L = 0 (+6dB); VGA High Gain; V
= 0.2V to 2.5V
−12 to +40
−18 to +34
50
dB
CNTL
H/L = 1 (0dB); VGA Low Gain; V
= 0.2V to 2.5V
dB
CNTL
Output Offset Voltage, Differential
Channel-to-Channel Gain Matching
mV
dB
V
= 0.4V to 2.0V, CHA to CHB
0.33
CNTL
CNTL
GAIN CONTROL INTERFACE (V
)
CNTL
Input Voltage Range
Input Resistance
Response Time
0.2 to 2.5
V
1
MΩ
µs
V
= 0.2V to 2V; to 90% Signal Level
0.6
(5), (6)
DIGITAL INPUTS
(G1, G2, PDL, PDV, H/L, FB1-FB4, VCA SEL)
IN
V
, High-Level Input Voltage
2.0
V
V
IH
V , Low-Level Input Voltage
IL
0.8
Input Resistance
1
5
MΩ
pF
Input Capacitance
POWER SUPPLY
Supply Voltage
4.75
5.0
25
5.25
350
V
Power-Up Response Time
Power-Down Response Time
Total Power Dissipation
VGA Power-Down
µs
µs
mW
mW
mW
2
PDV, PDL = 1
308
236
95
PDV = 0, PDL = 1
PDL = 0, PDV = 1
LNP Power-Down
THERMAL CHARACTERISTICS
Temperature Range
Ambient, Operating
−40
+85
°C
Thermal Resistance, q
QFN−48 Soldered Pad; Four-Layer PCB with Thermal Vias
29.1
2.2
58
°C/W
°C/W
°C/W
JA
q
JC
q
TQFP−48
JA
(1)
RF
RIN
+
ALNP
(1 )
)
2
(2)
(3)
(4)
(5)
(6)
2nd−harmonic, 3rd-harmonic distortion less than or equal to −30dBc.
See Table 5.
Referred to best-fit dB linear curve.
Parameters ensured by design; not production tested.
Do not leave inputs floating; no internal pull-up/pull-down resistors.
4
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
PIN CONFIGURATION
1
2
36
35
34
V
C
C
B
V
A
DD
DD
B1
B2
C
C
A1
A2
EXT
EXT
EXT
3
EXT
−
−
4
33 VCA
B
VCA
A
IN
IN
32 VCA +B
5
VCA +A
IN
IN
VCA2615
(Thermal Pad tied to
Ground Potential,
QFN only)
31
−
B
−
6
LNP
LNP
LNP
A
OUT
OUT
OUT
7
30 LNP
29 NC
+B
+A
OUT
8
NC
VB
28
9
NC
10
11
12
27 VDDBL
26 GNDBL
VDDAL
GNDAL
25
−
B
−
LNP
LNP
A
IN
IN
PIN CONFIGURATION
PIN
DESIGNATOR
DESCRIPTION
PIN
DESIGNATOR
DESCRIPTION
1
V
A
Channel A + Supply
External Capacitor
External Capacitor
25
LNP −B
IN
Channel B LNP Inverting Input
DD
2
C
C
A1
26
27
GNDBL
VDDBL
NC
GND B Channel LNP
EXT
A2
3
VDD B Channel LNP
EXT
4
VCA −A
IN
VCA +A
IN
Channel A VCA Negative Input
Channel A VCA Positive Input
Channel A LNP Negative Output
Channel A LNP Positive Output
Do Not Connect
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Do Not Connect
5
NC
Do Not Connect
6
LNP
−A
LNP
LNP
+B
OUT
−B
OUT
Channel B LNP Positive Output
Channel B LNP Negative Output
Channel B VCA Positive Input
Channel B VCA Negative Input
External Capacitor
OUT
7
LNP
+A
OUT
NC
8
VCA +B
IN
VCA −B
IN
9
VB
0.01µF Bypass
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VDDAL
GNDAL
VDD A Channel LNP
C
B2
EXT
EXT
GND A Channel LNP
C
B1
External Capacitor
LNP −A
IN
Channel A LNP Inverting Input
LNP Gain Setting Pin (MSB)
LNP Gain Setting Pin (LSB)
Supply Pin for Gain Setting
Channel A LNP Noninverting Input
Supply for Internal Reference
VCA Clamp Voltage Setting Pin
0.1µF Bypass
V
B
Channel B + Supply
DD
GNDB
G1
Channel B Ground
G2
VCA
VCA
FB1
FB2
FB3
−B
OUT
+B
OUT
Channel B VCA Negative Output
Channel B VCA Positive Output
Feedback Control Pin
V
A
DD
LNP +A
IN
R
V
DD
Feedback Control Pin
V
Feedback Control Pin
CLMP
V
V
CNTL
VCA Control Voltage Input
VCA Input Select, Hi = External
Feedback Control Pin
CM
GNDR
Ground for Internal Reference
Channel B LNP Noninverting Input
Power Down LNPs
VCA SEL
IN
FB4
LNP +B
IN
PDL
PDV
H/L
VCA
VCA
+A
−A
Channel A VCA Positive Pin
Channel A VCA Negative Pin
Channel A Ground
OUT
Power Down VCAs
OUT
VCA High/Low Gain Mode
GNDA
5
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
TYPICAL CHARACTERISTICS
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
GAIN vs VCNTL
(Hi VGA Gain)
GAIN vs VCNTL
(Lo VGA Gain)
65
60
55
50
45
40
35
30
25
20
15
10
5
60
55
50
45
40
35
30
25
20
15
10
5
LNP 11
LNP 11
LNP 10
LNP 10
LNP 01
LNP 01
0
LNP 00
LNP 00
−
5
0
−10
−
5
−
−
15
20
−
−
10
15
VCNTL (V)
VCNTL (V)
Figure 1
Figure 2
GAIN ERROR vs VCNTL
(Lo VGA Gain)
GAIN ERROR vs VCNTL
(Hi VGA Gain)
2.0
1.5
1.0
0.5
0
2.0
1.5
1.0
0.5
0
LNP 00
LNP 01
LNP 10
LNP 11
LNP 00
LNP 01
LNP 10
LNP 11
−
−
−
−
0.5
1.0
1.5
2.0
−
−
−
−
0.5
1.0
1.5
2.0
VCNTL (V)
VCNTL (V)
Figure 3
Figure 4
GAIN ERROR vs VCNTL
GAIN ERROR vs VCNTL vs TEMPERATURE
2.0
1.5
1.0
0.5
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
_
+25 C
_
+85 C
−
−
−
−
−
−
−
−
−
−
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
−
−
−
−
0.5
1.0
1.5
2.0
1MHz
2MHz
5MHz
−
_
40 C
10MHz
VCNTL (V)
VCNTL (V)
Figure 5
Figure 6
6
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
GAIN MATCHING, CHA to CHB
VCNTL = 2.0V
GAIN MATCHING, CHA to CHB
VCNTL = 0.4V
60
50
40
30
20
10
0
60
50
40
30
20
10
0
Delta Gain (dB)
Delta Gain (dB)
Figure 7
Figure 8
GAIN vs FREQUENCY
GAIN vs FREQUENCY
(VCNTL = 0.7V, Lo VGA Gain)
(VCNTL = 0.7V, Hi VGA Gain)
25
20
15
10
5
30
25
20
15
10
5
LNP = 11
LNP = 10
LNP = 11
LNP = 10
LNP = 01
LNP = 01
LNP = 00
0
LNP= 00
−
5
0
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Figure 10
Figure 9
GAIN vs FREQUENCY
GAIN vs FREQUENCY
(VCNTL = 2.5V, Lo VGA Gain)
(VCNTL = 2.5V, Hi VGA Gain)
60
55
50
45
40
35
30
25
20
15
10
5
70
65
60
55
50
45
40
35
30
25
20
15
10
5
LNP = 11
LNP = 11
LNP = 10
LNP = 01
LNP = 10
LNP = 01
LNP = 00
LNP = 00
0
0
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Figure 12
Figure 11
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
GAIN vs FREQUENCY
(VGA Only)
GAIN vs FREQUENCY
(LNP Only)
45
40
35
30
25
20
15
10
5
25
20
15
10
5
Hi Gain,
VCNTL 2.5V
LNP = 11
LNP = 10
Lo Gain,
VCNTL 2.5V
LNP = 01
Hi Gain,
VCNTL 0.7V
Lo Gain,
VCNTL 0.7V
LNP = 00
0
0
−
5
−
−
10
5
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Figure 13
Figure 14
GAIN vs FREQUENCY
(LNP (G1, G2) = 11, Various VGA Gain Capacitors)
OUTPUT−REFERRED NOISE vs VCNTL
Ω
(VGA Lo Gain, RS = 0 )
1000
100
10
64
63
62
61
60
59
58
57
56
55
LNP 11
LNP 10
LNP 01
LNP 00
µ
3.9 F
µ
0.1 F
µ
0.022 F
4700pF
0.1
1
10
100
Frequency (MHz)
VCNTL (V)
Figure 15
Figure 16
INPUT−REFERRED NOISE vs VCNTL
OUTPUT−REFERRED NOISE vs VCNTL
Ω
(LNP and VGA, Lo VGA Gain, RS = 0 )
(VGA Hi Gain, RS = 0Ω)
1000
100
10
1000
100
10
LNP 11
LNP 10
LNP 00
LNP 01
LNP 01
LNP 00
1
LNP 10
LNP 11
0.1
V
CNTL (V)
VCNTL (V)
Figure 17
Figure 18
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
NOISE FIGURE vs VCNTL
INPUT−REFERRED NOISE vs VCNTL
(Lo VGA Gain, RS = 0Ω)
(Hi VGA Gain, RS = 0Ω)
100
1000
100
10
LNP 00
LNP 01
LNP 00
LNP 01
LNP 10
10
LNP 10
LNP 11
LNP 11
1
1
0.1
VCNTL (V)
VCNTL (V)
Figure 19
Figure 20
NOISE FIGURE vs VCNTL
OUTPUT−REFERRED NOISE vs VCNTL
(Hi VGA Gain, RS = 0Ω)
Ω
(VGA Only, RS = 0 )
100
10
1
1000
100
10
LNP 00
LNP 01
LNP 10
LNP 11
1
VCNTL (V)
VCNTL (V)
Figure 21
Figure 22
INPUT−REFERRED NOISE vs VCNTL
(VGA Only)
INPUT−REFERRED NOISE vs FREQUENCY
(VGA Only)
1000
10
High Gain
100
10
1
Lo Gain
1
1
10
VCNTL (V)
Frequency (MHz)
Figure 24
Figure 23
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
INPUT−REFERRED NOISE vs FREQUENCY
(LNP Only)
DISTORTION vs FREQUENCY
(2nd−Harmonic, Lo VGA Gain)
−
−
−
−
−
−
−
−
−
−
−
50
10
LNP 00
52
54
56
58
60
62
64
66
68
70
LNP 01
LNP 11
LNP 10
1
LNP 10
LNP 00
LNP 01
LNP 11
0.1
1
10
1
10
Frequency (MHz)
Frequency (MHz)
Figure 25
Figure 26
DISTORTION vs FREQUENCY
(2nd−Harmonic, Hi VGA Gain)
DISTORTION vs FREQUENCY
(3rd−Harmonic, Lo VGA Gain)
−
−
−
−
−
−
50
52
54
56
58
60
62
64
66
68
70
40
45
50
55
60
LNP 11
LNP 10
LNP 01
LNP 00
−
LNP 11
LNP 10
−
−
−
−
−
−
−
−
−
LNP 00
LNP 01
1
10
1
10
Frequency (MHz)
Frequency (MHz)
Figure 27
Figure 28
2nd−HARMONIC DISTORTION vs VCNTL
(Lo VGA Gain)
DISTORTION vs FREQUENCY
(3rd−Harmonic, Hi VGA Gain)
−
−
−
−
−
−
−
−
40
45
50
55
60
65
70
30
35
40
45
LNP 11
LNP 10
LNP 01
LNP 00
−
LNP 00
−
−
LNP 01
−50
−55
LNP 11
−
−
−
60
65
70
LNP 10
1
10
Frequency (MHz)
V
CNTL (V)
Figure 30
Figure 29
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
2nd−HARMONIC DISTORTION vs VCNTL
(Hi VGA Gain)
3rd−HARMONIC DISTORTION vs VCNTL
(Lo VGA Gain)
−
−
−
−
−
−
30
−30
−35
LNP 00
LNP 10
LNP 01
LNP 11
35
40
45
50
55
−
−
−
−
−
−
40
45
50
55
60
65
LNP 00
LNP 01
LNP 10
LNP 11
−60
−65
−70
−70
VCNTL (V)
VCNTL (V)
Figure 31
Figure 32
3rd−HARMONIC DISTORTION vs VCNTL
(Hi VGA Gain)
DISTORTION vs VCA Output Voltage
−
−
−
−
−
−
−
−
−
30
35
40
45
50
55
60
65
70
−
−
−
−
−
−
30
35
40
45
50
55
LNP 00
LNP 01
LNP 10
LNP 11
3rd−Harmonic
2nd−Harmonic
−60
−65
−70
0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
VCNTL (V)
VCA Output (VPP
)
Figure 33
Figure 34
DISTORTION vs LNP Gain
(LNP Only)
DISTORTION vs VCNTL
(VGA Only, SE In/Diff Out, Lo Gain)
−
30
35
40
45
50
55
60
65
70
75
80
−20
−
−
−
−
−
−
−
−
−
−
2nd−Harmonic
−
−
30
40
2nd−Harmonic
3rd−Harmonic
−50
−
−
60
70
3rd−Harmonic
−80
00
01
10
11
LNP Gain (G1, G2)
VCNTL (V)
Figure 35
Figure 36
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
DISTORTION vs VCNTL
(VGA Only, SE In/Diff Out, Hi Gain)
DISTORTION vs OUTPUT LOAD RESISTANCE
−
−
30
35
−
30
−35
2nd−Harmonic
−40
−
−
40
45
−
−
45
50
2nd−Harmonic
3rd−Harmonic
−55
−50
−55
−
−
−
−
−
60
65
70
75
80
−
60
3rd−Harmonic
−65
−
70
50 150 250 350 450 550 650 750 850 950 1050
RLOAD(Ω)
VCNTL (V)
Figure 37
Figure 38
CROSSTALK vs VCNTL
(Lo VGA Gain)
CROSSTALK vs VCNTL
(Hi VGA Gain)
−
−
60
60
62
64
66
68
70
72
74
76
78
80
LNP 00
LNP 00
LNP 01
LNP 10
LNP 11
−
−
−
−
−
−
−
−
−
−
−
62
64
66
68
70
72
74
76
78
80
LNP 01
LNP 10
LNP 11
−
−
−
−
−
−
−
−
−
VCNTL (V)
VCNTL (V)
Figure 39
Figure 40
CROSSTALK vs VCNTL
(VOUT = 2VPP, Hi−Gain)
TOTAL POWER vs TEMPERATURE
314
313
312
311
310
309
308
307
306
305
304
303
−
50
54
58
−
−
10MHz
2MHz
−62
−66
−70
−74
5MHz
−
−
−
−
78
82
86
90
1MHz
V
CNTL (V)
_
FiTgeumrpeera4tu2re( C)
Figure 41
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
VGA POWER vs TEMPERATURE
LNP POWER vs TEMPERATURE
96.0
95.5
95.0
94.5
94.0
239
238
237
236
235
234
233
_
Temperature ( C)
_
Temperature( C)
Figure 43
Figure 44
GAIN vs VCNTL vs TEMPERATURE
DISTORTION vs TEMPERATURE
2nd−Harmonic
50
45
40
35
30
25
20
15
10
5
−
−
−
−
−
−
−
−
−
60
59
58
57
56
55
54
53
52
_
+25 C
−
_
40 C
_
+85 C
3rd−Harmonic
0
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
CNTL (V)
_
Temperature ( C)
V
Figure 45
Figure 46
VOUT vs VCLAMP
(100mVPP, S/E Input)
OVERLOAD DISTORTION
2nd−HARMONIC
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
−30
−
31
−32
−
33
−34
H/L = 0
−
35
−36
−
37
−38
−
−
−
39
40
41
−42
H/L = 1
−
43
−44
−
−
45
46
0.25
0.50
0.75
1.00
VCLAMP (V)
VIN (V)
Figure 48
Figure 47
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TYPICAL CHARACTERISTICS (continued)
All specifications at T = +25°C, V
DD
IN
= 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
A
f
= 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, V
= 2.5V; VCA output is 1V
differential; CA, CB = 3.9µF, unless otherwise noted.
CNTL PP
OUTPUT IMPEDANCE vs FREQUENCY
POWER UP/DOWN RESPONSE
100
10
1
H
L
1VPP
0.1
1
10
100
0
5
10 15 20 25 30 35 40 45 50 55 60
Frequency (MHz)
µ
Time ( s)
Figure 49
Figure 50
GROUP DELAY vs FREQUENCY
GAIN CONTROL TRANSIENT RESPONSE
35
30
25
20
15
10
5
2V
0V
1VPP
0
1
10
100
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0
Frequency (MHz)
µ
Time ( s)
Figure 51
Figure 52
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feedback with this wide selection of feedback resistors, the
user is able to provide a low-noise means of terminating
THEORY OF OPERATION
The VCA2615 is a dual-channel system consisting of two
primary blocks: a low noise preamplifier (LNP) and a
variable gain amplifier (VGA), which is driven from the
LNP. The LNP is very flexible; both the gain and input
impedance can be programmed digitally without using
external components. The LNP is coupled to the VGA
through a multiplexer to facilitate interfacing with an
external signal processor. The VGA is a true variable-gain
amplifier, achieving lower noise output at lower gains. The
output amplifier has two gains, allowing for further
optimization with different analog-to-digital converters.
Figure 53 shows a simplified block diagram of a single
channel of the dual-channel system. Both the LNP and the
VGA can be powered down together or separately in order
to conserve system power when necessary.
input signal while incurring only
a 3dB loss in
signal-to-noise ratio (SNR), instead of a 6dB loss in SNR
which is usually associated with the conventional type of
signal termination. More information is given in the section
of this document that provides a detailed description of the
LNP.
The LNP output drives a buffer that in turn drives the
feedback network and supplies the LNP to a multiplexer.
The multiplexer can be configured to supply the signal
off-chip for further processing, or can be set to drive the
internal VGA directly from the LNP. An external coupling
capacitor is not required to couple the LNP to the VGA.
VGA—OVERVIEW
The VGA that is used with the VCA2615 is a true
variable-gain amplifier; as the gain is reduced, the noise
contribution from the VGA itself is also reduced. A block
diagram of the VGA is shown in Figure 53. This design is
in contrast with another popular device architecture (used
by the VCA2616), where an effective VCA characteristic
is obtained by a voltage variable-attenuator succeeded by
a fixed-gain amplifier. At the highest gain, systems with
either architecture are dominated by the noise produced
by the LNP. At low gains, however, the noise output is
dominated by the contribution from the VGA. Therefore,
the overall system with lower VGA gain will produce less
noise.
LNP
VGA
Figure 53. Simplified Block Diagram of VCA2615
LNP—OVERVIEW
The LNP has differential input and output capability. It also
has exceptionally low noise voltage and input current
noise. At the highest gain setting (of 22dB), the LNP
achieves 0.7nV/√Hz voltage noise and typically 1pA/√Hz
current noise. The LNP can process fully differential or
single-ended signals in each channel. Differential signal
processing reduces second harmonic distortion and offers
improved rejection of common-mode and power-supply
noise. The LNP gain can be electronically programmed to
have one of four values that can be selected by a two-bit
word (see Table 2). The gain of the LNP when driving the
VGA is approximately 1dB higher because of the loss in
the buffer.
The following example will illustrate this point. Figure 53
shows a block diagram of an LNP driving a variable-gain
amplifier; Figure 54 shows a block diagram of an LNP
driving a variable attenuation attenuator followed by a
fixed gain amplifier. For purposes of this example, let us
assume the performance characteristics shown in Table 1;
these values are the typical performance data of the
VCA2615 and the VCA2616.
The LNP also has four programmable feedback resistors
that can be selected by a four-bit word to create 16 different
values in order to facilitate the easy use of active feedback.
With this combination of both programmable gain and
feedback resistors, as many as 61 different values of input
impedance can be created to provide a wide variety of
input-matching resistors (see Table 5). By using active
Amplifier
LNP
ATTENUATOR
Figure 54. Block Diagram of Older VCA Models
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For the VCA with a variable attenuation attenuator
(Figure 54):
Table 1. Gain and Noise Performance of Various
VCA Blocks
NOISE nV/√Hz
BLOCK
GAIN (Loss) dB
2
2
Total Noise + Ǹ(1.1) ) (1.8ń10) ) (2.0ń0.10)
2
LNP1 (VCA2615)
LNP2 (VCA2616)
20
20
0
0.82
1.1
1.8
1.8
3.8
90
Ǹ
+ 14nVń Hz
(4)
Attenuator (VCA2616)
Attenuator (VCA2616)
VCA1 (VCA2615)
VCA1 (VCA2615)
VCA2 (VCA2616)
The VGA has a continuously-variable gain range of 52dB
with the ability to select either of two options. The gain of
the VGA can either be varied from −12dB to 40dB, or from
−18dB to 34dB. The VGA output can be programmed to
clip precisely at a predetermined voltage that is selected
by the user. When the user applies a voltage to pin 18
(VCLMP), the output will have a peak-to-peak voltage that is
given by the graph shown in Figure 48.
−40
40
0
40
2.0
When the block diagram shown in Figure 53 has a
combined gain of 60dB, the noise referred to the input
(RTI) is given by the expression:
LOW NOISE PREAMPLIFIER (LNP)—DETAIL
2
Total Noise (RTI) + Ǹ(LNP Noise) ) (VCA NoiseńLNP Gain)
2
The LNP is designed to achieve exceptionally low noise
performance when employed with or without active
feedback. The proprietary LNP architecture can be
electronically programmed, eliminating the need for
off-board components to alter the gain. A simplified
schematic of this amplifier is shown in Figure 55. FET pairs
Q1−Q2, Q3−Q4, Q5−Q6 and Q7−Q8 each represent a
different LNP gain. The four switches are 22dB, 18dB,
12dB and 3dB. One of the unique gain settings is selected
when one of the four switches Q9 through Q12 are
selected. Table 2 shows the relationship between the gain
selection bits, G1 and G2, and the corresponding gain.
Ǹ
2
+ Ǹ(0.82) ) (3.8ń10)
2
+ 0.90nVń Hz
(1)
When the block diagram shown in Figure 54 has the
combined gain of 60dB, the noise referred to the input
(RTI) is given by the expression:
Total Noise (RTI) +
Ǹ(LNP Noise)
2
2
2
) (ATTEN NoiseńLNP Gain) ) (VCA NoiseńLNP Gain)
Ǹ
+ Ǹ(1.1)
2
2
2
) (1.8ń10) ) (2.0ń10) + 1.13nVń Hz
(2)
Repeating the above measurements for both VCA
configurations when the overall gain is 20dB yields the
following results:
Table 2. Gain Selection of LNP
LNP GAIN (dB)
G1
0
G2
0
For the VCA with a variable gain amplifier (Figure 53):
3
0
1
12
18
22
Ǹ
2 ) (90ń10)2 + 9.03nVń Hz
Total Noise (RTI) + Ǹ(0.82)
(3)
1
0
1
1
VDD
Q13
Q12
Q14
Digital Gain Select
Q9
Q10
Q11
IN
−
IN
+
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
OUT
−
OUT
+
Figure 55. Programmable LNP
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The ability to change the gain electronically offers
additional flexibility for optimizing the gain in order to
achieve either maximum signal-handling capability or
maximum sensitivity. Table 3 lists the input and output
signal-handling capability of the LNP.
LNP Gain
11
00
(10V/div)
Table 4 shows the voltage noise of the LNP for different
gain settings.
LNP
Output
(500mV/div)
Table 3. Signal Handling Capability of LNP
MAX OUTPUT
GAIN
(dB)
MAX INPUT
(V
PP
Single-Ended)
(V
PP
Differential)
G1, G2
11
Time (200ns/div)
22
18
12
3
0.23
0.39
0.78
2.3
3.5
3.5
3.5
3.0
10
Figure 57. LNP Gain Change Response
01
00
The LNP also feeds a MUX, which accepts the LNP signal
or can receive an external signal. When applying an
external signal to the MUX (VCAIN), the signal should be
biased to a common-mode voltage in the range of 1.85V
to 3.15V. This biasing could be accomplished by using the
2.5V level of the VCM pin (19) of the VCA2615.
Table 4. LNP Gain vs Voltage Noise
VOLTAGE NOISE
(nV/√Hz) at 5MHz
LNP GAIN (dB)
22
18
12
3
0.8
1.1
1.9
4.9
To MUX
The current noise for the LNP is 1pA/√Hz for all gain
settings. The input capacitance of the LNP is 45pF.
(VGAIN
)
IN
The LNP output drives a buffer and a multiplexer (MUX)
along with a feedback network that can be used to program
the input impedance. Figure 56 shows a block diagram of
how these circuits are connected together. The output of
the LNP feeds a buffer to avoid the loading effect of the
feedback resistors and to achieve a more robust capability
for driving external circuits.
VCM
Figure 58. Recommended Circuit for Coupling an
External Signal into the MUX
INPUT IMPEDANCE
Figure 59 shows a simplified schematic of the resistor
feedback network along with Table 5 that relates the FB1,
FB2, FB3 and FB4 code to the selected value. When the
selection bits leave the feedback network in the open
position, the input resistance of the LNP will become
100kΩ.
Feedback
LNP OUT
Resistors
Buffer
IN
LNP
MUX
VGA
OUT
(FB1)
Ω
Ω
1500
1000
VGA IN
(FB2)
(FB3)
(FB4)
Ω
500
250
Figure 56. Block Diagram of LNP/VGA Interface
Ω
See Figure 57, which shows the response time of the LNP
gain changing from minimum to maximum.
IN
LNP
Buffer
OUT
Figure 59. Feedback Resistor Network
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
wasted in the termination resistor itself. Another example
may clarify this point. First, consider that the input source,
at the far end of the signal cable, has a cable-matching
source resistance of RS. Using a conventional shunt
termination at the LNP input, a second terminating resistor
RS is connected to ground. Therefore, the signal loss is
6dB because of the voltage divider action of the series and
shunt RS resistors. The effective source resistance has
been reduced by the same factor of two, but the noise
contribution has been reduced only by the √2, which is
only a 3dB reduction. Therefore, the net theoretical SNR
degradation is 3dB, assuming a noise-free amplifier input.
In practice, the amplifier noise contribution will degrade
both the un-terminated and the terminated noise figures.
Figure 60 shows an amplifier using active feedback.
Table 5. Feedback Resistor Settings
FEEDBACK
RESISTOR
(W)
130
143
150
167
176
200
214
250
273
333
375
500
600
1000
1500
Open
FB4
0
FB3
0
FB1
0
FB2
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
RF
1
1
1
1
RS
As explained previously, the LNP gain can have four
different values while the feedback resistor can be
programmed to have 16 different values. This variable gain
means that the input impedance can take on 61 different
values given by the formula shown below:
LNP
IN
A
R
IN
Active Feedback
RF
R
=
= RS
IN
1 + A
RF
RS
RIN
+
ALNP
(1 )
)
2
(5)
A
RS
Where RF is the value of the feedback resistor and ALNP
is the differential gain of the LNP in volts/volt. The variable
gain enables the user to most precisely match the LNP
input impedance to the various probe and cable
impedances to achieve optimum performance under a
variety of conditions. No additional components are
required in order to determine the input impedance.
Conventional Cable Termination
Figure 60. Configurations for Active Feedback
and Conventional Cable Termination
This diagram appears very similar to a traditional inverting
amplifier. However, A in this case is not a very large
open-loop op-amp gain; rather, it is the relatively low and
controlled gain of the LNP itself. Thus, the impedance at
the inverting amplifier terminal will be reduced by a finite
amount, as given in the familiar relationship of:
The resistor values shown in Table 5 represent typical
values. Due to process variation, the actual values of the
resistance can differ by as much as 20%.
ACTIVE FEEDBACK TERMINATION
RF
(1 ) A)
RIN
+
One of the key features of an LNP architecture is the ability
to employ active-feedback termination in order to achieve
superior noise performance. Active-feedback termination
achieves a lower noise figure than conventional shunt
termination essentially because no signal current is
(6)
where RF is the programmable feedback resistor, A is the
user-selected gain of the LNP, and RIN is the resulting
amplifier input impedance with active feedback.
18
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
In this case, unlike the conventional termination shown in
Figure 60, both the signal voltage and the RS noise are
attenuated by the same factor of two (or 6dB) before being
re-amplified by the A gain setting. This configuration
avoids the extra 3dB degradation because of the
square-root effect described above, which is the key
advantage of the active termination technique. As noted,
the previous explanation ignored the input noise
contribution of the LNP itself. Also, the noise contribution
of the feedback resistor must be included for a completely
correct analysis. The curves shown in Figure 61 and
Figure 62 allow the VCA2615 user to compare the
achievable noise figure for active and conventional
termination methods.
VOLTAGE-CONTROLLEDAMPLIFIER (VCA)—
DETAIL
Figure 63 shows a simplified schematic of the VCA. The
VCA2615 is a true voltage-controlled amplifier, with the
gain expressed in dB directly proportional to a control
signal. This architecture compares to the older VCA
products where a voltage-controlled attenuator was
followed by a fixed-gain amplifier. With a variable-gain
amplifier, the output noise diminishes as the gain reduces.
A variable-gain amplifier, where the output amplifier gain
is fixed, will not show diminished noise in this manner.
Refer to Table 6, which shows a comparison between the
noise performance at different gains for the VCA2615 and
the older VCA2616.
Table 6. Noise vs Gain (R = 0)
G
√
VCA NOISE = 3.8nV Hz, LNP GAIN = 20dB
NOISE RTI (nV/√Hz)
PRODUCT
VCA2615
VCA2615
VCA2616
VCA2616
GAIN (dB)
9
8
7
6
5
4
3
2
1
0
60
20
60
20
0.7
9.0
1.1
14.0
The VCA accepts a differential input at the +IN and −IN
terminals. Amplifier A1, along with transistors Q2 and Q3,
forms a voltage follower that buffers the +IN signal to be
able to drive the voltage-controlled resistor. Amplifier A3,
along with transistors Q27 and Q28, plays the same role
as A1. The differential signal applied to the
voltage-controlled resistor network is converted to a
current that flows through transistors Q1 through Q4.
Through the mirror action of transistors Q1/Q5 and Q4/Q6,
a copy of this same current flows through Q5 and Q6.
Assuming that the signal current is less than the
programmed clipping current (that is, the current flowing
through transistors Q7 and Q8), the signal current will then
go through the diode bridge (D1 through D4) and be sent
through either R2 or R1, depending upon the state of Q9.
This signal current multiplied by the feedback resistor
associated with amplifier A2, determines the signal
voltage that is designated −OUT. Operation of the circuitry
associated with A3 and A4 is identical to the operation of
the previously described function to create the signal
+OUT.
0
100 200 300 400 500 600 700 800 900 1000
Ω
Source Impedance ( )
Figure 61. Noise Figure for Active Termination
√
VCA NOISE = 3.8nV Hz, LNP GAIN = 20dB
14
12
10
8
6
4
A1 and its circuitry form a voltage-to-current converter,
while A2 and its circuitry form a current-to-voltage
converter. This architecture was adapted because it has
excellent signal-handling capability. A1 has been
designed to handle a large voltage signal without
overloading, and the various mirroring devices have also
been sized to handle large currents. Good overload
capability is achieved as both the input and output
amplifier are not required to amplify voltage signals.
2
0
0
100 200 300 400 500 600 700 800 900 1000
Ω
Source Impedance ( )
Figure 62. Noise Figure for Conventional
Termination
19
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
Voltage amplification occurs when the input voltage is
converted to a current; this current in turn is converted
back to a voltage as amplifier A2 acts as a transimpedance
amplifier. The overall gain of the output amplifier A2 can be
altered by 6dB by the action of the H/L signal. This enables
more optimum performance when the VCA interfaces with
either a 10-bit or 12-bit analog-to-digital converter (ADC).
An external capacitor (C) is required to provide a low
impedance connection to join the two sections of the
resistor network. Capacitor C could be replaced by a
short-circuit. By providing a DC connection, the output
offset will be a function of the gain setting. Typically, the
offset at this point is 10mV; thus, if the gain varies from
1 to 100, the output offset would vary from 10mV to
100mV.
Clipping Program
Circuitry
VDD
H/L
R1
Q1
Q5
Q7
Q9
R2
D1
D3
D2
D4
+IN
Q2
Q3
A1
A2
VCM
Q4
Q6
Q8
External
Capacitor
VCNTL
Q10
Q11
Q12
Q14
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
Q24
CEXT
2
1
VCA
Program
Circuitry
C
CEXT
Q13
Q30
Q15
Q25
Voltage−Controlled
Resistor Network
Control Signal
Q26
Q32
VCM
D5
D7
D6
D8
A4
Q27
A3
R3
Q28
−
IN
R4
Q29
Q31
Q33
Q34
VDD
Clipping Program
Circuitry
VCLMP
Figure 63. Block Diagram of VCA
20
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
VARIABLE GAIN CHARACTERISTICS
Transistors Q10, Q12, Q14, Q16, Q18, Q20, Q22, and Q24
form a variable resistor network that is programmed in an
exponential manner to control the gain. Transistors Q11,
Q13, Q15, Q17, Q19, Q21, Q23, and Q25 perform the
same function. These two groups of FET variable resistors
are configured in this manner to balance the capacitive
loading on the total variable-resistor network. This
balanced configuration is used to keep the second
harmonic component of the distortion low. The common
source connection associated with each group of FET
variable resistors is brought out to an external pin so that
an external capacitor can be used to make an AC
connection. This connection is necessary to achieve an
adequate low-frequency bandwidth because the coupling
capacitor would be too large to include within the
monolithic chip. The value of this variable resistor ranges
in value from 15Ω to 5000Ω to achieve a gain range of
about 44dB. The low-frequency bandwidth is then given by
the formula:
Channel 1
VCNTL
(2V/div)
Channel 2
Output
(20mV/div)
Time (400ns/div)
Figure 64. Response to Step Change of V
CNTL
Low Frequency BW + 1ń2pRC
(7)
where:
Channel 1
VCNTL
R is the value of the attenuator.
C is the value of the external coupling capacitor.
(2V/div)
For example, if a low-frequency bandwidth of 500kHz was
desired and the value of R was 15Ω, then the value of the
coupling capacitor would be approximately 22nF.
Channel 2
Output
(20mV/div)
One of the benefits of this method of gain control is that the
output offset is independent of the variable gain of the
output amplifier. The DC gain of the output amplifier is
extremely low; any change in the input voltage is blocked
by the coupling capacitor, and no signal current flows
through the variable resistor. This method also means that
any offset voltage existing in the input is stored across this
coupling capacitor; when the resistor value is changed, the
DC output will not change. Therefore, changes in the
control voltage do not appear in the output signal.
Figure 64 shows the output waveform resulting from a step
change in the control voltage, and Figure 65 shows the
output voltage resulting when the control voltage is a
full-scale ramp.
Time (400ns/div)
Figure 65. Response to Ramp Change of V
CNTL
The exponential gain control characteristic is achieved
through a piecewise approximation to a perfectly smooth
exponential curve. Eight FETs, operated as variable
resistors whose value is progressively 1/2 of the value of
the adjacent parallel FET, are turned on progressively, or
their value is lowered to create the exponential gain
characteristic. This characteristic can be shown in the
following way. An exponential such as y = ex increases in
the y dimension by a constant ratio as the x dimension
increases by a constant linear amount. In other words, for
x1 x2
a constant (x1 − x2), the ratio e /e remains the same.
When FETs used as variable resistors are placed in
parallel, the attenuation characteristic that is created
behaves according to this same exponential characteristic
at discrete points as a function of the control voltage.
It does not perfectly obey an ideal exponential
characteristic at other points; however, an 8-section
approximation yields a 1dB error to an ideal curve.
21
ꢠ ꢅꢉꢡ ꢢ ꢣ ꢤ
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
When H/L = 0, the previously described circuitry is
designed so that the value of the VCLMP signal is equal to
the peak differential signal developed between +VOUT and
−VOUT. When H/L = 1, the differential output will be equal
to the clamp voltage. This method of controlled clipping
also achieves fast and clean settling waveforms at the
output of the VCA, as shown in Figure 67 through
Figure 70. The sequence of waveforms demonstrate the
clipping performance during various stages of overload.
The VCLMP pin represents a high impedance input
(> 100kΩ).
PROGRAMMABLE CLIPPING
The clipping level of the VCA can be programmed to a
desired output. The programming feature is useful when
matching the clipped level from the output of the VCA to
the full-scale range of a subsequent VCA, in order to
prevent the VCA from generating false spectral signals;
see the circuit diagram shown in Figure 66. The signal
node at the drain junction of Q5 and Q6 is sent to the diode
bridge formed by diode-connected transistors, D1 through
D4. The diode bridge output is determined by the current
that flows through transistors Q7 and Q8. The maximum
current that can then flow into the summing node of A2 is
this same current; consequently, the maximum voltage
output of A2 is this same current multiplied by the feedback
resistor associated with A2. The maximum output voltage
of A2, which would be the clipped output, can then be
controlled by adjusting the current that flows through Q7
and Q8; see the circuit diagram shown in Figure 63. The
circuitry of A1, R2, and Q2 converts the clamp voltage
(VCLMP) to a current that controls equal and opposite
currents flowing through transistors Q5 and Q6.
In a typical application, the VCA2615 will drive an
anti-aliasing filter, which in turn will drive an ADC. Many
modern ADCs, such as the ADS5270, are well-behaved
with as much as 2x overload. This means that the clipping
level of the VCA should be set to overcome the loss in the
filter such that the clipped input to the ADC is just slightly
over the full-scale input. By setting the clipping level in this
manner, the lowest harmonic distortion level will be
achieved without interfering with the overload capability of
the ADC.
VDD
R1
Q9
Q1
Q5
Q7
H/L
R2
VCLMP
D1
D3
D2
D4
From
Buffered
Input
A1
Q2
Clip Adjust
Input
A2
VCM
Output
Amp
R2
Q6
Q8
Figure 66. Clipping Level Adjust Circuitry
22
ꢠ ꢅꢉ ꢡꢢ ꢣꢤ
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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
LNP
Input
(100mV/div)
LNP
Input
(50mV/div)
Differential Output
(500mV/div)
Differential Output
(500mV/div)
Time (200ns/div)
Time (200ns/div)
VCNTL = 0.7V
VCNTL = 0.7V
Figure 67. Before Overload (100mV Input)
Figure 69. Overload (240mV Input)
PP
PP
LNP
Input
LNP
Input
(500mV/div)
(50mV/div)
Differential Output
(1V/div)
Differential Output
(500mV/div)
Time (200ns/div)
Time (200ns/div)
VCNTL = 0.7V
VCNTL = 0.7V
Figure 68. Approaching Overload (120mV Input)
Figure 70. Extreme Overload (2V Input)
PP
PP
POWER-DOWN MODES
When VDD (5V) is applied to the VCA2615, the total power
dissipation is typically 308mW. When the power is initially
applied to the VCA2615 with both PDV and PDL pins at a
logic low, the typical power dissipation will be 5mW. After
the VCA2615 has been enabled, if the PDL line is low with
the PDV line high, the typical power dissipation will be
approximately 100mW. After the VCA2615 has been
enabled, if the PDV line is low with the PDL line high, the
typical power dissipation will be approximately 200mW.
23
www.ti.com
SBOS316D − JULY 2005 − REVISED OCTOBER 2008
Revision History
DATE
REV
PAGE
SECTION
Features
DESCRIPTION
1
1
2
4
1
3
Deleted SMALL QFN−48 PACKAGE (7x7mm)
Text added to last paragraph.
Description
10/08
D
Package/Ordering
Electrical Characteristics
Features
Added TQFP−48 package information.
Thermal Characteristics section; added text.
Changed 20dB/V to 22dB/V under LOW-NOISE VARIABLE-GAIN AMPLIFIER
Electrical Characteristics
Added CA, CB = 3.9µF to the overall conditions.
Accuracy section; moved Gain Slope line under accurary, added “V
CNTL
to 2.0V” to conditions, and changed typical value from 20dBv to 22dB/V.
= 0.4V
4
Electrical Characteristics
8/05
C
Thermal Characteristics section; removed “Specified” and added “Operating” to
conditions.
5
Pin Configuration
Pin 19 description; changed 0.01µF to 0.1µF.
22
Programmable Clipping
Reworded paragraph three to clarify description of setting VCA clipping level.
:
NOTE Page numbers for previous revisions may differ from page numbers in the current version.
24
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
PACKAGING INFORMATION
Orderable Device
VCA2615PFBR
VCA2615PFBT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TQFP
PFB
48
48
48
48
48
48
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TQFP
VQFN
VQFN
VQFN
VQFN
PFB
RGZ
RGZ
RGZ
RGZ
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VCA2615RGZR
VCA2615RGZRG4
VCA2615RGZT
VCA2615RGZTG4
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
VCA2615PFBR
VCA2615PFBT
VCA2615RGZR
VCA2615RGZT
TQFP
TQFP
VQFN
VQFN
PFB
PFB
RGZ
RGZ
48
48
48
48
1000
250
330.0
330.0
330.0
180.0
16.4
16.4
16.4
16.4
9.6
9.6
7.3
7.3
9.6
9.6
7.3
7.3
1.5
1.5
1.5
1.5
12.0
12.0
12.0
12.0
16.0
16.0
16.0
16.0
Q2
Q2
Q2
Q2
2500
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
VCA2615PFBR
VCA2615PFBT
VCA2615RGZR
VCA2615RGZT
TQFP
TQFP
VQFN
VQFN
PFB
PFB
RGZ
RGZ
48
48
48
48
1000
250
367.0
367.0
367.0
210.0
367.0
367.0
367.0
185.0
38.0
38.0
38.0
35.0
2500
250
Pack Materials-Page 2
MECHANICAL DATA
MTQF019A – JANUARY 1995 – REVISED JANUARY 1998
PFB (S-PQFP-G48)
PLASTIC QUAD FLATPACK
0,27
0,17
0,50
M
0,08
36
25
37
24
48
13
0,13 NOM
1
12
5,50 TYP
7,20
SQ
Gage Plane
6,80
9,20
SQ
8,80
0,25
0,05 MIN
0°–7°
1,05
0,95
0,75
0,45
Seating Plane
0,08
1,20 MAX
4073176/B 10/96
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-026
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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