XTR110KU/1K [TI]
PRECISION VOLTAGE-TO-CURRENT CONVERTER/TRANSMITTER;型号: | XTR110KU/1K |
厂家: | TEXAS INSTRUMENTS |
描述: | PRECISION VOLTAGE-TO-CURRENT CONVERTER/TRANSMITTER 光电二极管 |
文件: | 总19页 (文件大小:810K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
XTR110
SBOS141C – JANUARY 1984 – REVISED SEPTEMBER 2009
PRECISION VOLTAGE-TO-CURRENT
CONVERTER/TRANSMITTER
FEATURES
APPLICATIONS
ꢀ 4mA TO 20mA TRANSMITTER
ꢀꢀINDUSTRIAL PROCESS CONTROL
ꢀ SELECTABLE INPUT/OUTPUT RANGES:
0V to +5V, 0V to +10V Inputs
0mA to 20mA, 5mA to 25mA Outputs
Other Ranges
ꢀ PRESSURE/TEMPERATURE TRANSMITTERS
ꢀ CURRENT-MODE BRIDGE EXCITATION
ꢀ GROUNDED TRANSDUCER CIRCUITS
ꢀ CURRENT SOURCE REFERENCE FOR DATA
ꢀ 0.005% MAX NONLINEARITY, 14 BIT
ꢀ PRECISION +10V REFERENCE OUTPUT
ꢀ SINGLE-SUPPLY OPERATION
ACQUISITION
ꢀ PROGRAMMABLE CURRENT SOURCE FOR
TEST EQUIPMENT
ꢀ WIDE SUPPLY RANGE: 13.5V to 40V
ꢀ POWER PLANT/ENERGY SYSTEM
MONITORING
DESCRIPTION
The XTR110 is a precision voltage-to-current converter
designed for analog signal transmission. It accepts inputs
of 0 to 5V or 0 to 10V and can be connected for outputs of
4mA to 20mA, 0mA to 20mA, 5mA to 25mA, and many other
commonly used ranges.
VREF Force 15
REF Sense 12
REF Adjust 11
16 +VCC
R9
Source
Resistor
+10V
Reference
V
1
13
14
7
R8
Source
Sense
V
A precision on-chip metal film resistor network provides input
scaling and current offsetting. An internal 10V voltage refer-
ence can be used to drive external circuitry.
Gate
Drive
A2
V
IN1 (10V)
REF In
4
3
V
Offset
(zero)
Adjust
R1
R5
R3
6
The XTR110 is available in 16-pin plastic DIP, ceramic DIP
and SOL-16 surface-mount packages. Commercial and in-
dustrial temperature range models are available.
R4
A1
R2
Span
Adjust
8
10
9
R7
R6
4mA
Span
VIN2 (5V)
Common
5
2
16mA
Span
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1984-2009, Texas Instruments Incorporated
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments
recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation proce-
dures can cause damage.
Power Supply, +VCC ............................................................................ 40V
Input Voltage, VIN1, VIN2, VREF IN ....................................................... +VCC
See text regarding safe negative input voltage range.
Storage Temperature Range: A, B ................................–55°C to +125°C
K, U ..................................–40°C to +85°C
Output Short-Circuit Duration, Gate Drive
and VREF Force ................................ Continuous to common and +VCC
Output Current Using Internal 50Ω Resistor ................................... 40mA
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
PACKAGE/ORDERING INFORMATION(1)
PACKAGE
DESIGNATOR
TEMPERATURE
RANGE
PRODUCT
PACKAGE-LEAD
XTR110AG
XTR110BG
XTR110KP
XTR110KU
DIP-16 Ceramic
DIP-16 Ceramic
DIP-16 Plastic
JD
JD
N
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
SOL-16 Surface-Mount
DW
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
PIN CONFIGURATION
TOP VIEW
Source Resistor
Common
1
2
3
4
5
6
7
8
16 +VCC
15 VREF Force
14 Gate Drive
13 Source Sense
V
REF In
IN1 (10V)
IN2 (5V)
V
V
12
11
V
REF Sense
REF Adjust
Zero Adjust
Zero Adjust
Span Adjust
V
10 4mA Span
16mA Span
9
XTR110
2
SBOS141C
www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = +25°C and VCC = +24V and RL = 250Ω**, unless otherwise specified.
XTR110AG, KP, KU
TYP
XTR110BG
TYP
PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
UNITS
TRANSMITTER
Transfer Function
Input Range: VIN1
VIN2
IO = 10 [(VREFIn/16) + (VIN1/4) + (VIN2/2)] /RSPAN
(5)
Specified Performance
Specified Performance
Specified Performance(1)
Derated Performance(1)
16mA/20mA Span(2)
0
0
4
0
+10
+5
20
*
*
*
*
*
*
*
*
V
V
mA
Current, IO
40
mA
Nonlinearity
Offset Current, IOS
Initial
vs Temperature
vs Supply, VCC
Span Error
0.01
0.025
0.002
0.005
% of Span
IO = 4mA(1)
(1)
0.2
0.4
0.02
0.1
0.003
*
% of Span
% of Span/°C
% of Span/V
(1)
(1)
0.0003
0.0005
0.005
0.005
*
*
IO = 20mA
(1)
Initial
0.3
0.0025
0.003
10 x 109
27
0.6
0.005
0.005
0.05
0.0009
0.2
0.003
*
% of Span
% of Span/°C
% of Span/V
(1)
(1)
vs Temperature
vs Supply, VCC
Output Resistance
Input Resistance
*
*
*
*
*
(3)
From Drain of FET (QEXT
)
Ω
VIN1
VIN2
VREF In
kΩ
kΩ
kΩ
22
19
Dynamic Response
Settling Time
To 0.1% of Span
To 0.01% of Span
15
20
1.3
*
*
*
µs
µs
mA/µs
Slew Rate
VOLTAGE REFERENCE
Output Voltage
vs Temperature
vs Supply, VCC
vs Output Current
vs Time
+9.95
+10
35
0.0002
0.0005
100
+10.05
50
0.005
0.01
+9.98
*
15
*
*
*
+10.02
30
*
V
ppm/°C
%/V
%/mA
ppm/1k hrs
V
Line Regulation
Load Regulation
*
Trim Range
Output Current
–0.100
10
+0.25
*
*
*
Specified Performance
Excluding IO
mA
POWER SUPPLY
Input Voltage, VCC
Quiescent Current
+13.5
+40
4.5
*
*
*
V
mA
3
*
TEMPERATURE RANGE
Specification: AG, BG
KP, KU
Operating: AG, BG
KP, KU
–40
0
–55
–25
+85
+70
+125
+85
*
*
*
*
°C
°C
°C
°C
* Specifications same as AG/KP grades. ** Specifications apply to the range of RL shown in Typical Performance Curves.
NOTES: (1) Including internal reference. (2) Span is the change in output current resulting from a full-scale change in input voltage. (3) Within compliance range limited
by (+VCC – 2V) +VDS required for linear operation of the FET. (4) For VREF adjustment circuit see Figure 3. (5) For extended IREF drive circuit see Figure 4. (5) Unit may
be damaged. See Input Voltage Range section.
XTR110
SBOS141C
3
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TYPICAL PERFORMANCE CURVES
TA = +25°C, VCC = 24VDC, RL = 250Ω, unless otherwise noted.
V
REF LINE REGULATION vs FREQUENCY
IO POWER SUPPLY REGULATION vs FREQUENCY
10
1
10
1
0.1
0.1
0.01
0.01
0.001
0.001
1
10
100
1k
10k
100k
1
10
100
1k
10k
100k
Ripple Frequency (Hz)
Ripple Frequency (Hz)
JUNCTION TEMPERATURE RISE
vs VREF OUTPUT CURRENT
TOTAL OUTPUT ERROR vs TEMPERATURE
2
1
0
100
80
Max. Temp. Rise
for +85°C Ambient
AG
Max. TJ = +175°C
θJA = 70°C/W
VCC = +40V
60
BG
AG
40
V
CC = +24V
–1
–2
20
0
VCC = +15V
–40
–20
0
20
40
60
80
0
2
4
6
8
10
Temperature (°C)
VREF Output Current (mA)
(IOUT has minimal effect on TJ)
ICC vs TEMPERATURE
MAXIMUM RL vs VCC
5
4
3
2
2500
2000
1500
1000
IO = 20mA
IO = 4mA
IO MAX = 20mA
I
O MAX = 40mA
1
0
500
0
–40
–20
0
20
40
60
80
15
20
25
30
35
40
Temperature (°C)
+VCC (V)
XTR110
4
SBOS141C
www.ti.com
TYPICAL PERFORMANCE CURVES (Continued)
At TA = +25°C, VCC = 24VDC, RL = 250Ω, unless otherwise noted.
SETTLING TIME WITH NEG VIN STEP
PULSE RESPONSE
VIN
0V
VIN
0V
0V
IO Error
(0.01% of
Span/Box)
IO
into
500Ω
0V
SETTLING TIME WITH POS VIN STEP
VIN
0V
0V
IO Error
(0.01% of
Span/Box)
XTR110
SBOS141C
5
www.ti.com
have a voltage rating equal or greater than the maximum
power supply voltage. Various recommended types are shown
in Table I.
APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for 0V to 10V
input and 4ma to 20mA output. Other input voltage and
output current ranges require changes in connections of pins
3, 4, 5, 9 and 10 as shown in the table of Figure 1.
(1)
(1)
MANUFACTURER
PART NO.
BVDSS
BVGS
PACKAGE
Ferranti
ZVP1304A
ZVP1304B
ZVP1306A
ZVP1306B
40V
40V
60V
60V
20V
20V
20V
20V
TO-92
TO-39
TO-92
TO-39
The complete transfer function of the XTR110 is:
(VREF IN
)
(VIN1)
4
(VIN2)
2
International
Rectifier
10
+
+
IRF9513
60V
80V
20V
20V
TO-220
TO-220
16
IO =
(1)
Motorola
RCA
MTP8P08
RSPAN
RFL1P08
RFT2P08
80V
80V
20V
20V
TO-39
TO-220
RSPAN is the total impedance seen at the emitter of the
internal NPN transistor. This impedance varies depending
on how pins 8, 9 and 10 are configured. Typical operating
region configurations are shown in Figure 1. An external
RSPAN can be connected for different output current ranges
as described later.
Siliconix
(preferred)
VP0300B
VP0300L
VP0300M
VP0808B
VP0808L
VP0808M
30V
30V
30V
80V
80V
80V
40V
40V
40V
40V
40V
40V
TO-39
TO-92
TO-237
TO-39
TO-92
TO-237
Supertex
VP1304N2
VP1304N3
VP1306N2
VP1306N3
40V
40V
60V
60V
20V
20V
20V
20V
TO-220
TO-92
TO-220
TO-92
EXTERNAL TRANSISTOR
An external pass transistor, QEXT, is required as shown in
Figure 1. This transistor conducts the output signal current.
A P-channel MOSFET transistor is recommended. It must
NOTE: (1) BVDSS—Drain-source breakdown voltage. BVGS—Gate-source
breakdown voltage.
TABLE I. Available P-Channel MOSFETs.
+
+VCC
1µF
+VCC
13.5 to 40V
Force 15
16
R9 50Ω
Sense 12
+10V
1
R8
IO
500Ω
Reference
Short
Connection
(see text)
VREF
Adj.
11
4
13
14
QEXT
P-Channel
IO/10
VIN
0 to 10V
3
7
6
MOSFET
(see text)
15kΩ
R5
16.25kΩ
Zero
R3
20kΩ
R1
R2
Adjust
IO
4 to 20mA
R4
10kΩ
RL
5kΩ
(250Ω typ)
8
10
9
Span Adjust
R7 6250Ω
IO/10
5
2
4mA Span
16mA Span
R6 1562.5Ω
INPUT
OUTPUT
RANGE (V) RANGE (mA)
PIN 3
PIN 4 PIN 5 PIN 9 PIN 10
0-10
2-10
0-10
0-10
0-5
1-5
0-5
0-5
0-20
4-20
4-20
5-25
0-20
4-20
4-20
5-25
Com
Com
+10V Ref Input
+10V Ref Input
Com
Com
+10V Ref
+10V Ref
Input
Input
Com
Com
Com
Com
Input
Input
Input
Input
Com
Com
Com
Com
Com
Com
Com
Com
Com
Com
Open
Com
Com
Com
Open
Com
Com
Com
Com
Com
FIGURE 1. Basic Circuit Connection.
XTR110
6
SBOS141C
www.ti.com
If the supply voltage, +VCC, exceeds the gate-to-source
breakdown voltage of QEXT, and the output connection
(drain of QEXT) is broken, QEXT could fail. If the gate-to-
source breakdown voltage is lower than +VCC, QEXT can be
protected with a 12V zener diode connected from gate to
source.
+VCC
16
47nF
1
13
14
TIP30B
etc.
XTR110
Two PNP discrete transistors (Darlington-connected) can be
used for QEXT—see Figure 2. Note that an additional capaci-
tor is required for stability. Integrated Darlington transistors
are not recommended because their internal base-emitter
resistors cause excessive error.
0.047µF
2
2N2907
etc.
IOUT
RL
Common
TRANSISTOR DISSIPATION
Maximum power dissipation of QEXT depends on the power
supply voltage and full-scale output current. Assuming that
the load resistance is low, the power dissipated by QEXT is:
FIGURE 2. QEXT Using PNP Transistors.
PMAX = (+VCC) IFS
(2)
+VCC
16
The transistor type and heat sinking must be chosen accord-
ing to the maximum power dissipation to prevent overheat-
ing. See Table II for general recommendations.
VREF Force
15
VREF Sense
12
V
REF Adjust
11
VREF
XTR110
R
20kΩ
(1)
RS
PACKAGE TYPE
ALLOWABLE POWER DISSIPATION
TO-92
TO-237
TO-39
TO-220
TO-3
Lowest: Use minimum supply and at +25°C.
Acceptable: Trade-off supply and temperature.
Good: Adequate for majority of designs.
Excellent: For prolonged maximum stress.
Use if hermetic package is required.
Adjust Range
±5% Optimum
Common
2
NOTE: (1) RS gives higher resolution with reduced
range, set RS = 0Ω for larger range.
TABLE II. External Transistor Package Type and
Dissipation.
FIGURE 3. Optional Adjustment of Reference Voltage.
INPUT VOLTAGE RANGE
The internal op amp A1 can be damaged if its non-inverting
input (an internal node) is pulled more than 0.5V below
common (0V). This could occur if input pins 3, 4 or 5 were
driven with an op amp whose output could swing negative
under abnormal conditions. The voltage at the input of A1 is:
Force
15
12
QREF
16
2
+VCC
Sense
+10VREF
XTR110
(VREF IN
)
(VIN1)
4
(VIN2)
2
VA1
=
+
+
(3)
16
This voltage should not be allowed to go more negative than
–0.5V. If necessary, a clamp diode can be connected from
the negative-going input to common to clamp the input
voltage.
For 100mA with VCC up to
40V use 2N3055 for QREF
.
FIGURE 4. Increasing Reference Current Drive.
COMMON (Ground)
Careful attention should be directed toward proper con-
nection of the common (grounds). All commons should
be joined at one point as close to pin 2 of the XTR110 as
possible. The exception is the IOUT return. It can be
returned to any point where it will not modulate the
common at pin 2.
3 should be connected to this point. The circuit in Figure 3
shows adjustment of the voltage reference.
The current drive capability of the XTR110’s internal refer-
ence is 10mA. This can be extended if desired by adding an
external NPN transistor shown in Figure 4.
OFFSET (ZERO) ADJUSTMENT
VOLTAGE REFERENCE
The offset current can be adjusted by using the potentiom-
eter, R1, shown in Figure 5. Set the input voltage to zero and
then adjust R1 to give 4mA at the output. For spans starting
The reference voltage is accurately regulated at pin 12
(VREF SENSE). To preserve accuracy, any load including pin
XTR110
SBOS141C
7
www.ti.com
R1 = 100kΩ
R2 = 100kΩ
R3 = 49.9kΩ
R4 = 31.6Ω
20
15
10
5
1µF Tantalum
15
12
3
Third Wire
16
+
1
24V
–
S
Span Adjust ±0.45%
13
14
16mA Span
as shown
XTR110
4
5
G
2
0V
to
+10V
9
D
Zero Adjust ±1.8% of Span
8
7
6
4mA to
20mA Out
R4
1V
to
+5V
Out
4mA Offset
RL
250Ω
R1
R3
−2.5
0
2
4
6
8
10
Input Voltage, VIN1 (V)
R2
Span Adjust
Offset
Adjust
FIGURE 6. Zero and Span of 0V to +10V Input, 4mA to
20mA Output Configuration (see Figure 5).
FIGURE 5. Offset and Span Adjustment Circuit for 0V to
+10V Input, 4mA to 20mA Output.
20
See values in Figure 6.
In addition, connect
pins 9 and 10 together.
at 0mA, the following special procedure is recommended:
set the input to a small nonzero value and then adjust R1 to
the proper output current. When the input is zero the output
will be zero. Figures 6 and 7 show graphically how offset is
adjusted.
15
10
5
Span Adjust
20mA Span
SPAN ADJUSTMENT
The span is adjusted at the full-scale output current using the
potentiometer, R2, shown in Figure 5. This adjustment is
interactive with the offset adjustment, and a few iterations
may be necessary. For the circuit shown, set the input
voltage to +10V full scale and adjust R2 to give 20mA full-
scale output. Figures 6 and 7 show graphically how span is
adjusted.
Zero Adjust
0mA Offset
0
2
4
6
8
10
Input Voltage, VIN1 (V)
FIGURE 7. Zero and Span of 0V to +10VIN, 0mA to 20mA
Output Configuration (see Figure 5).
The values of R2, R3, and R4 for adjusting the span are
determined as follows: choose R4 in series to slightly de-
crease the span; then choose R2 and R3 to increase the span
to be adjustable about the center value.
EXTENDED SPAN
For spans beyond 40mA, the internal 50Ω resistor (R9) may
be replaced by an external resistor connected between pins
13 and 16.
LOW TEMPERATURE COEFFICIENT OPERATION
Although the precision resistors in the XTR110 track within
1ppm/°C, the output current depends upon the absolute
temperature coefficient (TC) of any one of the resistors, R6,
R7, R8, and R9. Since the absolute TC of the output current
can have 20ppm/°C, maximum, the TC of the output current
can have 20ppm/°C drift. For low TC operation, zero TC
resistors can be substituted for either the span resistors (R6
or R7) or for the source resistor (R9) but not both.
Its value can be calculated as follows:
REXT = R9 (SpanOLD/SpanNEW
)
Since the internal thin-film resistors have a 20% absolute
value tolerance, measure R9 before determining the final
value of REXT. Self-heating of REXT can cause nonlinearity.
Therefore, choose one with a low TC and adequate power
rating. See Figure 10 for application.
XTR110
8
SBOS141C
www.ti.com
TYPICAL APPLICATIONS
The XTR110 is ideal for a variety of applications requiring
high noise immunity current-mode signal transmission. The
precision +10V reference can be used to excite bridges and
transducers. Selectable ranges make it very useful as a
precision programmable current source. The compact design
and low price of the XTR110 allow versatility with a
minimum of external components and design engineering
expense.
Figures 8 through 10 show typical applications of the
XTR110.
+15V
15
12
16
R1
2Ω
1
13
14
7
+10V
Reference
11
VIN
4
T1
A4
3
6
R9
15kΩ
R10
1kΩ
8
10
9
Offset
Adjust
R7
4.75kΩ
5
A3
R8 200Ω
2
R3
Fine Trim
Span
20kΩ
R5
2MΩ
Adjust
RH 50kΩ
Coarse Trim
R6
402Ω
IO
A2
T3
A1
T2
R4
2kΩ
R2
4.99Ω
–15V
IO (mA)
200
R1, R2: Low TC resistors to dissipate 0.32W continuous power.
For other current ranges, scale both resistors proportionately.
: 10-turn trimpots for greatest sensitivity.
R8, R10, R11
R6, R7: Low TC resistors.
VIN (V)
A1 - A4: 1/4 LM324 (powered by ±15V).
T1: International Rectifier IR9513(1)
0
.
5
10
T2: International Rectifier IR513(1)
.
T3: International Rectifier IRFF9113(1)
.
NOTE: (1) Or other adequate power rating MOS transistor.
–200
FIGURE 8. ±200mA Current Pump.
XTR110
SBOS141C
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Isolation Barrier
+15V
Isolated Power
Supply (722)
1µF
–15V +15V –15V +15V
15
12
3
16
1
13
14
XTR110
S
D
7
15
16
4
G
ISO122
4mA to 20mA Out
0 to –10V
8
5
2
9
RL
VL
FIGURE 9. Isolated 4mA to 20mA Channel.
+24V
15
12
4
REXT
0.1Ω
16
13
XTR110
0A to
10A Out
S
D
0V to +10V
3
14
G
5
2
9
See extended span section.
FIGURE 10. 0A to 10A Output Voltage-to-Current Converter.
XTR110
10
SBOS141C
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Revision History
DATE REVISION PAGE
9/09
SECTION
DESCRIPTION
Front Page
Changed front page to standard format.
Changed text in third paragraph.
C
6
Applications Information
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
XTR110
SBOS141C
11
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Sep-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
XTR110AD
XTR110AG
OBSOLETE DIESALE
Y
0
TBD
Call TI
AU
Call TI
NRND
NRND
CDIP SB
CDIP SB
PDIP
JD
16
1
1
Green (RoHS &
no Sb/Br)
N / A for Pkg Type
XTR110BG
XTR110KP
JD
N
16
16
16
16
16
16
16
Green (RoHS &
no Sb/Br)
AU
N / A for Pkg Type
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
XTR110KPG4
XTR110KU
PDIP
N
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
SOIC
DW
DW
DW
DW
40 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
XTR110KU/1K
XTR110KU/1KG4
XTR110KUG4
SOIC
1000 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
SOIC
1000 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
SOIC
40 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
XTR110KU/1K
SOIC
DW
16
1000
330.0
16.4
10.75 10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 16
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 38.0
XTR110KU/1K
1000
Pack Materials-Page 2
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