ZXMN6A07F [TI]
TLV320AIC3104EVM and TLV320AIC3104EVM-PDK; TLV320AIC3104EVM和TLV320AIC3104EVM -PDK
| 型号： | ZXMN6A07F |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TLV320AIC3104EVM and TLV320AIC3104EVM-PDK |
| 文件： | 总60页 (文件大小：3467K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
User's Guide
SLAU218–August 2007
TLV320AIC3104EVM and TLV320AIC3104EVM-PDK
This user's guide describes the characteristics, operation, and use of the TLV320AIC3104EVM, both by
itself and as part of the TLV320AIC3104EVM-PDK. This evaluation module (EVM) is a complete stereo
audio codec with several inputs and outputs, extensive audio routing, mixing, and effects capabilities. A
complete circuit description, schematic diagram, and bill of materials are also included.
The following related documents are available through the Texas Instruments Web site at www.ti.com.
EVM-Compatible Device Data Sheets
Device
Literature Number
SLAS510
TLV320AIC3104
TAS1020B
SLES025
REG1117-3.3
TPS767D318
SN74LVC125A
SN74LVC1G125
SN74LVC1G07
SBVS001
SLVS209
SCAS290
SCES223
SCES296
Contents
1
2
3
4
EVM Overview ............................................................................................................... 3
EVM Description and Basics ............................................................................................... 3
TLV320AIC3104EVM-PDK Setup and Installation ...................................................................... 7
TLV320AIC3104EVM Software ............................................................................................ 9
Appendix A EVM Connector Descriptions ................................................................................... 37
Appendix B TLV320AIC3104EVM Schematic ............................................................................... 41
Appendix C TLV320AIC3104EVM Layout Views ........................................................................... 42
Appendix D TLV320AIC3104EVM Bill of Materials ......................................................................... 45
Appendix E USB-MODEVM Schematic ...................................................................................... 46
Appendix F USB-MODEVM Bill of Materials ................................................................................ 47
Appendix G USB-MODEVM Protocol ......................................................................................... 49
List of Figures
1
2
3
4
5
6
7
8
TLV320AIC3104EVM-PDK Block Diagram .............................................................................. 4
Default Software Screen ................................................................................................... 8
Device Selection Window................................................................................................... 9
Interface Selection Window ................................................................................................ 9
I2C Address Selection Window .......................................................................................... 10
Default Configuration Tab................................................................................................. 12
Audio Input Tab ............................................................................................................ 13
Bypass Paths ............................................................................................................... 14
Audio Interface Tab ....................................................................................................... 15
Clocks Tab ................................................................................................................. 17
GPIO Tab ................................................................................................................... 19
AGC Tab .................................................................................................................... 21
9
10
11
12
I2S, I2C are trademarks of Koninklijke Philips Electronics N.V.
Windows is a trademark of Microsoft Corporation.
SPI is a trademark of Motorola, Inc.
LabView is a trademark of National Instruments.
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13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Left AGC Settings .......................................................................................................... 22
Advanced.................................................................................................................... 22
Filters Tab .................................................................................................................. 23
ADC High Pass Filters .................................................................................................... 24
ADC High-Pass Filter Settings ........................................................................................... 24
DAC Filters.................................................................................................................. 25
De-emphasis Filters........................................................................................................ 25
Enabling Filters ............................................................................................................ 26
Shelf Filters ................................................................................................................. 26
EQ Filters ................................................................................................................... 27
Analog Simulation Filters ................................................................................................. 27
Preset Filters ............................................................................................................... 28
User Filters ................................................................................................................. 28
3D Effect Settings ......................................................................................................... 29
Output Stage Configuration Tab ......................................................................................... 30
DAC/Line Outputs Tab .................................................................................................... 32
High-Power Outputs Tab ................................................................................................. 34
Command Line Interface Tab ............................................................................................ 35
File Menu ................................................................................................................... 36
C-1 Assembly layer ............................................................................................................. 42
C-2 Top Layer.................................................................................................................... 42
C-3 Layer 3....................................................................................................................... 43
C-4 Layer 4....................................................................................................................... 43
C-5 Silk Screen .................................................................................................................. 44
C-6 Bottom Layer................................................................................................................ 44
List of Tables
1
USB-MODEVM SW2 Settings ............................................................................................. 5
List of Jumpers............................................................................................................... 5
Analog Interface Pinout.................................................................................................... 37
Alternate Analog Connectors ............................................................................................. 38
Digital Interface Pinout..................................................................................................... 39
Power Supply Pinout....................................................................................................... 40
TLV320AIC3104EVM Bill of Materials................................................................................... 45
USB-MODEVM Bill of Materials .......................................................................................... 47
2
A-1
A-2
A-3
A-4
D-1
F-1
G-1 USB Control Endpoint HIDSETREPORT Request .................................................................... 49
G-2 Data Packet Configuration ................................................................................................ 49
G-3 GPIO Pin Assignments .................................................................................................... 52
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EVM Overview
1
EVM Overview
1.1 Features
•
•
Full-featured evaluation board for the TLV320AIC3104 stereo audio codec.
Modular design for use with a variety of digital signal processor (DSP) and microcontroller interface
boards.
•
•
•
USB connection to PC provides power, control, and streaming audio data for easy evaluation.
Onboard microphone for ADC evaluation
Connection points for external control and digital audio signals for quick connection to other
circuits/input devices.
The TLV320AIC3104EVM-PDK is a complete evaluation kit, which includes a universal serial bus
(USB)-based motherboard and evaluation software for use with a personal computer (PC) running the
Microsoft Windows™ operating system (Win2000 or XP).
1.2 Introduction
The TLV320AIC3104EVM is in the Texas Instruments modular EVM form factor, which provides direct
evaluation of the device performance and operating characteristics, and eases software development and
system prototyping. This EVM is compatible with the 5-6K Interface Evaluation Module (SLAU104) and the
HPA-MCUINTERFACE (SLAU106) from Texas Instruments and additional third-party boards which
support the Texas Instrument modular EVM format.
The TLV320AIC3104EVM-PDK is a complete evaluation/demonstration kit, which includes a USB-based
motherboard called the USB-MODEVM Interface board and evaluation software for use with a personal
computer running the Microsoft Windows operating systems.
The TLV320AIC3104EVM-PDK is operational with one USB cable connection to a personal computer. The
USB connection provides power, control, and streaming audio data to the EVM for reduced setup and
configuration. The EVM also provides external control signals, audio data, and power for advanced
operation, which allows prototyping and connection to the rest of the development or system evaluation.
2
EVM Description and Basics
This section provides information on the analog input and output, digital control, power and general
connection of the TLV320AIC3104EVM.
2.1 TLV320AIC3104EVM-PDK Block Diagram
The TLV320AIC3104EVM-PDK consists of two separate circuit boards, the USB-MODEVM and the
TLV320AIC3104EVM. The USB-MODEVM is built around a TAS1020B streaming audio USB controller
with an 8051-based core. The motherboard features two positions for modular EVM, or one double-wide
serial modular EVM may be installed. The TLV320AIC3104EVM is one of the double-wide modular EVM
that is designed to work with the USB-MODEVM.
The simple diagram below (Figure 1) shows the how the TLV320AIC3104EVM is connected to the
USB-MODEVM. The USB-MODEVM Interface board is intended to be used in USB mode, where control
of the installed EVM is accomplished using the onboard USB controller device. Provision is made,
however, for driving all the data buses (I2C, SPI™, I2S/AC97) externally. The source of these signals is
controlled by SW2 on the USB-MODEVM. Refer to Table 1 for details on the switch settings.
The USB-MODEVM has two EVM positions that allow for the connection of two small evaluation module
or one larger evaluation module. The TLV320AIC3104EVM is designed to fit over both of the smaller
evaluation module slots as shown below.
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EVM Description and Basics
2.1.1
USB-MODEVM Interface Board
The simple diagram shown in Figure 1 shows only the basic features of the USB-MODEVM Interface
board.
Because the TLV320AIC3104EVM is a double-wide modular EVM, it is installed with connections to both
EVM positions, which connects the TLV320AIC3104 digital control interface to the I2C port realized using
the TAS1020B, as well as the TAS1020B digital audio interface..
In the factory configuration, the board is ready to use with the TLV320AIC3104EVM. To view all the
functions and configuration options available on the USB-MODEVM board, see the USB-MODEVM
Interface Board schematic in Appendix E.
TLV320AIC310xEVM
TLV320AIC310x
USB-MODEVM
EVM Position 1
Control Interface
2
SPI, I C
TAS1020B
USB 8051
USB
EVM Position 2
Microcontroller
2
I S, AC97
Audio Interface
Figure 1. TLV320AIC3104EVM-PDK Block Diagram
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EVM Description and Basics
2.2 Default Configuration and Connections
2.2.1
USB-MODEVM
Table 1 provides a list of the SW2 settings on the USB=MODEVM. For use with the TLV320AIC3104EVM,
SW-2 positions 1 through 7 should be set to ON, while SW-2.8 should be set to OFF.
Table 1. USB-MODEVM SW2 Settings
SW-2 Switch Number
Label
Switch Description
1
A0
USB-MODEVM EEPROM I2C Address A0
ON: A0 = 0
OFF: A0 = 1
2
3
4
5
6
7
8
A1
USB-MODEVM EEPROM I2C Address A1
ON: A1 = 0
OFF: A1 = 1
USB-MODEVM EEPROM I2C Address A2
ON: A2 = 0
OFF: A2 = 1
A2
USB I2S
USB MCK
USB SPI
USB RST
EXT MCK
I2S Bus Source Selection
ON: I2S Bus connects to TAS1020
OFF: I2S Bus connects to USB-MODEVM J14
I2S Bus MCLK Source Selection
ON: MCLK connects to TAS1020
OFF: MCLK connects to USB-MODEVM J14
SPI Bus Source Selection
ON: SPI Bus connects to TAS1020
OFF: SPI Bus connects to USB-MODEVM J15
RST Source Selection
ON: EVM Reset Signal comes from TAS1020
OFF: EVM Reset Signal comes from USB-MODEVM J15
External MCLK Selection
ON: MCLK Signal is provided from USB-MODEVM J10
OFF: MCLK Signal comes from either selection of SW2-5
2.2.2
TLV320AIC3104 Jumper Locations
Table 2 provides a list of jumpers found on the EVM and their factory default conditions.
Table 2. List of Jumpers
Default
Jumper
Position
Jumper Description
JMP1
2-3
When connecting 2-3, mic bias comes from the MICBIAS pin on the device; when connecting 1-2, mic bias is supplied from the
power supply through a resistor, which the user must install.
JMP2
JMP3
JMP4
JMP5
JMP6
JMP7
JMP8
JMP9
JMP10
Installed
Installed
Installed
Installed
Installed
Installed
Installed
Installed
3-5
Connects onboard Mic to Left Microphone Input.
Connects onboard Mic to Right Microphone Input.
Provides a means of measuring IOVDD current.
Provides a means of measuring AVDD_ADC current.
Provides a means of measuring DVDD current.
Provides a means of measuring DRVDD current.
Provides a means of measuring AVDD_DAC current.
Connects Analog and Digital Grounds.
When connecting 3 to 5, I2C is selected as control mode; when connecting 1 to 3, SPI is selected as control mode. When
connecting 3 to 4, mode selection can be made by a logic level at J16.12
In I2C control mode, this jumper sets the state of A0. When connecting 3 to 5, A0 = 0; when connecting 1 to 3, A0 = 1. In SPI control
mode, connecting 3 to 4, SPI /SS is provided from J16.2
JMP11
JMP12
JMP13
3-5
In I2C control mode, this jumper sets the state of A1. When connecting 3 to 5, A1 = 0; when connecting 1 to 3, A1 = 1. In SPI control
mode, connecting 3 to 4, SPI SCLK is provided from J16.3
3-5
Installed
When installed, shorts across the output capacitor on HPLOUT; remove this jumper if using AC-coupled output drive
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Table 2. List of Jumpers (continued)
Default
Jumper
JMP14
JMP15
JMP16
JMP17
JMP18
JMP19
Position
Installed
Installed
Installed
Installed
Open
Jumper Description
When installed, shorts across the output capacitor on HPLCOM; remove this jumper if using AC-coupled output drive
When installed, shorts across the output capacitor on HPROUT; remove this jumper if using AC-coupled output drive
When installed, shorts HPLCOM and HPRCOM. Use only if these signals are set to constant VCM.
When installed, shorts across the output capacitor on HPRCOM; remove this jumper if using AC-coupled output drive
Selects onboard EEPROM as Firmware Source.
Open
When installed, allows the USB-MODEVM to hardware reset the device under user control
2.3 Analog Signal Connections
2.3.1
Analog Inputs
The analog inputs to the EVM can be connected through two different methods. The analog input sources
can be applied directly to J13 (top or bottom side) or through the analog headers (J1-3 and J6) around the
edge of the board. The connection details of each header/connector can be found in Appendix A.
2.3.2
Analog Output
The analog outputs to the EVM can be connected through two different methods. The analog outputs are
available from the J13 and J14 (top or bottom) or they may be accessed through J4, J5, J7, J11,and J12
at the edges of the board. The connection details can be found in Appendix A.
2.4 Digital Signal Connections
2.4.1
Digital Inputs and Outputs
The digital inputs and outputs of the EVM can be monitored through J16 and J17. If external signals need
to be connected to the EVM, digital inputs should be connected via J14 and J15 on the USB-MODEVM
and the SW2 switch should be changed accordingly (see Section 2.2.1). The connector details are
available in Section A.2.
2.4.2
Digital Controls
The digital control signals can be applied directly to J16 and J17 (top or bottom side). The modular
TLV320AIC3104EVM can also be connected directly to a DSP interface board, such as the
5-6KINTERFACE or HPA-MCUINTERFACE, or to the USB-MODEVM Interface board if purchased as part
of the TLV320AIC3104EVM-PDK. See the product folders on the TI Web site for these evaluation
modules or the TLV320AIC3104 for a current list of compatible interface and/or accessory boards.
2.5 Power Connections
The TLV320AIC3104EVM can be powered independently when being used in stand-along operation or by
the USB-MODEVM when it is plugged onto the motherboard.
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2.5.1
Stand-Alone Operation
When used as a stand-alone EVM, power is applied to J15 directly, making sure to reference the supplies
to the appropriate grounds on that connector.
CAUTION
Verify that all power supplies are within the safe operating limits shown on the
TLV320AIC3104 data sheet before applying power to the EVM.
J15 provides connection to the common power bus for the TLV320AIC3104EVM. Power is supplied on the
pins listed in Table A-4.
The TLV320AIC3104EVM-PDK motherboard (the USB-MODEVM Interface board) supplies power to J15
of the TLV320AIC3104EVM. Power for the motherboard is supplied either through its USB connection or
via terminal blocks on that board.
2.5.2
USB-MODEVM Operation
The USB-MODEVM Interface board can be powered from several different sources:
•
•
•
USB
6-Vdc to 10-Vdc AC/DC external wall supply (not included)
Lab power supply
When powered from the USB connection, JMP6 should have a shunt from pins 1–2 (this is the default
factory configuration). When powered from 6-V to 10-Vdc, either through the J8 terminal block or J9 barrel
jack, JMP6 should have a shunt installed on pins 2–3. If power is applied in any of these ways, onboard
regulators generate the required supply voltages and no further power supplies are necessary.
If laboratory supplies are used to provide the individual voltages required by the USB-MODEVM Interface,
JMP6 should have no shunt installed. Voltages are then applied to J2 (+5 VA), J3 (+5 VD), J4 (+1.8 VD),
and J5 (+3.3 VD). The +1.8 VD and +3.3 VD can also be generated on the board by the onboard
regulators from the +5VD supply; to enable this configuration, the switches on SW1 need to be set to
enable the regulators by placing them in the ON position (lower position, looking at the board with text
reading right-side up). If +1.8 VD and +3.3 VD are supplied externally, disable the onboard regulators by
placing SW1 switches in the OFF position.
Each power supply voltage has an LED (D1-D7) that lights when the power supplies are active.
3
TLV320AIC3104EVM-PDK Setup and Installation
The following section provides information on using the TLV320AIC3104EVM-PDK, including set up,
program installation, and program usage.
Note: If using the EVM in stand-alone mode, the software should be installed per below, but the
hardware configuration may be different.
3.1 Software Installation
1. Locate installation file on the CD-ROM included with the EVMs or download the latest version of the
software located on the AIC3104 Product Page. If downloading the software from the TI Web site, an
option is available to allow the user to be notified when the software is updated.
2. Unzip the installation file by clicking on the self-extracting zip file.
3. Install the EVM software by double-clicking the Setup executable and follow the directions. The user
may be prompted to restart their computer.
This should install all the TLV320AIC310x software and required drivers onto their PC.
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3.2 EVM Connections
1. Ensure that the TLV320AIC3104EVM is installed on the USB-MODEVM Interface board, aligning J13,
J14, J15, J16, and J17 with the corresponding connectors on the USB-MODEVM.
2. Verify that the jumpers and switches are in their default conditions.
3. Attach a USB cable from the PC to the USB-MODEVM Interface board. The default configuration will
provide power, control signals, and streaming audio via the USB interface from the PC. On the
USB-MODEVM, LEDs D3-6 should light to indicate the power is being supplied from the USB.
4. For the first connection, the PC should recognize new hardware and begin an initialization process.
The user may be prompted to identify the location of the drivers or allow the PC to automatically
search for them. Allow the automatic detection option.
5. Once the PC confirms that the hardware is operational, D2 on the USB-MODEVM should light to
indicate that the firmware has been loaded and the EVM is ready for use. If the LED is not lite, verify
that the drivers were installed and trying to unplug and restart at Step 3.
After the TLV320AIC3104EVM-PDK software installation (described in Section 3.2) is complete, evaluation
and development with the TLV320AIC3104 can begin.
The TLV320AIC310xEVM software can now be launched. The user should see an initial screen that looks
similar to Figure 2.
Figure 2. Default Software Screen
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4
TLV320AIC3104EVM Software
The following section discusses the details and operation of the EVM software.
Note: For configuration of the codec, the TLV320AIC3104 block diagram located in the
TLV320AIC3104 data sheet is a good reference to help determine the signal routing.
4.1 Device Selection for Operation With AIC3104EVM
The software that is installed provides operation for several devices. An initial window should appear that
looks like Figure 3. For operation with the TLV320AIC3104EVM, the user should select AIC3104 from the
pulldown menu and click Accept. The software will take a few seconds to configure the software for
operation before proceeding. A progress bar should appear and show the status of the configuration.
Figure 3. Device Selection Window
4.2 Interface Selection
When the program first starts up, a small window (Figure 4) appears that gives two choices for the control
interface: IC or SPI. Click on the interface that will be used by the EVM, as selected by the jumper settings
detailed in Table 2. The setting of J10 should agree with the selection. 2C interface is the default interface
used by the EVM.
Figure 4. Interface Selection Window
If the I2C interface is selected, a second window then appears which allows for selecting the address of
the TLV320AIC3104. This window (see Figure 5) has two sliders for setting the state of A0 and A1. To
allow proper communication with the EVM, these should match the settings of J11 and J12 (Table 2).
When A0 and A1 are adjusted, the correct device address will be shown. Note that the actual I2C address
shown and the address for the software may be different. This is done for programming reasons and the
correct address should be used for system development .
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If the I2C address is desired to be changed at any time during normal operation of the EVM, this menu can
also be accessed from the pulldown menu under the Configuration item. This function can be used to help
program multiple devices.
Figure 5. I2C Address Selection Window
Note: For operation of the EVM in the default status, no changes are required on this panel. The
default settings are A1=A0=0. Changes to this panel are only required when operating the
EVM with a specific I2C address (other than default) or when evaluating multiple EVM.
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4.3 Front Page Indicators and Functions
Figure 2 illustrates the main screen of the EVM software. The indicators and buttons located above the
tabbed section of the front page are visible regardless of which tab is currently being selected.
At the top left of the screen is an Interface indicator. This indicator shows which interface is selected for
controlling the TLV320AIC3104, either I2C or SPI.
To the right of the Interface indicator is a group box called . This box indicates where the firmware being
used is operating from—in this release, the firmware is on the USB-MODEVM, so the user should see
USB-MODEVM in the box labeled Located On:. The version of the firmware appears in the Version box
below this.
To the right, the next group box contains controls for resetting the TLV320AIC3104. A software reset can
be done by writing to a register in the TLV320AIC3104, and this is accomplished by pushing the button
labeled Software Reset. The TLV320AIC3104 also may be reset by toggling a pin on the
TLV320AIC3104, which is done by pushing the Hardware Reset button.
CAUTION
In order to perform a hardware reset, the RESET jumper (JMP19) must be
installed and SW2-7 on the USB-MODEVM must be turned OFF. Failure to do
either of these steps results in not generating a hardware reset or causing
unstable operation of the EVM, which may require cycling power to the
USB-MODEVM.
Below the Firmware box, the Device Connected LED should be green when the EVM is connected. If the
indicator is red, the EVM is not properly connected to the PC. Disconnect the EVM and verify that the
drivers were correctly installed, then reconnect and try restarting the software.
One the upper right portion of the screen, several indicators are located which provide the status of
various portions of the TLV320AIC3104. These indicators are activated by pressing the Indicator
Updates button below the Device Connected LED. These indicators, as well as the other indicators on
this panel, are updated only when the software's front panel is inactive, once every 20ms.
The ADC Overflow and DAC Overflow indicators light when the overflow flags are set in the
TLV320AIC3104. Below these indicators are the AGC Noise Threshold Exceeded indicators that show
when the AGC noise threshold is exceeded. To the far right of the screen, the Short Circuit Detect
indicators show when a short-circuit condition is detected, if this feature has been enabled. Below the
short-circuit indicators, the AGC Gain Applied indicators use a bar graph to show the amount of gain
which has been applied by the AGC, and indicators that light when the AGC is saturated.
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4.4 Default Configuration (Presets) Tab
The Default Configuration Tab Figure 6 provides several different preset configurations of the codec. The
Preset Configurations buttons allow the user to choose from the provided defaults. When the selection is
made, the Preset Configuration Description are shows a summary of the codec setup associated with
the choice made. If the choice is acceptable, the Load button can be pressed and the preset configuration
will be loaded into the codec. The user can change to the Command Line Interface Tab (see Figure 30)
to view the actual settings that were programmed into the codec.
Figure 6. Default Configuration Tab
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4.5 Audio Input/ADC Tab
Figure 7. Audio Input Tab
The Audio Input/ADC Tab allows control of the analog input mixer and the ADC. The controls are
displayed to look similar to an audio mixing console (see Figure 7). Each analog input channel has a
vertical strip that corresponds to that channel. By default, all inputs are muted when the TLV320AIC3104
is powered up.
To route an analog input to the ADC:
1. Select the Input Mode button to correctly show if the input signal is single-ended (SE) or
fully-differential (Diff). Inputs that are single-ended should be made to the positive signal terminal.
2. Click on the button of the analog input channel that corresponds to the correct ADC. The caption of the
button should change to Active. Note that the user can connect some channels to both ADCs, while
others will only connect to one ADC.
3. Adjust the Level control to the desired attenuation for the connected channel. This level adjustment
can be done independently for each connection.
The TLV320AIC3104 offers a programmable microphone bias that can either be powered down or set to 2
V, 2.5 V, or the power supply voltage of the ADC (AVDD_ADC). Control of the microphone bias (mic bias)
voltage is accomplished by using the Mic Bias pulldown menu button above the last two channel strips.
To use the onboard microphone, JMP2 and JMP3 must be installed and nothing should be plugged into
J6. In order for the mic bias settings in the software to take effect, JMP1 should be set to connect
positions 2 and 3, so that mic bias is controlled by the TLV320AIC3104.
In the upper right portion of this tab are controls for Weak Common Mode Bias. Enabling these controls
will result in unselected inputs to the ADC channels to be weakly biased to the ADC common mode
voltage.
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Below these controls are the controls for the ADC PGA, including the master volume controls for the ADC
inputs. Each channel of the ADC can be powered up or down as needed using the Powered Up buttons.
PGA soft-stepping for each channel is selected using the pulldown menu control. The two large knobs set
the actual ADC PGA Gain and allow adjustment of the PGA gains from 0 dB to 59.5 dB in 0.5-dB steps
(excluding Mute). At the extreme counterclockwise rotation, the channel is muted. Rotating the knob
clockwise increases the PGA gain, which is displayed in the box directly above the volume control.
4.6 Bypass Paths
Figure 8. Bypass Paths
The Bypass Paths tab shows the active and passive bypass paths available for control.
The passive analog bypass paths allow the inputs to be routed straight through the device to the outputs
without turning on any of the internal circuitry. This provides a signal path through the device with minimal
power consumption.
The active bypass paths allow the inputs to bypass the ADC and DAC functional blocks and be routed to
the analog output mixers to be summed into the output amplifiers.
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4.7 Audio Interface Tab
Figure 9. Audio Interface Tab
The Audio Interface tab (Figure 9) allows configuration of the audio digital data interface to the
TLV320AIC3104.
The interface mode may be selected using the Transfer Mode control—selecting either I2S mode, DSP
mode, or Right- or Left-Justified modes. Word length can be selected using the Word Length control, and
the bit clock rate can also be selected using the Bit Clock rate control. The Data Word Offset, used in
TDM mode (see the TLV320AIC3104 data sheet) can also be selected on this tab.
Along the bottom of this tab are controls for choosing the BLCK and WCLK as being either inputs or
outputs. With the codec configured in Slave mode, both the BCLK and WCLK are set to inputs. If the
codec is in Master mode, then BCLK and WCLK are configured as outputs. Additionally, two buttons
provide the option for placing the DOUT line in a 3-state mode when there is not valid data and
transmitting BLCK and WCLK when the codec is powered down.
Re-synchronization of the audio bus is enabled using the controls in the lower right corner of this screen.
Re-synchronization is done if the group delay changes by more than ±FS/4 for the ADC or DAC sample
rates (see the TLV320AIC3104 data sheet). The channels can be soft muted when doing the re-sync if the
Soft Mute button is enabled.
In the upper right corner of this tab is the Digital Mic Functionality control. The TLV320AIC3104 can
accept a data stream from a digital microphone, which would have its clock pin connected to the
TLV320AIC3104 GPIO1 pin, and the mic data connected to the GPIO2 pin. Once the digital microphone
functionality is enabled, the Digital Mic/ADC Selection selection allows the user to choose if one or two
digital microphones are connected to the codec. If only one digital microphone is connected, then the
remaining ADC can be used with an analog input signal from the analog input pins. Refer to section
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Section 4.9 for a discussion of setting the GPIO pin options. The TLV320AIC3104 can provide a
modulator clock to the digital microphone with oversampling ratios (OSR) of 128, 64, or 32. For a detailed
discussion of how to connect a digital microphone on this platform, refer to the application note Using the
Digital Microphone Function on TLV320AIC3104 with AIC33EVM/USB-MODEVM System (SLAA275),
available for download at www.ti.com.
The default mode for the EVM is configured as 44.1 kHz, 16-bit, I2 words, and the codec is a slave (BCLK
and WCLK are supplied to the codec externally). For use with the PC software and the USB-MODEVM,
the default settings should be used; no change to the software are required.
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4.8 Clocks Tab
Figure 10. Clocks Tab
The TLV320AIC3104 provides a phase-locked loop (PLL) that allows flexibility in the clock generation for
the ADC and DAC sample rates. The Clocks tab contains the controls that can be used to configure the
TLV320AIC3104 for operation with a wide range of master clocks. See the Audio Clock Generation
Processing figure in the TLV320AIC3104 data sheet for further details of selecting the correct clock
settings.
For use with the PC software and the USB-MODEVM, the clock settings must be set a certain way. If the
settings are changed from the default settings which allow operation from the USB-MODEVM clock
reference, the EVM settings can be restored automatically by pushing the Load EVMS Clock Settings
button at the bottom of this tab. Note that changing any of the clock settings from the values loaded when
this button is pushed may result in the EVM not working properly with the PC software or USB interface. If
an external audio bus is used (audio not driven over the USB bus), then settings may be changed to any
valid combination. See Figure 10.
4.8.1
Configuring the codec clocks and Fsref calculation
The codec clock source is chosen by the CODEC_CLK Source control. When this control is set to
CLKDIV_OUT, the PLL is not used; when set to PLLDIV_OUT, the PLL is used to generate the clocks.
Note: Per the TLV320AIC3104 data sheet, the codec should be configured to allow the value of
Fsref to fall between the values of 39 kHz to 53 kHz.
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4.8.1.1
Use Without PLL
Setting up the TLV320AIC3104 for clocking without using the PLL permits the lowest power consumption
by the codec. The CLKDIV_IN source can be selected as either MCLK, GPIO2, or BCLK, the default is
MCLK. The CLKDIV_IN frequency is then entered into the CLKDIV_IN box, in megahertz (MHz). The
default value shown, 11.2896 MHz, is the frequency used on the USB-MODEVM board. This value is then
divided by the value of Q, which can be set from 2 to 17; the resulting CLKDIV_OUT frequency is shown
in the indicator next to the Q control. The result frequency is shown as the Actual Fsref.
4.8.1.2
Use With The PLL
When PLLDIV_OUT is selected as the codec clock source, the PLL will be used. The PLL clock source is
chosen using the PLLCLK_IN control, and may be set to either MCLK, GPIO2, or BCLK. The PLLCLK_IN
frequency is then entered into the PLLCLK_IN Source box.
The PLL_OUT and PLLDIV_OUT indicators show the resulting PLL output frequencies with the values set
for the P, K, and R parameters of the PLL. See the TLV320AIC3104 data sheet for an explanation of
these parameters. The parameters can be set by clicking on the up/down arrows of the P, K, and R
combo boxes, or they can be typed into these boxes.
The values can also be calculated by the PC software. To use the PC software to find the ideal values of
P, K, and R for a given PLL input frequency and desired Fsref:
1. Verify the correct reference frequency is entered into the PLLCLK_IN Source box in megahertz (MHz)
2. The desired Fsref should be set using the Fsref switch.
3. Push the Search for Ideal Settings button. The software will start searching for ideal combinations of
P, K, and R which achieve the desired Fsref. The possible settings for these parameters are displayed
in the spreadsheet-like table labeled Possible Settings.
4. Click on a row in this table to select the P, K, and R values located in that row. Notice that when this is
done, the software updates the P, K, R, PLL_OUT, and PLLDIV_OUT readings, as well as the Actual
Fsref and Error displays. The values show the calculations based on the values that were selected.
This process does not actually load the values into the TLV320AIC3104, however; it only updates the
displays in the software. If more than one row exists, the user can choose the other rows to see which
of the possible settings comes closest to the ideal settings.
When a suitable combination of P, K, and R have been chosen, pressing the Load Settings into Device?
button will download these values into the appropriate registers on the TLV320AIC3104.
4.8.1.3
Setting the ADC and DAC Sampling Rates
The Fsref frequency that is determine either enabling or bypassing the PLL (see Section 4.8.1.1 or
Section 4.8.1.2) is used to determine the actual ADC and DAC sampling rates. Using the NADC and
NDAC factors the sampling rates are derived from the Fsref. If dual rate mode is desired, this option can
be enabled for either the ADC or DAC by pressing the corresponding Dual Rate Mode button. The ADC
and DAC sampling rates are shown in the box to the right of each control.
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4.9 GPIO Tab
Figure 11. GPIO Tab
The GPIO tab (see Figure 11) selects options for the general-purpose inputs and outputs (GPIO) of the
TLV320AIC3104. Many pins on the TLV320AIC3104 are denoted as multifunction pins, meaning they may
be used for many different purposes.
The GPIO1 group box contains controls for setting options for the GPIO1 pin. The Function control
selects the function of GPIO1 from the following:
•
•
•
ADC Word Clock
An output clock derived from the reference clock (see TLV320AIC3104 data sheet)
Interrupt output pin to signal:
–
–
–
Short Circuit
AGC Noise Threshold detection
Jack/Headset detection
•
For use as an interrupt output, the behavior of the interrupt can be selected using the Interrupt
Duration control. A Single, 2ms pulse can be delivered when the selected interrupt occurs, or
Continuous Pulses can be generated signaling the interrupt.
•
•
Alternate I2S Word Clock
A digital microphone output–modulator clock for use with a digital microphone (see Section 4.7 and the
TLV320AIC3104 data sheet).
•
A general-purpose I/O pin
–
If selected as a General Purpose Input, the state of the GPIO1 pin is reflected by the Input Level
indicator. If selected as a General Purpose Output, the state of the GPIO1 pin can be set by using
the Output Level button.
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In similar fashion, the GPIO2 pin can configured as the following using the Function control in the GPIO2
group box.
•
•
•
•
An alternate I2S bus
An interrupt output
A general-purpose I/O pin
A digital microphone input
The other controls in this group box work the same as the corresponding controls for GPIO1.
When the control interface for the TLV320AIC3104 is selected to be I2C, the SDA and SCL group boxes
and controls within them are disabled. If SPI mode is selected, however, the SDA and SCL pins can be
used as GPIO, and selected as either inputs or outputs using the SDA Function and SCL Function
controls. The Output Level and Input Level controls function for these pins in the same way that they do
for GPIO1 or GPIO2.
When the control interface for the TLV320AIC3104 is selected to be SPI, the Multifunction Pins group
box and controls within it are disabled, because these pins are used by the SPI bus. When in I2C mode,
however, these controls are enabled. The MFP3 Function control selects MFP3 to be used either as a
General Purpose Input or as the data input line for the alternate I2S bus. The MFP2 Function control
selects MFP2 as either Disabled or as a General Purpose Output. When used as an output, the MFP2
Output Level control sets the output state of the MFP2 pin either high or low. The states of the MFP0,
MFP1 and MP3 inputs are indicated by the three indicator lights on the right-hand side of this group box.
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4.10 AGC Tab
Figure 12. AGC Tab
The AGC tab (see Figure 12) consists of two identical sets of controls, one for the left channel and the
other for the right channel. The AGC function is described in the TLV320AIC3104 data sheet.
The AGC can be enabled for each channel using the Enable AGC button. Target gain, Attack time in
milliseconds, Decay time in milliseconds, and the Maximum PGA Gain Allowed can all be set,
respectively, using the four corresponding knobs in each channel.
The TLV320AIC3104 allows for the Attack and Decay times of the AGC to be set up in two different
modes, standard and advanced. The Left/Right AGC Settings button determines the mode selection.
The Standard mode provides several preset times that can be selected by adjustments made to the
Attack and Decay knobs. If finer control over the times is required, then the Advanced mode is selected
to change to the settings. When the Advanced mode is enabled, two tabs should appear that allow
separate, advanced control of the Attack and Delay times of the AGC (see Figure 13 and Figure 14).
These options allow selection of the base time as well as a multiplier to achieve the actual times shown in
the corresponding text box. The Use advanced settings? button should be enabled to program the
registers with the correct values selected via the pulldown options for base time and multiplier.
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Figure 13. Left AGC Settings
Figure 14. Advanced
Noise gate functions, such as Hysteresis, Enable Clip stepping, Threshold (dB), Signal Detect
Debounce (ms), and Noise Detect Debounce (ms) are set using the corresponding controls in the
Noise Gate group box for each channel.
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4.11 Filters Tab
Figure 15. Filters Tab
The TLV320AIC3104 has an advanced feature set for applying digital filtering to audio signals. This tab
controls all of the filter features of the TLV320AIC3104. In order to use this tab and have plotting of filter
responses correct, the DAC sample rate must be set correctly. Therefore, the clocks must be set up
correctly in the software following the discussion in Section 4.8. See Figure 15.
The AIC3104 digital filtering is available to both the ADC and DAC. The ADC has optional high pass
filtering and allows the digital output from the ADC through digital effects filtering before exiting the codec
through the PCM interface. Likewise, the digital audio data can be routed through the digital effects
filtering before passing through the optional de-emphasis filter before the DAC. The digital effects filtering
can only be connected to either the ADC or DAC, not both at the same time.
The Figure 15 is divided into several areas. The left side of the tab, is used to select between the DAC or
ADC filters and assist in the selection and calculating the desired filter coefficients. The right hand side of
the tab shows a frequency response plot of the digital effects filter selected and the coefficients that are
programmed into the device. The plots show the magnitude and phase response of each biquad section,
plus the combined responses of the two biquad filters. Note that the plot shows only the responses of the
effect filters, not the combined response of those filter along with the de-emphasis and ADC high-pass
filters.
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4.11.1 ADC Filters
4.11.1.1 High Pass Filter
Figure 16. ADC High Pass Filters
The TLV320AIC3104 ADC provides the option of enabling a high-pass filter, which helps to reduce the
effects of DC offsets in the system. The Figure 16 tab shows the options for programming various filter
associated with the ADC. The high-pass filter has two modes: standard and programmable.
The standard high-pass filter option (Figure 17) allows for the selection of the high-pass filter frequency
from several preset options that can be chosen with the Left ADC HP Filter and Right ADC HP Filter
controls. The four options for this setting are disabled, or three different corner frequencies which are
based on the ADC sample rate.
Figure 17. ADC High-Pass Filter Settings
For custom filter requirements, the programmable function allows custom coefficients to achieve a
different filter than provided by the preset filters. The controls for the programmable high-pass filter are
located under the Programmable Filters heading. The process should following the following steps:
1. Enter The filter coefficients can be entered in the HP Filter controls near the bottom of the tab.
2. Press the Download Coefficients button to download the coefficients to the codec registers.
3. Enable the Programmable High-Pass Filters by selecting the Left ADC and Right ADC buttons.
The programmable high-pass filter should now be correctly programmed and enabled. The ADC can now
be enabled with the high-pass filter.
4.11.1.2 Digital Effects Filter - ADC
The ADC digital outputs stream can be routed through the digital effects filter in the codec to allow custom
audio performance. The digital effects filter cannot operate on both the ADC or DAC at the same time.
The digital effects filter operation is discussed in Section 4.11.3
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4.11.2 DAC Filters
Figure 18. DAC Filters
4.11.2.1 De-emphasis Filters
The de-emphasis filters used in the TLV320AIC 3104 can be programmed as described in the
TLV320AIC3104 data sheet, using this tab (Figure 19). Enter the coefficients for the de-emphasis filter
response desired. While on this tab, the de-emphasis response will be shown on the Effect Filter
Response graph; however, note that this response is not included in graphs of other effect responses
when on the other filter design tabs.
Figure 19. De-emphasis Filters
4.11.2.2 DAC Digital Effects Filter
The digital audio input stream can be routed through the digital effects filter in the codec before routing to
the DAC to allow custom audio performance. The digital effects filter cannot operate on both the ADC or
DAC at the same time. The digital effects filter operation is discussed in Section 4.11.3
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4.11.3 Digital Effects Filters
The digital effect filters (the biquad filters) of the TLV320AIC3104 are selected using the check boxes
shown in Figure 20. The De-emphasis filters are described in the TLV320AIC3104 data sheet, and their
coefficients may be changed (see Figure 18).
Figure 20. Enabling Filters
When designing filters for use with TLV320AIC3104, the software allows for several different filter types to
be used. These options are shown on a tab control in the lower left corner of the screen. When a filter
type is selected, and suitable input parameters defined, the response will be shown in the Effect Filter
Response graph. Regardless of the setting for enabling the Effect Filter, the filter coefficients are not
loaded into the TLV320AIC3104 until the Download Coefficients button is pressed. To avoid noise during
the update of coefficients, it is recommended that the user uncheck the Effect Filter enable check boxes
before downloading coefficients. Once the desired coefficients are in the TLV320AIC3104, enable the
Effect Filters by checking the boxes again.
4.11.3.1 Shelf Filters
A shelf filter is a simple filter that applies a gain (positive or negative) to frequencies above or below a
certain corner frequency. As shown in Figure 21, in Bass mode a shelf filter applies a gain to frequencies
below the corner frequency; in Treble mode the gain is applied to frequencies above the corner frequency.
Figure 21. Shelf Filters
To use these filters, enter the gain desired and the corner frequency. Choose the mode to use (Bass or
Treble); the response will be plotted on the Effect Filter Response graph.
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4.11.3.2 EQ Filters
EQ, or parametric, filters can be designed on this tab (see Figure 22). Enter a gain, bandwidth, and a
center frequency (Fc). Either bandpass (positive gain) or band-reject (negative gain) filters can be created
Figure 22. EQ Filters
4.11.3.3 Analog Simulation Filters
Biquads are quite good at simulating analog filter designs. For each biquad section on this tab, enter the
desired analog filter type to simulate (Butterworth, Chebyshev, Inverse Chebyshev, Elliptic or Bessel).
Parameter entry boxes appropriate to the filter type will be shown (ripple, for example, with Chebyshev
filters, etc.). Enter the desired design parameters and the response will be shown. (See Figure 23.)
Figure 23. Analog Simulation Filters
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4.11.3.4 Preset Filters
Many applications are designed to provide preset filters common for certain types of program material.
This tab (see Figure 24) allows selection of one of four preset filter responses - Rock, Jazz, Classical, or
Pop.
Figure 24. Preset Filters
4.11.3.5 User Filters
If filter coefficients are known, they can be entered directly on this tab (see Figure 25) for both biquads for
both left and right channels. The filter response will not be shown on the Effect Filter Response graph for
user filters.
Figure 25. User Filters
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4.11.3.6 3D Effect
The 3D effect is described in the TLV320AIC3104 data sheet. It uses the two biquad sections differently
than most other effect filter settings. To use this effect properly, make sure the appropriate coefficients are
already loaded into the two biquad sections. The User Filters tab may be used to load the coefficients.
See Figure 26.
Figure 26. 3D Effect Settings
To enable the 3D effect, check the 3D Effect On box. The Depth knob controls the value of the 3D
Attenuation Coefficient.
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4.12 Output Stage Configuration Tab
Figure 27. Output Stage Configuration Tab
The Output Stage Configuration tab (Figure 27) allows for setting various features of the output drivers.
The Configuration control may be set as either Fully-Differential or Pseudo-Differential. This control is
used to determine if the output stage is being used to drive a fully differential output load or a output load
where one of the outputs if referenced to a common-mode voltage (pseudo-differential).
The output Coupling control can be chosen as either Capless or AC-coupled. This setting should
correspond to the setting of the hardware switch (SW1) on the TLV320AIC3104EVM.
The common mode voltage of the outputs may be set to 1.35 V, 1.5 V, 1.65 V, or 1.8 V using the
Common Mode Voltage control.
The TLV320AIC3104 offers several options to help reduce the turnon/off pop of the output amplifiers. The
Power-On Delay of the output drivers can be set using the corresponding control from 0's up to 4
seconds. Ramp-Up Step Timing can also be adjusted from 0ms to 4ms. The outputs can be set to
soft-step their volume changes, using the Output Volume Soft Stepping control, and set to step once per
Fs period, once per two Fs periods, or soft-stepping can be disabled altogether.
The high power outputs of the TLV320AIC3104 can be configured to go to a weak common-mode voltage
when powered down. The source of this weak common-mode voltage can be set on this tab with the
Weak Output CM Voltage Source drop-down. Choices for the source are either a resistor divider off the
AVDD_DAC supply, or a bandgap reference. See the data sheet for more details on this option.
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Headset detection features are enabled using the Enable button in the Headset Detection group box.
When enabled, the indicators in the HS/Button Detect group box will light when either a button press or
headset is detected. When a headset is detected, the type of headset is displayed in the Detection Type
indicator. Debounce times for detection are set using the Jack Detect Debounce and Button Press
Debounce controls, which offer debounce times in varying numbers of milliseconds. See the
TLV320AIC3104 data sheet for a discussion of headset detection.
Output short-circuit protection can be enabled in the Short Circuit Protection group box. Short Circuit
Protection can use a current-limit mode, where the drivers will limit current output if a short-circuit
condition is detected, or in a mode where the drivers will power down when such a condition exists.
The I2C Bus Error Detection button allows the user to enable circuitry which will set a register bit
(Register 107, D0) if an I2C bus error is detected.
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4.13 DAC/Line Outputs Tab
Figure 28. DAC/Line Outputs Tab
The DAC/Line Outputs tab controls the DAC power and volume, as well as routing of digital data to the
DACs and the analog line output from the DACs. (See Figure 28.)
4.13.1 DAC Controls
On the left side of this tab are controls for the left and right DACs.
In similar fashion as the ADC, the DAC controls are set up to allow powering of each DAC individually,
and setting the output level. Each channel's level can be set independently using the corresponding
Volume knob. Alternately, by checking the Slave to Right box, the left channel Volume can be made to
track the right channel Volume knob setting; checking the Slave to Left box causes the right channel
Volume knob to track the left Volume knob setting.
Data going to the DACs is selected using the drop-down boxes under the Left and Right DAC Datapath.
Each DAC channel can be selected to be off, use left channel data, use right channel data, or use a mono
mix of the left and right data.
Analog audio coming from the DACs is routed to outputs using the Output Path controls in each DAC
control panel. The DAC output can be mixed with the analog inputs (LINE2L, LINE2R, PGA_L, PGA_R)
and routed to the Line or High Power outputs using the mixer controls for these outputs on this tab (for the
line outputs) or on the High Power Outputs tab (for the high power outputs). If the DAC is to be routed
directly to either the Line or HP outputs, these can be selected as choices in the Output Path control.
Note that if the Line or HP outputs are selected as the Output Path, the mixer controls on this tab and the
High Power Output tabs have no effect.
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4.13.2 Line Output Mixers
On the right side of this tab are horizontal panels where the analog output mixing functions for the line
outputs are located.
Each line output master volume is controlled by the knob at the far right of these panels, below the line
output labels. The output amplifier gain can be muted or set at a value between 0 and 9 dB in 1-dB steps.
Power/Enabled status for the line output can also be controlled using the button below this master output
knob (Powered Up).
If the DAC Output Path control is set to Mix with Analog Inputs, the six knobs in each panel can be used
to set the individual level of signals routed and mixed to the line output. LINE2L, LINE2R, PGA_L, PGA_R,
and DAC_L and DAC_R levels can each be set to create a custom mix of signals presented to that
particular line output. Note: if the DAC Output Path control is set to anything other than Mix with Analog
Inputs, these controls have no effect.
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4.14 High-Power Outputs Tab
Figure 29. High-Power Outputs Tab
This tab contains four horizontal groupings of controls, one for each of the high power outputs. Each
output has a mixer to mix the LINE2L, LINE2R, PGA_L, PGA_R, DAC_L and DAC_R signals, assuming
that the DACs are not routed directly to the high power outputs (see Section 4.13).
At the left of each output strip is a Powered Up button that controls whether the corresponding output is
powered up or not. The When powered down button allows the outputs to be tri-stated or driven weakly
to a the output common mode voltage.
The HPxCOM outputs (HPLCOM and HPRCOM) can be used as independent output channels or can be
used as complementary signals to the HPLOUT and HPROUT outputs. In these complementary
configurations, the HPxCOM outputs can be selected as Differential of HPxOUT signals to the
corresponding outputs or may be set to be a common mode voltage (Constant VCM Out. When used in
these configurations, the Powered Up button for the HPxCOM output is disabled, as the power mode for
that output will track the power status of the HPL or HPR output that the COM output is tracking.
The HPRCOM Config selector allows a couple additional options compared to the HPLCOM Config
selector. Differential of HPLCOM allows the HPRCOM to be the complementary signal of HPLCOM for
driving a differential load between the HPxCOM outputs. The selector also allows Ext.
Feedback/HPLCOM constant VCM as an option. This option is used when the high power outputs are
configured for Capless output drive, where HPLCOM is configured as Constant VCM Out. The feedback
option provides feedback to the output and lowers the output impedance of HPLCOM.
At the right side of the output strip is a master volume knob for that output, which allows the output
amplifier gain to be muted or set from 0 to 9 dB in 1-dB steps.
34
TLV320AIC3104EVM and TLV320AIC3104EVM-PDK
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TLV320AIC3104EVM Software
4.15 Command Line Interface Tab
A simple scripting language controls the TAS1020 on the USB-MODEVM from the LabView™-based PC
software. The main program controls, described previously, do nothing more than write a script which is
then handed off to an interpreter that sends the appropriate data to the correct USB endpoint. Because
this system is script-based, provision is made in this tab for the user to view the scripting commands
created as the controls are manipulated, as well as load and execute other scripts that have been written
and saved (see Figure 30). This design allows the software to be used as a quick test tool or to help
provide troubleshooting information in the rare event that the user encounters problem with this EVM.
Figure 30. Command Line Interface Tab
A script is loaded into the command buffer, either by operating the controls on the other tabs or by loading
a script file. When executed, the return packets of data which result from each command will be displayed
in the Read Data array control. When executing several commands, the Read Data control shows only the
results of the last command. To see the results after every executed command, use the logging function
described below.
The File menu (Figure 31) provides some options for working with scripts. The first option, Open
Command File..., loads a command file script into the command buffer. This script can then be executed
by pressing the Execute Command Buffer button.
The second option is Log Script and Results..., which opens a file save dialog box. Choose a location for a
log file to be written using this file save dialog. When the Execute Command Buffer button is pressed, the
script will run and the script, along with resulting data read back during the script, will be saved to the file
specified. The log file is a standard text file that can be opened with any text editor, and looks much like
the source script file, but with the additional information of the result of each script command executed.
SLAU218–August 2007
TLV320AIC3104EVM and TLV320AIC3104EVM-PDK
35
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TLV320AIC3104EVM Software
The third menu item is a submenu of Recently Opened Files. This is simply a list of script files that have
previously been opened, allowing fast access to commonly-used script files. The final menu item is Exit,
which terminates the TLV320AIC3104EVM software.
Figure 31. File Menu
Under the Help menu is an About... menu item which displays information about the TLV320AIC3104EVM
software.
The actual USB protocol used as well as instructions on writing scripts are detailed in the following
subsections. While it is not necessary to understand or use either the protocol or the scripts directly,
understanding them may be helpful to some users.
36
TLV320AIC3104EVM and TLV320AIC3104EVM-PDK
SLAU218–August 2007
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Appendix A
Appendix A EVM Connector Descriptions
This appendix contains the connection details for each of the main header connectors on the EVM.
A.1 Analog Interface Connectors
A.1.1
Analog Dual-Row Header Details (J13 and J14)
For maximum flexibility, the TLV320AIC3104EVM is designed for easy interfacing to multiple analog
sources. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient
10-pin dual row header/socket combination at J13 and J14. These headers/sockets provide access to the
analog input and output pins of the device. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9
for a variety of mating connector options. Table A-1 summarizes the analog interface pinout for the
TLV320AIC3104EVM..
Table A-1. Analog Interface Pinout
PIN NUMBER
J13.1
SIGNAL
HPLCOM
HPLOUT
HPRCOM
HPROUT
LINE1LM
LINE1LP
LINE1RM
LINE1RP
AGND
DESCRIPTION
High-Power Output Driver (Left Minus or Multifunctional)
High-Power Output Driver (Left Plus)
High-Power Output Driver (Right Minus or Multifunctional)
High-Power Output Driver (Right Plus)
MIC1 or LINE1 Analog Input (Left Minus or Multifunctional)
MIC1 or LINE1 Analog Input (Left Plus or Multifunctional)
MIC1 or LINE1 Analog Input (Right Minus or Multifunctional)
MIC1 or LINE1 Analog Input (Right Plus or Multifunctional)
Analog Ground
J13.2
J13.3
J13.4
J13.5
J13.6
J13.7
J13.8
J13.9
J13.10
J13.11
J13.12
J13.13
J13.14
J13.15
J13.16
J13.17
J13.18
J13.19
J13.20
J14.1
MIC3L
MIC3 Input (Left or Multifunctional)
Analog Ground
AGND
MIC3R
MIC3 Input (Right or Multifunctional)
Analog Ground
AGND
MICBIAS
NC
Microphone Bias Voltage Output
Not Connected
MICDET
AGND
Microphone Detect
Analog Ground
NC
Not Connected
AGND
Analog Ground
NC
Not Connected
LINE2RM
LINE2RP
LINE2LM
LINE2RP
MONO_LOP
MONO_LOM
LEFT_LOP
LEFT_LOM
AGND
MIC2 or LINE2 Analog Input (Right Minus or Multifunctional)
MIC2 or LINE2 Analog Input (Right Plus or Multifunctional)
MIC2 or LINE2 Analog Input (Left Minus or Multifunctional)
MIC2 or LINE2 Analog Input (Left Plus or Multifunctional)
Mono-Line Output (Plus)
J14.2
J14.3
J14.4
J14.5
J14.6
Mono-Line Output (Minus)
J14.7
Left-Line Output (Plus)
J14.8
Left-Line Output (Minus)
J14.9
Analog Ground
J14.10
J14.11
J14.12
J14.13
J14.14
J14.15
J14.16
RIGHT_LOP
AGND
Right-Line Output (Plus)
Analog Ground
RIGHT_LOM
AGND
Right-Line Output (Minus)
Analog Ground
NC
Not Connected
NC
Not Connected
NC
Not Connected
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Analog Interface Connectors
Table A-1. Analog Interface Pinout (continued)
PIN NUMBER
J14.17
SIGNAL
DESCRIPTION
Analog Ground
Not Connected
Analog Ground
Not Connected
AGND
NC
J14.18
J14.19
AGND
NC
J14.20
A.1.2
Analog Screw Terminal Details (J1-5 and J8-12)
In addition to the analog headers, the analog inputs and outputs can also be accessed through alternate
connectors, either screw terminals or audio jacks. The stereo microphone input is also tied to J6 and the
stereo headphone output (the HP set of outputs) is available at J7.
Table A-2 summarizes the screw terminals available on the TLV320AIC3104EVM.
Table A-2. Alternate Analog Connectors
DESIGNATOR
PIN 1
PIN 2
PIN3
J1
LINE1LP
LINE1LM
LINE1RM
LINE2LM
LINE2RM
J2
LINE1RP
J3
LINE2LP
J4
LINE2RP
J5
MIC3 IN LEFT
MONO OUT -
LEFT OUT -
RIGHT OUT -
(+) HPLOUT
(+) HPROUT
MIC3 IN RIGHT AGND
MONO OUT +
LEFT OUT +
J8
J9
J10
J11
J12
RIGHT OUT +
(-) HPLCOM
(-) HPRCOM
38
EVM Connector Descriptions
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Digital Interface Connectors (J16 and J17)
A.2 Digital Interface Connectors (J16 and J17)
The TLV320AIC3104EVM is designed to easily interface with multiple control platforms. Samtec part
numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin dual row
header/socket combination at J16 and J17. These headers/sockets provide access to the digital control
and serial data pins of the device. Consult Samtec at www.samtec.com or call 1-800- SAMTEC-9 for a
variety of mating connector options. Table A-3 summarizes the digital interface pinout for the
TLV320AIC3104EVM.
Table A-3. Digital Interface Pinout
PIN NUMBER
J16.1
SIGNAL
NC
DESCRIPTION
Not Connected
J16.2
GPIO1
SCLK
DGND
NC
General-Purpose Input/Output #1
SPI Serial Clock
J16.3
J16.4
Digital Ground
J16.5
Not Connected
J16.6
GPIO2
/SS
General Purpose Input/Output #2
SPI Chip Select
J16.7
J16.8
RESET INPUT
NC
Reset signal input to AIC33EVM
Not Connected
J16.9
J16.10
J16.11
J16.12
J16.13
J16.14
J16.15
J16.16
J16.17
J16.18
J16.19
J16.20
J17.1
DGND
MOSI
SPI SELECT
MISO
AIC33 RESET
NC
Digital Ground
SPI MOSI Slave Serial Data Input
Select Pin (SPI vs I2C Control Mode)
SPI MISO Slave Serial Data Output
Reset
Not Connected
I2C Serial Clock
SCL
NC
Not Connected
DGND
NC
Digital Ground
Not Connected
I2C Serial Data Input/Output
SDA
NC
Not Connected
J17.2
NC
Not Connected
J17.3
BCLK
DGND
NC
Audio Serial Data Bus Bit Clock (Input/Output)
Digital Ground
J17.4
J17.5
Not Connected
J17.6
NC
Not Connected
J17.7
WCLK
NC
Audio Serial Data Bus Word Clock (Input/Output)
Not Connected
J17.8
J17.9
NC
Not Connected
J17.10
J17.11
J17.12
J17.13
J17.14
J17.15
J17.16
J17.17
J17.18
J17.19
J17.20
DGND
DIN
Digital Ground
Audio Serial Data Bus Data Input (Input)
Not Connected
NC
DOUT
NC
Audio Serial Data Bus Data Output (Output)
Not Connected
NC
Not Connected
I2C Serial Clock
SCL
MCLK
DGND
NC
Master Clock Input
Digital Ground
Not Connected
I2C Serial Data Input/Output
SDA
SLAU218–August 2007
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Power Supply Connector Pin Header, J15
Note that J17 comprises the signals needed for an I2S™ serial digital audio interface; the control interface
(I2C™ and RESET) signals are routed to J16. I2C is actually routed to both connectors; however, the
device is connected only to J16.
A.3 Power Supply Connector Pin Header, J15
J15 provides connection to the common power bus for the TLV320AIC3104EVM. Power is supplied on the
pins listed in Table A-4.
Table A-4. Power Supply Pinout
SIGNAL
PIN NUMBER
SIGNAL
NC J15.1
J15.2 NC
+5VA J15.3
DGND J15.5
J15.4 NC
J15.6 AGND
J15.8 NC
DVDD (1.8V) J15.7
IOVDD (3.3V) J15.9
J15.10 NC
The TLV320AIC3104EVM-PDK motherboard (the USB-MODEVM Interface board) supplies power to J15
of the TLV320AIC3104EVM. Power for the motherboard is supplied either through its USB connection or
via terminal blocks on that board.
40
EVM Connector Descriptions
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Appendix B
Appendix B TLV320AIC3104EVM Schematic
The schematic diagram for the modular TLV320AIC3104EVM is provided as a reference.
SLAU218–August 2007
TLV320AIC3104EVM Schematic
41
Submit Documentation Feedback
1
2
3
4
5
6
Revision History
ECN Number
REV
Approved
TP9
DOUT
DOUT
DIN
JMP5
IOVDD
TP19
HPROUT
1
2
J9
TP10
DIN
DVDD
SW1
D
C
B
A
D
C
B
A
C21
C22
47uF
JMP6
TP11
WCLK
C9
SJ1-3515-SMT
WCLK
TP20
C10
HEADSET OUTPUT
0.1uF
C20
HPLOUT
47uF
TP12
BCLK
0.1uF
BCLK
MCLK
C14
10uF
10uF
ESW_EG4208
2
JMP7
JMP8
DRVDD
TP3
IN1LP
1
1
2
2
JMP11
TP13
MCLK
1
C11
J6
HPLOUT
J12
HPLOUT
C23
R10
100
IN1LP
IN1LM
0.1uF
C3
C7
C8
3
2
1
IN1L
IN1R
TP25
HPLCOM
C29
TP30
PLUS
1
2
3
0.1uF
0.1uF
10uF
47uF
C24
FLP
AVDD_DAC
47nF
MINUS
R11
100
TP31
47uF
JMP13
C12
JMP12
TP4
IN1LM
1
2
C30
1
1
2
2
IN1L
J14
0.1uF
HPCOM
HPLCOM
JMP14
C4
FLC
HPL OUT
HPLCOM
TP28
IN1RP
47nF
10uF
HPROUT
J13
HPROUT
C25
R12
100
TP32
U3
IN1RP
IN1RM
C27
C28
3
2
1
IN2L
IN2R
C31
PLUS
1
2
3
0.1uF
0.1uF
10
11
TP26
HPRCOM
47uF
C26
IN1LP
IN1LM
FRP
19
20
23
22
47nF
HPLOUT
HPLCOM
HPROUT
HPRCOM
MINUS
R13
100
47uF
JMP15
TP29
IN1RM
12
13
C32
IN1RP
IN1RM
1
2
TP33
IN1R
J7
TP27
HPRCOM
27
28
29
30
FRC
HPR OUT
+3.3VA
LEFT_LOP
LEFT_LOM
RIGHT_LOP
RIGHT_LOM
47nF
LEFT+
HPRCOM
1
2
3
IN2L
R14
100
R4
NI
14
16
15
IN2L
IN2R
MICBIAS
LEFT_LOP
J10
TP22
LEFT-
C33
47nF
IN2R
C13
10uF
PLUS
1
2
TP5
MICBIAS
R15
100
MINUS
TLV320AIC3104IRHB
TP21
DRVSS
C15
NI
JMP10
IN2
C34
47nF
LEFT OUT
LEFT_LOM
1
2
3
TP14
AVSS
TP23
RIGHT+
MICBIAS
MIC BIAS SEL
RIGHT_LOP
J11
R16
100
PLUS
1
R5
2.2K
R6
2.2K
TP7
TP8
IN2R
TP15
C35
47nF
IN2L
IOVDD
TP24
RIGHT-
RESET
RESET
R9
MINUS
2
C18
C16
R7
J8
RIGHT OUT
100K
0
0.1uF
C19
NI
R17
100
C17
SCL
R2
RIGHT_LOM
TP16
SCL
R8
C36
47nF
0
0.1uF
NI
SJ1-3515-SMT
EXT MIC IN
2.7K
R3
IN2L
TP17
SDA
2.7K
SDA
IN2R
JMP3
JMP4
C15, C16, and C17
are not installed, but
can be used to filter
noise.
MK1
ti
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
MD9745APZ-F
MICROPHONE
DATA ACQUISITION PRODUCTS
HIGH PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
TITLE
ENGINEER RICK DOWNS
TLV320AIC3104EVM
DRAWN BY BOB BENJAMIN
DOCUMENT CONTROL NO. 6487968
SIZE
A
DATE 29-Nov-2006
REV A
SHEET
1
OF
2
FILE
1
2
3
4
5
6
1
2
3
4
5
6
REVISION HISTORY
ENGINEERING CHANGE NUMBER
REV
APPROVED
D
C
B
A
D
C
B
A
J1
A0(-)
A1(-)
A2(-)
J4
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
HPLOUT
HPROUT
IN1LM
IN1RM
IN2L
HPLCOM
HPRCOM
IN1LP
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REF-
REF+
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
JMP9
1
2
A3(-)
RESET
IN1RP
AGND
AGND
AGND
VCOM
AGND
AGND
IN2R
INT
TOUT
GPIO5
MICBIAS
DGND
SDA
DAUGHTER-SERIAL
DAUGHTER-ANALOG
J4A (TOP) = SAM_TSM-110-01-L-DV-P
J4B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
J1A (TOP) = SAM_TSM-110-01-L-DV-P
J1B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
TP6 TP18
TP1
AGND
TP2
DGND
JMP1
RESET
1
2
+3.3VA
AVDD_DAC
+5VA
U1
REG1117-3.3
DRVDD
3
2
VIN
VOUT
SCL
SDA
C1
10uF
C5
C2
10uF
0.1uF
DOUT
DIN
WCLK
BCLK
J2
J5
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
2
4
6
8
10
12
14
16
18
20
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
A0(+)
CNTL
CLKX
CLKR
FSX
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REF-
REF+
LEFT_LOP
LEFT_LOM
RIGHT_LOP
RIGHT_LOM
FSR
11
13
15
17
19
DX
DR
INT
TOUT
GPIO5
MCLK
DGND
SDA
+5VA
DAUGHTER-SERIAL
DAUGHTER-ANALOG
J3
+VA
J5A (TOP) = SAM_TSM-110-01-L-DV-P
J5B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
1
3
5
7
9
2
4
6
8
-VA
J2A (TOP) = SAM_TSM-110-01-L-DV-P
J2B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+5VA
-5VA
AGND
VD1
U2
IOVDD
DGND
+1.8VD
+3.3VD
8
VCC
VSS
10
R1
2.7K
+5VD
C6
0.1uF
DVDD
DAUGHTER-POWER
4
J3A (TOP) = SAM_TSM-105-01-L-DV-P
J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
IOVDD
24AA64I/SN
JMP16
IOVDD
JMP2
ti
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
DATA ACQUISITION PRODUCTS
HIGH-PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
TITLE
SIZE
ENGINEER RICK DOWNS
DRAWN BY BOB BENJAMIN
TLV320AIC3104EVM INTERFACE
DOCUMENT CONTROL NO. 6487968
SHEET OF FILE
B
DATE 29-Nov-2006
REV A
2
2
1
2
3
4
5
6
www.ti.com
Appendix C
Appendix C TLV320AIC3104EVM Layout Views
Figure C-1. Assembly layer
Figure C-2. Top Layer
42
TLV320AIC3104EVM Layout Views
SLAU218–August 2007
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Appendix C
Figure C-3. Layer 3
Figure C-4. Layer 4
SLAU218–August 2007
TLV320AIC3104EVM Layout Views
43
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Appendix C
Figure C-5. Silk Screen
Figure C-6. Bottom Layer
44
TLV320AIC3104EVM Layout Views
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Appendix D
Appendix D TLV320AIC3104EVM Bill of Materials
The complete bill of materials for the modular TLV320AIC3104EVM is provided as a reference.
Table D-1. TLV320AIC3104EVM Bill of Materials
QTY
2
Value
0
Ref Des
R7, R8
Description
Manufacturer
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Mfr Part Number
1/4W 5% Chip Resistor
ERJ-8GEY0R00V
ERJ-3EKF1000V
ERJ-8GEYJ222V
ERJ-3GEYJ272V
ERJ-3GEYJ104V
8
100
R10–R17
R5, R6
1/10W 1% Chip Resistor
1/4W 5% Chip Resistor
2
2.2k
2.7K
100K
NI
3
R1, R2, R3
R9
1/10W 5% Chip Resistor
1/10W 5% Chip Resistor
Chip Resistor
1
1
R4
8
47 nF
0.1 μF
0.1 μF
C29–C36
C5, C6, C9–C12
50V Ceramic chip capacitor, ±10%, X7R
16V Ceramic Chip Capacitor, ±10%, X7R
100V Ceramic Chip Capacitor, ±10%, X7R
TDK
TDK
TDK
C1608X7R1H473K
C1608X7R1C104K
C3216X7R2A104K
6
6
C7, C8, C18, C19, C27,
C28
7
6
2
1
1
1
1
2
5
2
10 μF
47 μF
NI
C1–C4, C13, C14, C20
6.3V Ceramic Chip Capacitor, ±10%, X5R
6.3V Ceramic Chip Capacitor, ±20%, X5R
Ceramic Chip Capacitor
TDK
TDK
C3216X5R0J106K
C3225X5R0J476M
C21–C26
C16, C17
C15
NI
Ceramic Chip Capacitor
U3
Audio Codec
Texas Instruments
Texas Instruments
MicroChip
TLV320AIC3104IRHB
REG1117-3.3
U1
3.3V LDO Voltage Regulator
64K I2C EEPROM
U2
24AA64-I/SN
J10, J11
J6, J7, J12–J14
J8, J9
Screw Terminal Block, 2 Position
Screw Terminal Block, 3 Position
3,5 mm Audio Jack, T-R-S, SMD
On Shore Technology
On Shore Technology
CUI Inc.
ED555/2DS
ED555/3DS
SJ1-3515-SMT
161-3335-E
or alternate KobiConn
4
4
J1A, J2A, J4A, J5A
20 Pin SMT Plug
Samtec
TSM-110-01-L-DV-P
SSW-110-22-F-D-VS-K
TSM-105-01-L-DV-P
SSW-105-22-F-D-VS-K
6487967
J1B, J2B, J4B, J5B
20 pin SMT Socket
Samtec
1
J3A
J3B
N/A
10 Pin SMT Plug
Samtec
1
10 pin SMT Socket
Samtec
1
TLV320AIC3104EVM PWB
2 Position Jumper, 0.1" spacing
Texas Instruments
Samtec
10
JMP1–JMP4, JMP9,
JMP11–JMP15
TSW-102-07-L-S
4
2
1
JMP5–JMP8
JMP10, JMP16
MK1
Bus Wire (18-22 Gauge)
3 Position Jumper, 0.1" spacing
Omnidirectional Microphone Cartridge
Samtec
Knowles Acoustics
alternate Knowles Acoustics
E-Switch
TSW-103-07-L-S
MD9745APZ-F
MD9745APA-1
EG4208
1
SW1
4PDT Right Angle Switch
31
Not
TP3–TP33
Miniature Test Point Terminal
Keystone Electronics
5000
Installed
2
TP1, TP2
N/A
Multipurpose Test Point Terminal
Header Shorting Block
Keystone Electronics
Samtec
5011
12
SNT-100-BK-T
ATTENTION: All components should be RoHS compliant. Some part number may be either leaded or RoHS. Verify purchased components are RoHS
compliant.
SLAU218–August 2007
TLV320AIC3104EVM Bill of Materials
45
Submit Documentation Feedback
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Appendix E
Appendix E USB-MODEVM Schematic
The schematic diagram for USB-MODEVM Interface Board (included only in the
TLV320AIC3104EVM-PDK) is provided as a reference.
46
USB-MODEVM Schematic
SLAU218–August 2007
Submit Documentation Feedback
1
2
3
4
5
6
REVISION HISTORY
ENGINEERING CHANGE NUMBER
REV
APPROVED
IOVDD
IOVDD
4
C28
1uF
IOVDD
+3.3VD
R5
+3.3VD
C22
J10
EXT MCLK
U10
2
Q1
D
C
B
A
D
C
B
A
ZXMN6A07F
1uF
14
RA1
10K
U3
R20
R3
TP9
2
5
9
12
1
4
10
13
75
2.7K
2.7K
1A
2A
3A
4A
1OE
2OE
3OE
4OE
VCC
SN74LVC1G125DBV
SDA
SW2
3
6
8
11
1Y
2Y
3Y
4Y
A0
A1
A2
16
15
14
1
2
3
4
5
6
7
8
J6
USB MCK
USB I2S
MCLK
I2SDIN
BCLK
2
4
1
3
Q2
ZXMN6A07F
USB I2S 13
USB MCK 12
USB SPI 11
USB RST 10
7
GND
EXTERNAL I2C
SN74LVC125APW
IOVDD
LRCLK
+3.3VD
+3.3VD
EXT MCK
9
I2SDOUT
J14
C23
1uF
SCL
U1
1
3
5
7
9
2
4
6
8
10
12
SW DIP-8
R6
2.7K
8
VCC
U5
C9
1uF
TP10
4
2
4
X1
C18
C19
VSS
11
SN74LVC1G07DBV
+3.3VD
R7
IOVDD
C26
EXTERNAL AUDIO DATA
33pF
33pF
24LC64I/SN
MA-505 6.000M-C0
6.00 MHZ
PWR_DWN
1uF
U7
2.7K
U8
TAS1020BPFB
4
2
MISO
MOSI
SS
SN74LVC1G07DBV
C20
100pF
J7 USB SLAVE CONN
46
31
30
29
27
26
25
24
23
8
XTALO
XTALI
PLLFILI
PLLFILO
MCLKI
PUR
DP
DM
DVSS
DVSS
DVSS
AVSS
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
DVDD
DVDD
DVDD
AVDD
47
48
1
3
5
6
7
4
JMP8
1
IOVDD
C27
1uF
14
4
3
2
1
C21
GND
D+
D-
2
2
2
2
SCLK
RESET
R9
R12
P1.3
JMP9
1
1.5K
R10
3.09K
.001uF
VCC
P1.2
P1.1
P1.0
U4
JMP10
1
2
5
9
12
1
4
J15
1A
2A
3A
4A
1OE
2OE
3OE
4OE
VCC
27.4
897-30-004-90-000000
1
3
5
7
9
2
4
6
8
10
3
6
8
11
16
28
45
21
33
2
JMP11
1
1Y
2Y
3Y
4Y
R11
27.4
C13
47pF
C14
47pF
+3.3VD
10
13
11
12
7
GND
EXTERNAL SPI
C24
1uF
C10
1uF
C11
1uF
C12
1uF
SN74LVC125APW
USB RST
USB SPI
TP11
JMP12
MRESET
+3.3VD
1
2
2
2
USB ACTIVE
P3.5
P3.4
P3.3
JMP13
1
D2
R13
649
+3.3VD
R8
JMP14
1
SML-LX0603YW-TR
YELLOW
IOVDD
C25
1uF
U6
2.7K
4
2
INT
J8
SN74LVC1G07DBV
ED555/2DS
EXT PWR IN
+5VD
+1.8VD
R14
390
R4
10
U9
C7
R17
5
6
4
28
1IN
1IN
1EN
1RESET
100K
D3
6VDC-10VDC IN
10uF
24
23
SML-LX0603GW-TR
GREEN
JMP6
PWR SELECT
1OUT
1OUT
D5
3
9
SML-LX0603IW-TR
RED
1GND
2GND
R18
100K
22
2RESET
U2
+3.3VD
D1
REG1117-5
J9
10
11
12
18
17
3
2
2EN
2IN
2IN
2OUT
2OUT
VIN
VOUT
R19
220
DL4001
R15
10K
R16
10K
C15
0.1uF
C16
0.33uF
C6
10uF
C8
10uF
TPS767D318PWP
CUI-STACK PJ102-B
2.5 MM
D4
!"
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
SML-LX0603GW-TR
GREEN
SW1
+5VD
IOVDD
TP6
C17
0.33uF
1
2
4
3
1.8VD ENABLE
3.3VD ENABLE
DATA ACQUISITION PRODUCTS
JMP7
+3.3VD
+1.8VD
HIGH PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
1
3
5
2
4
6
REGULATOR ENABLE
TITLE
SIZE
IOVDD SELECT
ENGINEER RICK DOWNS
USB-MODEVM INTERFACE
DRAWN BY ROBERT BENJAMIN
DOCUMENT CONTROL NO. 6463996
B
DATE 28-Oct-2004
REV B
SHEET
1
OF
2
FILE D:\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\USB Interface
1
2
3
4
5
6
1
2
3
4
5
6
REVISION HISTORY
ENGINEERING CHANGE NUMBER
REV
APPROVED
D
C
B
A
D
C
B
A
J11
J12
JMP5
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REF-
REF+
CNTL
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
DGND
SDA
J13A (TOP) = SAM_TSM-105-01-L-DV-P
+5VA
J13B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
DAUGHTER-SERIAL
DAUGHTER-ANALOG
J13
1
3
5
7
9
2
4
6
8
-5VA
J11A (TOP) = SAM_TSM-110-01-L-DV-P
J11B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+VA
-VA
-5VA
AGND
SCLK
SS
+5VA
DGND
+1.8VD
+5VA
+5VD
VD1
10
P3.3
+3.3VD +5VD
JMP1
1
J12A (TOP) = SAM_TSM-110-01-L-DV-P
J12B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
P3.4
2
DAUGHTER-POWER
TP8
P3.5
TP7
AGND
JPR-2X1
DGND
+5VD
P1.0
JMP2
1
RESET
PWR_DWN
2
IOVDD
JMP3
-5VA
+5VA
+5VD
INT
C1
C2
C3
JMP4
R1
TP1
TP2
TP3
TP4
+3.3VD
MISO
MOSI
10uF
10uF
10uF
SCL
R21
390
R22
390
2.7K
+1.8VD
J1
-5VA
J2
+5VA
J3
+5VD
R2
C4
C5
10uF
TP5
SDA
2.7K
D6
D7
10uF
SML-LX0603GW-TR
GREEN
SML-LX0603GW-TR
GREEN
I2SDOUT
I2SDIN
LRCLK
BCLK
J4
+1.8VD
J5
+3.3VD
J21
J22
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REF-
REF+
CNTL
CLKX
CLKR
FSX
FSR
DX
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
P1.1
P1.2
P1.3
DR
INT
MCLK
TOUT
GPIO5
DGND
SDA
+5VA
DAUGHTER-SERIAL
J22A (TOP) = SAM_TSM-110-01-L-DV-P
DAUGHTER-ANALOG
J23
1
3
5
7
9
2
4
6
8
-5VA
+VA
-VA
J22B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
J21A (TOP) = SAM_TSM-110-01-L-DV-P
J21B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+5VA
DGND
+1.8VD
-5VA
AGND
VD1
10
+3.3VD +5VD
DAUGHTER-POWER
+3.3VD
+1.8VD
+5VD
J23A (TOP) = SAM_TSM-105-01-L-DV-P
J23B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
!"
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
DATA ACQUISITION PRODUCTS
HIGH-PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
TITLE
ENGINEER RICK DOWNS
USB-MODEVM INTERFACE
DRAWN BY ROBERT BENJAMIN
DOCUMENT CONTROL NO. 6463996
SIZE
B
DATE 28-Oct-2004
REV B
SHEET
2
OF
2
FILE D:\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\Daughtercard Interface
1
2
3
4
5
6
www.ti.com
Appendix F
Appendix F USB-MODEVM Bill of Materials
The complete bill of materials for USB-MODEVM Interface Board (included only in the
TLV320AIC3104EVM-PDK) is provided as a reference.
Table F-1. USB-MODEVM Bill of Materials
Designators
R4
Description
Manufacturer
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
CTS Corporation
TDK
Mfr Part Number
10Ω 1/10W 5% Chip Resistor
27.4Ω 1/16W 1% Chip Resistor
75Ω 1/4W 1% Chip Resistor
ERJ-3GEYJ1300V
ERJ-3EKF27R4V
ERJ-14NF75R0U
ERJ-3GEYJ221V
ERJ-3GEYJ391V
ERJ-3EKF6490V
ERJ-3GEYJ1352V
ERJ-3GEYJ272V
ERJ-3EKF3091V
ERJ-3GEYJ1303V
ERJ-3GEYJ1304V
742C163103JTR
C1608C0G1H330J
C1608C0G1H470J
C1608C0G1H101J
C1608C0G1H102J
C1608X7R1C104K
C1608X5R1C334K
C1608X5R0J1305K
C3216X5R0J1306K
DL4001
R10, R11
R20
R19
220Ω 1/10W 5% Chip Resistor
390Ω 1/10W 5% Chip Resistor
649Ω 1/16W 1% Chip Resistor
1.5KΩ 1/10W 5% Chip Resistor
2.7KΩ 1/10W 5% Chip Resistor
3.09KΩ 1/16W 1% Chip Resistor
10KΩ 1/10W 5% Chip Resistor
100kΩ 1/10W 5%Chip Resistor
10KΩ 1/8W Octal Isolated Resistor Array
33pF 50V Ceramic Chip Capacitor, ±5%, NPO
47pF 50V Ceramic Chip Capacitor, ±5%, NPO
100pF 50V Ceramic Chip Capacitor, ±5%, NPO
1000pF 50V Ceramic Chip Capacitor, ±5%, NPO
0.1μF 16V Ceramic Chip Capacitor, ±10%, X7R
0.33μF 16V Ceramic Chip Capacitor, ±20%, Y5V
1μF 6.3V Ceramic Chip Capacitor, ±10%, X5R
10μF 6.3V Ceramic Chip Capacitor, ±10%, X5R
50V, 1A, Diode MELF SMD
R14, R21, R22
R13
R9
R1–R3, R5–R8
R12
R15, R16
R17, R18
RA1
C18, C19
C13, C14
C20
TDK
TDK
C21
TDK
C15
TDK
C16, C17
C9–C12, C22–C28
C1–C8
D1
TDK
TDK
TDK
Micro Commercial Components
Lumex
D2
Yellow Light Emitting Diode
SML-LX0603YW-TR
SML-LX0603GW-TR
SML-LX0603IW-TR
ZXMN6A07F
D3– D7
D5
Green Light Emitting Diode
Lumex
Red Light Emitting Diode
Lumex
Q1, Q2
X1
N-Channel MOSFET
Zetex
6MHz Crystal SMD
Epson
MA-505 6.000M-C0
TAS1020BPFB
U8
USB Streaming Controller
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Microchip
U2
5V LDO Regulator
REG1117-5
U9
3.3V/1.8V Dual Output LDO Regulator
Quad, 3-State Buffers
TPS767D318PWP
SN74LVC125APW
SN74LVC1G07DBVR
SN74LVC1G125DBVR
24LC64I/SN
U3, U4
U5–U7
U10
Single IC Buffer Driver with Open Drain o/p
Single 3-State Buffer
64K 2-Wire Serial EEPROM I2C
USB-MODEVM PCB
U1
Texas Instruments
Keystone Electronics
Keystone Electronics
Mill-Max
6463995
TP1–TP6, TP9–TP11
Miniature test point terminal
5000
TP7, TP8
Multipurpose test point terminal
USB Type B Slave Connector Thru-Hole
2-position terminal block
5011
J7
897-30-004-90-000000
ED555/2DS
J13, J2–J5, J8
On Shore Technology
CUI Stack
AMP/Tyco
Samtec
J9
2.5mm power connector
PJ-102B
J130
BNC connector, female, PC mount
20-pin SMT plug
414305-1
J131A, J132A, J21A, J22A
J131B, J132B, J21B, J22B
J133A, J23A
J133B, J23B
J6
TSM-110-01-L-DV-P
SSW-110-22-F-D-VS-K
TSM-105-01-L-DV-P
SSW-105-22-F-D-VS-K
TSW-102-07-L-D
TSW-106-07-L-D
20-pin SMT socket
Samtec
10-pin SMT plug
Samtec
10-pin SMT socket
Samtec
4-pin double row header (2x2) 0.1"
12-pin double row header (2x6) 0.1"
Samtec
J134, J135
Samtec
SLAU218–August 2007
USB-MODEVM Bill of Materials
47
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Appendix F
Table F-1. USB-MODEVM Bill of Materials (continued)
Designators
JMP1–JMP4
JMP8–JMP14
JMP5, JMP6
JMP7
Description
Manufacturer
Samtec
Mfr Part Number
2-position jumper, 0.1" spacing
2-position jumper, 0.1" spacing
3-position jumper, 0.1" spacing
3-position dual row jumper, 0.1" spacing
SMT, half-pitch 2-position switch
SMT, half-pitch 8-position switch
Jumper plug
TSW-102-07-L-S
TSW-102-07-L-S
TSW-103-07-L-S
TSW-103-07-L-D
TDA02H0SK1
Samtec
Samtec
Samtec
SW1
C&K Division, ITT
C&K Division, ITT
Samtec
SW2
TDA08H0SK1
SNT-100-BK-T
48
USB-MODEVM Bill of Materials
SLAU218–August 2007
Submit Documentation Feedback
www.ti.com
Appendix G
Appendix G USB-MODEVM Protocol
G.1 USB-MODEVM Protocol
The USB-MODEVM is defined to be a Vendor-Specific class, and is identified on the PC system as an
NI-VISA device. Because the TAS1020 has several routines in its ROM which are designed for use with
HID-class devices, HID-like structures are used, even though the USB-MODEVM is not an HID-class
device. Data is passed from the PC to the TAS1020 using the control endpoint.
Data is sent in an HIDSETREPORT (see Table G-1):
Table G-1. USB Control Endpoint
HIDSETREPORT Request
Part
Value
Description
bmRequestType
bRequest
wValue
0x21
00100001
0x09
SET_REPORT
don't care
0x00
wIndex
0x03
HID interface is index 3
wLength
Data
calculated by host
Data packet as described below
The data packet consists of the following bytes, shown in Table G-2:
Table G-2. Data Packet Configuration
BYTE NUMBER
TYPE
DESCRIPTION
0
Interface
Specifies serial interface and operation. The two values are logically ORed.
Operation:
READ
WRITE
0x00
0x10
Interface:
GPIO
SPI_16
0x08
0x04
I2C_FAST 0x02
I2C_STD
SPI_8
0x01
0x00
1
I2C Slave
Address
Slave address of I2C device or MSB of 16-bit reg addr for SPI
2
3
Length
Length of data to write/read (number of bytes)
Register address Address of register for I2C or 8-bit SPI; LSB of 16-bit address for SPI
4..64
Data
Up to 60 data bytes could be written at a time. EP0 maximum length is 64. The return
packet is limited to 42 bytes, so advise only sending 32 bytes at any one time.
Example usage:
Write two bytes (AA, 55) to device starting at register 5 of an I2C device with address A0:
[0]
[1]
[2]
[3]
[4]
[5]
0x11
0xA0
0x02
0x05
0xAA
0x55
SLAU218–August 2007
USB-MODEVM Protocol
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USB-MODEVM Protocol
Do the same with a fast mode I2C device:
[0] 0x12
[1] 0xA0
[2]
[3]
[4]
[5]
0x02
0x05
0xAA
0x55
Now with an SPI device which uses an 8-bit register address:
[0]
[1]
[2]
[3]
[4]
[5]
0x10
0xA0
0x02
0x05
0xAA
0x55
Now let's do a 16-bit register address, as found on parts like the TSC2101. Assume the register address
(command word) is 0x10E0:
[0]
[1]
[2]
[3]
[4]
[5]
0x14
0x10 --> Note: the I2C address now serves as MSB of reg addr.
0x02
0xE0
0xAA
0x55
In each case, the TAS1020 will return, in an HID interrupt packet, the following:
[0]
interface byte | status
status:
REQ_ERROR 0x80
INTF_ERROR 0x40
REQ_DONE 0x20
[1]
for I2C interfaces, the I2C address as sent
for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte
length as sent
for I2C interfaces, the reg address as sent
[2]
[3]
for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte
[4..60] echo of data packet sent
50
USB-MODEVM Protocol
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USB-MODEVM Protocol
If the command is sent with no problem, the returning byte [0] should be the same as the sent one
logically ORed with 0x20 - in our first example above, the returning packet should be:
[0]
[1]
[2]
[3]
[4]
[5]
0x31
0xA0
0x02
0x05
0xAA
0x55
If for some reason the interface fails (for example, the I2C device does not acknowledge), it would come
back as:
[0]
[1]
[2]
[3]
[4]
[5]
0x51 --> interface | INTF_ERROR
0xA0
0x02
0x05
0xAA
0x55
If the request is malformed, that is, the interface byte (byte [0]) takes on a value which is not described
above, the return packet would be:
[0]
[1]
[2]
[3]
[4]
[5]
0x93 --> the user sent 0x13, which is not valid, so 0x93 returned
0xA0
0x02
0x05
0xAA
0x55
Examples above used writes. Reading is similar:
Read two bytes from device starting at register 5 of an I2C device with address A0:
[0]
[1]
[2]
[3]
0x01
0xA0
0x02
0x05
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GPIO Capability
The return packet should be
[0]
[1]
[2]
[3]
[4]
[5]
0x21
0xA0
0x02
0x05
0xAA
0x55
assuming that the values we wrote above starting at Register 5 were actually written to the device.
G.2 GPIO Capability
The USB-MODEVM has seven GPIO lines. Access them by specifying the interface to be 0x08, and then
using the standard format for packets—but addresses are unnecessary. The GPIO lines are mapped into
one byte (see Table G-3):
Table G-3. GPIO Pin Assignments
Bit 7
x
6
5
4
3
2
1
0
P3.5
P3.4
P3.3
P1.3
P1.2
P1.1
P1.0
Example: write P3.5 to a 1, set all others to 0:
[0]
[1]
[2]
[3]
[4]
0x18 --> write, GPIO
0x00 --> this value is ignored
0x01 --> length - ALWAYS a 1
0x00 --> this value is ignored
0x40 --> 01000000
The user may also read back from the GPIO to see the state of the pins. Let's say we just wrote the
previous example to the port pins.
Example: read the GPIO
[0]
[1]
[2]
[3]
0x08 --> read, GPIO
0x00 --> this value is ignored
0x01 --> length - ALWAYS a 1
0x00 --> this value is ignored
The return packet should be:
[0]
[1]
[2]
[3]
[4]
0x28
0x00
0x01
0x00
0x40
G.3 Writing Scripts
A script is simply a text file that contains data to send to the serial control buses. The scripting language is
quite simple, as is the parser for the language. Therefore, the program is not very forgiving about mistakes
made in the source script file, but the formatting of the file is simple. Consequently, mistakes should be
rare.
52
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Writing Scripts
Each line in a script file is one command. There is no provision for extending lines beyond one line. A line
is terminated by a carriage return.
The first character of a line is the command. Commands are:
I
r
w
#
b
d
Set interface bus to use
Read from the serial control bus
Write to the serial control bus
Comment
Break
Delay
The first command, I, sets the interface to use for the commands to follow. This command must be
followed by one of the following parameters:
i2cstd
i2cfast
spi8
Standard mode I2C Bus
Fast mode I2C bus
SPI bus with 8-bit register addressing
SPI bus with 16-bit register addressing
Use the USB-MODEVM GPIO capability
spi16
gpio
For example, if a fast mode I2C bus is to be used, the script would begin with:
I i2cfast
No data follows the break command. Anything following a comment command is ignored by the parser,
provided that it is on the same line. The delay command allows the user to specify a time, in milliseconds,
that the script will pause before proceeding.
Note: UNLIKE ALL OTHER NUMBERS USED IN THE SCRIPT COMMANDS, THE DELAY
TIME IS ENTERED IN A DECIMAL FORMAT. Also, note that because of latency in the
USB bus as well as the time it takes the processor on the USB-MODEVM to handle
requests, the delay time may not be precise.
A series of byte values follows either a read or write command. Each byte value is expressed in
hexadecimal, and each byte must be separated by a space. Commands are interpreted and sent to the
TAS1020 by the program using the protocol described in Section G.1.
The first byte following a read or write command is the I2C slave address of the device (if I2C is used) or
the first data byte to write (if SPI is used—note that SPI interfaces are not standardized on protocols, so
the meaning of this byte will vary with the device being addressed on the SPI bus). The second byte is the
starting register address that data will be written to (again, with I2C; SPI varies—see Section G.1 for
additional information about what variations may be necessary for a particular SPI mode). Following these
two bytes are data, if writing; if reading, the third byte value is the number of bytes to read, (expressed in
hexadecimal).
For example, to write the values 0xAA 0x55 to an I2C device with a slave address of 0x90, starting at a
register address of 0x03, one would write:
#example script
I i2cfast
w 90 03 AA 55
r 90 03 2
This script begins with a comment, specifies that a fast I2C bus will be used, then writes 0xAA 0x55 to the
I2C slave device at address 0x90, writing the values into registers 0x03 and 0x04. The script then reads
back two bytes from the same device starting at register address 0x03. Note that the slave device value
does not change. It is not necessary to set the R/W bit for I2C devices in the script; the read or write
commands will do that.
SLAU218–August 2007
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53
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Writing Scripts
Here is an example of using an SPI device that requires 16-bit register addresses:
# setup TSC2101 for input and output
# uses SPI16 interface
# this script sets up DAC and ADC at full volume, input from onboard mic
#
# Page 2: Audio control registers
w 10 00 00 00 80 00 00 00 45 31 44 FD 40 00 31 C4
w 13 60 11 20 00 00 00 80 7F 00 C5 FE 31 40 7C 00 02 00 C4 00 00 00 23 10 FE
00 FE 00
Note that blank lines are allowed. However, be sure that the script does not end with a blank line. While
ending with a blank line will not cause the script to fail, the program will execute that line, and therefore,
may prevent the user from seeing data that was written or read back on the previous command.
In this example, the first two bytes of each command are the command word to send to the TSC2101
(0x1000, 0x1360); these are followed by data to write to the device starting at the address specified in the
command word. The second line may wrap in the viewer being used to look like more than one line;
careful examination will show, however, that there is only one carriage return on that line, following the last
00.
Any text editor may be used to write these scripts; Jedit is an editor that is highly recommended for
general usage. For more information, go to: http://www.jedit.org.
Once the script is written, it can be used in the command window by running the program, and then
selecting Open Command File... from the File menu. Locate the script and open it. The script will then be
displayed in the command buffer. The user may also edit the script once it is in the buffer, but saving of
the command buffer is not possible at this time (this feature may be added at a later date).
Once the script is in the command buffer, it may be executed by pressing the Execute Command Buffer
button. If there are breakpoints in the script, the script will execute to that point, and the user will be
presented with a dialog box with a button to press to continue executing the script. When ready to
proceed, push that button and the script will continue.
Here an example of a (partial) script with breakpoints:
# setup AIC33 for input and output
# uses I2C
interface
I i2cfast
# reg 07 - codec datapath
w 30 07 8A
r 30 07 1
d 1000
# regs 15/16 - ADC volume, unmute and set to 0dB
w 30 0F 00 00
r 30 0F 2
b
This script writes the value 8A at register 7, then reads it back to verify that the write was good. A delay of
1000ms (one second) is placed after the read to pause the script operation. When the script continues, the
values 00 00 will be written starting at register 0F. This output is verified by reading two bytes, and
pausing the script again, this time with a break. The script would not continue until the user allows it to by
pressing OK in the dialog box that will be displayed due to the break.
54
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