XC6108N49AGR-G [TOREX]
IC SUPERVISOR 4.9V 4-USP;
| 型号： | XC6108N49AGR-G |
| 厂家： | 
Torex Semiconductor |
| 描述： | IC SUPERVISOR 4.9V 4-USP |
| 文件： | 总22页 (文件大小：419K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
XC6108 series is Not Recommended for New Designs.
XC6108Series
ETR0205_010b
Voltage Detector with Separated Sense Pin & Delay Capacitor Pin
■GENERAL DESCRIPTION
The XC6108 series is highly precise, low power consumption voltage detector, manufactured using CMOS and laser trimming
technologies.
Since the sense pin is separated from power supply, it allows the IC to monitor added power supply.
Using the IC with the sense pin separated from power supply enables output to maintain the state of detection even when
voltage of the monitored power supply drops to 0V.
Moreover, with the built-in delay circuit, connecting the delay capacitance pin to the capacitor enables the IC to provide an
arbitrary release delay time.
Both CMOS and N-channel open drain output configurations are available.
■FEATURES
■APPLICATIONS
●Microprocessor reset circuitry
Highly Accurate
: +2% (Detect Voltage≧1.5V)
+30mV (Detect Voltage＜1.5V)
●Charge voltage monitors
Low Power Consumption
●Memory battery back-up switch circuits
●Power failure detection circuits
: 0.6 μA TYP. (detect, VIN= 1.0V )
0.8 μA TYP. (release, VIN= 1.0V )
: 0.8V ~ 5.0V in 0.1V increments
Detect Voltage Range
Operating Voltage Range : 1.0V ~ 6.0V
Temperature Stability
Output Configuration
: ±100ppm/ ℃ TYP.
: CMOS or N-channel open drain
Operating Temperature : -40 ℃ ~ +85 ℃
Separated Sense Pin
Built-In Delay Circuit
Packages
: VSEN Pin Available
: Delay Time Adjustable
: USP-4, SOT-25
Environmentally Friendly : EU RoHS Compliant, Pb Free
■TYPICAL APPLICATION CIRCUIT ■TYPICAL PERFORMANCE
CHARACTERISTICS
●Output Voltage vs. Sense Voltage
XC6108C25AGR
Monitering
Power
Ta=25
℃
supply
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
(No Pull-Up resistor needed for
CMOS output product)
VIN=6.0V
4.0V
1.0V
5
0
1
2
3
4
6
Sense Voltage: VSEN (V)
1/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■PIN CONFIGURATION
5
4
Cd
VSEN
VIN
3
VOUT VSS
USP-4
1
2
(BOTTOM VIEW)
* In the XC6108xxxA/B series, the dissipation pad should
not be short-circuited with other pins.
* In the XC6108xxxC/D series, when the dissipation pad
is short-circuited with other pins, connect it to the NC
pin (No.2) pin before use.
SOT-25
(TOP VIEW)
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
USP- 4
SOT-25
1
2
2
3
4
5
1
5
-
VOUT
Cd
Output (Detect ”L”)
Delay Capacitance (*1)
No Connection
Sense
NC
4
3
2
VSEN
VIN
Input
Ground (*2)
VSS
NOTE:
*1: With the VSS pin of the USP-4 package, a tab on the backside is used as the pin No.5.
*2: In the case of selecting no built-in delay capacitance pin type, the delay capacitance (Cd) pin will be
used as the N.C.
■PRODUCT CLASSIFICATION
●Ordering Information
(
*1
)
XC6108 ①②③④⑤⑥-⑦
DESIGNATOR
DESCRIPTION
Output Configuration
Detect Voltage
SYMBOL
DESCRIPTION
C
N
CMOS output
①
N-ch open drain output
②③
08 ~ 50 e.g. 18→1.8V
A
B
C
Built-in delay capacitance pin, hysteresis 5% (TYP.)(Standard*)
Built-in delay capacitance pin, hysteresis less than 1%(Standard*)
No built-in delay capacitance pin, hysteresis 5% (TYP.)
(Semi-custom)
Output Delay & Hysteresis
(Options)
④
No built-in delay capacitance pin, hysteresis less than 1%
(Semi-custom)
D
GR
GR-G
MR
USP-4
USP-4
SOT-25
SOT-25
Packages
Taping Type (*2)
⑤⑥-⑦
MR-G
*When delay function isn’t used, open the delay capacitance pin before use.
(*1)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or
representative. (Standard orientation: ⑤R-⑦, Reverse orientation: ⑤L-⑦)
(*2)
2/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■BLOCK DIAGRAMS
(1) XC6108CxxA
*The delay capacitance pin (Cd) is not
connected to the circuit in the block diagram
of XC6108CxxC (semi-custom).
(2) XC6108CxxB
*The delay capacitance pin (Cd) is not
connected to the circuit in the block diagram of
XC6108CxxD (semi-custom).
(3) XC6108NxxA
*The delay capacitance pin (Cd) is not
connected to the circuit in the block diagram of
XC6108NxxC (semi-custom).
(4) XC6108NxxB
*The delay capacitance pin (Cd) is not
connected to the circuit in the block diagram of
XC6108NxxD (semi-custom).
3/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■ABSOLUTE MAXIMUM RATINGS
●XC6108xxxA/B
Ta = 25OC
PARAMETER
Input Voltage
Output Current
SYMBOL
VIN
RATINGS
VSS－0.3 ~ 7.0
10
UNITS
V
IOUT
mA
XC6108C (*1)
XC6108N (*2)
VSS－0.3 ~ VIN＋0.3
VSS－0.3 ~ 7.0
VSS－0.3 ~ 7.0
VSS－0.3 ~ VIN＋0.3
5.0
Output Voltage
VOUT
V
Sense Pin Voltage
Delay Capacitance Pin Voltage
Delay Capacitance Pin Current
USP-4
VSEN
VCD
ICD
V
V
mA
120
Power Dissipation
Pd
mW
SOT-25
Operating Temperature Range
Storage Temperature Range
250
Ta
－40 ~＋85
－55 ~＋125
℃
℃
Tstg
Ta = 25OC
UNITS
●XC6108xxxC/D
PARAMETER
Input Voltage
Output Current
SYMBOL
VIN
RATINGS
VSS－0.3 ~ 7.0
10
V
IOUT
mA
XC6108C (*1)
XC6108N (*2)
VSS－0.3 ~ VIN＋0.3
VSS－0.3 ~ 7.0
VSS－0.3 ~ 7.0
120
Output Voltage
VOUT
VSEN
Pd
V
V
Sense Pin Voltage
USP-4
Power Dissipation
mW
SOT-25
250
Operating Temperature Range
Storage Temperature Range
Ta
－40 ~＋85
－55 ~＋125
℃
℃
Tstg
NOTE:
*1: CMOS output
*2: N-ch open drain output
4/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■ELECTRICAL CHARACTERISTICS
●XC6108xxxA
Ta=25℃
PARAMETER
Operating Voltage
Detect Voltage
SYMBOL
VIN
CONDITIONS
VDF(T) = 0.8 ~ 5.0V (*1)
VIN = 1.0 ~ 6.0V
MIN.
1.0
TYP.
-
MAX.
6.0
UNITS
CIRCUITS
V
V
V
-
VDF
E-1
E-2
①
①
Hysteresis Width
Detect Voltage
Line Regulation
VHYS
VIN = 1.0 ~ 6.0V
Δ
VDF
/
VIN = 1.0 ~ 6.0V
-
±0.1
-
%/V
①
②
(Δ
V
IN・
V
DF
)
VIN = 1.0V
VIN = 6.0V
VIN = 1.0V
-
-
-
0.6
0.7
0.8
1.5
1.6
1.7
1.8
VSEN =
Supply Current 1 (*2)
Supply Current 2 (*2)
ISS1
ISS2
μA
VDF x 0.9
VSEN =
μA
②
VDF x 1.1
VIN = 6.0V
VIN = 1.0V
VIN = 2.0V
VIN = 3.0V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
-
0.9
0.7
1.6
2.0
2.3
2.4
2.5
0.1
0.8
1.2
1.6
1.8
1.9
VSEN =0V
VDS = 0.5V
(N-ch)
IOUT1
-
mA
③
Output Current (*3)
VIN = 1.0V
VIN = 6.0V
-
-
-0.30
-2.00
-0.08
-0.70
VSEN = 6.0V
VDS = 0.5V
(P-ch)
IOUT2
mA
④
③
CMOS
0.20
0.20
-
0.40
-
Output
Leakage
Current
VIN=6.0V, VSEN=6.0V,
VOUT=6.0V, Cd: Open
-
-
ILEAK
μA
Nch Open
Drain Output
Δ
VDF /
Topr
RSEN
ppm/
℃
Temperature Characteristics
Sense Resistance (*4)
-40 ℃ ≦ Ta ≦ 85℃
±100
E-4
①
⑤
⑥
(
Δ
･
V
DF
)
VSEN = 5.0V, VIN = 0V
M
M
VSEN = 6.0V, VIN = 5.0V,
Cd = 0V
Delay Resistance (*5)
Rdelay
ICD
1.6
-
2.0
2.4
-
Delay capacitance pin
Sink Current
VDS = 0.5V, VIN = 1.0V
200
μA
V
⑥
⑦
Delay Capacitance Pin
Threshold Voltage
VSEN = 6.0V, VIN = 1.0V
VSEN = 6.0V, VIN = 6.0V
0.4
2.9
0.5
3.0
0.6
3.1
VTCD
Unspecified Operating
Voltage (*6)
VUNS
tDF0
VIN = VSEN = 0V ~ 1.0V
-
0.3
30
30
0.4
230
200
V
⑧
⑨
⑨
VIN = 6.0V, VSEN = 6.0V→0.0V
Cd: Open
Detect Delay Time (*7)
μs
μs
VIN = 6.0V, VSEN = 0.0V→6.0V
Cd: Open
Release Delay Time (*8)
tDR0
NOTE:
*1: VDF(T): Nominal detect voltage
*2: Current flows the sense resistor is not included.
*3: The Pch values are applied only to the XC6108C series (CMOS output).
*4: Calculated from the voltage value and the current value of the VSEN.
*5: Calculated from the voltage value of the VIN and the current value of the Cd.
*6: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited
This value is applied only to the XC6108C series (CMOS output).
*7: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls without connecting to the Cd pin.
*8: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises without connecting to the Cd pin.
5/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■ELECTRICAL CHARACTERISTICS (Continued)
●XC6108xxxB
Ta=25℃
PARAMETER
Operating Voltage
Detect Voltage
SYMBOL
VIN
CONDITIONS
VDF(T) = 0.8 ~ 5.0V (*1)
VIN = 1.0 ~ 6.0V
MIN.
1.0
TYP.
-
MAX.
6.0
UNITS
CIRCUITS
V
V
V
-
VDF
E-1
E-3
①
①
Hysteresis Width
Detect Voltage
Line Regulation
VHYS
VIN = 1.0 ~ 6.0V
Δ
VDF
/
VIN = 1.0 ~ 6.0V
-
±0.1
-
%/V
①
②
(Δ
V
IN･
V
DF
)
VIN = 1.0V
VIN = 6.0V
VIN = 1.0V
VIN = 6.0V
-
-
-
-
0.6
0.7
0.8
0.9
1.5
1.6
1.7
1.8
-
VSEN =
Supply Current 1 (*2)
Supply Current 2 (*2)
ISS1
ISS2
μA
VDF x 0.9
VSEN =
μA
②
VDF x 1.1
VIN = 1.0V
VIN = 2.0V
VIN = 3.0V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
0.1
0.8
1.2
1.6
1.8
1.9
0.7
1.6
2.0
2.3
2.4
2.5
VSEN =0V
VDS = 0.5V
(N-ch)
IOUT1
mA
③
-
Output Current (*3)
VSEN = 6.0V
VDS = 0.5V
(P-ch)
VIN = 1.0V
VIN = 6.0V
-
-
-0.30
-2.00
-0.08
-0.70
IOUT2
mA
④
③
CMOS
0.20
0.20
-
0.40
-
Output
VIN=6.0V, VSEN=6.0V,
VOUT=6.0V, Cd: Open
Leakage
Current
ILEAK
-
-
μA
Nch Open
Drain Output
Δ
VDF /
Topr
RSEN
ppm/
℃
Temperature Characteristics
Sense Resistance (*4)
-40 ℃ ≦ Ta ≦ 85℃
±100
E-4
①
⑤
⑥
(
Δ
･
V
DF
)
VSEN = 5.0V, VIN = 0V
M
M
VSEN = 6.0V, VIN = 5.0V,
Cd = 0V
Delay Resistance (*5)
Rdelay
ICD
1.6
-
2.0
2.4
-
Delay capacitance pin
Sink Current
VDS = 0.5V, VIN = 1.0V
200
μA
V
⑥
⑦
Delay Capacitance Pin
Threshold Voltage
VSEN = 6.0V, VIN = 1.0V
VSEN = 6.0V, VIN = 6.0V
0.4
2.9
0.5
3.0
0.6
3.1
VTCD
Unspecified Operating
Voltage (*6)
VUNS
tDF0
VIN = VSEN = 0V ~ 1.0V
-
0.3
30
30
0.4
230
200
V
⑧
⑨
⑨
VIN = 6.0V, VSEN = 6.0V→0.0V
Cd: Open
Detect Delay Time (*7)
Release Delay Time (*8)
μs
μs
VIN = 6.0V, VSEN = 0.0V→6.0V
Cd: Open
tDR0
NOTE:
*1: VDF(T): Nominal detect voltage
*2: Current flows the sense resistor is not included.
*3: The Pch values are applied only to the XC6108C series (CMOS output).
*4: Calculated from the voltage value and the current value of the VSEN.
*5: Calculated from the voltage value of the VIN and the current value of the Cd.
*6: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited
This value is applied only to the XC6108C series (CMOS output).
*7: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls without connecting to the Cd pin.
*8: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises without connecting to the Cd pin.
6/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■ELECTRICAL CHARACTERISTICS (Continued)
●XC6108xxxC
Ta=25℃
PARAMETER
Operating Voltage
Detect Voltage
SYMBOL
VIN
CONDITIONS
VDF(T) = 0.8 ~ 5.0V (*1)
VIN = 1.0 ~ 6.0V
MIN.
1.0
TYP.
-
MAX.
6.0
UNITS
CIRCUITS
V
V
V
-
VDF
E-1
E-2
①
①
Hysteresis Width
Detect Voltage
Line Regulation
VHYS
VIN = 1.0 ~ 6.0V
Δ
VDF
/
VIN = 1.0 ~ 6.0V
-
±0.1
-
%/V
①
②
(Δ
V
IN･
V
DF
)
VIN = 1.0V
VIN = 6.0V
VIN = 1.0V
VIN = 6.0V
-
-
-
-
0.6
0.7
0.8
0.9
1.5
1.6
1.7
1.8
VSEN =
Supply Current 1 (*2)
Supply Current 2 (*2)
ISS1
ISS2
μA
VDF x 0.9
VSEN =
μA
②
VDF x 1.1
VIN = 1.0V
VIN = 2.0V
VIN = 3.0V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
0.1
0.8
1.2
1.6
1.8
1.9
0.7
1.6
2.0
2.3
2.4
2.5
VSEN =0V
VDS = 0.5V
(N-ch)
IOUT1
-
mA
③
Output Current (*3)
VIN = 1.0V
VIN = 6.0V
-
-
-0.30
-2.00
-0.08
-0.70
VSEN = 6.0V
VDS = 0.5V
(P-ch)
IOUT2
mA
④
③
CMOS
0.20
0.20
-
0.40
-
Output
VIN=6.0V, VSEN=6.0V,
VOUT=6.0V, Cd: Open
Leakage
Current
ILEAK
-
-
μA
Nch Open
Drain Output
ΔVDF/
ppm/
Temperature Characteristics
-40 ℃ ≦ Ta ≦ 85℃
VSEN = 5.0V, VIN = 0V
VIN = VSEN = 0V ~ 1.0V
±100
E-4
①
⑤
⑦
(
Δ
Topr･
V
DF
)
℃
Sense Resistance (*4)
Unspecified Operating
Voltage (*5)
RSEN
M
VUNS
-
0.3
0.4
V
Detect Delay Time (*6)
Release Delay Time (*7)
tDF0
tDR0
VIN = 6.0V, VSEN = 6.0V→0.0V
VIN = 6.0V, VSEN = 0.0V→6.0V
30
30
230
200
μs
μs
⑨
⑨
NOTE:
*1: VDF(T): Nominal detect voltage
*2: Current flows the sense resistor is not included.
*3: The Pch values are applied only to the XC6108C series (CMOS output).
*4: Calculated from the voltage value and the current value of the VSEN.
*5: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited
This value is applied only to the XC6108C series (CMOS output).
*6: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls.
*7: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises.
7/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■ELECTRICAL CHARACTERISTICS (Continued)
●XC6108xxxD
Ta=25℃
PARAMETER
Operating Voltage
Detect Voltage
SYMBOL
VIN
CONDITIONS
VDF(T) = 0.8 ~ 5.0V (*1)
VIN = 1.0 ~ 6.0V
MIN.
1.0
TYP.
-
MAX.
6.0
UNITS
CIRCUITS
V
V
V
-
VDF
E-1
E-3
1
1
Hysteresis Width
Detect Voltage
Line Regulation
VHYS1
VIN = 1.0 ~ 6.0V
Δ
VDF
/
VIN = 1.0 ~ 6.0V
-
±0.1
-
%/V
1
2
(Δ
V
IN･
V
DF
)
VIN = 1.0V
VIN = 6.0V
VIN = 1.0V
-
-
-
0.6
0.7
0.8
1.5
1.6
1.7
1.8
VSEN =
Supply Current 1 (*2)
Supply Current 2 (*2)
ISS1
ISS2
μA
VDF x 0.9
VSEN =
μA
2
VDF x 1.1
VIN = 6.0V
VIN = 1.0V
VIN = 2.0V
VIN = 3.0V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
-
0.9
0.7
1.6
2.0
2.3
2.4
2.5
0.1
0.8
1.2
1.6
1.8
1.9
VSEN =0V
VDS = 0.5V
(N-ch)
IOUT1
-
mA
3
Output Current (*3)
VIN = 1.0V
VIN = 6.0V
-
-
-0.30
-2.00
-0.08
-0.70
VSEN = 6.0V
VDS = 0.5V
(P-ch)
IOUT2
mA
4
3
CMOS
0.20
0.20
-
0.40
-
Output
VIN=6.0V, VSEN=6.0V,
VOUT=6.0V, Cd: Open
Leakage
Current
ILEAK
-
-
μA
Nch Open
Drain Output
Δ
VDF /
ppm/
Temperature Characteristics
-40 ℃ ≦ Ta ≦ 85℃
VSEN = 5.0V, VIN = 0V
VIN = VSEN = 0V ~ 1.0V
±100
E-4
1
5
7
(
Δ
Topr･
V
DF
)
℃
Sense Resistance (*4)
Unspecified Operating
Voltage (*5)
RSEN
M
VUNS
-
0.3
0.4
V
Detect Delay Time (*6)
Release Delay Time (*7)
tDF0
tDR0
VIN = 6.0V, VSEN = 6.0V→0.0V
VIN = 6.0V, VSEN = 0.0V→6.0V
30
30
230
200
μs
μs
9
9
NOTE:
*1: VDF(T): Nominal detect voltage
*2: Current flows the sense resistor is not included.
*3: The Pch values are applied only to the XC6108C series (CMOS output).
*4: Calculated from the voltage value and the current value of the VSEN.
*5: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited
This value is applied only to the XC6108C series (CMOS output).
*6: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls.
*7: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises.
8/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■VOLTAGE CHART
SYMBOL
E-1
E-2
HYSTERESIS
RANGE
(V)
E-3
HYSTERESIS
RANGE
(V)
E-4
SENSE
RESISTANCE
(MΩ)
NOMINAL DETECT
VOLTAGE
DETECT VOLTAGE (*1)
(V)
VDF
VHYS
VHYS
RSEN
VDF(T)
(V)
MIN.
0.770
0.870
0.970
1.070
1.170
1.270
1.370
1.470
1.568
1.666
1.764
1.862
1.960
2.058
2.156
2.254
2.352
2.450
2.548
2.646
2.744
2.842
2.940
3.038
3.136
3.234
3.332
3.430
3.528
3.626
3.724
3.822
3.920
4.018
4.116
4.214
4.312
4.410
4.508
4.606
4.704
4.802
4.900
MAX.
0.830
0.930
1.030
1.130
1.230
1.330
1.430
1.530
1.632
1.734
1.836
1.938
2.040
2.142
2.244
2.346
2.448
2.550
2.652
2.754
2.856
2.958
3.060
3.162
3.264
3.366
3.468
3.570
3.672
3.774
3.876
3.978
4.080
4.182
4.284
4.386
4.488
4.590
4.692
4.794
4.896
4.998
5.100
MIN.
MAX.
0.066
0.074
0.082
0.090
0.098
0.106
0.114
0.122
0.131
0.085
0.147
0.155
0.163
0.171
0.180
0.188
0.196
0.204
0.212
0.220
0.228
0.237
0.245
0.253
0.261
0.269
0.277
0.286
0.294
0.302
0.310
0.318
0.326
0.335
0.343
0.351
0.359
0.367
0.375
0.384
0.392
0.400
0.408
MIN.
MAX.
MIN.
TYP.
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
0.015
0.017
0.019
0.021
0.023
0.025
0.027
0.029
0.031
0.033
0.035
0.037
0.039
0.041
0.043
0.045
0.047
0.049
0.051
0.053
0.055
0.057
0.059
0.061
0.063
0.065
0.067
0.069
0.071
0.073
0.074
0.076
0.078
0.080
0.082
0.084
0.086
0.088
0.090
0.092
0.094
0.096
0.098
0.008
0.009
0.010
0.011
0.012
0.013
0.014
0.015
0.016
0.017
0.018
0.019
0.020
0.021
0.022
0.023
0.024
0.026
0.027
0.028
0.029
0.030
0.031
0.032
0.033
0.034
0.035
0.036
0.037
0.038
0.039
0.040
0.041
0.042
0.043
0.044
0.045
0.046
0.047
0.048
0.049
0.050
0.051
10
20
0
13
24
15
28
NOTE:
*1: When VDF(T)≦1.4V, the detection accuracy is ±30mV.
When VDF(T)≧1.5V, the detection accuracy is ±2%.
9/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■TEST CIRCUITS
Circuit 1
R=100kΩ
(No resistor needed for CMOS output products)
XC6108 Series
Circuit 2
XC6108 Series
Circuit 3
XC6108 Series
Circuit 4
XC6108 Series
Circuit 5
XC6108 Series
10/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■TEST CIRCUITS (Continued)
Circuit 6
XC6108 Series
Circuit 7
(No resistor needed for CMOS output products)
XC6108 Series
Circuit 8
XC6108 Series
Circuit 9
(No resistor needed for CMOS output products)
Waveform Measurement Point
XC6108 Series
*No delay capacitance pin available in the XC6108xxxC/D series.
11/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■OPERATIONAL EXPLANATION
A typical circuit example is shown in Figure 1, and the timing chart of Figure 1 is shown in Figure 2 on page 14.
① As an early state, the sense pin is applied sufficiently high voltage (6.0V MAX.) and the delay capacitance (Cd) is charged
to the power supply input voltage, (VIN: 1.0V MIN., 6.0V MAX.). While the sense pin voltage (VSEN) starts dropping to
reach the detect voltage (VDF) (VSEN>VDF), the output voltage (VOUT) keeps the “High” level (=VIN).
* If a pull-up resistor of the XC6108N series (N-ch open drain) is connected to added power supply different from the input
voltage pin, the “High” level will be a voltage value where the pull-up resistor is connected.
②When the sense pin voltage keeps dropping and becomes equal to the detect voltage (VSEN =VDF), an N-ch transistor
(M1) for the delay capacitance (Cd) discharge is turned ON, and starts to discharge the delay capacitance (Cd). An
inverter (Inv.1) operates as a comparator of the reference voltage VIN, and the output voltage changes into the “Low” level
(=VSS). The detect delay time [tDF] is defined as time which ranges from VSEN=VDF to the VOUT of “Low” level
(especially, when the Cd pin is not connected: tDF0).
③While the sense pin voltage keeps below the detect voltage, the delay capacitance (Cd) is discharged to the ground
voltage (=VSS) level. Then, the output voltage maintains the “Low” level while the sense pin voltage increases again to
reach the release voltage (VSEN< VDF +VHYS).
④When the sense pin voltage continues to increase up to the release voltage level (VDF+VHYS), the N-ch transistor (M1) for
the delay capacitance (Cd) discharge will be turned OFF, and the delay capacitance (Cd) will start discharging via a delay
resistor (Rdelay). The inverter (Inv.1) will operate as a comparator (Rise Logic Threshold: VTLH=VTCD, Fall Logic
Threshold: VTHL=VSS) while the sense pin voltage keeps higher than the detect voltage (VSEN > VDF).
⑤While the delay capacitance pin voltage (VCD) rises to reach the delay capacitance pin threshold voltage (VTCD) with the
sense pin voltage equal to the release voltage or higher, the sense pin will be charged by the time constant of the RC
series circuit. Assuming the time to the release delay time (tDR), it can be given by the formula (1).
tDR = －Rdelay×Cd×In (1－VTCD / VIN) …(1)
* In = a natural logarithm
The release delay time can also be briefly calculated with the formula (2) because the delay resistance is 2.0MΩ(TYP.) and
the delay capacitance pin voltage is VIN /2 (TYP.)
tDR = Rdelay×Cd×0.69…(2)
＊：Rdelay is 2.0MΩ（TYP.）
As an example, presuming that the delay capacitance is 0.68μF, tDR is :
2.0×106×0.68×10-6×0.69=938(ms)
* Note that the release delay time may remarkably be short when the delay capacitance (Cd) is not discharged to the
ground (=VSS) level because time described in ③ is short.
⑥When the delay capacitance pin voltage reaches to the delay capacitance pin threshold voltage (VCD=VTCD), the inverter
(Inv.1) will be inverted. As a result, the output voltage changes into the “High” (=VIN) level. tDR0 is defined as time
which ranges from VSEN=VDF+VHYS to the VOUT of “High” level without connecting to the Cd.
⑦While the sense voltage is higher than the detect voltage (VSEN > VDF), the delay capacitance pin is charged until the
delay capacitance pin voltage becomes the input voltage level. Therefore, the output voltage maintains the “High”(=VIN)
level.
12/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■OPERATIONAL EXPLANATION (Continued)
●Function Chart
TRANSITION OF VOUT CONDITION *1
VSEN
Cd
①
②
L
H
L
H
L
H
L
H
L
⇒
L
L
H
L
⇒
⇒
L
H
H
⇒
H
*1: VOUT transits from condition ① to ② because of the combination of VSEN and Cd.
●Example
ex. 1) VOUT ranges from ‘L’ to ‘H’ in case of VSEN = ‘H’ (VDR≧VSEN), Cd=’H’ (VTCD≧Cd) while VOUT is ‘L’.
ex. 2) VOUT maintains ‘H’ when Cd ranges from ‘H’ to ‘L’, VSEN=’H’ and Cd=’L’ when VOUT becomes ‘H’ in ex.1.
●Release Delay Time Chart
RELEASE DELAY TIME [tDR]
RELEASE DELAY TIME [tDR] *2
DELAY CAPACITANCE [Cd]
(TYP.)
(ms)
13.8
30.4
64.9
138
(MIN. ~ MAX.)
(ms)
(μF)
0.010
0.022
0.047
0.100
0.220
0.470
1.000
11.0 ~ 16.6
24.3 ~ 36.4
51.9 ~ 77.8
110 ~ 166
243~ 364
304
649
519 ~ 778
1100 ~ 1660
1380
* The release delay time values above are calculated by using the formula (2).
*2: The release delay time (tDR) is influenced by the delay capacitance Cd.
13/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■OPERATIONAL EXPLANATION (Continued)
Figure 1: Typical application circuit example
*The XC6108N series (N-ch open
drain output) requires a pull-up
resistor for pulling up output.
VIN
M2
M4
ＲＳEN=R1+R2+R3
VSEN
Rdelay
Comparator
Inverter
VOUT
R1
VIN
VSEN
R2
R3
M3
Vref
M5
M1
VSS
Cd
Cd
Figure 2: The timing chart of Figure 1
VSEN (MIN.:0V, MAX.:6.0V)
VDF+VHYS
VDF
VCD(MIN.:VSS, MAX.:VIN)
VTCD
VOUT (MIN.:VSS, MAX:VIN)
14/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■NOTES ON USE
1. Use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent damage
to the device.
2. The power supply input pin voltage drops by the resistance between power supply and the VIN pin, and by through current
at operation of the IC. At this time, the operation may be wrong if the power supply input pin voltage falls below the
minimum operating voltage range. In CMOS output, for output current, drops in the power supply input pin voltage
similarly occur. Moreover, in CMOS output, when the VIN pin and the sense pin are short-circuited and used, oscillation of
the circuit may occur if the drops in voltage, which caused by through current at operation of the IC, exceed the hysteresis
voltage. Note it especially when you use the IC with the VIN pin connected to a resistor.
3. When the setting voltage is less than 1.0V, be sure to separate the VIN pin and the sense pin, and to apply the voltage over
1.0V to the VIN pin.
4. Note that a rapid and high fluctuation of the power supply input pin voltage may cause a wrong operation.
5. Power supply noise may cause operational function errors, Care must be taken to put the capacitor between VIN-GND and
test on the board carefully.
6. When there is a possibility of which the power supply input pin voltage falls rapidly (e.g.: 6.0V to 0V) at release operation
with the delay capacitance pin (Cd) connected to a capacitor, use a schottky barrier diode connected between the VIN pin
and the Cd pin as the Figure 3 shown below.
6. In N channel open drain output, VOUT voltage at detect and release is determined by resistance of a pull up resistor
connected at the VOUT pin. Please choose proper resistance values with reffering to Figure 4;
During detection : VOUT = Vpull / (1+Rpull / RON
)
Vpull: Pull up voltage
RON(※1)：On resistance of N channel driver M3 can be calculated as VDS / IOUT1 from electrical characteristics,
For example, when (※2) RON = 0.5 / 0.8×10-3 = 625Ω（MIN.）at VIN=2.0V, Vpull = 3.0V and VOUT ≦0.1V at detect,
Rpull= (Vpull /VOUT-1)×RON= (3 / 0.1-1)×625≒18ｋΩ
In this case, Rpull should be selected higher or equal to 18kΩ in order to keep the output voltage less than 0.1V during
detection.
(※1) RON is bigger when VIN is smaller, be noted.
(※2) For calculation, Minimum VIN should be chosen among the input voltage range.
During releasing：VOUT = Vpull / (1 + Rpull / Roff)
Vpull：Pull up voltage
Roff：On resistance of N channel driver M3 is 15MΩ（MIN.） when the driver is off (as to VOUT / ILEAK
For example：when Vpull = 6.0V and VOUT ≧ 5.99V,
)
Rpull = (Vpull / VOUT-1)×Roff = (6/5.99-1)×15×106 ≒25kΩ
In this case, Rpull should be selected smaller or equal to 25kΩ in order to obtain output voltage higher than 5.99V
during releasing.
Figure 3: Circuit example with the delay capacitance pin (Cd) connected to a schottky barrier diode
Figure 4: Circuit example of XC6108N Series
Vpull
VIN
M2
R=100kΩ
(No resistor needed for
VIN
VSEN
ＲＳEN=R1+R2+R3
Comparator
Rpull
VSEN
CMOS output products)
Rdelay
Inverter
ILEA
K
R1
R2
R3
VOUT
VOUT
VIN
VSEN
VSEN
VOUT
VIN
M3
Vref
M5
Cd
M1
VSS
Cd
VSS
Cd
NOTE： Roff=VOUT/ILEAK
Figure 3
Figure 4
15/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■TYPICAL PERFORMANCE CHARACTERISTICS
(1) Supply Current vs. Sense Voltage
XC6108C25AGR
VIN=3.0V
2.0
Ta=85
25
℃
℃
1.5
1.0
0.5
0.0
-40
℃
0
1
2
3
4
5
6
Sense Voltage : VSEN (V)
(2) Supply Current vs. Input Voltage
XC6108C25AGR
XC6108C25AGR
VSEN=2.25V
VSEN=2.75V
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
.0
.8
.6
.4
.2
0.0
Ta=85
℃
Ta=85
℃
25
℃
25
℃
-40
℃
-40
5
℃
0
1
2
3
4
5
6
0
1
2
3
4
6
Input Voltage : VIN (V)
Input Voltage : VIN (V)
(3) Detect Voltage vs. Ambient Temperature
(4) Detect Voltage vs. Input Voltage
XC6108C25AGR
XC6108C25AGR
VIN=4.0V
2.55
2.50
2.45
2.55
Ta=25
℃
85
℃
2.50
2.45
-40
℃
-50
-25
0
25
50
75
100
1.0
2.0
3.0
4.0
5.0
6.0
Ambient Temperature : Ta (℃)
lt:
Input Voltage : VIN (V)
16/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(5) Hysteresis Voltage vs. Ambient Temperature
(6) CD Pin Sink Current vs. Input Voltage
XC6108C25AGR
XC6108C25AGR
VIN=4.0V
VSEN=0V, VDS=0.5V
0.20
0.15
0.10
0.05
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta=-40
℃
25
℃
85
4
℃
-50
-25
0
25
50
75
100
0
1
2
3
5
6
Ambient Temperature : Ta (℃)
Input Voltage : VIN (V)
(7) Output Voltage vs. Sense Voltage
XC6108C25AGR
(8) Output Voltage vs. Input Voltage
XC6108N25AGR
Ta=25
℃
VSEN=VIN Pull-up=VIN R=100k
Ω
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
4.0
3.0
2.0
1.0
0.0
-1.0
VIN=6.0V
4.0V
Ta=85
℃
25
℃
-40
℃
1.0V
5
0
0.5
1
1.5
2
2.5
3
0
1
2
3
4
6
Input Voltage : VIN (V)
Sense Voltage : VSEN (V)
(9) Output Current vs. Input Voltage
XC6108C25AGR
XC6108C25AGR
VDS(Nch)=0.5V
VDS(Pch)=0.5V
4.0
3.5
0.0
Ta=-40
℃
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
Ta=85
℃
25
℃
25
℃
85
℃
-40
℃
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Input Voltage : VIN (V)
Input Voltage : VIN (V)
17/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(10) Delay Resistance vs. Ambient Temperature
(11) Release Delay Time vs. Delay Capacitance
XC6108C25AGR
XC6108C25AGR
Ta=25
℃
VSEN=6.0V VCD=0.0V VIN=5.0V
4
10000
1000
100
10
VIN=1.0V
3.0V
6.0V
3.5
3
2.5
2
1
TDR=Cd×2.0×106×0.69
1.5
1
0.1
0.0001
0.001
0.01
0.1
1
-50
-25
0
25
50
75
100
Ambient Temperature : Ta (℃)
Delay Capacitance : Cd (μF)
(12) Detect Delay Time vs. Delay Capacitance
XC6108C25AGR
(13) Leakage Current vs. Ambient Temperature
XC6108N25AGR
Ta=25
℃
1000
VIN=VSEN=6.0V VOUT=6.0V
0.25
VIN=6.0V
4.0V
100
3.0V
0.20
0.15
0.10
2.0V
0.1
10
1
1.0V
-50
-25
0
25
50
75
100
0.0001
0.001
0.01
1
Ambient Temperature: Ta (
)
℃
Delay Capacitance : Cd (μF)
(14) Leakage Current vs. Supply Voltage
XC6108N25AGR
VIN=VSEN=6.0V
0.25
0.20
0.15
0.10
0
1
2
3
4
5
6
Output Voltage: VOUT (V)
18/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■PACKAGING INFORMATION
●USP-4
* Soldering fillet surface is not
formed because the sides of the
pins are plated.
●SOT-25
2.9±0.2
+0.1
-0.05
0.4
5
1
4
3
0～0.1
2
+0.1
-0.05
0.15
(0.95)
1.9±0.2
19/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
■PACKAGING INFORMATION (Continued)
●USP-4 Reference Pattern Layout
●USP-4 Reference Metal Mask Design
20/22
XC6108
XC6108 series is Not Recommended for New Designs.
Series
■MARKING RULE
●SOT-25
① represents output configuration and integer number of detect voltage
CMOS Output (XC6108C Series)
N-ch Open Drain Output (XC6108N Series)
5
4
MARK
VOLTAGE (V)
MARK
VOLTAGE (V)
A
B
C
D
E
F
0.x
1.x
2.x
3.x
4.x
5.x
K
L
M
N
P
R
0.x
1.x
2.x
3.x
4.x
5.x
① ② ③ ④
1
2
3
SOT-25
(TOP VIEW)
② represents decimal number of detect voltage
(ex.)
MARK
VOLTAGE (V)
PRODUCT SERIES
3
0
x.3
x.0
XC6108xx3xxx
XC6108xx0xxx
③ represents options
OPTIONS
PRODUCT SERIES
XC6108xxxAxx
XC6108xxxBxx
XC6108xxxCxx
XC6108xxxDxx
MARK
Built-in delay capacitance pin with hysteresis 5% (TYP.)
(Standard)
A
B
C
D
Built-in delay capacitance pin with hysteresis less than 1%
(Standard)
No built-in delay capacitance pin with hysteresis 5% (TYP.)
(Semi-custom)
No built-in delay capacitance pin with hysteresis less than 1%
(Semi-custom)
④ represents production lot number
0 to 9, A to Z or inverted characters of 0 to 9, A to Z repeated.
(G, I, J, O, Q, W excluded)
●USP-4
①
represents output configuration and integer number of detect voltage
CMOS Output (XC6108C Series)
N-ch Open Drain Output (XC6108N Series)
4
3
1
2
MARK
VOLTAGE (V)
MARK
VOLTAGE (V)
A
B
C
D
E
F
0.x
1.x
2.x
3.x
4.x
5.x
K
L
M
N
P
R
0.x
1.x
2.x
3.x
4.x
5.x
USP-4
(TOP VIEW)
②
(ex.)
represents decimal number of detect voltage
MARK
VOLTAGE (V)
PRODUCT SERIES
3
0
x.3
x.0
XC6108xx3xxx
XC6108xx0xxx
③ represents options
PRODUCT
SERIES
MARK
OPTIONS
Built-in delay capacitance pin with hysteresis 5% (TYP.)
(Standard)
A
B
C
D
XC6108xxxAxx
Built-in delay capacitance pin with hysteresis less than 1%
XC6108xxxBxx
XC6108xxxCxx
XC6108xxxDxx
(Standard)
No built-in delay capacitance pin with hysteresis 5% (TYP.)
(Semi-custom)
No built-in delay capacitance pin with hysteresis less than 1%
(Semi-custom)
④ represents production lot number
0 to 9, A to Z repeated. (G, I, J, O, Q, W excluded)
*No character inversion used.
21/22
XC6108 series is Not Recommended
for New Designs.
XC6108 Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
22/22
相关型号：
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