XC612N3619ML [TOREX]
Power Management Circuit;
| 型号： | XC612N3619ML |
| 厂家： | 
Torex Semiconductor |
| 描述： | Power Management Circuit 光电二极管 |
| 文件： | 总14页 (文件大小：711K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
XC612Series
ETR0204_001
2-Channel Voltage Detectors
■GENERAL DESCRIPTION
The XC612 series consist of 2 voltage detectors, in 1 mini-molded, SOT-25 package.
The series provides accuracy and low power consumption through CMOS processing and laser trimming and consists of a
highly accurate voltage reference source, 2 comparators, hysteresis and output driver circuits.
The input (VIN1) for voltage detector 1 (VD1) dually functions as the power supply pin for both detector 1 (VD1) and detector 2
(VD2).
■APPLICATIONS
■FEATURES
Highly Accurate
Low Power Consumption
: Setting voltage accuracy ±2%
●Microprocessor reset circuitry
●Memory battery back-up circuits
●Power-on reset circuits
:
2.0μA(TYP.)
(VIN1=VIN2=2.0V, Static state)
Detect Voltage
: 1.5V ~ 5.0V programmable in
100mV steps. Detector’s voltages can
be set-up independently
Conditionaly;
XC612N : VDET1>VDET2
●Power failure detection
●System battery life and charge voltage monitors
●Delay circuitry
>
XC612D, XC612E : VDET1 VDET2,
VDET1<VDET2
Operating Voltage Range : 1.5V ~ 10.0V
Temperature Characteristics
:
±
100ppm/℃ (TYP.)
Output Configuration
: N-channel open drain
CMOS Low Power Consumption
2 Voltage Detectors Built-in
Small Package
: SOT-25 (150mW) mini-mold
* CMOS Output is under development
■TYPICAL APPLICATION CRICUIT
■TYPICAL PERFORMANCE
CHARACTERISTICS
1/14
XC612 Series
■PIN CONFIGURATION
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
1
2
3
4
5
VDET1
VIN1
Voltage Detector 1 Output
Detector 1 Input, Power Supply
Ground
VSS
VIN2
Voltage Detector 2 Input
Voltage Detector 2 Output
VDET2
■PRODUCT CLASSIFICATION
●Selection Guide
TYPE
VDET1
VDET2
XC612N
N-ch Open Drain
N-ch Open Drain
XC612D
XC612E
N-ch Open Drain
CMOS
CMOS
N-ch Open Drain
●Ordering Information
XC612①②③④⑤⑥⑦
DESIGNATOR
DESCRIPTION
SYMBOL
DESCRIPTION
: VDET1/VDET2: N-ch open drain
N
①
Output Configuration
D
: VDET1: N-ch open drain, VDET2: CMOS
: VDET1: CMOS, VDET2: N-ch open drain
: VDET1: 2.5V→②25
E
15～50
15～50
M
②③
④⑤
⑥
Detect Voltage 1 (VDET1)
Detect Voltage 2 (VDET2)
Package
: VDET2: 3.3V→③33
: SOT-25 (SOT-23-5)
R
: Embossed tape, standard feed
: Embossed tape, reverse feed
⑦
Device Orientation
L
2/14
XC612
Series
■BLOCK DIAGRAMS
XC612N Series
XC612D Series
XC612E Series
3/14
XC612 Series
■ABSOLUTE MAXIMUM RATINGS
Ta = 25℃
PARAMETER
SYMBOL
VIN1
RATINGS
12.0
UNITS
V
VD 1
VD 2
Input Voltage
Output Voltage
Output Current
VIN2
12.0
V
VD 1 (N-ch open drain)
VD 1 (CMOS)
VD 2 (N-ch open drain)
VD 2 (CMOS)
VD 1
VSS – 0.3 ~ 12.0
VSS – 0.3 ~ VIN1 + 0.3
VSS – 0.3 ~ 12.0
VSS – 0.3 ~ VIN1 + 0.3
50
V
VVDET1
VVDET2
V
V
V
IVDET1
IVDET2
Pd
mA
mA
mW
℃
VD 2
50
Power Dissipation
150
Operating Temperature Range
Storage Temperature Range
Topr
Tstg
- 30 ~ + 80
- 40 ~ + 125
℃
4/14
XC612
Series
■ELECTRICAL CHARACTERISTICS
Ta=25℃
CIRCUITS
PARAMETER
SYMBOL
CONDITIONS
MIN.
VDF1
TYP.
MAX. UNITS
Detect Voltage
(VDET1) (*1)
Voltage when VDET1 changes from
H to L following a reduction of VIN1
VDF1
V
VDF1
VDF1
1
x 0.98
VDF2
x 1.02
Detect Voltage
(VDET2) (*1)
Voltage when VDET2 changes from
H to L following a reduction of VIN2
VDF2
V
VDF2
VHYS1
VHYS2
VDF2
1
1
1
x 0.98
x 1.02
Voltage (VDR1) - VDF1 when VDET1 changes VDF1(T)
from L to H following an increase of VIN1
VDF1(T)
x 0.05
VDF2(T)
x 0.05
1.35
VDF1(T)
V
Hysteresis Range 1
Hysteresis Range 2
x 0.02
VDF2(T)
x 0.02
-
x 0.08
VDF2(T)
V
Voltage (VDR2) - VDF2 when VDET2 changes
from L to H following an increase of VIN2
x 0.08
VIN1 = 1.5V
VIN1 = 2.0V
3.90
4.50
-
1.50
1.95
2.40
3.00
0.45
0.50
0.65
0.80
1.00
-
Supply Current
ISS
μA
2
VIN1 = 3.0V
-
-
5.10
5.70
6.30
1.30
1.50
1.70
1.90
2.10
10
(VIN1 Input Current)
VIN1 = 4.0V
VIN1 = 5.0V
-
VIN2 = 1.5V
-
VIN2 = 2.0V
-
VIN2 Input Current
Operating Voltage
IIN2
μA
2
VIN2 = 3.0V
-
VIN2 = 4.0V
-
VIN2 = 5.0V
-
VIN1
VDF(T) = 1.5V to 6.0V
VIN1 = 1.0V
1.0
0.3
3.0
5.0
6.0
7.0
-
V
－
2.2
-
VIN1 = 2.0V
7.7
-
N-ch, VDS=0.5V
VIN1 = 3.0V
VIN1 = 4.0V
VIN1 = 5.0V
VIN1 = 8.0V
10.1
11.5
13.0
-10.0
-
Output Current (*3)
Temperature
IVDET
mA
3
-
-
P-ch (CMOS) VDS=-2.1V
-2.0
ΔVDF
-30℃ ≦ Topr ≦ 80℃
-
±100
－
ppm/℃
－
Characteristics (*3) ΔTopr･VDF
Delay Time (*3)
(Release Voltage→
tDLY
(VDR→VOUT inversion)
-
-
0.2
ms
5
Output inversion)
NOTE:
*1 : VDF1(T), VDF2(T) : User specified detect voltage.
*2 : Release voltage (VDR) = VDF +VHYS
*3 : Those parameters marked with an asterisk apply to both VDET1 and VDET2.
*4 : Input Voltage : please ensure that VIN1 > VIN2
>
(Input voltage of XC612D and XC612E series : please ensure that VIN1 VIN2, VIN1 < VIN2.)
*5 : VIN1 pin serve both ISS and power supply pin so that VIN2 operates VIN1 as a power supply source. For normal operation of VIN2,
operating voltage higher than the minimum is needed to be applied to power supply pin VIN1.
*6 : For CMOS output products, high level output voltage which is generated when the transient response is released becomes input
voltage of VIN.
5/14
XC612 Series
■OPERATONAL EXPLANATION
●Timing Chart (Pull up voltage =Input voltage VIN1)
●Operational Notes (N-ch Open drain)
Timing Chart A (VIN1=voltages above release voltage, VIN2=sweep voltage)
Because a voltage higher than the minimum operating voltage is applied to the voltage input pin (VIN), ground voltage will be
output at the output pin (VDET) during stage 3. (Stages 1, 2, 4, 5 are the same as in B below).
Timing Chart B (VIN1=VIN2)
① When a voltage greater than the release voltage (VDR) is applied to the voltage input pin (VIN1, VIN2), input voltage (VIN1,
VIN2) will gradually fall.
When a voltage greater than the detect voltage (VDF) is applied to the voltage input pin (VIN1, VIN2), a state of high
impedance will exist at the output pin (VDET1, VDET2), so should the pin be pulled up, voltage will be equal to pull up
voltage.
② When input voltage (VIN1, VIN2) falls below detect voltage (VDF), output voltage (VDET1, VDET2) will be equal to ground
level (VSS).
③ Should input voltage (VIN1, VIN2) fall below the minimum operational voltage (VMIN), output will become unstable. Should
VIN2 fall below VMIN, voltage at the output pin (VDET2) will be equal to ground level (VSS) if the power supply (VIN1) is
within the operating voltage range.
*In general the output pin is pulled up so output will be equal to pull up voltage.
④ Should input voltage (VIN1, VIN2) rise above ground voltage (VSS), output voltage (VDET1, VDET2) will equal ground level
until the release voltage level (VDR) is reached.
⑤ When input voltage (VIN1, VIN2) rises above release voltage, the output pin's (VDET1, VDET2) voltage will be equal to the
voltage dependent on pull up.
Note : The difference between release voltage (VDR) and detect voltage (VDF) is the Hysteresis Range ⑥.
6/14
XC612
Series
■NOTES ON USE
1. Please use this IC within the specified maximum absolute ratings.
2. Please ensure that input voltage VIN2 is less than VIN1 + 0.3V. (refer to N.B. 1 below)
3. With a resistor connected between the VIN1 pin and the input, oscillation is liable to occur as a result of through current at
the time of release. (refer to N.B. 2 below)
4. With a resistor connected between the VIN1 pin and the input, detect and release voltage will rise as a result of the IC's
supply current flowing through the VIN1 pin.
5. In order to stabilize the IC's operations, please ensure that the VIN1 pin's input frequency's rise and fall times are more
than 5 msec/V.
6. Should the power supply voltage VIN1 exceed 6V, voltage detector 2's detect voltage (VDF2) and the release voltage
(VDR2) will shift somewhat.
7. For CMOS output products, high level output voltage which is generated when the transient response is released
becomes input voltage of VIN.
●N.B.
1. Voltage detector 2's input voltage (VIN2)
An input protect diode is connected from input detector 2's input (VIN2) to input detector 1's input. Therefore, should the
voltage applied to VIN2 exceed VIN1, current will flow through VIN1 via the diode. (refer to diagram1)
2. Oscillation as a result of through current
Since the XC612 series are CMOS ICs, through current will flow when the IC's internal circuit switching operates
(during release and detect operations). Consequently, oscillation is liable to occur as a result of drops in voltage at the
through current's resistor (RIN) during release voltage operations. (refer to diagram 2)
Since hysteresis exists during detect operations, oscillation is unlikely to occur.
Diagram 1. Voltage detector 2's input voltage VIN2
Diagram 2. Through current oscillation
7/14
XC612 Series
■TEST CIRCUITS
Circuit 1
* A resistor is not needed for CMOS output type.
Circuit 2
Circuit 3
XC612N Series
XC612D Series
8/14
XC612
Series
■TEST CIRCUITS (Continued)
Circuit 3 (Continued)
XC612E Series
Circuit 4
9/14
XC612 Series
■TYPICAL PERFORMANCE CHARACTERISTICS
Ambient Temperature Topr (℃)
Ambient Temperature Topr (℃)
Note: Unless otherwise stated, pull up resistance = 100kΩwith N-ch open drain output type.
10/14
XC612
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
11/14
XC612 Series
■APPLICATION CIRCUITS EXAMPLE *Example covers N-channel open drain product's circuits
●Window comparator circuit
●Detect voltages above respective established voltages circuit
On resistors R1 and R2 equation (1) and (2)
Detect voltage = { (R1 + R2) ÷ R2} × VDF2
N.B. VDF2 = detect voltage VD2
(1)
Hysteresis (VHYS2) = { (R1 + R2) ÷R2 } × VHYS2
(2)
Note: Please ensure that input voltage 2 (VIN2) is less than VIN1 + 0.3V
●Detect voltage circuit with delay built-in
Note: Delay operates at both times of release and
detect operations.
12/14
XC612
Series
■PACKAGING INFORMATION
●SOT-25
■MARKING RULE
●SOT-25
①Represents output configuration
CONFIGURATION
MARK
PRODUCT SERIES
VDET1
N-ch Open Drain
N-ch Open Drain
CMOS
VDET2
N-ch Open Drain
CMOS
5
4
N
D
E
XC612NxxxxMx
XC612DxxxxMx
XC612ExxxxMx
①
1
②
③
④
N-ch Open Drain
2
3
②, ③Represents sequence number
④Represents production lot number
0 to 9, A to Z repeated. (G, I, J, O, Q, W excepted.)
13/14
XC612 Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this catalog is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this catalog.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this catalog.
4. The products in this catalog are not developed, designed, or approved for use with such
equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this catalog within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this catalog may be copied or reproduced without the
prior permission of Torex Semiconductor Ltd.
14/14
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