XC6134N29AER-G [TOREX]
Power Supply Support Circuit, Adjustable, 1 Channel, CMOS, PDSO6, USP-6;型号: | XC6134N29AER-G |
厂家: | Torex Semiconductor |
描述: | Power Supply Support Circuit, Adjustable, 1 Channel, CMOS, PDSO6, USP-6 光电二极管 |
文件: | 总28页 (文件大小:526K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
XC6134 Series
ETR02029-001
Delay capacitor adjustable voltage detectors with sense pin isolation and HYS
external adjustment
■GENERAL DESCRIPTION
The XC6134 series are ultra-small delay capacitor adjustable type voltage detectors that have high accuracy and sense pin
isolation. High accuracy and a low supply current are achieved by means of a CMOS process, a highly accurate reference
power supply, and laser trimming technology.
The sense pin is isolated from the power input pin to enable monitoring of the voltage of another power supply. Output can be
maintained in the detection state even if the voltage of the power supply that is monitored drops to 0V. The sense pin is also
suitable for detecting high voltages, and the detection and release voltage can be set as desired using external resistors. An
internal delay circuit is also provided. By connecting a capacitor to the Cd/MRB pin, any release delay time and detect delay
time can be set, and the pin can also be used as a manual reset pin. The HYS external adjustment pin can be used to
establish a sufficient hysteresis width.
■FEATURES
Operating Ambient Temperature
Operating voltage range
Detect voltage range
Detect voltage accuracy
(Ta=25℃)
■APPLICATIONS
●Microcontroller reset and malfunction monitoring
●Battery voltage monitoring
: -40℃~+125℃
: 1.6V~6.0V
: 0.8V~5.0V
: ±18mV(VDF<1.5V)
●System power-on reset
: ±1.2%(1.5V≦VDF≦3.0V)
: ±1.5%(3.1V≦VDF≦5.0V)
: ±36mV(VDF<1.5V)
●Power failure detection
Detect voltage accuracy
: ±2.7%(1.5V≦VDF≦3.0V)
: ±3.0%(3.1V≦VDF≦5.0V)
: ±50ppm/℃(TYP.)
(Ta=-40~125℃)
Temperature Characteristics
Hysteresis width
: VDF×0.1%(TYP.)
: Yes
Adjustable Pin for Hysteresis Width
Low supply current
: 1.28μA(TYP.)
VIN=1.6V(At detection)
: 1.65μA(TYP.)
VIN=6.0V(At release)
: Yes (For details, refer to
FUNCTION CHART)
: CMOS or Nch open drain
Manual reset function
Output type
: H level or L level at detection
Output logic
: Release delay / detection delay
can be set in 5 time ratio options
(For details, refer to Selection Guide).
: USP-6C,SOT-26
Delay capacitance pin
Packages
: EU RoHS compliant, Pb free
Environment friendly
■TYPICAL PERFORMANCE
■TYPICAL APPLICATION CIRCUIT
CHARACTERISTICS
+B
VDD
VIN=3.3V、VSEN=0V→6V→0V
R3
R1=330kΩ
VIN
R1
XC6134C10B
HYS
VSEN
Rpull(*1)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
RESET
RESETB
R2
R3=0Ω
Cd/MRB
R3=330kΩ
R3=110kΩ
RESET
SW
Cd
VSS
GND
Battery (+B) voltage monitoring: Detects high voltage
by R1/R2 resistance dividing.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
A hysteresis width can be added as desired by
connecting R3 between the VSEN and HYS pins
(For details, refer to OPERATIONAL DESCRIPTION).
VSEN pin Voltage : VSEN(V)
1/28
XC6134 Series
■BLOCK DIAGRAMS
(1)XC6134C Series A/B/C/D/L type (RESET OUTPUT: CMOS/Active High)
VSEN HYS
VIN
M2
M4
RSEN=RA+RB+RC
M6
M5
+
Rp
Rn
DELAY/
MRB
CONTROL
BLOCK
-
RA
RB
RESET
VREF
M1
M3
Cd/MRB
RC
VSS
* Diodes inside the circuit are an ESD protection diode and a parasitic diode.
(2)XC6134C Series E/F/H/K/M type (RESETB OUTPUT: CMOS/Active Low)
VSEN
HYS
VIN
M2
M4
M3
RSEN=RA+RB+RC
M6
+
Rp
Rn
DELAY/
MRB
CONTROL
BLOCK
-
RA
RB
RESETB
VREF
M1
M5
Cd/MRB
RC
VSS
* Diodes inside the circuit are an ESD protection diode and a parasitic diode.
2/28
XC6134
Series
■BLOCK DIAGRAMS (Continued)
(3)XC6134N Series A/B/C/D/L type (RESET OUTPUT: Nch open drain/Active High)
VSEN HYS
VIN
M2
M4
RSEN=RA+RB+RC
+
Rp
Rn
DELAY/
MRB
CONTROL
BLOCK
-
RA
RB
RESET
VREF
M1
M3
M5
Cd/MRB
RC
VSS
* Diodes inside the circuit are an ESD protection diode and a parasitic diode.
(4)XC6134N Series E/F/H/K/M type (RESETB OUTPUT: Nch open drain/Active Low)
VSEN HYS
VIN
M2
M4
RSEN=RA+RB+RC
+
Rp
Rn
DELAY/
MRB
CONTROL
BLOCK
-
RA
RB
RESETB
VREF
M1
M3
M5
Cd/MRB
RC
VSS
* Diodes inside the circuit are an ESD protection diode and a parasitic diode.
3/28
XC6134 Series
■PRODUCT CLASSIFICATION
●Ordering Information
XC6134①②③④⑤⑥-⑦
(*1)
DESIGNATOR
ITEM
SYMBOL
C
DESCRIPTION
CMOS output
①
Output Configuration
N
Nch open drain output
e.g. 1.0V → ②=1, ③=0
Refer to Selection Guide
SOT-26 (3,000pcs/Reel)
USP-6C (3,000pcs/Reel)
②③
④
Detect Voltage
TYPE
08~50
A~M
MR-G
ER-G
(*1)
⑤⑥-⑦
Packages (Order Unit)
(*1) The “-G” suffix denotes Halogen and Antimony free as well as being fully EU RoHS compliant.
●Selection Guide
TYPE
RESET/RESETB OUTPUT
DELAY(Rp:Rn)
HYSTERESIS
A
B
C
D
L
Active High(*2)
1:0
144kΩ:0Ω
144kΩ:18kΩ
144kΩ:144kΩ
288kΩ:144kΩ
11kΩ:144kΩ
144kΩ:0Ω
0.1%(TYP)
↑
1:0.125
1:1
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
2:1
↑
0.076:1
1:0
E
F
Active Low(*2)
↑
↑
↑
↑
1:0.125
1:1
144kΩ:18kΩ
144kΩ:144kΩ
288kΩ:144kΩ
11kΩ:144kΩ
H
K
M
2:1
0.076:1
(*2) ”Active High” is H level when detection occurs, and “Active Low” is L level when detection occurs.
4/28
XC6134
Series
■PIN CONFIGURATION
●A/B/C/D/L type
VSEN
4
Cd/MRB VSS
6
5
1 HYS
6
5
VSEN
VSS
2 RESET
3 VIN
Cd/MRB 4
1
2
3
VIN
RESET HYS
SOT-26
(TOP VIEW)
USP-6C
(BOTTOM VIEW)
●E/F/H/K/M type
VSEN
4
Cd/MRB VSS
6
5
1 HYS
6
5
VSEN
VSS
2 RESETB
3 VIN
Cd/MRB 4
1
2
3
VIN RESETB HYS
SOT-26
(TOP VIEW)
USP-6C
(BOTTOM VIEW)
*The dissipation pad for the USP-6C package should be solder-plated in reference mount pattern and metal masking so as to
enhance mounting strength and heat release. If the pad needs to be connected to other pins, it should be connected to VSS (No.
5) pin.
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
SOT-26 USP-6C
1
3
VIN
RESETB
RESET
HYS
Power Input
Reset Output (Active Low)(*1)
Reset Output (Active High)(*1)
Adjustable Pin for Hysteresis Width
Voltage Sense
2
2
3
4
5
1
6
5
VSEN
VSS
Ground
Adjustable Pin for Delay Time/
Manual Reset
6
4
Cd/MRB
(*1) Refer to the ④ in Ordering Information table.
5/28
XC6134 Series
■FUNCTION CHART
PIN
SIGNAL
NAME
STATUS
L
H
Forced Reset
For details, refer to " Function Chart "
Normal Operation
Cd/MRB
OPEN
●Function Chart
1.6V≦VIN≦6.0V
Transition of VRESETB Condition
Transition of VRESET Condition
VSEN
VCd/MRB
TYPE:A/B/C/D/L
TYPE:E/F/H/K/M
V
Cd/MRB≦VMRL
Reset (High Level)(*2)
Reset (Low Level)( *1)
VSEN≧VDF+VHYS
V
Cd/MRB≧VMRH
Cd/MRB≦VMRL
Cd/MRB≧VMRH
Release (Low Level)(*1)
Reset (High Level)( *2)
Undefined(*3)
Release (High Level)(*2)
Reset (Low Level)( *1)
Undefined(*3)
V
VSEN≦VDF
V
(*1) CMOS output: VIN × 0.1 or less, N-ch open drain output, pull-up voltage × 0.1 or less.
(*2) CMOS output: VIN × 0.9 or higher, N-ch open drain output, pull-up voltage × 0.9 or higher.
(*3) For details,refer to page 16<Manual reset function>.
■ABSOLUTE MAXIMUM RATINGS
Ta=25℃
PARAMETER
SYMBOL
RATINGS
UNITS
Input Voltage
VSEN Pin Voltage
HYS Pin Voltage
Cd/MRB Pin Voltage
VIN
VSEN
-0.3~+7.0
V
V
-0.3~+7.0
VHYS
-0.3~+7.0
V
VCd/MRB
-0.3~+VIN+0.3 or +7.0(*1)
V
XC6134C(*2)
-0.3~+VIN+0.3 or +7.0(*1)
V
Output Voltage
Output Current
Power Dissipation
VRESETB VRESET
ICd/MRB
IRBOUT IROUT
XC6134N(*3)
-0.3~+7.0
±5.0
V
Cd/MRB Pin Current
mA
mA
mA
mA
mW
mW
℃
XC6134C(*2)
XC6134N(*3)
±50
+50
HYS Pin Current
IHYS
Pd
+50
SOT-26
USP-6C
250
100
Operating Ambient Temperature
Storage Temperature
Topr
Tstg
-40~+125
-55~+125
℃
* All voltages are described based on the VSS
.
(*1) The maximum value should be either VIN+0.3 or +7.0 in the lowest.
(*2) CMOS Output
(*3) N-ch Open Drain Output
6/28
XC6134
Series
■ELECTRICAL CHARACTERISTICS
Ta=25℃
-40℃≦Ta≦125℃(*5)
PARAMETER
SYMBOL
CONDITIONS
UNITS CIRCUIT
MIN. TYP. MAX. MIN. TYP. MAX.
Operating Voltage
VSEN Input Voltage
VIN
1.6
0
6.0
6.0
1.6
0
6.0
6.0
V
V
VSEN
VDF(T)
-18mV
VDF(T)
VDF(T) VDF(T)
+18mV -36mV
VDF(T) VDF(T)
×1.012 ×0.973
VDF(T) VDF(T)
×1.015 ×0.970
VDF(T)
+36mV
VDF(T)
VDF(T)(*1)=0.8V~1.4V
VDF(T)(*1)=1.5V~3.0V
VDF(T)(*1)=3.1V~5.0V
VDF(T)
VDF(T)
VDF(T)
VDF(T)
VDF(T)
VDF(T)
V
V
V
Detect Voltage
VDF
×0.988
VDF(T)
×1.027
VDF(T)
①
×0.985
×1.030
Temperature
∆VDF/
-40℃≦Topr≦125℃
-
-
-
±50
VDF
-
-
-
-
±50
VDF
-
ppm/℃
Characteristics
(∆Topr・VDF)
VDF
VDF
Hysteresis Width
Supply Current 1
VHYS
V
×0.001 ×0.007
×0.001 ×0.01
V
SEN=VDF×0.9V,
1.28 2.65
1.28 3.92
VIN=1.6V
Iss1
VSEN=VDF×0.9V,
VIN=6.0V
-
-
-
1.36 2.80
1.32 2.75
1.65 3.25
-
-
-
1.36 4.22
1.32 4.26
1.65 4.97
µA
②
③
V
SEN=VDF×1.1V,
VIN=1.6V
Supply Current 2
Iss2
VSEN=VDF×1.1V,
VIN=6.0V
SENSE Resistance
Release Delay
Resistance
RSEN
VIN=6.0V,VSEN=6.0V
E-1(*2)
-
E-2(*2)
-
MΩ
VIN=6.0V,VSEN=6.0V,
130
259
8.3
144
288
11
158
122
245
7.6
144
288
11
166
V
Cd/MRB=0V
(TYPE:A/B/C/E/F/H)
Release Delay
Resistance
VIN=6.0V,VSEN=6.0V,
Cd/MRB=0V
Rp
317
18.4
158
331
20.0
166
V
(TYPE:D/K)
Release Delay
Resistance
VIN=6.0V,VSEN=6.0V,
Cd/MRB=0V
kΩ
④
V
(TYPE:L/M)
Detect Delay
Resistance
VIN=6.0V,VSEN=0V,
Cd/MRB=6.0V
130
16.8
144
18
122
144
18
V
(TYPE:C/D/H/K/L/M)
Detect Delay
Resistance
Rn
VIN=6.0V,VSEN=0V,
Cd/MRB=6.0V
19.1 16.2
19.8
V
(TYPE:B/F)
Release Delay
Time(*3)
VIN=6.0V,
tDR0
-
-
20
20
102
82
-
-
20
20
136
116
VSEN=VDF×0.9V→VDF×1.1V
µs
⑤
Detect Delay
Time(*4)
VIN=6.0V,
tDF0
VSEN=VDF×1.1V→VDF×0.9V
Unless otherwise specified in measurement conditions, Cd/MRB pin and HYS pin are open.
(*1)
V
: Nominal detect voltage
DF(T)
(*2) For VIN conditions, refer to SPEC TABLE (p.10).
(*3) RESETB product: Time from when the VSEN pin voltage reaches the release voltage until the reset output pin reaches 5.4V
(VIN×90%).
RESET product: Time from when the VSEN pin voltage reaches the release voltage until the reset output pin reaches 0.6V(VIN×10%)
Release voltage (VDR)=Detect voltage (VDF)+Hysteresis width (VHYS).
(*4) RESETB product: Time from when the VSEN pin voltage reaches the detect voltage until the reset output pin reaches 0.6V(VIN×10%).
RESET product: Time from when the VSEN pin voltage reaches the detect voltage until the reset output pin reaches 5.4V(VIN×90%).
(*5) The ambient temperature range (-40℃≦Ta≦125℃) is a design Value.
7/28
XC6134 Series
■ELECTRICAL CHARACTERISTICS (Continued)
Ta=25℃
-40℃≦Ta≦125℃(*7)
TYP. MAX.
PARAMETER
SYMBOL
CONDITIONS
UNITS
mA
CIRCUIT
MIN. TYP. MAX. MIN.
Hysteresis Output
Current
VIN=1.6V,
SEN=0V,VHYS=0.3V
IHYSOUT
1.9
-
3.4
-
0.7
-
3.4
-
V
⑥
Hysteresis Output
Leakage Current
VIN=6.0V,VSEN=6.0V,
IHYSLEAK
0.01
0.1
0.01
1.0
µA
V
HYS=6.0V
V
SEN=VDF×0.9V,
Nch. VRESETB=0.3V
VIN=1.6V
1.9
4.2
3.4
6.0
-
-
-
-
-
-
0.7
2.0
4.3
6.2
7.3
8.1
3.4
6.0
-
-
-
-
-
-
VIN=2.0V
IRBOUTN
VIN=3.0V
8.6
10.5
14.1
17.0
19.2
10.5
14.1
17.0
19.2
VIN=4.0V
12.7
15.6
17.8
RESETB
VIN=5.0V
mA
Output Current
VIN=6.0V
VSEN=VDF×1.1V,
Pch.
V
RESETB=VIN-0.3V
IRBOUTP
VIN=1.6V
-
-
-
-1.2
-3.0
-4.9
-0.7
-2.5
-4.4
-
-
-
-1.2
-3.0
-4.9
-0.48
-1.1
VIN=3.0V
VIN=6.0V
-2.5
VSEN=VDF×1.1V,
Nch. VRESET=0.3V
VIN=1.6V
1.9
4.2
3.4
6.0
-
-
-
-
-
-
0.7
2.0
4.3
6.2
7.3
8.1
3.4
6.0
-
-
-
-
-
-
⑦
VIN=2.0V
IROUTN
VIN=3.0V
8.6
10.5
14.1
17.0
19.2
10.5
14.1
17.0
19.2
VIN=4.0V
12.7
15.6
17.8
RESET
VIN=5.0V
mA
Output Current
VIN=6.0V
VSEN=VDF×0.9V,
Pch. VRESET=VIN-0.3V
VIN=1.6V
IROUTP
-
-
-
-1.2
-3.0
-4.9
-0.7
-2.5
-4.4
-
-
-
-1.2
-3.0
-4.9
-0.48
-1.1
VIN=3.0V
VIN=6.0V
-2.5
VIN=6.0V,VSEN=6.0V,
Nch. VRESETB=6.0V
VIN=6.0V,VSEN=0V,
Pch. VRESETB=0V
(*6)
ILEAKN
-
-
-
-
0.01
-0.01
0.01
0.1
-
-
-
-
-
0.01
-0.01
0.01
1.0
-
RESETB Output
Leakage Current
ILEAKP
µA
VIN=6.0V,VSEN=0V,
Nch. VRESET=6.0V
VIN=6.0V,VSEN=6.0V,
Pch. VRESET=0V
(*6)
ILEAKN
0.1
-
1.0
-
RESET Output
Leakage Current
ILEAKP
-0.01
-0.01
Unless otherwise specified in measurement conditions, Cd/MRB pin and HYS pin are open.
(*6) Max. value is for XC6134N (Nch open drain).
(*7) The ambient temperature range (-40℃≦Ta≦125℃) is a design Value.
8/28
XC6134
Series
■ELECTRICAL CHARACTERISTICS (Continued)
Ta=25℃
-40℃≦Ta≦125℃(*11)
PARAMETER
SYMBOL
CONDITIONS
UNITS CIRCUIT
MIN.
0.92
TYP.
MAX.
MIN.
TYP.
MAX.
VIN=1.6V,
Cd/MRB=0.5V,
Cd Pin Sink Current
(TYPE:A/E)
ICd
V
1.2
0.66
1.2
mA
V
⑧
⑨
VSEN=0V
Cd Pin Threshold
Voltage(Release)
VIN:1.6V~6.0V,
VTCd1
VSEN=0V→VDF×1.1V
VIN×0.46 VIN×0.5 VIN×0.54 VIN×0.46 VIN×0.5 VIN×0.54
Cd Pin Threshold
Voltage(Detect)
VIN:1.6V~6.0V,
VTCd2
VSEN=VDF×1.1V→0V
MRB High Level
Voltage
VIN:1.6V~6.0V,
VMRH
VIN×0.55
VIN
VIN×0.55
VIN
V
V
VSEN= VDF×1.1V
⑩
⑪
MRB Low Level
Voltage
VIN:1.6V~6.0V,
VMRL
0
VIN×0.18
0
VIN×0.18
V
SEN= VDF×1.1V
VIN:Refer to V-1(*10)
VSEN=VDF×1.1V,
Apply pulse from
,
(*8)
5.0
-
-
-
-
5.0
-
-
-
-
tMRIN
MRB Minimum
Pulse Width
µs
(*9)
V
DF×1.1V to 0V to the
MRB pin.
Unless otherwise specified in measurement conditions, Cd/MRB pin and HYS pin are open.
32.0
32.0
tMRIN
(*8) Specification is guaranteed for types A/B/C/D/L/E/F/H/K/M of the CMOS output product and types E/F/H/K/M of the Nch open drain
product.
(*9) Specification is guaranteed for types A/B/C/D/L of the Nch open drain output product.
(*10) For VIN conditions, refer to SPEC TABLE (p.10).
(*11) The ambient temperature range (-40℃≦Ta≦125℃) is a design Value.
9/28
XC6134 Series
■ELECTRICAL CHARACTERISTICS (SPEC TABLE)
Table of Characteristics by Voltage Setting
NOMINAL DETECT
E-1(Ta=25℃)
E-2(-40℃≦Ta≦125℃)
SENSE Resistance(MΩ)
V-1
VOLTAGE(V)
VDF(T)
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
SENSE Resistance(MΩ)
INPUT VOLTAGE(V)
MIN.
7.5
TYP.
20.7
23.3
26.1
28.6
31.3
33.9
36.6
38.6
39.2
39.8
40.4
40.2
39.9
39.1
38.3
37.6
37.0
36.5
36.0
35.6
35.2
34.9
34.5
34.2
34.0
33.7
33.5
33.2
33.0
32.8
32.6
32.5
32.3
32.2
32.0
31.9
31.8
31.7
31.5
31.4
31.3
31.2
30.1
MIN.
5.9
TYP.
20.7
23.3
26.1
28.6
31.3
33.9
36.6
38.6
39.2
39.8
40.4
40.2
39.9
39.1
38.3
37.6
37.0
36.5
36.0
35.6
35.2
34.9
34.5
34.2
34.0
33.7
33.5
33.2
33.0
32.8
32.6
32.5
32.3
32.2
32.0
31.9
31.8
31.7
31.5
31.4
31.3
31.2
30.1
1.6
↑
↑
↑
↑
↑
↑
VDF×1.1
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
8.6
6.8
10.0
11.0
12.2
13.4
14.5
15.7
16.9
18.1
19.3
19.0
18.6
18.3
18.0
17.8
17.5
17.3
17.1
17.0
16.8
16.7
16.5
16.4
16.3
16.2
16.1
16.0
15.9
15.8
15.7
15.7
15.6
15.6
15.5
15.4
15.4
15.3
15.3
15.2
15.2
15.1
15.1
7.6
8.5
9.3
10.2
11.1
11.9
12.8
13.6
14.5
14.3
14.0
13.8
12.1
11.9
11.8
11.7
11.5
11.4
11.3
11.2
11.1
11.0
11.0
10.9
10.8
10.8
10.7
10.7
10.6
10.6
10.5
10.5
10.5
10.4
10.4
10.3
10.3
10.3
10.2
10.2
10.2
10/28
XC6134
Series
■TEST CIRCUITS
CIRCUIT①
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
V
V
VSS
CIRCUIT②
A
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
VSS
CIRCUIT③
VIN
A
VSEN
RESET
RESETB
Cd/MRB
HYS
VSS
CIRCUIT④
VIN
VSEN
RESET
RESETB
A
Cd/MRB
HYS
VSS
*“RESET” is A/B/C/D/L type, and “RESETB” is E/F/H/K/M type.
11/28
XC6134 Series
■TEST CIRCUITS (Continued)
CIRCUIT⑤
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
Wave Form Measure Point
VSS
CIRCUIT⑥
VIN
VSEN
RESET
RESETB
Cd/MRB
A
HYS
VSS
CIRCUIT⑦
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
A
VSS
CIRCUIT⑧
VIN
VSEN
RESET
RESETB
A
Cd/MRB
HYS
VSS
*“RESET” is A/B/C/D/L type, and “RESETB” is E/F/H/K/M type.
12/28
XC6134
Series
■TEST CIRCUITS (Continued)
CIRCUIT⑨
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
V
V
V
VSS
CIRCUIT⑩
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
V
V
VSS
CIRCUIT⑪
VIN
VSEN
RESET
RESETB
Cd/MRB
HYS
Wave Form Measure Point
V
VSS
*“RESET” is A/B/C/D/L type, and “RESETB” is E/F/H/K/M type.
13/28
XC6134 Series
■OPERATIONAL DESCRIPTION
<Basic Operation>
Fig. 1 shows a typical block diagram. Fig. 2 shows the timing chart of Fig. 1.
R2
VSEN
HYS
VIN
M2
M4
M3
RSEN=RA+RB+RC
M6
M5
+B
+
Rp
Rn
DELAY/
MRB
CONTROL
BLOCK
-
RA
RB
RESETB
VREF
M1
R1
VDD
Cd/MRB
RC
RESET
SW
Cd
VSS
* The XC6134N series (N-ch open drain output) requires a resistor to pull up the output.
Fig. 1: Typical block diagram (Active Low product)
VSEN pin voltage:VSEN(MIN.:0V,MAX.:6.0V)
Release voltage:VDF+VHYS
Detect voltage:VDF
Cd/MRB pin voltage:VCd/MRB(MIN.:VSS,MAX.:VIN)
Cd pin threshold voltage:VTCd1,VTCd2
Output voltage:VRESETB(MIN.:VSS,MAX.:VIN)
tDF
tDR
①
②
③
④ ⑤
⑥
Fig. 2: Timing chart of Fig. 1(VIN=6.0V、Active Low product)
①In the initial state, a voltage that is sufficiently high (MAX.:6.0V) with respect to the release voltage is applied to the VSEN pin,
and the delay capacitance Cd is charged up to the power input pin voltage.
The VSEN pin voltage starts to fall, and during the time until it reaches the detect voltage (VSEN>VDF),
VRESETB is High level (=VIN).
Note: If the pull-up resistor is connected to a power supply other than the power input pin VIN when using the Nch open drain
output (XC6134N), High level will be the voltage of the power supply to which the pull-up resistor is connected.
14/28
XC6134
Series
■OPERATIONAL DESCRIPTION (Continued)
②The VSEN pin voltage continues to drop, and when it reaches the detect voltage (VSEN=VDF), the Nch transistor for delay
capacitance discharge turns ON, and discharge of the delay capacitance Cd starts through the delay resistor Rn.
The time from VSEN=VDF until VRESETB reaches Low level is the detect delay time tDF (the detect time when the capacitor is not
connected to the Cd/MRB pin is tDF0). The delay capacitance Cd is discharged through the delay resistor Rn when it is above
the threshold voltage of VTCD2. When it is below the threshold voltage of VTCD2, the delay capacitance Cd is discharged faster
through the internal built-in low impedance switch.
③During the time that the VSEN pin voltage is below the detect voltage VDF, the delay capacitance Cd discharges to ground level.
The VSEN pin starts rising again, and during the time until it reaches the release voltage (VSEN<VDF+VHYS), VRESETB holds Low
level.
④The VSEN pin voltage continues to rise, and when it reaches the release voltage (VDF+VHYS), the Nch transistor for delay
capacitance discharge turns OFF, and charging of the delay capacitance Cd through the delay resistor Rp starts.The delay
capacitance Cd is discharged through the delay resistor Rp when it is below the threshold voltage of VTCD1. When it is above the
threshold voltage of VTCD1, the delay capacitance Cd is discharged faster through the internal built-in low impedance switch.
⑤When the delay capacitance pin voltage reaches VTCd1, VRESETB changes to High level.
The time from VSEN=VDF+VHYS until the VRESETB logic changes is the release delay time tDR(the release time when the capacitor
is not connected to the Cd/MRB pin is tDR0).
⑥During the time that the VSEN pin voltage is higher than the detect voltage (VSEN>VDF), VRESETB holds High level.
The above operation description is for an Active Low detection product.
For an Active High product, reverse the logic of the reset pin.
In the factory shipping state, internal hysteresis is not added (VHYS =VDFx0.001V(TYP.)), so please add a hysteresis of 1% or
more with an external resistor. For the calculation method, refer to <Hysteresis external adjustment function> below. Also
please refer to “Note on use5)6)” as the notes.
<Hysteresis external adjustment function>
Hysteresis can be added as desired by inserting a resistor between the node to monitor and VSEN pin, and between the VSEN pin
and HYS pin.
The calculation method for adding hysteresis by increasing only the release voltage and leaving the detect voltage unchanged
is given below.
For the circuit schematic, refer to Fig. 3: Hysteresis Augmentation Circuit 1.
VDR(H)=VDR(T)×{1+(RD/RE)}
Hysteresis width=VDR(H)-VDF(T)
Example 1: RD=200kΩ, RE=200kΩ, VDF(T)=1.000V, VDR(T)=1.001V.
VDR(H)=2.002V
Hysteresis width=2.002-1.000 =1.002V
The calculation method for detecting high voltage and adding hysteresis is shown below.
For the circuit schematic, refer to Fig. 4: Hysteresis Augmentation Circuit 2.
VDF(H)=VDF(T)×{1+(R1/R2)}
VDR(H)=VDR(T)×{1+(R1/R2)+(R1/R3)}
Hysteresis width=VDR(H)-VDF(H)
Example 2: R1=R3=500kΩ, R2=200kΩ, VDF(T)=2.000V, VDR(T)=2.002V.
VDF(H)=7.0V
VDR(H)=9.009V
Hysteresis width=9.009-7.0=2.009V
(Note 1) VDF(H) is the detect voltage after external adjustment.
(Note 2) VDR(H) is the release voltage after external adjustment.
(Note 3) VDR(T) is the release voltage.
(Note 4) VDF(T) is the detect voltage.
(Note 5) The R2 resistance is in parallel with the internal RSEN resistance, and thus to increase the accuracy of the detect
voltage and release voltage after external adjustment, select an R2 resistance that is sufficiently small with respect to the RSEN
resistance. For RSEN resistance values, refer to SPEC TABLE (p.10).
(Note 6) If high voltage is to be detected, divide the voltage with resistors R1 and R2 so that VSEN pin≦6V. The battery voltage
(+B) assumes up to 12V in this case.
+B
VDD
+B
VDD
R3
RE
VIN
R1
VIN
Rpull(*1)
HYS
VSEN
RD
HYS
VSEN
Rpull(*1)
RESET
RESETB
RESET
RESETB
R2
Cd/MRB
Cd/MRB
RESET
SW
Cd
RESET
SW
Cd
VSS
VSS
GND
GND
Fig. 3: Hysteresis Augmentation Circuit 1
Fig. 4: Hysteresis Augmentation Circuit 2
15/28
XC6134 Series
■OPERATIONAL DESCRIPTION (Continued)
<Release delay time / detect delay time>
The release delay time and detect delay time are determined by the delay resistors (Rp and Rn) and the delay capacitance Cd.
The ratio of the delay resistances (Rp and Rn) is selectable from 5 options. The delay time is adjustable using the combination
of delay resistance and delay capacitance value. (Refer to “Selection Guide”)
The release delay time (tDR) is calculated using Equation (1).
tDR=Rp×Cd×{-ln(1-VTCd1/VIN)}+tDR0 …(1)
* ln is the natural logarithm.
The delay capacitance pin threshold voltage is VTCd1=VIN/2(TYP.), and thus when
tDR0 can be neglected, the release delay time can be calculated simply using Equation (2).
t
DR=Rp×Cd×[-ln{1-(VIN/2)/VIN}]=Rp×Cd×0.693 …(2)
The detect delay time (tDF) is calculated using Equation (3).
DF=Rn×Cd×{-ln(VTCd2/VIN)}+tDF0 …(3) * ln is the natural logarithm.
The delay capacitance pin threshold voltage is VTCd2=VIN/2 (TYP.), and thus when
DF0 can be neglected, the detect delay can be calculated simply using Equation (4).
t
t
tDF=Rn×Cd×{-ln(VIN/2)/VIN}=Rn×Cd×0.693 …(4)
Example 3: When type A is selected (Rp:Rn=144kΩ:0Ω),the delay times are as follows:
If Cd is set to 0.1uF,
tDR=144×103×0.1×10-6×0.693=10ms
t
DF is the detect delay time (tDFO) when the delay capacitance Cd is not connected.
Example 4: When type B is selected (Rp:Rn=144kΩ:18kΩ),the delay times are as follows:
If Cd is set to 0.1uF,
tDR=144×103×0.1×10-6×0.693=10ms
tDF =18×103×0.1×10-6×0.693=1.25ms
(Note 7) The release delay times tDR in Examples 3 and 4 are the values calculated from Equation (2).
(Note 8) The detect delay time tDF in Example 4 is the value calculated from Equation (4).
(Note 9) Note that the delay times will vary depending on the actual capacitance value of the delay capacitance Cd.
<Manual reset function>
The Cd/MRB pin can also be used as a manual reset pin.
When the Cd and RESET switch are connected to theCd/MRB pin (refer to Fig.1), and under the release condition, if the
RESET switch turns on, then the detect signal is generated at the RESET/RESETB pin forcibly.
For Active Low type (RESETB), under the release condition, if the RESET switch turns on, then the voltage at the RESETB pin
changes from H to L after the detect delay time.
And for Active High type (RESET), under the release condition, if the RESET switch turns on, then the voltage at the RESET pin
changes from L to H after the detect delay time.
Under the detect condition, the condition will be kept even if the RESET switch turns on and off.
In the case that either H level or L level is fed to the Cd/MRB pin without the RESET switch, the behavior of the XC6134 follows
the timing chart in Fig. 5.
L level is fed to MRB pin under the detect condition, the RESET switch will be kept.
H level is fed to MRB pin under the detect condition, the RESET switch will be undefined.
Even though the voltage at the VSEN pin changes from a higher voltage than the detect voltage to a lower voltage, as long as H
level is fed to the MRB pin, the release condition is kept.
If H level or L level is fed to the Cd/MRB pin forcibly, then even though Cd is connected to the pin, the XC6134 can’t have any
delay time.
Release voltage:VDF+VHYS
Detect voltage:VDF
VSEN pin voltage:VSEN(MIN.:0V,MAX.:6.0V)
MRB High level voltage:VMRH
Cd pin threshold voltage:VTCd
MRB Low level voltage:VMRL
Cd pin voltage:VCd/MRB (MIN.:VSS,MAX.:VIN
)
Release voltage:VDF+VHYS
Detect voltage:VDF
Undefined
Output voltage:VRESETB
(MIN.:VSS,MAX.:VIN(CMOS),Vpull(Nch open drain))
Fig. 5: Manual reset operation using the Cd/MRB pin (VIN =6.0V, Active Low product)
16/28
XC6134
Series
■NOTES ON USE
1) Please use this IC within the stated maximum ratings. For temporary, transitional voltage drop or voltage rising phenomenon, the IC is
liable to malfunction should the ratings be exceeded.
2) The power input pin voltage may fall due to the flow through current during IC operation and the resistance component
between the power supply and the power input pin.
In the case of CMOS output, a drop in the power input pin voltage may occur in the same way due to the output current. When
this happens, if the power input pin voltage drops below the minimum operating voltage, a malfunction may occur.
3) Note that large, sharp changes of the power input pin voltage may lead to malfunction.
4) Power supply noise is sometimes a cause of malfunction. Sufficiently test using the actual device, such as inserting a
capacitor between VIN and GND.
5) Internal hysteresis is not initially included with the product. Connect external resistors to the VSEN pin and HYS pin to add a
hysteresis of 1% or more. Note that if hysteresis is not added with external resistors, oscillation will occur when switching takes
place at the detect voltage or the release voltage.
6) There is a possibility that oscillation will occur if the resistances of the VSEN pin and HYS pin are high. Use a resistance of
1MΩ or less between the node to monitor and VSEN pin, and between the VSEN pin and HYS pin.
7) Exercise caution if VIN and VSEN are started in common, as the output will be undefined until VIN reaches the operating
voltage.
8) For a manual reset function, in case when the function is activated by feeding either MRB H level or MRB L level to Cd/MRB
pin instead of using a reset switch, please note these phenomena below;
・The RESET output signal will be undefined when MRB H is fed to Cd/MRB pin under the detect condition.
・The RESET output signal will be undefined based on the voltage relationship between VSEN pin and Cd/MRB pin.
9) When an N-ch open drain output is used, the VRESETB voltage at detection and release is determined by the pull-up resistance
connected to the output pin. Refer to the following when selecting the resistance value.
At detection:
VRESETB=Vpull/(1+Rpull/RON)
Vpull:Voltage after pull-up
RON(*1):ON resistance of N-ch driver M5 (calculated from VRESETB/IRBOUTN based on electrical characteristics)
Example: When VIN=2.0V(*2), RON=0.3/4.2×10-3=71.4Ω (MAX.).
If it is desired to make VRESETB at detection 0.1V or less when Vpull is 3.0V,
Rpull={(Vpull/VRESETB)-1}×RON={(3/0.1)-1}×71.4≒2.1kΩ
Therefore, to make the output voltage at detection 0.1V or less under the above conditions, the pull-up resistance must be 2.1kΩ or higher.
(*1) Note that RON becomes larger as VIN becomes smaller.
(*2) For VIN in the calculation, use the lowest value of the input voltage range you will use.
At release:
V
RESETB=Vpull/(1+Rpull/Roff)
pull: Voltage after pull-up
V
Roff: Resistance when N-ch driver M5 is OFF (calculated from VRESETB/ILEAKN based on electrical characteristics)
Example: When Vpull is 6.0V, Roff=6/(0.1×10-6)=60MΩ (MIN.). If it is desired to make VRESETB 5.99V or higher,
Rpull={(Vpull/VRESETB)-1}×Roff={(6/5.99)-1}×60×106≒100kΩ
Therefore, to make the output voltage at release 5.99V or higher under the above conditions, the pull-up resistance must be
100kΩ or less.
10) If the discharge time of the delay capacitance Cd at detection is short and the delay capacitance Cd cannot be discharged to
ground level, charging will take place at the next release operation with electric charge remaining in the delay capacitance Cd,
and this may cause the release delay time to become noticeably short.
11) If the charging time of the delay capacitance Cd at release is short and the delay capacitance Cd cannot be charged to the
VIN level, the delay capacitance Cd will discharge from less than the VIN level at the next detection operation, and this may
cause the detect delay time to become noticeably short.
12) Torex places an importance on improving our products and their reliability. We request that users incorporate fail-safe designs
and post-aging protection treatment when using Torex products in their systems.
17/28
XC6134 Series
■TYPICAL PERFORMANCE CHARACTERISTICS
(1) Detect, Release Voltage vs. Ambient Temperature
XC6134 (VDF(T)=0.8V)
XC6134 (VDF(T)=5.0V)
VIN=6.0V
VIN=6.0V
0.90
0.86
0.82
0.78
0.74
0.70
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
VDR
VDR
VDF
VDF
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
(2) Output Voltage vs Sense Voltage
XC6134x50A (VDF(T)=5.0V)
XC6134x08A (VDF(T)=0.8V)
VIN=6.0V
VIN=6.0V
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Ta=-40℃
Ta=-40℃
Ta=25℃
Ta=25℃
Ta=125℃
Ta=125℃
4.90
4.95
5.00
5.05
5.10
0.70
0.75
0.80
0.85
0.90
VSEN pin Voltage : VSEN(V)
VSEN pin Voltage : VSEN(V)
(3) Supply Current vs. Ambient Temperature
XC6134
XC6134
VSEN=VDF×1.1V
VSEN=VDF×0.9V
2.5
2.0
1.5
1.0
0.5
0.0
2.5
2.0
VIN=6.0V
VIN=6.0V
1.5
VIN=1.6V
VIN=1.6V
1.0
0.5
0.0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (
℃
)
18/28
XC6134
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(4) Supply Current vs. Input Voltage
XC6134
XC6134
VSEN=VDF×0.9V
VSEN=VDF×1.1V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
Input Voltage : VIN (V)
4.0
5.0
6.0
Input Voltage : VIN (V)
(5) Sense Resistance vs Ambient Temperature
(6) Delay Resistance vs Ambient Temperature
XC6134 (VDF(T)=0.8V)
XC6134
V
V
IN=6.0V
SEN=6.0V
TYPE : L/M
30.0
25.0
20.0
15.0
10.0
5.0
15.0
14.5
14.0
13.5
13.0
12.5
12.0
11.5
11.0
10.5
10.0
0.0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
XC6134
XC6134
TYPE : D/K
TYPE : A/B/C/E/F/H
160
155
150
145
140
135
130
125
120
300
295
290
285
280
275
270
265
260
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
19/28
XC6134 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(6) Delay Resistance vs Ambient Temperature (Continued)
XC6134
XC6134
TYPE : B/F
TYPE : C/D/H/K/L/M
20.0
19.5
19.0
18.5
18.0
17.5
17.0
16.5
16.0
15.5
15.0
160
155
150
145
140
135
130
125
120
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
(7) Delay Time vs Ambient Temperature
XC6134
XC6134
VIN=6.0V
VSEN=VDF×0.9V→VDF×1.1V
VIN=6.0V
VSEN=VDF
×1.1V→VDF
×
0.9V
Cd=OPEN
Cd=OPEN
50
45
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
0
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
(8) Hysteresis Output Current vs Ambient Temperature
(9) Hysteresis Output Current vs Input Voltage
XC6134
XC6134
VSEN=0V
VHYS=0.3V
VSEN=0V
VHYS=0.3V
30
25
20
15
10
5
30
25
20
15
10
5
V
IN=6.0V
V
IN=3.0V
Ta=-40℃
Ta=25℃
Ta=125℃
VIN=1.6V
0
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
-50
-25
0
25
50
75
100
125
150
Input Voltage : VIN (V)
Ambient Temperature : Ta (℃)
20/28
XC6134
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(10) Hysteresis Output Leakage Current vs Ambient Temperature
(11) RESET Output Current vs Ambient Temperature
XC6134xxxA
XC6134
VIN=6.0V
VSEN=VDF
×
1.1V
VSEN=6.0V
VRESET=0.3V
VHYS=6.0V
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
30
25
20
15
10
5
V
IN=6.0V
V
IN=3.0V
VIN=1.6V
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
(12) RESET Output Current vs Input Voltage
XC6134CxxA
XC6134xxxA
VSEN=VDF
×0.9V
VSEN=VDF×1.1V
V
RESET=VIN-0.3V
VRESET=0.3V
0.0
-1.0
-2.0
-3.0
-4.0
-5.0
-6.0
-7.0
-8.0
30
25
20
15
10
5
V
IN=1.6V
V
IN=3.0V
VIN=6.0V
Ta=-40℃
Ta=25℃
Ta=125℃
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
-50
-25
0
25
50
75
100
125
150
Input Voltage : VIN (V)
Ambient Temperature : Ta (℃)
(13) RESET Output Leakage Current vs Ambient Temperature
XC6134CxxA
XC6134
VIN=6.0V
VSEN=VDF
×0.9V
VSEN=0V
VRESET=VIN-0.3V
V
RESET=6.0V
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0.0
-1.0
-2.0
-3.0
-4.0
-5.0
-6.0
-7.0
-8.0
Ta=-40℃
Ta=25℃
Ta=125℃
0.0
1.0
2.0
3.0
4.0
5.0
6.0
25
50
75
100
125
150
Input Voltage : VIN (V)
Ambient Temperature : Ta (℃)
21/28
XC6134 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(14) Cd Pin Sink Current vs Ambient Temperature
(15) Cd Pin Sink Current vs Input Voltage
XC6134
XC6134
VSEN=0V
Cd/MRB=0.5V
VSEN=0V
Cd/MRB=0.5V
V
V
3.5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
IN=6.0V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
IN=3.0V
Ta=-40℃
Ta=25℃
Ta=125℃
V
IN=1.6V
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
-50
-25
0
25
50
75
100
125
150
Input Voltage : VIN (V)
Ambient Temperature : Ta (℃)
(16) Cd Pin Threshold Voltage vs Ambient Temperature
XC6134
XC6134
VSEN=0V→VDF×1.1V
VSEN=VDF
×1.1V→0V
3.5
3.5
3.0
2.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIN=6.0V
V
IN=6.0V
2.0
1.5
1.0
0.5
0.0
VIN=1.6V
VIN=1.6V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
(17) MRB High Level Threshold Voltage vs Ambient Temperature
(18) MRB Low Level Threshold Voltage vs Ambient Temperature
XC6134
XC6134
VSEN=VDF
×1.1V
VSEN=VDF
×
1.1V
V
Cd/MRB=0V→6.0V
V
Cd/MRB=6.0V→0V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VIN=6.0V
VIN=6.0V
VIN=1.6V
V
IN=1.6V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Ambient Temperature : Ta (℃)
Ambient Temperature : Ta (℃)
22/28
XC6134
Series
■PACKAGING INFORMATION
●SOT-26 (unit:mm)
2.9±0.2
+0.1
0.4
-0.05
+0.1
0.4
-0.05
6
5
4
0~0.1
1234
1
2
3
+0.1
-0.05
0.15
(0.95)
(0.95)
●SOT-26 Reference Pattern Layout (unit:mm)
0.7
0.95
0.95
23/28
XC6134 Series
■PACKAGING INFORMATION (Continued)
●USP-6C (unit:mm)
●USP-6C Reference Pattern Layout (unit:mm)
●USP-6C Reference Metal Mask Design
24/28
XC6134
Series
■PACKAGING INFORMATION (Continued)
●SOT-26 Power Dissipation (Toprmax+125℃)
Power dissipation data for the SOT-26 is shown in this page.
The value of power dissipation varies with the mount board conditions.
Please use this data as the reference data taken in the following condition.
40.0
28.9
1. Measurement Condition
Condition: Mount on a board
Ambient: Natural convection
Soldering: Lead (Pb) free
Board: Dimensions 40 x 40 mm (1600 mm2 in one side)
Copper (Cu) traces occupy 50% of the board area
In top and back faces
(Board of SOT-26 is used)
Material: Glass Epoxy (FR-4)
Thickness: 1.6mm
Through-hole 4 x 0.8 Diameter
1.4
2.54
Evaluation Board (Unit: mm)
2. Power Dissipation vs. Ambient Temperature
Board Mount (Tjmax=125℃)
Ambient Temperature (℃)
Power Dissipation Pd (mW)
Thermal Resistance (℃/W)
25
85
600
240
166.67
Pd vs Ta (Ta=125℃)
700
600
500
400
300
200
100
0
25
45
65
85
105
125
Ambient Temperature : Ta(℃)
25/28
XC6134 Series
■PACKAGING INFORMATION (Continued)
●USP-6C Power Dissipation (Toprmax+125℃)
Power dissipation data for the USP-6C is shown in this page.
The value of power dissipation varies with the mount board conditions.
Please use this data as the reference data taken in the following condition.
1. Measurement Condition
Condition: Mount on a board
Ambient: Natural convection
Soldering: Lead (Pb) free
Board: Dimensions 40 x 40 mm (1600 mm2 in one side)
Copper (Cu) traces occupy 50% of the board
area
In top and back faces
(Board of SOT-26 is used)
Material: Glass Epoxy (FR-4)
Thickness: 1.6mm
Evaluation Board (Unit: mm)
2. Power Dissipation vs. Ambient Temperature
Board Mount (Tjmax=125℃)
Ambient Temperature (℃)
Power Dissipation Pd (mW)
Thermal Resistance (℃/W)
25
85
1000
400
100.00
Pd vs Ta (Ta=125℃)
1200
1000
800
600
400
200
0
25
45
65
85
105
125
Ambient Temperature : Ta(℃)
26/28
XC6134
Series
■MARKING RULE
SOT-26
USP-6C
6
5
4
1
2
3
6
5
4
①
②
③
④
⑤
1
2
3
① represents products series
MARK
PRODUCT SERIES
XC6134******-G
X
②,③ represents internal sequential number
01, …, 09, 10, …, 99, A0, …, A9, B0, …, B9, …, Z9… repeated.
(G, I, J, O, Q, W excluded)
④,⑤ represents production lot number
01~09, 0A~0Z, 11~9Z, A1~A9, AA~AZ, B1~ZZ in order.
(G, I, J, O, Q, W excluded)
* No character inversion used.
27/28
XC6134 Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
28/28
相关型号:
XC6134N30MMR-G
Power Supply Support Circuit, Adjustable, 1 Channel, CMOS, PDSO6, SOT-26, 6 PIN
TOREX
XC6134N47AMR-G
Power Supply Support Circuit, Adjustable, 1 Channel, CMOS, PDSO6, SOT-26, 6 PIN
TOREX
XC6134N48AMR-G
Power Supply Support Circuit, Adjustable, 1 Channel, CMOS, PDSO6, SOT-26, 6 PIN
TOREX
XC6134N49AMR-G
Power Supply Support Circuit, Adjustable, 1 Channel, CMOS, PDSO6, SOT-26, 6 PIN
TOREX
©2020 ICPDF网 联系我们和版权申明